CN101377826B - Radio frequency and/or radio frequency identification electronic filemark/ apparatus with integration substrate, and manufacturing and using method thereof - Google Patents

Abstract

The invention discloses an MOS radio frequency monitoring and/or recognition electronic volume label and a manufacturing method thereof. The electronic volume label generally comprises a baseplate, an antenna arranged on the baseplate and/or an inductor, and an integrated circuit formed at one position on the baseplate besides the antenna and/or the inductor. The integrated circuit is provided with a bottommost layer physically contacting with the surface of the baseplate. The manufacturing method generally comprises the following steps: (1) the bottommost layer of an integrated circuit is formed on a baseplate; (2) successive layers of the integrated circuit are formed on the bottommost layer of the integrated circuit; and (3) an electrical conduction layer is attached to the baseplate.

Description

There is the radio frequency of conformability substrate and/or radio frequency recognizing electric volume label/device and manufacture thereof and using method

Technical field

The present invention relates to sensor, Electronic Article Surveillance (electronic article surveillance, EAS), radio frequency (radio frequency, RF) and/or rfid device (RFID) electric label and device, the particularly structure of Electronic Article Surveillance, radio frequency and/or rfid device and manufacture thereof and/or production method.Therefore, the present invention can provide a kind of processing procedure of low cost, in order to manufacture the electric label an of rfid device (or Electronic Article Surveillance).This electric label comprises the subset (subset) of a substrate, a radio-frequency front-end or a radio-frequency front-end, internal memory and logical circuit.

Background technology

Even to this day, long distance drives the electronic installation of (remotely powered) and relevant system is known knows.For example, to be proposed by the people such as Geiszler and name is called that the United States Patent (USP) (case number 5,099,227) of " proximity detection means " (proximity detecting apparatus) discloses a kind of long distance drive unit.This long distance drive unit utilizes electromagnetic coupled to obtain electric power from a remote source (remote source), utilizes electromagnetism and electrostatic coupling to transmit data to receiving end stored afterwards.This receiving end usually and this remote source put together.Namely the communicating device that this long distance drives is well-known rfid device electric label.

Rfid device electric label and relevant system thereof serve many purposes.For example, the individual of rfid device electric label through being usually used in robotization door guard (automated gate sentry) application system identifies and protects the buildings or area saved from damage.These electric labels adopt the form of access control card (access control card) usually.The information be stored in rfid device electric label attempts to enter the holder of this electric label in buildings or the area of being saved from damage in order to identify.

Old-fashioned robotization door guard application system needs the people having the right to enter the buildings saved from damage usually, their identification card or electric label is inserted or a swiped through reader for this system, to read information by this identification card or electric label.New-type rfid device electronic volume label system utilizes radio frequency data transmission technology, allows this electric label to be read under a short distance, saves the necessity by identifying electric label insertion or swiped through reader whereby.

Most characteristic, user only need hold this electric label and is maybe placed near this base platform by this electric label near a base platform.This base platform is coupled to the safety system protecting this buildings or area.This base platform transmits a trigger pip (excitation signal) to this electric label to drive the circuit on this electric label.The information of storage in this trigger pip, and is sent to this base platform by this electric label by this Circuit responce.This base platform receives and to this decoding of information.This information then by this safety system process to judge that whether this access appropriate.Further, identify that electric label can by a trigger pip by long distance write (such as, programming and/or inactive (deactivated)).This trigger pip is by a predetermined method suitably modulation.

Some traditional rfid device electric label and system mainly use electromagnetic coupled with this remote-control device of remote boot server.This remote-control device encourages (exciter) system and a receiving system to be coupled with one.This excitation system produces an electromagnetic triggering signal to drive this device and to make this device transmit a signal that may comprise the information of this storage.This receiving system receives this signal produced by this remote-control device.

In more basic aspect, rfid device electric label circuit performs some or all following listed function usually:

(1) by this reader region absorption radio-frequency (RF) energy;

(2) radiofrequency signal is converted to the direct current signal driving this chip;

(3) to the income frequency (incoming clock) in the radiofrequency signal transmitted by this reader, sequential (timing) and/or command signal demodulation;

(4) produce state machine (state machine) to judge and steering logic, in order to income or current instruction effect;

(5) data of digital form are read by a memory array or other source (such as, the output of a sensor).The reading of these data is just as in a counter or a register machine;

(6) there is storage assembly (such as internal memory) and be read reader and/or for the identity code of safety certification or out of Memory in order to store.For example, EAS stops using type memory (deactivation-typememory) in order to calculate the predetermined use number of a transport ticket and/or to pass information back to this reader by a sensor; And

(7) to passing the data of coding of electric label antenna, clock signal or other instruction modulation back to transfer to electric label reader.

On the other hand, EAS electric label circuit can the above-mentioned step of exclusive segment and/or function.For example, logic frequency division EAS drives the logic of an inside to divide dividing circuit (logicdivider) with basic radio-frequency (RF) energy.Logic divides the antenna of dividing circuit then modulation electric label, causes the subharmonic of a uniqueness (sub-harmonic) signal to be passed back reader (such as, asking for an interview BrP case GB 2,017,454A).This rd harmonic signal can separate out easily and produce an effective EAS signal from other noise source (such as the harmonic wave of carrier (carrier)).In some example, the nonlinear effect coming from semiconductor device even more can simplify thing, such as, be exposed in United States Patent (USP) case numbers 4,670, the example in 740.Nonlinear effect in semiconductor device or variodenser causes rd harmonic signal, and rd harmonic signal can be detected by reader when not needing the radio frequency of relaying-direct current power conversion or logical process.

Refer to Figure 1A.Traditional rfid device electric label is formed by a processing procedure.This processing procedure comprises the wafer 10 produced by traditional silicon wafer process is cut into several chip 20.Then, chip 20 to be put on the slide glass of an antenna or inductor (this slide glass may comprise an etching, cutting or the metal antenna of printing, inductor coil or other conductive structure).Or, as shown in Figure 1B, chip 20 can be placed to a carrying belt (interposer strap) 40 or carrying carrier (interposer carrier) 40, and this carrying belt 40 then can be attached to the one inductor/antenna 52 on a support membrane 50.

This processing procedure may comprise the joining technique of various physical property, similarly is to stick together or engage (anisotropic conductive epoxy bonding), ultrasonic, bump bond (bump-bonding) by routing, anisotropy conductive epoxy resin or cover the electrical inside of crystalline substance (flip-chip) method establishment to connect.This process of sticking together comprises use heat, time and/or ultraviolet photoetching usually.Because chip 20 as far as possible more does less (being less than 1mm) usually to reduce the cost of each chip 20, thus on chip 20 may be quite little for the contact unit (pad elements) be electrically connected.This means that accuracy that the storing action need of chip 20 is quite high is for mechanical operation at a high speed (such as, the location in a precalculated position is normally necessary in 50 microns).

This processing procedure comprise pick out other chip, chip is placed in correct position on this antenna, inductor, carrier or loading plate in the mode engaged and formation rationality or electrical inside connect.On the whole, this processing procedure can be one quite slowly and the processing procedure of costliness.

If this processing procedure uses the loading plate of a relaying, the advantage of cost and turnout can be had.First, chip 20 is attached to a net volume (web roll) of carrying carrier 40.This action can complete easily and be parallelization running sometimes.Because carrying carrier 40 is usually closely to separate, so the storing operation of other novelty, similarly be fluidic self-assembly (fluidic self-assembly) or needle-bar attachment (pin bedattachment) processing procedure, can complete easily.Carrying carrier 40 comprises electric channel 34,36 usually.The distribution of electric channel 34,36 starts from this chip 20 and local with other on carrying carrier 40 of sizable and/or wider area distributions.Electric channel 34,36 can allow the operation of high yield and harmonic analysis attachment (lowresolution attach), similarly is roll (crimping) or conductive adhesive attachment.(pick-and-place) is put and/or under routing processing procedure compares, conductive adhesive is attached to and is functionally similar to a traditional metal tape (strap) with the choosing for making a chip and an inductor substrate integrate.

In some example, for the harmonic analysis attachment processes of metal tape according to the equipment of commercialization or material (M ü hlbauer TMA 600 or less), $ 0.003 dollar or less may be spent.Be attached to an inductor (not shown) after carrying carrier 40, cause electric connection to be formed at this place.This carrying processing procedure is for covering crystalline substance or bump bond method also may have advantage.Relatively, the short column (stubs) needed, projection (bumps) or other inner coupling assembling being formed at by traditional method (such as routing) may be more expensive or more unfavorable on larger inductor/carrier substrate.

In order to the cost reaching each rfid device electric label is about the target of $ 0.01 dollar, and for the sales applications of single product item and other low cost and a large amount of application, therefore, it is possible to combine (integrating best) one more not expensive substrate, a stable and effective antenna, radio frequency front-end device and high resolve graphical logical circuit an electric label structure and processing procedure urgently for needed for.

Summary of the invention

Preferred embodiment of the present invention is about a MOS radio frequency and/or have the rfid device of substrate of an integration, sensor or electric label and manufacture thereof and using method.This device generally comprises (a) substrate; B () antenna and/or inductor, is positioned in a coated sheets, described antenna and/or the attachment of described inductor or be attached on described substrate, and described antenna and/or described inductor have the first terminal and the second terminal; And (c) is directly formed at the integrated circuit on this substrate.This integrated circuit is electrically connected to the described the first terminal of described antenna by the first through hole or hole, and described second terminal of described antenna is electrically connected to by the second through hole or hole, this integrated circuit comprises: (i) multiple thin film transistor (TFT) and diode, and the metalized component that (ii) makes described thin film transistor (TFT) and described diode be connected to each other, this integrated circuit has the bottom with a surface contact of this substrate.

This manufacture method generally comprises the following step: (1) forms the bottom contacted with the surface physics of substrate of an integrated circuit; (2) successive layers (successive layer) of this integrated circuit is formed on this bottom of this integrated circuit, this integrated circuit comprises: (i) multiple thin film transistor (TFT) and diode, and the metalized component that (ii) makes described thin film transistor (TFT) and described diode be connected to each other; And an antenna and/or an inductor adhere to or are attached to this substrate by (3), described antenna and/or described inductor have the first terminal and the second terminal, described the first terminal is electrically connected to described integrated circuit by the first through hole or hole, and described second terminal is electrically connected to described integrated circuit by the second through hole or hole.Or this manufacture method may comprise the following step: this bottom that (1) forms this integrated circuit in this substrate this on the surface; (2) this successive layers of this integrated circuit is formed on this bottom of this integrated circuit; And (3) form an electrical conductive structure by the active layer being attached to this substrate.

This using method generally comprises the following step: (i) causes (causing) or induction (inducing) electric current in this recognition device, and this electric current enough makes this recognition device radiation, reflection or the detectable electromagnetic signal of modulation one; (ii) this detectable electromagnetic radiation is detected; And optionally (iii) processes the information transmitted by this electromagnetic radiation.Optionally, this using method may comprise (iv) further by this recognition device (or sensor) transmission (transporting) or transmitting (transmitting) this information to one reading device.

The printing technology of sheet-fed printing (sheet-fed) or web feed printing (web-fed) is used very likely to manufacture rfid device electric label with low-down cost.Printing technology has potential cost advantage, because the utilization factor of material can be increased (such as, the process of additive or half additive (semi-additive)), the step that combines deposition and be shaped, and reduce main expenditure and the operation cost of equipment.In addition, traditional high yield printing process can coordinate flexible base plate (such as, a plastic sheet or a metal foil plate) and improve the application surface of electric label.The substrate (or chip) that the utilization factor of material and the disposal route of additive make per unit area be subject to processing has lower cost, causes the attachment processes between passive device and active circuits and/or integrate processing procedure to have low cost.Further, the processing procedure of light requirement cover (mask-less) is not easier to the customized service reaching rfid device.For example, each rfid device, according to the inquiry (inquiry) of a reader, provides the identification code of unique (unique) and/or a unique reaction time Yan Rather-late (response time delay).

In addition, if circuit can be printed directly on this antenna or inductor, step and the relevant cost of attachment then can save.This method is with the cost-effective method of semiconductor crystal wafer is different traditionally, namely by the size that reduces chip with reduces chip cost (but this method may cause oneself to limit for the silica-based rfid device electric label of directly attachment, because chip is less, the cost of attachment processes can increase).But the rfid device electric label all through printing and without region limits may be got profit further from the development of some processing procedure, instrument and/or material.These processing procedures, instrument and/or material extensively may not obtain or commercially may not peddle." the conformability substrate " pointed out in this manual allows printing technology and per unit area to have the video picture process integration of low cost.For example, the processing cost of current 0.35 micron silicon chip is US $ 25/in ², the processing cost of traditional polysilicon video picture is US $ 0.50-$ 0.90/in ², and the processing cost of printing technology is expected much smaller than US $ 0.50/in ².

By using a substrate (interposer-based) processing procedure, the processing procedure of some or all film video picture traditionally and photoelectric material is possible.The processing procedure of photoelectric material comprises and manufactures processing procedure for inorganic semiconductor, dielectric medium and other scroll bar type (roll-to-roll) being positioned at the development of the film on metal foil plate, sheet and/or other flexible base plate very good.For single film, the cost of this processing procedure is greatly about US 0.01/in ²neighbouring or less.Therefore, for a quite little substrate (about 25mm ²), the cost of this processing procedure is not high.But (namely area is much larger than 100mm if whole inductors or electric wiring substrate must be processed ²), then cost expection can be more expensive.This processing procedure greatly can save cost than low resolution substrate attachment (US $ 0.003), and this processing procedure provides an effective method, make the processing procedure of rfid device electric label and video picture and photoelectric material be combined (or, be combined with print steps and cause a complete manufacture process.This manufacture process does not need by the time perfect for one of printing-type rfid device electric label utensil and Materials to complete.

But finally, this processing procedure comprises the printing process of bobbin (spool-based) and/or scroll bar type (roll-to-roll).Due to lower expenditure equipment cost, high yield (hundreds of square centimeter per hour), the lifting of materials'use rate and/or the minimizing of fabrication steps, this processing procedure can make manufacturing cost lower.

The present invention advantageously provides a kind of radio frequency and/or rfid device electric label of low cost.This radio frequency and/or rfid device electric label can have application and the operation of the standard of the equipment and system of traditional radio frequency, rfid device electric label and/or Electronic Article Surveillance.By reducing expensive and/or low-producing attachment steps number and minimizing manufacture active electronic circuit cost, a kind of electric label of low cost by direct printing or can otherwise form this circuit on a substrate.This substrate is then attached to one inductor/carrier with quite low accuracy and quite cheap cost.

Accompanying drawing explanation

In order to above and other objects of the present invention, feature and advantage can be become apparent, below in conjunction with accompanying drawing, preferred embodiment of the present invention is described in detail:

Figure 1A to Fig. 1 C is the step of the conventional process manufacturing rfid device electric label, and this processing procedure comprises on traditional semi-conductor chip to substrate of attachment one;

Fig. 2 A and Fig. 2 B is in order to manufacture according to the committed step with an exemplary process of the rfid device electric label/device of a conformability substrate of the present invention; And

Fig. 3 A to Fig. 3 H is the committed step manufacturing the exemplary process of an integrated circuit on the substrate for rfid device electric label/device according to the present invention.

Embodiment

For asking convenient and simplifying, the words occurred in the text " is coupled to ", " being connected to " and " with ... communication " means direct or indirect coupling, connection or communication, unless referred else in literary composition.These words usually alternately and may alternately implement, but the meaning that generally its this field given is cognitive.Further, be similarly and ask convenient and simplify, words " radio frequency ", " radio-frequency (RF) identification " and " identifications " are according to the object of use and/or a device and/or electric label alternately.Further, words " electric label " or " device " can refer to any radio frequency and/or radio frequency identification sensor at this, electric label and/or device.Further, words " integrated circuit " means a single structure, and this structure comprises several electrical aggressive device.These aggressive devices are formed by several conductor, semiconductor and insulator film, but usually do not comprise assembly that is discrete, mechanical type attachment (similarly be chip, metal wire engage and lead-in wire, substrate or an antenna and/or electrical inductor assembly) or mainly have the material that sticks together function.In addition, words " product item ", " object " and " article " can be used alternatingly, and when wherein is also comprised other words by during use.In the present invention, one " main face " of a structure or object is at least defined by the greatest axis of this structure or object to a certain extent.Such as, if this structure is circle and has the Radius being greater than its thickness, this main face of this edge grain [s] (radial surface) this structure.

The present invention, about a radio frequency sensor, a radio frequency anti-theft system and/or rfid device, comprises (a) substrate; (b) antenna on the substrate and/or an inductor; And (c) is except this antenna and/or this inductor, be formed at an integrated circuit of the position on this substrate.This integrated circuit has the bottom with a surface contact of this substrate.In different preferred embodiments, this integrated circuit comprises thin film transistor (TFT), diode, connects these circuit units with choosing (optional) capacitor and/or resistor and metalized component in order to inside.In other preferred embodiment, at least one deck in this integrated circuit comprises a printing or laser graphics layer.

Further, the present invention is about the manufacture method in order to manufacture a radio frequency sensor, a radio frequency anti-theft system and/or rfid device.This manufacture method generally comprises the following step: the bottom that (1) forms an integrated circuit in a substrate one on the surface; (2) successive layers of this integrated circuit is formed on this bottom of this integrated circuit; And an electric action layer is attached to this substrate by (3).Or this manufacture method may comprise the following step: this bottom that (1) forms this integrated circuit in this substrate this on the surface; (2) successive layers of this integrated circuit is formed on this bottom of this integrated circuit; And (3) form an electrical conductive structure by the active layer being attached to this substrate.

In different preferred embodiments, one deck of this integrated circuit or more layer is formed by printing or this layer material of laser graphicsization.In a preferred embodiment, the step forming this bottom of this integrated circuit comprises printing or this bottom of laser graphicsization.

Further, the present invention is about a kind of method detecting a product item or object.The method generally comprises the following step: (A) causes or respond to an electric current in affix or this burglary-resisting system relevant to this product item or object and/or recognition device, and this electric current enough makes this device radiation, reflection or the detectable electromagnetic signal of modulation one; (B) this detectable electromagnetic radiation is detected; And optionally (C) processes the information transmitted by this electromagnetic radiation.Optionally, the method may comprise further and to be transmitted by this recognition device (or sensor) or to launch this information to one reading device.

About of the present invention different from can being further understood by following demonstration preferred embodiment.

exemplary MOS rfid device electric label/device

Of the present invention one towards about a rfid device, comprises (a) substrate; (b) antenna on the substrate and/or an inductor; And (c) is except this antenna and/or this inductor, be formed at an integrated circuit of the position on this substrate.This integrated circuit has the bottom with a surface contact of this substrate.

Therefore, the invention provides a kind of radio-frequency (RF) identification (or Electronic Article Surveillance) electric label (this electric label also may comprise sensor and active rfid device, similarly is the electric label with a battery) of low cost.The modulating signal behavior of this sensor is general to be changed because of some external change in environment (such as, the electric conductivity of temperature, structure or the surface etc. of this sensor attachment).This electric label comprises a substrate, one antenna/inductor and a radio-frequency front-end (or the subset of a radio-frequency front-end and logical circuit).This electric label can operate according to radio-frequency (RF) identification standard now.

According to the show, based on inorganic material (such as, the nanocrystal of laser printing) printing-type electronic package can be formed on some flexible base plate, similarly be high temperature pi (polyimide) or metal foil plate, prerequisite is if a suitable thermal isolation/barrier layer is inserted into this substrate (such as metal foil plate) and by continuing between layer with laser treatment.Therefore, the present invention utilizes this kind of material as the substrate in printing-type Electronic Article Surveillance, radio frequency, rfid device electric label or the device of one soft (at least partly for soft).

This substrate generally has a size, and this size can by traditional thin film manufacture process and/or novelty or state-of-the-art printing process being cost-effectively processed, with the radio circuit of output low cost.Integrated circuit can be formed on a flexible base plate, such as pi, glass/polymer laminate, high temperature polymer or metal foil plate, and above-described substrate can comprise one or more barrier layer further.Generally speaking, this substrate is more cheap than traditional silicon with similar size haply.But the substrate of traditional rfid device has 1cm usually ²area.In comparison, the rfid device of traditional silicon substrate may have 0.01cm ²area or less.

For example, several situation uses this substrate favourable below: (1) using this substrate as the aluminium of plating, aluminium/copper, stainless steel or similar metal foil plate; (2) this substrate is connected as inside, electrode and dielectric medium, for bulk storage device or IC resonating capacitor and inductor; (3) for the electrode of diode, mos device or FET; And (4) using this substrate as WORM/OTP, stop using assembly (deactivation) or other memory storage elements.The example application of this substrate can check at United States Patent (USP) case number 10/885,283 (attorney reference number IDR0121) and United States Patent (USP) case number 11/104,375 (attorney reference number IDR0312).Therefore, in many preferred embodiments, this antenna and/or inductor will be formed at a first surface of this substrate, and the second surface of this first surface that this integrated circuit will be formed at relative to this substrate.

Therefore, the present invention is about a recognition device, and this recognition device comprises (a) substrate; B () is formed at an antenna on a first surface of this substrate and/or an inductor; And (c) is formed at relative to the integrated circuit on a second surface of this first surface of this substrate.This integrated circuit has the bottom with this second surface brought into physical contact of this substrate.

In a preferred embodiment, this integrated circuit comprises at least one printed layers.This printed layers can comprise semi-conductor layer, an interlayer dielectric layer (interlayer dielectric), an interconnecting metal layer (interconnectmetal layer) and/or a gate metal level (gate metal layer).

Usually, this integrated circuit may comprise a gate metal level, one or more layer semiconductor layer (such as, the diode layer of a transistor channels layer, one source pole/drain terminal layer and/or one or more slight doping or severe doping), (each electrode for capacitors general couple is to another electrode for capacitors for the gate insulation layer between this gate metal level and this semiconductor layer, one or more electrode for capacitors.Electrode for capacitors also may be integrated circuit a part or capacitor electrode is integrated with substrate or antenna/inductor layers most probably or be a wherein part) several metallic conductor of being electrically connected with diode layer and/or the electrode for capacitors of this gate metal level, this source terminal and this drain terminal and/or a most top layer and/or the interlayer dielectric layer between these metallic conductors and this semiconductor layer.This integrated circuit may comprise one or more resistor further, and it comprises the polysilicon of a metal and/or slight doping or severe doping.

In a preferred embodiment, this integrated circuit several metallic conductors of comprising a gate metal level, several semiconductor layer (the transistor channels layer contacted with one source pole/drain terminal layer), a gate insulation layer between this gate metal level and this transistor channels layer and being electrically connected with this gate metal level, this source terminal and this drain terminal.According to manufacture one MOS rfid device electric label/device, demonstration (exemplary) layer of this integrated circuit is in following detailed description.

This substrate may comprise a flexible material, and this flexible material can resist suitable high temperature process (such as, temperature range from 300 DEG C, 350 DEG C, 400 DEG C, 450 DEG C or higher, to 500 DEG C, 600 DEG C or 1000 DEG C.This flexible material at such temperatures, significantly degenerate or decline by its machinery and/or electrically usual not having).For example, this substrate may comprise a thin glass sheet (50-200 micron) or bar (slip), a glass/polymer laminate, a high temperature polymer (such as, polyimide, polyethersulfone, polyethylene naphthalate [PEN], polyether ether ketone [PEEK] etc.) or a metal foil plate, similarly be aluminium or stainless steel.Representational thickness based on the material used, but in general between 25 microns to about 200 microns (such as, from about 50 microns to about 100 microns).

This antenna and/or inductor can comprise this antenna, this inductor or both, and can comprise further be coupled to or be integrated into said structure an electrode for capacitors (see U.S. patent application case number 10/885,283 (applying date is on July 6th, 2004) and U.S. patent application case number 11/104,375 (applying date is on April 11st, 2005)).Usually, antenna and/or inductor comprise a metal.

In a preferred embodiment, the commercially available paper tinsel plate (such as, the alloy of aluminium, stainless steel, copper or these metals) of this metal one.In these cases, (this antenna and/or inductor are made up of this metal foil plate.On the other hand, this integrated circuit is positioned at the opposing face of this substrate), the method manufacturing a radio-frequency (RF) identification and/or electronic article surveillance device (paragraph see following) may comprise the metal being removed part or more part by this metal foil plate further.Under the integrated circuit (such as, transistor and diode, but use a part for this metal foil plate then nonessential using the capacitor as an electrode or flat board) that this metal is positioned at this active (or reverse side).

In a preferred embodiment, if an inductor comprises an antenna and an inductor, this inductor can as a variometer (such as, be shown in U.S. patent application case number 11/104,375).Therefore, the metal forming this antenna and this inductor may be discontinuous, and can comprise one first (such as outside) inductor being coupled to one first plate condenser, one second (such as inner) inductor being coupled to one second plate condenser and the dielectric film be formed on this first (outside) inductor, this second (inside) inductor and this first and second plate condenser according to an Electronic Article Surveillance of the present invention and/or recognition device.This first dielectric film has hole to be exposed to the open air to make the end of this first inductor and this second inductor (such as outside and inner).

In a further preferred embodiment, this plate condenser can be linear or nonlinear and/or this device can comprise first and second Nonlinear Planar capacitor be formed on this dielectric film further.First and second Nonlinear Planar capacitor is coupled to this first and second line slab capacitor respectively.

Device of the present invention also may comprise a support and/or support (backing) layer (not shown) further and be formed at one of this inductor 110 on the surface and relative to this dielectric film 20.This support and/or supporting layer common and the existing field in Electronic Article Surveillance and rfid device (see U.S. Patent Publication No. 2002/0163434 and United States Patent (USP) case numbers 5,841,350,5,608,379,4,063,229).

Usually, this support and/or supporting layer provide following functions: (1) sticks together surface for being attached to or being placed in after this electric label/device on the article waiting to follow the trail of or monitor as one; And/or (2) some mechanical support for this electric label/device.For example, device of the present invention may be attached to the back side of an identification trade mark or price label, and an adhesion layer coat or be placed in this device surface and relative to this identification trade mark or price label (selectivity covers a upper existing releasing piece (release sheet) until when this label will be used), to form one for a trade mark of a traditional radio-frequency recognition system or label.

manufacture the demonstration methods of a MOS rfid device electric label/device

In a preferred embodiment, the present invention is about the method for a kind of manufacture one recognition device.This manufacture method comprises the following step: the bottom that (1) forms an integrated circuit in a substrate one on the surface; (2) successive layers of this integrated circuit is formed on this bottom of this integrated circuit; And an electric action layer is attached to this substrate by (3), the position normally except this integrated circuit.

Or this manufacture method may comprise the following step further: this bottom that (1) forms this integrated circuit in this substrate this on the surface; (2) this successive layers of this integrated circuit is formed on this bottom of this integrated circuit; And (3) by this substrate (such as, when this substrate comprises a conductive material, similarly be a metal foil plate) or be attached to this substrate an active layer (such as, when this substrate comprises a laminate and an electrically non-conductive material of a conductive material, similarly be a metal foil plate, there is formed or the sull of a plating thereon of growing up) form an electrical conductive structure.Therefore, the invention provides one and there is cost benefit and for the manufacture of the method for rfid device.

Fig. 2 A and Fig. 2 B is in order to manufacture according to first of rfid device of the present invention the exemplary method.As shown in Figure 2 A, electric label precursor (tag precursor) 100 comprises substrate 132, and it has contact 134,136 and integrated circuit 110 with substrate 132.Usually, integrated circuit 110 is formed on one first major surfaces of substrate 132.Integrated circuit 110 can be a printing-type inorganic circuit, main use U.S. patent application case number 10/885,283 (applying date is on July 6th, 2004) and U.S. patent application case number 11/104,375 (applying date is on April 11st, 2005).The method is used to be described in the partial cross sectional views in Fig. 3 A to Fig. 3 H with the example steps forming " end gate " device.

Afterwards, contact 134,136 and integrated circuit 110 are formed on the same surface of substrate 132, are same as in Figure 1A the processing procedure forming contact 34,36.But, as shown in the exemplary process in Fig. 2 A, the dielectric substance layer of the superiors in usual integrated circuit 110 has via (via) or hole (being existing passivation layer (passivation layer) sometimes) in it, with (usual at this electrical connection circuit assembly, the superiors metallize or as intraconnection, see Fig. 3 G and Fig. 3 H and discussion thereof).Contact 134,136 provides in fact and the contact 34 in Figure 1A, 36 identical functions.

Then, via or hole may be formed at this major surfaces of substrate 132, and contact 134,136 and integrated circuit 110 are formed on the surface relative to this major surfaces.Usually, refer to Fig. 2 A, have a via or hole through substrate 132 and a surface of contact 134,136 exposed to the open air, to be electrically connected a terminal of antenna/inductor 152.Usually, each via/hole is positioned at a position and has its size.By using the attach operation of a suitable high yield, low resolution (see Figure 1B.With for make a chip 20 be integrated into one of an inductor substrate 40 pick put (pick-and-place) operate or compared with routing processing procedure), a terminal of antenna/inductor 152 and the contact of this correspondence easily contact with each other.

Consult Fig. 2 B again.Antenna and/or inductor 152 (may be attached to or be positioned to a coated sheets (applicator sheet) 150) are then attached to or are attached to substrate 132, cause be electrically connected be formed at contact 134,136, the position of the terminal of antenna/inductor 152 via corresponded in substrate 132 or hole.The annealing steps of one short distance (may comprise the relative main face of the small pressure of applying one to substrate 132 and coated sheets 150 further) can guarantee that inductor and/or antenna 152 are inerrably formed on substrate 132.

By reducing the number of costliness/low-producing attachment steps and reducing the cost manufacturing this active electric sub-component, processing procedure described herein can cause the electric label of a lower cost substantially.A kind of electric label of low cost can by directly printing or otherwise forming this circuit on a substrate.This substrate is then attached to one inductor/carrier with quite low accuracy and quite cheap cost.Integrated circuit can be formed on a flexible base plate, such as pi, glass/polymer laminate, high temperature polymer or metal foil plate, and above-described substrate can comprise one or more barrier layer further.

This substrate generally has a size, and this size can by traditional thin film manufacture process and/or novelty or state-of-the-art printing process being cost-effectively processed, with the radio circuit of output low cost.These processing procedures comprise sputter, evaporation, LPCVD, PECVD, bath etching (bath etching), dry ecthing, the Direct Laser printing of device assembly, the ink jet printing of any assembly or layer, spraying coating (spraycoating), scraper for coating (blade coating), extrusion coating (extrusion coating), micro-shadow technology (photolithography), the printing-type etching micro-shadow of light shield (similarly being laser or ink-jet) of random layer, screen painting (offset printing), intaglio printing (gravure printing), contact printing (contact printing), lithography (screen printing) and above-described combination and/or other technology.

Can be made by any one of the above technology substantially according to any layer material in integrated circuit of the present invention.Especially, by the process technique of low cost, similarly be printing, or the combination of printing and traditional video picture processing procedure (such as, flat-panel screens), the present invention can manufacture rfid device and/or electronic article surveillance electric label with low cost.In example below, substrate for the manufacture of integrated circuit can reduce by an effective area, and this effective area it can be formed with blanket deposition (blanket-deposited) (such as, by CVD) and/or the initiative material by the equipment/processing procedure made traditionally for manufacturing integrated circuit.Therefore, for example, method of the present invention may comprise by traditional video picture processing procedure further to form the step of the one or more second layers in integrated circuit.

Can be learnt by following describing, this antenna in the present invention and/or inductor can be formed at same side or the different edge of this substrate.Further, the processing procedure in order to process continuous print bobbin or scroll bar type substrate can be used for manufacturing and be formed at integrated circuit on substrate (except adhering to this antenna/inductor structure.In the above-described embodiment, antenna and/or inductor are attached on this substrate after this IC manufacturing).

manufacture the demonstration methods of integrated circuit

Usually, integrated circuit is directly formed on one first major surfaces of substrate 132.For " top gate " the formula device with conformability capacitor and diode, integrated circuit 110 can be use U.S. patent application case number 11/084,448 (applying date is on March 18th, 2005), U.S. patent application case number 11/203, one (part) that 563 (applying date is on August 11st, 2005) and the middle technology disclosed of U.S. patent application case number 11/452,108 (applying date is on January 12nd, 2006) are formed prints and is substantially the integrated circuit 110 of inorganic circuit.

Formed in the exemplary steps of " end gate " the formula device partial cross sectional views in following Fig. 3 A to Fig. 3 H and describe.Many following technology (although inessential in order to manufacture end lock polar mounting) that can describe also are described in U.S. patent application case number 11/084,448 (applying date is on March 18th, 2005), U.S. patent application case number 11/203, in 563 (applying date is on August 11st, 2005) and U.S. patent application case number 11/452,108 (applying date is on January 12nd, 2006).

prepare substrate

Refer to Fig. 3 A.Substrate 210 may comprise the substrate of any soft or non-soft, electric conductivity or insulation.Substrate has following function: (i), when integrated circuit is formed, provides physical support to be formed on substrate for integrated circuit, and be attached to substrate for radiofrequency launcher/receiver assembly; (ii) there is integrated circuit (printing-type is better) formed thereon; And (iii) causes electric connection penetrate substrate and formed, namely signal can transmit being formed between the integrated circuit of a major surfaces of substrate and the radiofrequency launcher/receiver assembly on the contrary major surfaces being attached to substrate.Therefore, substrate 210 may comprise a metal foil plate (preferably, it having a dielectric film (may be plating)), pi, thin glass or inorganic/organically laminate substrate.

Usually, substrate 210 before the process of step one step, cleaned traditionally and coating a upper barrier material 220, similarly be silicon dioxide or aluminium oxide.The step of coating may comprise the oxidation of a surfacing of substrate (such as, metal foil plate) and/or plating, with rotate or fluid coating and deposit barrier membrane (Honeywell AcuGlass arranges or other), sputter, CVD, spraying coating one barrier material is to any combination of described technology on this substrate or more.As shown in Figure 3A, barrier material 220a-b is coated at least two major surfaces of substrate 210.Optionally, the surface of at least one barrier material layer (such as 220a) can be processed (such as, alligatoring and activation etc.) and/or clean before next step.Under to a certain degree, substrate comprises a sheet metal or paper tinsel plate, metal foil plate can be etched and/or be cut out, as being described in U.S. patent application case number 10/885,283 (applying date is on July 6th, 2004), U.S. patent application case number 11/104,375 (applying date is on April 11st, 2005) and U.S. patent application case number 11/452,108 (applying date is on January 12nd, 2006).

the formation that gate is connected with gate layers inside

Refer to Fig. 3 B.One gate metal level 230 can be sputtered on barrier material layer 220a traditionally.Gate metal level 230 may comprise the metal being generally used in integrated circuit and/or P.e.c., similarly is Al, Ti, Ta, Cr, Mo, W, Fe, Co, Rh, Ir, Ni, Pa, Pt, Cu, Ag, Au, Zn etc.Or gate metal level 230 may comprise the alloy of above-mentioned metal, similarly be Al-Ti, Al-Cu, Al-Si, Mo-W, Ti-W etc.Or gate metal level 230 may comprise the conductive compound of above-mentioned metal, similarly be titanium nitride, titanium silicide, tantalum nitride, tantalum silicide, molybdenum nitride, molybdenum silicide, tungsten nitride, tungsten silicide and cobalt silicide etc.Gate metal level 230 may have existing thickness, such as a 50nm to 5000nm, is preferably 80nm to 3000nm, is more preferred from 100nm to 2500nm, or any range in existing thickness range.

Afterwards, an impedance material (resist) can be deposited thereon.This impedance material can comprise existing photoresistance or a thermal resistance, and can be formed at gate metal level 230 in a conventional manner, such as rotary coating or ink-jet.Utilize sharp light-struck traditional micro-photographing process or printing/shaping micro-photographing process can be performed (such as, this impedance material of elective irradiation part, then being developed by this impedance material [is positive or negative based on impedance material, by traditional developer (such as, see U.S. patent application case number 11/203,563, the applying date is on August 11st, 2005) selectivity remove irradiation or without the impedance material of illuminated portion) to leave the impedance material 235 (as Fig. 3 B) of the patterning of this gate of definition to be connected with the inside of gate pole grade.Inner connect not shown, but can be positioned at outside this device or the active area of a transistor with the form of one existing " landing contact " (landing pad), or be positioned on other circuit unit of being formed by gate metal level 230.

The gate metal level 230 exposed to the open air is then etched, and this patterned impedance material 235 is stripped to form gate (such as, 232 and 234 in Fig. 3 C) is connected with the inside of gate pole grade.Or gate metal level 230 can be deposited and patterning, by the printing (such as ink-jet) of a metal precursor ink and the laser graphics of follow-up solidification and/or a metal precursor layer.This metal precursor layer may comprise direct conversion (such as laser causes and is directly changed into metal) and non-immediate conversion (such as, the cross connection of the containing metal species that laser causes, after annealing to form a conductive metal film).

form gate dielectric

Refer to Fig. 3 D.One gate dielectric layer 240 (comprising such as mononitride and/or silicon, aluminum oxide etc.) is formed at this gate by sputter, CVD or other blanket deposition manufacture process and is connected on 232,234 with the inside of gate pole grade.Gate dielectric layer 240 may have a thickness of 10nm to 100nm, is preferably 10nm to 50nm, is more preferred from 10nm to 40nm, or any range in existing thickness range.

Or, gate dielectric layer 240 can by the mode of printing (such as, by ink-jet or other printing process, as being described in U.S. patent application case number 10/885,283 and/or U.S. patent application case numbers 11/104,375) be formed at this gate and be connected on 232,234 with the inside of gate pole grade.Suitable film properties and/or character (such as, thickness, density and specific inductive capacity etc.) can be provided by printing and subsequent treatment number layer.This subsequent treatment can comprise makes the dielectric medium precursor material of a printing (similarly being the nano particle of silicon and/or aluminium) be oxidized, make this dielectric material dense and adulterate (doping) etc. to this dielectric material.

Or a gate dielectric layer can, by the metal construction 232 and/or 234 of gate grade, make it be formed by direct, existing heat or galvanochemistry (such as electroplating) oxidation.The metal construction of one or more gate grades generally can conductively-closed (such as use a photoresistance or laser can patterned impedance material), if it does not form dielectric film.

form semiconductor layer

Afterwards, as shown in Figure 3 D, semi-conductor layer 250 (can comprise the silicon of silicon or slight doping) can by sputter, coating or blanket deposition (such as CVD) on gate dielectric layer 240.Semiconductor layer 250 can have the thickness of scope from 80nm to 2000nm, is preferably 100nm to 1500nm, is more preferred from 150nm to 1000nm, or any range in above-mentioned thickness range.By existing micro-photographing process or laser graphics processing procedure (such as, see U.S. patent application case number 11/203,563, the applying date is on August 11st, 2005), semiconductor layer 250 formed thereby usually can as a transistor channels.

Optionally, a contact layer can be planted (ionimplantation) by existing shielding (masking) and ion cloth or is formed on semiconductor (passage) layer 250 to deposit silicon (source/drain) contact layer of a severe doping by sputter, coating or other blanket deposition (such as CVD).Then, if source/drain contact layer blanket deposits, source electrode and drain contact structure 252a and 252b (such as can grind [chemical mechanical milling method] by existing planarization, or deposition one is heated and can the material of smooth (thermallyplanarizable), similarly is an impedance material and nonselectively eat-backs (etch back)).

And, silicon island (silicon islands) can be irradiated or the graphical processing procedure of micro-shadow (lithography patterning) of printing-type (such as ink-jet) impedance material by the laser of existing micro-photographing process, thermal impedance material, then again through too etching or wet etching and peel off impedance material and formed.The part 255 of the silicon layer of this severe doping on this gate can not form (such as, not printing) or be removed before follow-up processing procedure.The mode removed can by micro-photographing process and etching, or by formation one noncrystalline layer 252, then not use laser to irradiate (such as, crystallization) this noncrystalline layer 252, and removes unirradiated part by optionally etching.

Or, as shown in FIGURE 3 E, the silicon contact layer 252a-b of semiconductor layer 250 and severe doping can by semiconductor (such as, doping or the silane of undoped) ink is to should on the position of silicon island (such as, see U.S. patent application case number 10/789,317,10/950,373,10/949,013,10/956,714 and 11/246,014, the applying date is respectively on February 27th, 2004, on September 24th, 2004, on September 24th, 2004, on October 1st, 2004, on October 8th, 2004 and on October 6th, 2005).Usually, before the silicon contact layer 252a-b (not comprising this part 255 on gate) of severe doping is printed with, semiconductor layer 250 is printed and is then processed.After printing, ink is killed, solidify and/or be annealed to change its configuration of surface (such as, at least part of crystallization kill ink).Annealing or laser irradiate the alloy that also may activate in some or all this ink.Printing process not only by avoiding the deposition of impedance material and removing step with increase yield, and directly can form discrete source electrode and drain contact layer 252a and 252b.

form interlayer dielectric and via

The interlayer dielectric formed by semiconductor layer and gate layers and via are mainly existing processing procedure.For example, as illustrated in Figure 3 F, one quite thick dielectric substance layer 260 can be deposited on semiconductor layer 250 (if with Fig. 3 F, then contact layer 252) on, then via 262 can be irradiated or the graphical processing procedure of micro-shadow (lithographypatterning) of printing-type impedance material by the laser of existing micro-photographing process, thermal impedance material, is then formed through an existing dielectric etch processing procedure again.Or a patterned dielectric substance layer 260 (such as, wherein having via 262) can print to semiconductor layer 250 (such as, by ink-jet, the explanation of the front gate dielectric substance layer 240 of reference).Interlayer dielectric layer 260 has a thickness.For example, this thickness is at least 0.5 μm, is preferably 1 μm to 25 μm, 2 μm to 10 μm, or any range in above-mentioned thickness range.

form source/drain (S/D) and inter-level interconnects (interlayer interconnects)

If the semiconductor layer 252a-b of severe doping is not yet formed (such as, seeing Fig. 3 E), S/D layer 270 by sputter, coating or can be deposited on interlayer dielectric layer 260 and in via 262 with other blanket.Generally speaking, S/D layer 270 comprises the semiconductor material of a severe doping of the semiconductor layer 252a-b being similar to severe doping.S/D layer 270 can have, and such as, the thickness of scope from 20nm to 1000nm, is preferably 40nm to 500nm, is more preferred from 50nm to 100nm, or any range in above-mentioned thickness range.

Refer to Fig. 3 G.Interconnecting metal layer 280 (can be comprised in via 262) by sputter, coating or be deposited on S/D layer 270 with other blanket.Interconnecting metal layer 280 comprises a metal, alloy or conductive compound usually.Be same as gate metal level 230, interconnecting metal layer 280 can have, and such as, scope, from a thickness of 0.5 μm to 10 μm, is preferably 0.75 μm to 8 μm, is more preferred from 1 μm to 5 μm, or any range in above-mentioned thickness range.Because interconnecting metal layer 280 can contact a silicon-containing layer, interconnecting metal layer 280 can comprise rudimentary (lower) silicon barrier layer (such as, a metal nitride similarly is TiN) further.

The S/D layer that the blanket formed by the laser irradiation of traditional micro-photographing process, thermal impedance material or the graphical processing procedure of micro-shadow of ink-jet impedance material deposits and internal mutual interconnect layer define region and the internal mutual interconnect layer of S/D layer, and traditional metal (and semiconductor) etching forms actual intraconnection.Similar connection can be formed on preposition along this gate metal, but preferably position is except silicon island 255 (such as, seeing a Fig. 3 E) position outward (such as, outside silicon island 255).

Or as shown in figure 3h, S/D structure 272-278 can by semiconductor (such as, doping or the silane of undoped) ink is to should on the position of via 262 (such as, see U.S. patent application case numbers 10/885,283 and/or 11/104,375).If use the ink of a undoped, the processing procedure forming S/D structure 272-278 may comprise a doping step (such as, comprising existing ion cloth to plant or ion shower doping (ion shower doping)) further.Afterwards, if the need arises, interconnected metallic structures 280 can add rudimentary adhesive (adhesive) and/or silicon barrier layer, and as before as described in and formed.

After integrated circuit is formed substantially, according to method of the present invention may comprise further this integrated circuit of passivation and/or this device step (such as, form a passivation layer or dielectric substance layer (exposes to the open air in a way) on integrated circuit and part substrate on).This passivation layer suppresses or the entering of anti-sealing, oxygen and/or other species usually, causes hydraulic performance decline or the inefficacy of integrated circuit or device, and may increase and be mechanically supported on this device, in the process particularly processed further at device.

Traditionally, passivation layer can by the upper surface of coating one or more layer inorganic barrier layer in integrated circuit and/or device.Inorganic barrier layer can be the nitride of a polysiloxane (polysiloxane), silicon and/or aluminium, oxide and/or and/or the inorganic barrier layer of one or more layer (similarly being P-xylene (parylene)), a fluorine-containing organic polymer or other barrier material.Or passivation layer may comprise (underlying) dielectric substance layer below further, and this dielectric substance layer comprises the material of a stress lower than this passivation layer.For example, dielectric substance layer can comprise monoxide, similarly be silicon dioxide (such as, CVD TEOS), USG, FSG and BPSG etc., and passivation layer can comprise silicon nitride or a silicon oxynitride (siliconoxynitride).Further, the thickness of passivation layer is slightly larger than this dielectric substance layer.

Under the feature of this processing procedure (or a material provides some physical property further or is mechanically supported to this integrated circuit), physical property or the mechanical support function of this substrate are no longer necessary.Therefore, the substrate partly supporting this integrated circuit can be completely removed (such as, substrate is commonly used in the example insulated) or part removes.In the example that part removes, this substrate has electric conductivity (such as a metal foil plate), and this substrate of remainder can form an antenna, one or more inductor and/or wire.Through should " remaining " substrate to this integrated circuit or to other wire being connected to this integrated circuit, this wire is in order to be electrically connected this antenna and/or inductor to via or junction (contact).In the present case, the substrate in this final device, electric label or sensor can be formed at a dielectric film on the same surface of this metal foil plate or other insulator, and integrated circuit is formed on metal foil plate.

mixing (hybrid) integrated circuit

Or this electric label precursor (such as, substrate 132 in fig. 2 its on have integrated circuit 110 and contact 132,134) can adopt the form of one " mixing ".For example, the radio frequency " front end " and in conjunction with a printing-type, inorganic semiconductor and/or conductor substrate is quite cheap, easily manufacture and have the logic of the organic of high functionality or existing Silicon Wafer substrate (numeral) and/or main memory circuit will be favourable." radio-frequency front-end " refer to frequencies operations in or be close to carrier frequencies (carrier frequency) inductor, capacitor, diode and field-effect transistor and/or in order to the inductor of modulation carrier frequencies, capacitor, diode and field-effect transistor.Radio-frequency front-end is shown by " IC " district 110 in Fig. 2 A and Fig. 2 B.These assemblies (and the circuit blocks mainly comprising or be made up of these assemblies) are simulate (such as usually in itself, operate and/or operation with simulation or continuity), and with the quite slow DLC (digital logic circuit) of speed in comparison, the device that performance is higher may be needed.

In the example of organic circuit, the cost of form on material and/or manufacture of this " mixing " has certain advantage.Organic circuit goes for controller, the logic of circuit and/or remembers district, under these assemblies operate in the frequency far below radio frequency usually (such as, lower than MHz or lower).But, under organic field effect transistor circuit perhaps can not operate in carrier frequencies effectively (such as, about 13.56MHz or higher).For example, based on the diode with rectification (rectification) for asking, leakage current (leakage) and collapse (breakdown) feature of organic material, design and manufacture has existing difficulty.Further, make organic modulation field-effect transistor or have unit frequency (clock-related) field-effect transistor to operate in having any problem property under carrier frequencies.In this case, the hybrid circuit disclosed at this comprises a radio-frequency front-end and to be directly manufactured in this radio-frequency front-end (by making in beneath substrate or carrier) by dynamical printing-type inorganics and an organic logic and/or main memory circuit upper and make.Therefore, this hybrid circuit is upper feasible in manufacture.

Therefore, the present invention is about a kind of method manufacturing a recognition device or electric label.This manufacture method comprises the following step: (1) forms a bottom of an integrated circuit on a first surface of a substrate; (2) successive layers of this integrated circuit is formed on this bottom of this integrated circuit; And an electric action layer is attached on the second surface relative to this first surface of this substrate by (3).Therefore, the present invention can provide a kind of processing procedure of low cost, in order to manufacture a rfid device (or Electronic Article Surveillance) electric label.This electric label comprises group (subset) and a logical circuit of a substrate, a radio-frequency front-end or a radio-frequency front-end.

read the exemplary method of rfid device electric label of the present invention

The present invention is arranged in product item or an object of a detection block further about a kind of detection.The method comprises the following step: (a) causes or respond to an electric current in this recognition device, this electric current enough makes the detectable electromagnetic signal of this recognition device radiation (preferably, the frequency of this signal is the integral multiple of the frequency of the electromagnetic field of an applying, or the frequency of the electromagnetic field of this applying is the integral multiple of the frequency of this signal); B () detects this detectable electromagnetic radiation; And optionally (c) processes the information transmitted by this electromagnetic radiation.Usually, detect block when this device is arranged in one of the electromagnetic field comprising a vibration, electric current and voltage cause in this recognition device, and enough make the detectable electromagnetic signal of this recognition device radiation.The electromagnetic field of this vibration is by existing Electronic Article Surveillance and/or radio frequency identification equipment and/or system manufacture or generation.

Therefore, the method may comprise the following step further: (d) is transmitted by this recognition device (or sensor) or launch this information to one reading device, or before step (a), attachment or this recognition device additional to an object to be detected or commodity (such as, through an identification card of encapsulation, the goods for be loaded and transported).Or this recognition device is contained in this object or commodity, or be packaged in this object or commodity.

To a certain extent, electric label design of the present invention is to coordinate electronic recognition and/or safety system running.This electronic recognition and/or safety system can respond to the interference (disturbances) in radio frequency electromagnetic field.An electromagnetic field is set up in the region that this electronic system controls defined by entrance (portals) usually.Commodity must pass the region of this control when leaving this in check place (premises) (such as, a retail shop and library etc.), or commodity must be seated in place that is to be read and that identify.One electric label with a resonant circuit is attached to each this commodity, and when this electric label circuit is positioned at the region of this control, this electric label responded to by a receiving system.This receiving system is in order to detect this electric label and to process the information (such as, determine to remove undelegated commodity, or determine the identity of the article sticked in a container of this electric label) that can obtain from this electric label.The electric label single that operates under this principle of major part uses or for jettisonable, therefore this electric label manufactures with very large output and low cost.

Or electric label of the present invention can adopt the form of an inductor, when the feature of this object accompanying by electric label or commodity and/or character change, the radiofrequency signal modulation feature of this electric label and/or character may change.For example, inductor of the present invention can be attached to a stainless steel (or other metal) object, structure or surface.When this object, structure or surface modification, also changed in a detectable way by the feature of this radiofrequency signal of inductor institute of the present invention radiation, reflection or modulation and/or character.For example, when steel oxidation, or a metal with electromagnetic property is magnetized or carries the electric current of a minimum threshold value secretly, or this object or surface change temperature (ignoring the material composition on object or surface) with a predetermined variation amount or a door amount.

Electric label of the present invention can be used in (and, and/or it is applicable, reusable, if wanted) application of any coml Electronic Article Surveillance and/or rfid device, and any frequency range of main this application.For example, electric label of the present invention can be used in frequency described in following form and region and/or scope.

The application that table one represents

Therefore, the present invention and about Article Surveillance technology, wherein electromagnetic transmission is to a region in this place, and this place is protected with a main frequency (such as 13.56MHz).The undelegated commodity being positioned at this region are sensed by the reception of electromagnetic radiation and detection.Electromagnetic radiation is launched by device 100 of the present invention.The electromagnetic wave of harmonic frequency that this electromagnetic radiation be launched can comprise second harmonic or continue, and electromagnetic wave is by comprising the sensor-transmitter assembly of device of the present invention, trade mark or the radiation of film institute.Device of the present invention is attached on these commodity or implants in these commodity, and under above-mentioned environment, trade mark or film there is no be deactivated or, in addition, adjusted trade mark or film leave this place during when there being mandate.

Conclusion/summary

Therefore, the invention provides a kind of there is an integration base MOS recognition device and manufacture and using method.

This device generally comprises (a) substrate; B () is formed at an antenna on a first surface of this substrate and/or an inductor; And (c) is formed at relative to the integrated circuit on a second surface of this first surface of this substrate.This integrated circuit has the bottom with this second surface brought into physical contact of this substrate (in electrical contact in some preferred embodiment).

This manufacture method generally comprises the following step: this bottom that (1) forms this integrated circuit in a substrate one on the surface; (2) successive layers of this integrated circuit is formed on this bottom of this integrated circuit; And an electric action layer is attached on another relative surface of this substrate by (3).

This using method generally comprises the following step: (i) causes or respond to an electric current in recognition device of the present invention, and this electric current enough makes the detectable electromagnetic signal of this device radiation; (ii) this detectable electromagnetic radiation is detected; And optionally (iii) processes the information and/or (iv) transmitted by this electromagnetic radiation and is transmitted by this recognition device (or sensor) or launch this information to one reading device.

The present invention advantageously provides a kind of radio frequency and/or rfid device electric label of low cost.This radio frequency and/or rfid device electric label can have application and the operation of the standard of the equipment and system of traditional radio frequency, rfid device electric label and/or Electronic Article Surveillance.By reducing expensive and/or low-producing attachment steps number and minimizing manufacture active electronic circuit cost, a kind of electric label of low cost by direct printing or can otherwise form this circuit on a substrate.This substrate is then attached to one inductor/carrier with quite low accuracy and quite cheap cost.

Novelty of the present invention can comprise: the manufacture/treatment step of (i) circuit is directly integrated on a substrate and/or (ii) is printed directly on a substrate carrier, this substrate carrier is then attached to one with cheap cost and is formed at an inductor on this substrate, or this inductor is derived from the baseplate material (similarly being metal foil plate) of a low cost.

In a preferred embodiment, this inductor has a larger area (and therefore may have two larger sizes) than this substrate.This direct manufacture/treatment step is compatible with the process of net formula (web), continuous print, scroll bar type and/or chip (sheet), and be compatible with existing soft, slim radio frequency trade mark, and in the processing procedure of electric label, output increased.Owing to putting processing procedure have resolution for combining picking of this substrate and this inductor/antenna, therefore circuit unit is directly made in the manufacture that substrate can cause low cost.

Method of the present invention can make the baseplate material of device have low cost and cost-benefit use.Baseplate material is on hot and chemical property be compatible with the manufacture of rfid device and/or Electronic Article Surveillance electric label and/or provide suitable barrier character.But in addition, if this baseplate material is used in the substrate of a whole electric label, then cost may be too expensive.

Below preferred embodiment of the present invention is illustrated, but the present invention is not limited to described embodiment, those of ordinary skill in the art also can make all equivalent modification or replacement under the prerequisite without prejudice to spirit of the present invention, and these equivalent modification or replacement are all included in the application's claim limited range.

Claims (15)

1. a recognition device, is characterized in that, comprises:

A) substrate, this substrate comprises metal foil plate;

B) an individual layer antenna, is positioned in a coated sheets, and described individual layer antenna adheres to or is attached on described substrate, and described antenna has the first terminal and the second terminal; And

C) integrated circuit, described integrated circuit is directly formed on main on described substrate, described integrated circuit is electrically connected to the described the first terminal of described individual layer antenna by the first through hole or hole, and described second terminal of described individual layer antenna is electrically connected to by the second through hole or hole, described integrated circuit comprises: (i) multiple thin film transistor (TFT) and multiple diode, and the metalized component that (ii) makes described thin film transistor (TFT) and described diode be connected to each other, described integrated circuit comprises at least one printed layers, with the successive layers of a bottom of a surface contact of described substrate and the described integrated circuit on the described bottom.

2. recognition device as claimed in claim 1, is characterized in that: described integrated circuit comprises a gate metal level, semi-conductor layer and the gate insulation layer between described gate metal level and described semiconductor layer.

3. recognition device as claimed in claim 2, is characterized in that: described semiconductor layer comprises one source pole and drain terminal layer.

4. recognition device as claimed in claim 3, is characterized in that: described integrated circuit comprises the several metallic conductors be electrically connected with described gate metal level, source terminal and drain terminal further.

5. recognition device as claimed in claim 4, is characterized in that: described integrated circuit comprises further between the described interlayer dielectric layer waited between metallic conductor and described semiconductor layer.

6. recognition device as claimed in claim 1, is characterized in that: described at least one printed layers comprises at least one in the group be made up of a gate metal level, an interlayer dielectric layer and an interconnecting metal layer.

7. manufacture a method for a recognition device, comprise:

(a) formed an integrated circuit, be positioned at substrate main and a bottom of main physical contact with substrate, described substrate comprises metal foil plate;

B successive layers that () forms described integrated circuit is on main of the bottom of described integrated circuit and described substrate, described integrated circuit comprises: (i) at least one printed layers, (2) multiple thin film transistor (TFT) and diode, and the metalized component that (ii) makes described thin film transistor (TFT) and described diode be connected to each other; And

C () is by an individual layer antenna attachment or be attached to described substrate, described individual layer antenna has the first terminal and the second terminal, described the first terminal is electrically connected to described integrated circuit by the first through hole or hole, and described second terminal is electrically connected to described integrated circuit by the second through hole or hole.

8. method as claimed in claim 7, is characterized in that: the bottom forming described integrated circuit comprises the bottom printing described integrated circuit.

9. method as claimed in claim 7, is characterized in that: the successive layers forming described integrated circuit comprises at least one deck printed in described successive layers.

10. method as claimed in claim 9, is characterized in that: at least one deck in described successive layers comprises semi-conductor layer.

11. methods as claimed in claim 7, is characterized in that: the described successive layers of described integrated circuit comprises: one source pole/drain layer, a brake-pole dielectric layer, a gate metal level and one interconnection/metal layer.

12. methods as claimed in claim 7, is characterized in that: at least one deck in the described bottom of described integrated circuit and described successive layers comprises a transistor channels layer.

13. methods as claimed in claim 7, it is characterized in that: the described bottom forming described integrated circuit comprises the described bottom of printing or forms the described bottom by traditional video picture process, and at least one deck that the described successive layers forming described integrated circuit comprises at least one deck in the described successive layers of printing or formed by traditional video picture process in described successive layers.

14. methods as claimed in claim 7, is characterized in that: described individual layer antenna package containing metal.

15. methods as claimed in claim 7, is characterized in that, comprise further:

Etch a metal foil plate, to form described individual layer antenna.