CN101370361B - Method for manufacturing printed wiring board with embedded electric device - Google Patents
Method for manufacturing printed wiring board with embedded electric device Download PDFInfo
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- CN101370361B CN101370361B CN2008101490638A CN200810149063A CN101370361B CN 101370361 B CN101370361 B CN 101370361B CN 2008101490638 A CN2008101490638 A CN 2008101490638A CN 200810149063 A CN200810149063 A CN 200810149063A CN 101370361 B CN101370361 B CN 101370361B
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Abstract
A printed wiring board having an embedded electric device is manufactured as follows. A first resin film having an opening or a sheet member having a recess is piled with a plurality of second resin films, on which a plurality of conductive layers are formed. The first and second resin films and the sheet member include thermoplastic resin. An electric device is inserted in the opening or the recess. Then, the piled body including the electric device is pressed and heated to integrate the piled body. When the piled body is pressed and heated, a plurality of electrodes of the electric device are electrically connected to the conductive layers while the first and second resin films and the sheet member plastically deformed to seal the electric device.
Description
The application is that application number is 02123019.6, the applying date is on June 13rd, 2002, denomination of invention is divided an application for the application of " being embedded with the printed substrate and the manufacture method thereof of electronic device ".
Technical field
The present invention relates to a kind of electronic device and imbed the manufacture method of printed substrate of insulating base and the printed substrate of making in this way.
Background technology
Common known a kind of printed substrate that has, electronic device is embedded in the insulating base in this printed substrate, thereby realizes the High Density Packaging of electronic device.
For example, in JP-A-11-312868, disclosed a kind of technology.In this technology, form a plurality of first resin films, form an insulating base with these first resin films.First resin film contains the thermosetting resin that is in the B attitude.In each first resin film, form a plurality of paths.On a surface of each first resin film, form a plurality of conductive layers.Then, form one second resin film.The glass transition temperature of second resin film is than the curing temperature height of first resin film.A resin-sealed electronic device of usefulness is installed on second resin film.With second resin film and the back stacked together pressurization of first resin film, form the conglomerate of one first and second resin film.Subsequently, by heating is solidified the thermosetting resin in the primary diaphragm to conglomerate, make a printed substrate, wherein these conductive layers are electrically connected mutually by path, and electronic device is electrically connected with conductive layer, and electronic device is embedded in the insulating base.
Yet, in this technology of announcing, difficult is that electronic device is aimed at the insulating base that forms when solidifying the thermosetting resin of the first film, is clipped between first resin film that is layered in its two sides because load onto second resin film of electronic device.Therefore, the bigger deviation on aiming at may cause poor electric contact between electronic device and path.
In JP-A-4-356998, disclosed another kind of technology.In this technology, on the insulating base of the double-clad board of the inner plating of a formation multilayer circuit board, form a recess by bore hole.Then, an electronic device is placed in the recess welds.Then, stacked prepreg on two surfaces of the perfecting brush board that is welded with electronic device, a printed substrate that is embedded with electronic device is just made in pressurization again.
Yet, in the technology of JP-A-4-356998, complicate fabrication process, and also manufacturing step is many, because these prepregs will be stacked respectively on two surfaces of perfecting brush board.
Summary of the invention
The present invention makes considering under the above situation, and purpose provides the method that a kind of manufacturing is embedded with the printed substrate of electronic device, adopts this method to be easy to make electronic device to aim at the insulating base of printed substrate, and can simplify manufacture process.Another object of the present invention provides the printed substrate of making in this way.
This method comprises the following steps: to form an opening in first resin film made from thermoplastic resin; With first resin film and a plurality of with thermoplastic resin make, second resin film of a plurality of conductive layers of top formation is stacked together; The electronic device that a size is identical with opening basically embeds opening; And by the pressurization and the heating the first and second stacked resin films are bonded together.To stacked first and second resin films pressurization and heating the time, a plurality of electrodes of electronic device just are electrically connected on the conductive layer, and first and second resin films are subjected to plastic deformation, have sealed electronic device.
Perhaps, this method also can comprise the following steps: to form a recess or opening in a sheet spare made from thermoplastic resin; With some with thermoplastic resin make, the resin film of a plurality of conductive layers of top formation is stacked together; Sheet spare is placed on the outer surface of a duplexer that in the step of stacked resin film, forms or in the duplexer; An electronic device is embedded recess or opening; And by the pressurization and the heating resin film and sheet spare are bonded together.A plurality of electrodes of electronic device just are electrically connected on the conductive layer to resin film and pressurization of sheet spare and heating the time, and thermoplastic resin is subjected to plastic deformation, has sealed electronic device.
Description of drawings
From the detailed description of doing below in conjunction with accompanying drawing, can more clearly see above-mentioned and some other purpose of the present invention, feature and advantage.In these accompanying drawings:
Figure 1A to 1G is for progressively illustrating the cutaway view according to the printed substrate production process summary situation of first embodiment of the present invention design;
Fig. 2 A shows the situation of the surface depression that occurs not according to first embodiment, and Fig. 2 B shows the situation of the rat that occurs according to first embodiment;
Fig. 3 A shows the situation of the another kind of surface depression that occurs not according to first embodiment, and Fig. 3 B shows the situation of the another kind of rat that occurs according to first embodiment;
Fig. 4 is the cutaway view that a part of situation of the printed substrate production process that designs according to second embodiment of the invention is shown;
Fig. 5 is the cutaway view that another part situation of the printed substrate production process that designs according to second embodiment is shown;
Fig. 6 is the cutaway view of a modification that the stepped construction of first and second embodiment is shown;
Fig. 7 is the cutaway view of another modification that the stepped construction of first and second embodiment is shown;
Fig. 8 is the cutaway view of another modification that the stepped construction of first and second embodiment is shown;
Fig. 9 is the cutaway view of another modification that the stepped construction of first and second embodiment is shown;
Figure 10 is the cutaway view of another modification that the stepped construction of first and second embodiment is shown;
Figure 11 is the cutaway view of a modification that the electrically connected method of second embodiment is shown;
Figure 12 is the cutaway view of another modification that the electrically connected method of second embodiment is shown;
Figure 13 is the cutaway view of another modification that the electrically connected method of second embodiment is shown;
Figure 14 A to 14G is for progressively illustrating the cutaway view according to the printed substrate production process summary situation of third embodiment of the present invention design;
Figure 15 is the cutaway view of a modification that the stepped construction of the 3rd embodiment is shown;
Figure 16 is the cutaway view of another modification that the stepped construction of the 3rd embodiment is shown; And
Figure 17 is the cutaway view of another modification that the stepped construction of the 3rd embodiment is shown.
Embodiment
The present invention is described in detail below in conjunction with each embodiment.
First embodiment
Shown in Figure 1A, single face membrane of conducting layer 21 comprises a resin film 23 and a plurality of conductive layer 22.Conductive layer 22 is to be that 18 microns Copper Foil carries out etching forming by the thickness that is bonded at resin film 23 1 sides to one.In Figure 1A, resin film 23 be a kind of be that thickness that the polyether-ether-ketone resin of 65-35 and mixture that percentage by weight is the polyetherimide resin of 35-65 are made is 75 microns thermoplastic film with percentage by weight.
After shown in Figure 1A, forming conductive layer 22, by in resin film 23, form the through hole 24 at a plurality of logical ends with carbon dioxide laser irradiation resin film 23, shown in Figure 1B.Through hole 24 sensible conductive layers 22.With carbon dioxide laser irradiation through hole 24 time, can prevent from conductive layer 22, to get pit by adjusting carbon dioxide laser and power and irradiation time.
Except carbon dioxide laser, also can form through hole 24 with excimer laser etc.If without laser, also can install, for example card punch with other.Yet preferably with laser beam processing, because processing can form the meticulousr through hole of diameter like this, and the infringement that conductive layer 22 is subjected to is also smaller.
After shown in Figure 1B, forming through hole 24, in through hole 24, fill out with a kind of as the conductive paste 50 that is electrically connected material, shown in Fig. 1 C.Being prepared as follows of conductive paste 50.Being dissolved in the particle mean size that adds 300g in the solution that the terpinol as organic solvent of 60g is made at the ethyl cellulose resin with 6g is that 5 microns specific areas are 0.5m
2The tin particulate of/g and the particle mean size of 300g are that 1 micron specific area is 1.2m
2The silver-colored particulate of/g.With a blender this mixture is mixed into pasty state.Add ethyl cellulose again, to improve the shaping hold facility of conductive paste 50.As the material that improves the shaping hold facility, also can use acrylic resin.
By after metal mask printing of screen printing machine and inserting the through hole 24 of single face membrane of conducting layer 21, make terpinol at conductive paste 50 140-160 ℃ of evaporation about 30 minutes.In Fig. 1 C, conductive paste 50 is inserted through hole 24 with screen process press.As long as guarantee filling, also can use additive method, for example use a self-feeder.
Also can replace terpinol to make mixture become pasty state with other organic solvents.Requiring the boiling point of organic solvent is 150-300 ℃.Boiling point is the bigger over time problem of viscosity that 150 ℃ or lower organic solvent cause conductive paste 50 probably.On the other hand, boiling point is higher than 300 ℃ organic solvent and has the solvent evaporation needs problem of long time.
Its 0.5-20 micron of the best particle mean size of metal particle and specific area in the conductive paste 50 are 0.1-1.5m
2/ g.In the particle mean size of metal particle less than 0.5 micron or specific area greater than 1.5m
2Under the situation of/g, need many organic solvents, just can make conductive paste 50 that suitable viscosity is arranged, can insert through hole 24 easily.The long time evaporating solvent of conductive paste 50 needs that contains many organic solvents.If evaporate insufficiently, can produce many gas when conductive paste 50 is heated during the interlayer that will illustrate after a while connects, thereby make some sand holes of generation through hole 24 in.Therefore, reduced the reliability of the interlayer connection that will illustrate after a while.
On the other hand, in the particle mean size of metal particle greater than 20 microns or specific area less than 0.1m
2Under the situation of/g, it is just relatively more difficult that conductive paste 50 is inserted through hole 24.In addition, metal particle meeting skewness, so be difficult to form the conductive compound 51 that homogeneous alloy is formed when conductive paste 50 is heated, this will describe after a while.Therefore, be difficult to guarantee the reliability of interlayer connection.Before conductive paste 50 is inserted through hole 24, can be to the surface etching or the chemical treatment a little that is positioned at through hole 24 bottoms places of conductive layer 22, so that make between conductive layer 22 and the compound 51 that through hole 24 bottoms are located good being connected arranged, the connection situation will be in explanation after a while.
Shown in Fig. 1 D, single face membrane of conducting layer 31 comprises resin film 23, conductive layer 22 and is filled in the conductive paste 50 of the through holes 24 that form in the resin film 23, and the step that single face membrane of conducting layer 31 usefulness are identical with formation single face membrane of conducting layer 21 shown in Figure 1A-1C forms.When forming through hole 24, on single face membrane of conducting layer 31, form identical with the electronic device 41 basically opening 35 of a size in the position that will place the electronic device 41 (explanation after a while) that to imbed by laser processing.The size of opening 35 is arranged so that the thickness (among Fig. 1 Ds be 75 micron) of gap for being less than or equal to resin film 23 more than or equal to 20 microns between the resin film 23 around electronic device 41 and the electronic device 41.
After in single face membrane of conducting layer 31, forming opening 35 and conductive paste 50 being inserted through hole 24 and make it evaporation again, a plurality of single face membrane of conducting layer 21,31 is stacked together, shown in Fig. 1 E.In Fig. 1 E, three single face membrane of conducting layer 21 and two single face membrane of conducting layer 31 are arranged.When stacked, with single face membrane of conducting layer 21,31 be laminated into make each have conductive layer 22 towards last, make as Fig. 1 E and to show.That is to say that single face membrane of conducting layer 21,31 is laminated into each surface with conductive layer 22 and each does not have the surface of conductive layer to stack mutually.
These are stacked together at the single face membrane of conducting layer 31 that same position has opening 35, make the space 36 that is formed by a plurality of openings 35 (among Fig. 1 E being two) be substantially equal on the vertical direction of Fig. 1 E or less than the thickness of electronic device 41.The thickness of electronic device 41 is 160 microns in Fig. 1 E, therefore single face membrane of conducting layer 31 is laminated into and makes the height in space 36 be substantially equal to or less than 160 microns, that is to say that two height is provided is 150 microns space 36 for 75 microns opening combines on the vertical direction of Fig. 1 E.
Stacked single face membrane of conducting layer 21,31 o'clock, with electronic device 41 (chip assembly such as resistance, capacitor, filter or IC) embedded space 36.Shown in Fig. 1 E, on the surface of the through hole 24 of single face membrane of conducting layer 21, form electrode 42 in two ends of electronic device 41.On the conductive layer 22 that the through hole 24 that is filled with conductive paste 50 is in the single face membrane of conducting layer 21 that makes on space 36 and the position that electrode 42 can be electrically connected.Radiator 46 pad of release heat made of aluminum is stacked single face membrane of conducting layer 21,31 times, shown in Fig. 1 E.There is not through hole in the face of in the resin film 23 of radiator 46, shown in Fig. 1 E.
After single face membrane of conducting layer 21,31 and radiator 46 are laminated into shown in Fig. 1 E, just with a vacuum hotpressing machine from the end face of duplexer and bottom surface to the duplexer pressurization with heat.Specifically, duplexer was heated 10-20 minute at 250 to 350 ℃ under the pressure of 110MPa, make each single face membrane of conducting layer 21,31 and radiator 46 be bonded together, shown in Fig. 1 F.Because resin film 23 all is to make with same thermoplastic resin, therefore be easy to resin film 23 is sealed into a complete insulating base 39.
Simultaneously, by many conductive layer 22 being electrically connected through sintering and the conductive compound 51 that solidify to form by the conductive pastes 50 in the through hole 24 that a resin film 23 separates, and the electrode 42 of electronic device 41 also is connected with conductive layer 22, thereby has formed a multilayer printed circuit board 100 that is embedded with electronic device 41.Conductive compound 51 is to be electrically connected material, and through hole 24 and conductive compound 51 have constituted the individual channel of multilayer printed circuit board 100.
Every pair of conductive layer 22 is electrically connected by respective channels according to same mechanism.Fill out and be in the state that tin particulate and silver-colored particulate mix after conductive paste 50 evaporation in through hole 24.Be subjected to 250-350 at conductive paste 50
0During the heating of C, because the fusing point of tin particulate and silver-colored particulate is respectively 232
0C and 961
0C just adheres on the surface of silver-colored particulate after the fusing of tin particulate, encases silver-colored particulate.
Along with continue heating under the state of this tin particulate and the mixing of silver-colored particulate, the tin of fusing begins to remove from silver-colored microparticle surfaces, and (fusing point is 480 to form tin and silver-colored alloy
0C).Owing to form alloy, in through hole 24, just formed the conductive compound 51 that constitutes by alloy.
When forming conductive compound 51 in through hole 24, conductive compound 51 is pressed onto on the surface that is positioned at through hole 24 bottoms of conductive layer 22.So the copper component counterdiffusion mutually in the tin composition in the conductive compound 51 and the conductive layer 22 has formed a solid-state diffusion layer on the border between conductive compound 51 and the conductive layer 22.
The metal of electrode 42 usefulness such as copper or nickel of electronic device 41 made.The surface of electrode 42 is coated with tin and so on.According to conductive compound 51 and conductive layer 22 between be electrically connected substantially the same mechanism, by each electrode 42 being electrically connected on the corresponding conductive layer 22 at the solid-state diffusion layer that forms on the border between conductive compound 51 and the conductive layer 22 with at the solid-state diffusion layer that forms on the border between conductive compound 51 and the electrode 42.
The modulus of elasticity of resin film 23 drops to about 5-40MPa when the duplexer shown in Fig. 1 E is subjected to the pressurization of vacuum hotpressing machine and heats.Therefore, be in opening 35 resin film 23 distortion on every side, stretch to opening 35.In addition, be positioned at vertical direction along Fig. 1 E on opening 35 and below resin film 23 also be out of shape, stretch to opening 35.That is to say that the resin film 23 around the space 36 all stretches to space 36.
Therefore, electronic device 41 by since the resin film 23 of single face membrane of conducting layer 21,31 be bonded into one and be out of shape insulating base 39 sealings of formation, shown in Fig. 1 f.The modulus of elasticity of resin film 23 is preferably 1-1000MPa to resin film 23 pressurizations and heating the time.If modulus of elasticity greater than 1000MPa, is not easy to make resin film 23 distortion for heat sealing resin film 23.On the other hand, if modulus of elasticity is less than 1MPa, for forming too easy deformation of printed circuit board (PCB) 100 resin films 23.
The size of opening 35 is arranged to provide the gap that is less than or equal to the thickness of resin film 23 more than or equal to 20 microns.This is because if the gap less than 20 microns, embeds just difficulty relatively of openings 35 with electronic device 41, and if the gap greater than the thickness of resin film 23, when making resin film 23 distortion, seal relatively difficulty of electronic device 41 fully by pressurization and heating.
In Fig. 1 E, the quantity of stacked single face membrane of conducting layer 31 be defined as making the height in the space 36 that opening 35 forms to be substantially equal to or less than the thickness of electronic device 41 on the vertical direction of Fig. 1 E.This is because under the situation of the tall and big thickness in electronic device 41 in space 36, seal and insulating base 39 that electronic device 41 arranged on the zone that is embedded with electronic device 41 and below the surface just become depression, 2A and 3A as shown.If the printed substrate 100 of surface depression is in the hot environment, insulating base 39 will be deformed to sunk surface is flushed.Therefore, can produce the stress that makes insulating base 39 peel off electronic device 41, thereby reduce the reliability in isolation and sealing of printed substrate 100 at the 41a place, border between electronic device 41 and insulating base 39 shown in Fig. 2 A and the 3A.Yet if the peel stress of insulating base 39 can be ignored, the height in space 36 can be bigger slightly than the thickness of electronic device 41.
On the other hand, as long as the height in space 36 is substantially equal to or less than the thickness of electronic device 41, on the zone that is embedded with electronic device 41 and below the surface be exactly flat or projection, shown in Fig. 2 B and 3B.As long as surface is flat or protruding,,, but be insulating base 39 will be pressed onto on the electronic device 41 at the stress that border 41a is produced owing to insulating base parts 39 are out of shape and convex surfaces is flushed even printed substrate 100 is in hot environment.Yet under the too many situation of the thickness of electronic device 41, the surface of printed substrate 100 is projection too just in the higher primary school in space 36, thus this too on the convex surfaces other electronic devices of assembling have difficulty.
According to manufacture method as mentioned above and the structure that provides by this manufacture method, can obtain making electronic device 41 in insulating base 39 more accurately the location, reliable be electrically connected with conductive layer 22 and reliable be insulated the printed substrate 100 that base plate 39 seals.The printed substrate 100 that has radiator 46 in the bottom surface shown in Fig. 1 G can be realized High Density Packaging, and has desirable heat-sinking capability to another electronic device 61 on the upper surface and the electronic device of imbedding 41.
In addition, by duplexer pressurization and heating have been realized simultaneously that single face membrane of conducting layer 21,31 and radiator is 46 integrated, each is electrically connected the electrical connection of conductive layer 22 and electronic device 41 and conductive layer 22.Therefore, can reduce the manufacturing step of printed substrate 100, thereby reduce production cost.
Second embodiment
As shown in Figure 4, the method for second embodiment and the difference of the method for first embodiment are before single face membrane of conducting layer 21,31 is stacked together electronic device 41 to be electrically connected with the conductive layer 22 of one of them single face membrane of conducting layer 21.In the method for second embodiment, in stacked step shown in Figure 5, the single face membrane of conducting layer 21 that is connected to electronic device 41 is placed on above the space 36.
Specifically, as shown in Figure 4, electronic device 41 is placed on that face that does not have conductive layer 22 of one of them single face membrane of conducting layer 21.Then, to this single face membrane of conducting layer 21 and electronic device 41 pressurizations and heating.Through hole 24 is positioned at the electrode 42 corresponding positions with electronic device 41.Therefore, to single face membrane of conducting layer 21 and electronic device 41 pressurizations and heating the time, conductive paste 50 just sinters whole conductive compound 51 into, and the electrode 42 of electronic device 41 is electrically connected with conductive layer 22.
Then, the single face membrane of conducting layer 21, other single face membrane of conducting layer 21,31 and the radiator 46 that are connected to electronic device 41 is stacked together, as shown in Figure 5.Subsequently, use with method identical in first embodiment duplexer is pressurizeed and heating, form the multilayer printed circuit board 100 shown in Fig. 1 F.Though before to duplexer pressurization and heating, be connected in the through hole 24 of single face membrane of conducting layer 21 of electronic device 41 and forming conductive compound 51, but at the just counterdiffusion mutually of copper component in the tin composition in the conductive compound 51 and the conductive layer 22 during with heating to duplexer pressurization, the border formation solid-state diffusion layer between conductive compound 51 and conductive layer 22.
Identical among size relationship between opening 35 and the electronic device 41 and the size relationship between space 36 and the electronic device 41 and first embodiment.
Adopt the manufacture method of second embodiment, can obtain the identical printed substrate 100 among structure and first embodiment.According to second embodiment, before all single face membrane of conducting layer 21 is stacked together, earlier the conductive layer 22 of electronic device 41 with one of them single face membrane of conducting layer 21 coupled together.Therefore, even electronic device 41 is very little, also can utilize the conductive layer 22 that is electrically connected with electronic device 41 of single face membrane of conducting layer 21 to be easy to electronic device 41 is tested.In addition,, therefore can avoid, form waste owing to the electronic device 41 relatively poor relatively poor printed substrates 100 that produce because electronic device 41 can imbedded preceding check.
The 3rd embodiment
Utilize form with step identical shown in Figure 1A to 1C as Figure 14 A to 14C and above embodiment in the identical single face membrane of conducting layer 21 that does not have opening.Sheet spare 81 usefulness thermoplastic resins shown in Figure 14 D are made, and thickness is 1mm.Specifically, a kind of percentage by weight of sheet spare 81 usefulness is that the polyether-ether-ketone resin of 65-35 and mixture that percentage by weight is the polyetherimide resin of 35-65 are made.Shown in Figure 14 D, sheet spare 81 has a plurality of recesses 82 (being two recesses) in Figure 14 D, and size is identical with electronic device 41 basically, is to be processed to form in the position that will put two electronic devices 41 by hot press.The size of each recess 82 is arranged in to have between the vertical surface of electronic device 41 and recess 82 and is equal to or greater than 20 microns gap, and the degree of depth of recess 82 (being 0.85mm in Figure 14 D) is for being equal to or less than the thickness of electronic device 41.
The degree of depth of recess 82 is arranged to be substantially equal to or less than the thickness of electronic device 41 on the vertical direction of Figure 14 D.The thickness of electronic device 41 is 0.9mm in Figure 14 E, therefore in Figure 14 D each recess 82 to be processed into the degree of depth be 0.85mm, sheet spare 81 is processed to form by hot press.Yet sheet spare 81 also can form by injection mould and so on.
After forming sheet spare 81 and conductive paste 50 being inserted the through hole and evaporation of single face membrane of conducting layer 21, shown in Figure 14 E, just that some single face membrane of conducting layer 21 (being three films among Figure 14 E) are stacked together, again sheet spare 81 is filled up below stacked single face membrane of conducting layer 21.
Specifically, these single face membrane of conducting layer 21 be laminated into each have conductive layer 22 look like shown in Figure 14 E like that up, that is to say that each surface with conductive layer 22 does not have the surface of conductive layer 22 folded mutually with each.Sheet spare 81 pad makes the surface that does not have conductive layer 22 of stacked single face membrane of conducting layer 21 fold mutually with the surface that recess 82 is arranged of sheet spare 81 stacked single face membrane of conducting layer 21 times.
Single face membrane of conducting layer 21 and sheet spare 81 when stacked together, just are being placed on electronic device 41 (chip assembly such as resistance, capacitor, filter or IC) in the recess 82 formed spaces 83, shown in Figure 14 E.The single face membrane of conducting layer 21 that is positioned at above the space 83 comprises two pairs of through holes 24 that are filled with conductive paste 50.Through hole 24 is in the position that conductive layer 22 and electrode 42 can be electrically connected.Then, shown in Figure 14 E, the radiator 46 that is formed from aluminium is filled up under the duplexer of single face membrane of conducting layer 21 and 81 formation of sheet spare.
Then, duplexer is pressurizeed and heating from two surfaces of duplexer with the vacuum hotpressing machine, thereby form multilayer printed circuit board 100.Specifically, duplexer was being heated 10-20 minute in 250-350 ℃ under the pressure of 1-10MPa.After the duplexer pressurization, each single face membrane of conducting layer 21, sheet spare 81 and radiator 46 just are bonded together, shown in Figure 14 F.Because resin film 23 and sheet spare 81 are to make with same thermoplastic resin, so they are easy to seal into an insulating base 39 that becomes integral body.Simultaneously, conductive layer 22 is electrically connected mutually by conductive compound 51, and the electrode 42 of electronic device 41 and conductive layer 22 are to be electrically connected with mutually same mode among the above embodiment.
Therefore, sealed electronic device 41 by the insulating base that resin film 23 and 81 distortion stacked together of sheet spare are formed.Resin film 23 and sheet spare 81 modulus of elasticity when being pressurizeed and heat are preferably 1-1000MPa.If modulus of elasticity is greater than 1000MPa, heat sealing resin film 23 and sheet spare 81 be difficulty relatively, and makes resin film 23 and 81 distortion of sheet spare also compare difficulty.On the other hand, if modulus of elasticity is less than 1MPa, for forming just easy deformation too of printed circuit board (PCB) 100 resin films 23 and sheet spare 81.
The size of each recess 82 preferably is arranged in the gap that the degree of depth (being 0.85mm in Figure 14 D) that is less than or equal to recess 82 more than or equal to 20 microns is arranged between the vertical surface of electronic device 41 and recess 82.This is because if the gap less than 20 microns, embeds just difficulty relatively of recesses 82 with electronic device 41, and if the gap greater than the degree of depth of recess 82, when making 81 distortion of sheet spare, seal relatively difficulty of electronic device 41 fully by pressurization and heating.
In Figure 14 E, the thickness of electronic device 41 is 0.9mm, and the degree of depth of each recess is 0.85mm.The degree of depth of recess 82 is preferably substantially equal to or less than the thickness of electronic device 41 on the vertical direction of Figure 14 D.This is because under the situation of the degree of depth greater than the thickness of electronic device 41 of each recess 82, printed substrate 100 on the zone that is embedded with electronic device 41 and below the surface just become depression, shown in Fig. 2 A and 3A.If the printed substrate 100 of surface depression is in the hot environment, insulating base 39 will be deformed to sunk surface is flushed.Therefore, can produce the stress that makes insulating base 39 peel off electronic device 41, thereby reduce the reliability in insulation and sealing of printed substrate 100 at the 41a place, border between electronic device 41 and insulating base 39 shown in Fig. 2 A and the 3A.Yet if the peel stress of insulating base 39 can be ignored, the degree of depth of recess 82 can be bigger slightly than the thickness of electronic device 41.
On the other hand, as long as the degree of depth of recess 82 is substantially equal to or less than the thickness of electronic device 41, on the zone that is embedded with electronic device 41 and below the surface be exactly flat or projection, shown in Fig. 2 B and 3B.As long as surface is flat or protruding,,, but be insulating base 39 will be pressed onto on the electronic device 41 at the stress that border 41a is produced owing to insulating base parts 39 are out of shape and convex surfaces is flushed even printed substrate 100 is in hot environment.Yet under the degree of depth of recess 82 situation too many less than the thickness of electronic device 41, the surface of printed substrate 100 is projection too just, thus this too on the convex surfaces other electronic devices of assembling have difficulty.
The manufacture method and the structure that provide according to the manufacture method of the 3rd embodiment, with single face membrane of conducting layer 21, sheet spare 81 and radiator 46 integrated again integral body stacked together, make and to realize being electrically connected of mutual electrical connection between the conductive layer 22 and electronic device 41 and conductive layer 22 simultaneously by pressurization and heating.Therefore, can simplify the manufacture process of printed substrate 100, reduce manufacturing step.In addition, even imbed at needs under the situation of a big electronic device, also can be molded and use a size and the corresponding sheet spare 81 of this big electronic device, so manufacturing step can be than lacking with resin film 23 formation insulating bases 39 only.
According to this manufacture method and the structure that the manufacture method of the 3rd embodiment provides, can obtain making electronic device 41 more accurately location, reliable electrical connection with conductive layer 22 and reliable the printed substrate 100 that is sealed in the insulating base 39 in insulating base 39.The printed substrate 100 that has radiator 46 in the bottom surface shown in Figure 14 G can be realized High Density Packaging, and has desirable radiating effect to the electronic device 41 that is assemblied in the electronic device 61 on printed substrate 100 upper surfaces and imbeds.
Modification
In first and second embodiment, be that the stepped construction or the number of single face membrane of conducting layer 21,31 all are not limited to the situation shown in Fig. 1 E and 5.Can be by situation with single face membrane of conducting layer 21 and 31, two-sided membrane of conducting layer with not have the resin film of conductive layer 22 to merge the back stacked together.For example, can adopt the single face membrane of conducting layer 21,31 shown in Fig. 6 to 10 and do not have the resin film 23 of conductive layer to merge back stepped construction stacked together.As shown in Figures 8 to 10, specifically, under the situation of formation opening in the resin film 23 that is not only having conductive layer, the circuit design that circuit board arranged is advantage more flexibly.Yet, as long as single face membrane of conducting layer the 21, the 31st, resemble Fig. 1 E and Fig. 5 stackedly, also can simplify manufacture process.
In a second embodiment, as shown in Figure 4, the conductive layer 22 of single face membrane of conducting layer 21 and the electrode 42 of electronic device 41 are inserted the conductive compound 51 that the conductive paste 50 of through hole 24 forms by sintering and are connected.Yet, also can connect without the conductive compound 51 in the through hole 24.For example, can adopt the connected mode shown in Figure 11.In order to realize connecting, on the bottom surface of electronic device 43, form pair of electrodes 42a, as shown in figure 11.On each surface of electrode 42a, form the projection of some gold.Then, after forming nickel/gold plate 22b on the surface of step 22a, the step 22a with electrode 42a and conductive layer 22 is bonded together by pressure bonding or ultra-sonic welded.
Perhaps, also can adopt another kind of connected mode as shown in figure 12.In order to realize this connection, on the bottom surface of electronic device 43, form the electrode 42a of a pair of aluminum, as shown in figure 12.After forming the protruding 22c of gold on nickel/gold plate 22b, electrode 42a and step 22a are bonded together by pressure bonding or ultra-sonic welded.Perhaps, also can adopt other connected modes as shown in figure 13.In order to realize this connection, on the upper surface of electronic device 43, form the electrode 42a of a pair of aluminum, as shown in figure 13.After forming nickel/gold plate 22b on the surface of the step 22a of conductive layer 22, each electrode 42a is electrically connected with corresponding step 22a by wire-bonded.In Figure 11 to 13, on a horizontal surface of electronic device 43, form electrode 42a, shown in Figure 11 to 13.Yet, also can form electrode 42a, as long as electrode 42a is feasible with this electrical connection the between the conductive layer 22 in other directions.
In the 3rd embodiment, be that the number of stepped construction or single face membrane of conducting layer 21 and sheet spare 81 all is not limited to the situation shown in Figure 14 K.Can be by situation with single face membrane of conducting layer 21, sheet spare 81, two-sided membrane of conducting layer with not have the resin film of conductive layer to merge the back stacked together.Yet, stacked as long as single face membrane of conducting layer 21 and sheet spare 81 resemble Figure 14 E, also can simplify manufacture process.
In Figure 14 E, sheet spare 81 is stacked on the lower surface of the duplexer that stacked single face membrane of conducting layer 21 forms.Yet as shown in figure 15, sheet spare 81 also can be stacked between the single face membrane of conducting layer 21.In Figure 14 D and 14K, sheet spare 81 has for embedding the recess 82 that electronic device 41 is opened.Perhaps, as shown in figure 16, also can adopt sheet spare 81a with opening 92.As shown in figure 17, can use radiator 46a that the insulant such as pottery makes and single face membrane of conducting layer 21 to stack with sheet spare 81a with one be in the same place.
In above embodiment and modification, resin film 23 and sheet spare 81 usefulness percentage by weights are that the polyether-ether-ketone resin of 65-35 and mixture that percentage by weight is the polyetherimide resin of 35-65 are made.Yet resin film 23 and sheet spare 81 also can add some non-conductive fillers again in polyether-ether-ketone resin and polyetherimide resin, perhaps can be just with polyether-ether-ketone (PEEK) or just make with Polyetherimide (PEI).In addition, also can adopt thermoplastic resin or so-called liquid crystal polymer such as polyphenylene sulfide (PPS), thermoplastic polyimides.Adopt preferably when being pressurizeed and heat that modulus of elasticity is the resin film that 1-1000MPa and welding step thermal resistance afterwards meet the demands under heating-up temperature.
In the 3rd embodiment, resin film 23 and sheet spare can adopt dissimilar thermoplastic resins respectively.Yet, consider the bonding and recovering state of resin film 23 and sheet spare 81, it is useful adopting common material.
In above embodiment and modification, can handle so that improve bonding with resin film 23 surface of electronic device 41, perhaps on the surface of electronic device 41, be coated with adhesive.
In above embodiment and modification, on a surface of printed substrate 100, entirely formed radiator 46.Yet, also can on part surface or two surfaces, form radiator 46.Certainly, unless need to improve heat radiation, printed substrate 100 not necessarily will have radiator 46.Can on radiator 46 and surface that insulating base 39 is connected, adhere to one such as the Polyetherimide sheet so-called adhesive sheet, contain the thermosetting resin sheet of heat filling or contain the thermoplastic resin sheet of heat filling, so that improve bonding or thermal conductivity.
Claims (8)
1. method of making printed substrate, described method comprises the following steps:
Prepare a plurality of membrane of conducting layer (21), each membrane of conducting layer comprises: the resin film of being made by thermoplastic resin (23), the through hole (24) at the logical end of the conductive layer (22) that forms on the side of resin film, sensible conductive layer, the conductive paste of inserting in the through hole (24) at the logical end (50);
Preparation forms a sheet spare (81,81a) of a recess (82) or opening (92) within it, to make this sheet spare (81,81a) with the used identical thermoplastic resin of this resin film (23), wherein, the through hole at the conductive layer and the logical end does not form in this sheet spare (81,81a);
A plurality of membrane of conducting layer (21) are stacked together;
With sheet spare (81,81a) be placed on membrane of conducting layer (21) on an outer surface of the duplexer that stacked step forms or be placed in the duplexer;
An electronic device (41) is embedded in recess (82) or the opening (92) that forms in the sheet spare (81,81a); And
After embedding step, by to membrane of conducting layer (21) with sheet spare (81) pressurizes and heating bonds together membrane of conducting layer (21) and sheet spare (81,81a).
2. method according to claim 1, wherein: recess (82) or opening (92) have identical size with the electronic device (41) that embeds recess or opening.
3. method according to claim 2, wherein: the degree of depth of recess (82) or opening (92) is equal to or less than the thickness of the electronic device (41) that embeds recess or opening.
4. according to the described method of one of claim 1 to 3,
Wherein: on the surface of electronic device (41), on the direction of stacked membrane of conducting layer (21) and sheet spare (81,81a), form an electrode (42),
Wherein, inherent one an of membrane of conducting layer (21) forms the through hole (24) that leads to the end with the corresponding position of electrode (42) therein, and,
Wherein, in bonding step, electrode (42) is electrically connected with conductive layer (22) by conductive paste (50).
5. method according to claim 1, wherein, membrane of conducting layer (21) and sheet spare (81,81a) heat in the modulus of elasticity of membrane of conducting layer (21) and sheet spare (81,81a) is the temperature of 1-1000MPa in bonding step.
6. method according to claim 1, wherein: after described method also is included in and embeds step, the step of a heat sink of formation (46) on an outer surface of the duplexer of membrane of conducting layer (21) and sheet spare (81,81a).
7. method according to claim 6, wherein: membrane of conducting layer (21), sheet spare (81,81a) and heat sink (46) are heated on two side directions of duplexer and pressurize, so that they are bonded in together in bonding step.
8. method according to claim 1, wherein: described resin film (23) is that percentage by weight is that polyether-ether-ketone resin and the percentage by weight of 65-35 is the mixture of the polyetherimide resin of 35-65.
Applications Claiming Priority (12)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001179118 | 2001-06-13 | ||
| JP2001-179118 | 2001-06-13 | ||
| JP2001179118 | 2001-06-13 | ||
| JP2001199392 | 2001-06-29 | ||
| JP2001-199392 | 2001-06-29 | ||
| JP2001199392 | 2001-06-29 | ||
| JP2001-204023 | 2001-07-04 | ||
| JP2001204023A JP3882540B2 (en) | 2001-07-04 | 2001-07-04 | Printed circuit board manufacturing method and printed circuit board formed by the manufacturing method |
| JP2001204023 | 2001-07-04 | ||
| JP2002062394 | 2002-03-07 | ||
| JP2002062394A JP3867593B2 (en) | 2001-06-13 | 2002-03-07 | Printed circuit board manufacturing method and printed circuit board formed by the manufacturing method |
| JP2002-062394 | 2002-03-07 |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB021230196A Division CN100475003C (en) | 2001-06-13 | 2002-06-13 | Printing circuit board embedding electronic device and manufacture method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101370361A CN101370361A (en) | 2009-02-18 |
| CN101370361B true CN101370361B (en) | 2010-09-08 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2008101490604A Expired - Fee Related CN101370360B (en) | 2001-06-13 | 2002-06-13 | Printed wiring board with embedded electric device and method for manufacturing printed wiring board with embedded electric device |
| CN2008101490638A Expired - Fee Related CN101370361B (en) | 2001-06-13 | 2002-06-13 | Method for manufacturing printed wiring board with embedded electric device |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2008101490604A Expired - Fee Related CN101370360B (en) | 2001-06-13 | 2002-06-13 | Printed wiring board with embedded electric device and method for manufacturing printed wiring board with embedded electric device |
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| CN (2) | CN101370360B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105027692B (en) | 2013-05-17 | 2018-01-30 | 株式会社村田制作所 | The manufacture method and built-in component multilager base plate of built-in component multilager base plate |
| CN104684269B (en) * | 2013-12-03 | 2017-09-05 | 旭景科技股份有限公司 | Printed circuit board and manufacturing methods with embedded electronic components |
| JP2020024977A (en) * | 2018-08-06 | 2020-02-13 | 信越ポリマー株式会社 | Electromagnetic wave shielding film, manufacturing method thereof, printed wiring board with electromagnetic wave shielding film, and manufacturing method thereof |
| CN110635240B (en) * | 2019-09-11 | 2024-05-17 | 宁波信泰机械有限公司 | Heatable radome structure and production method thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5401688A (en) * | 1991-02-18 | 1995-03-28 | Kabushiki Kaisha Toshiba | Semiconductor device of multichip module-type |
| CN1195422A (en) * | 1996-06-07 | 1998-10-07 | 松下电器产业株式会社 | Method for mounting semiconductor chip |
| CN1229330A (en) * | 1998-01-30 | 1999-09-22 | 太阳诱电株式会社 | Hybrid module and making method thereof and mounting method thereof |
| CN1280056A (en) * | 1999-07-12 | 2001-01-17 | 索尼化学株式会社 | Multilager base plate |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5808873A (en) * | 1997-05-30 | 1998-09-15 | Motorola, Inc. | Electronic component assembly having an encapsulation material and method of forming the same |
-
2002
- 2002-06-13 CN CN2008101490604A patent/CN101370360B/en not_active Expired - Fee Related
- 2002-06-13 CN CN2008101490638A patent/CN101370361B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5401688A (en) * | 1991-02-18 | 1995-03-28 | Kabushiki Kaisha Toshiba | Semiconductor device of multichip module-type |
| CN1195422A (en) * | 1996-06-07 | 1998-10-07 | 松下电器产业株式会社 | Method for mounting semiconductor chip |
| CN1229330A (en) * | 1998-01-30 | 1999-09-22 | 太阳诱电株式会社 | Hybrid module and making method thereof and mounting method thereof |
| CN1280056A (en) * | 1999-07-12 | 2001-01-17 | 索尼化学株式会社 | Multilager base plate |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101370360B (en) | 2011-04-27 |
| CN101370360A (en) | 2009-02-18 |
| CN101370361A (en) | 2009-02-18 |
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