CN101364389A - Driver circuit, planar display panel and planar display apparatus - Google Patents

Driver circuit, planar display panel and planar display apparatus Download PDF

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Publication number
CN101364389A
CN101364389A CNA2007101419510A CN200710141951A CN101364389A CN 101364389 A CN101364389 A CN 101364389A CN A2007101419510 A CNA2007101419510 A CN A2007101419510A CN 200710141951 A CN200710141951 A CN 200710141951A CN 101364389 A CN101364389 A CN 101364389A
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signal
current potential
power supply
drive signal
pixel data
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CNA2007101419510A
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Chinese (zh)
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蔡进成
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Chi Mei Optoelectronics Corp
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Chi Mei Optoelectronics Corp
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Priority to CNA2007101419510A priority Critical patent/CN101364389A/en
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Abstract

The invention relates to a drive circuit used for receiving a plurality of pixel data signals. The driving circuit comprises a first processing module, a potential conversion module and a second processing module. The first processing module is powered by a first power supply, and the first processing module is used for buffering pixel data signals and outputting. The potential conversion module is powered by a second power supply, and electronically connected with the first processing module and used for increasing the potential of the pixel data signals in the potential range of the second power supply to output a first data signal and a second data signal supplementary mutually, and the potential conversion module converts the first data signal and the second data signal to output a first driving signal with the positive polarity or a second driving signal with the negative polarity. The second processing module is powered by a third power supply and electrically connected with the potential conversion module, and the second processing module is used for increasing the potential of the first driving signal to generate a third driving signal and selectively outputting the second signal or the third signal, wherein the potential of the second power supply is between that of the first power supply and that of the third power supply.

Description

Driving circuit, two-d display panel and flat display apparatus
Technical field
The invention relates to a kind of driving circuit, display panel and display device, especially in regard to a kind of driving circuit, two-d display panel and flat display apparatus.
Background technology
Arriving along with digital Age, flat display apparatus, for example the technology of liquid crystal indicator is also grown up fast, become indispensable electronic product, so also more and more higher for the technology and the functional requirement of flat display apparatus, and become one of important item of the technology that promotes flat display apparatus to drive liquid crystal molecule by good driving circuit.
Please refer to shown in Figure 1ly, in the prior art, flat display apparatus is to comprise a kind of driving circuit 1, and driving circuit 1 is to be arranged in the two-d display panel of flat display apparatus (figure does not show).Driving circuit 1 has a digital processing module 11 and a simulation process module 12 is handled a plurality of pixel data signal P, below is simplified illustration, is example with single pixel data signal P only.Digital processing module 11 is by digital power VD power supply, and receives each pixel data signal P.Digital processing module 11 is to have a working storage 111 and one first impact damper 112, working storage 111 receives a control signal SC and will export first impact damper 112 to after the control signal SC displacement, first impact damper 112 is to receive pixel data signal P according to control signal SC, and first impact damper 112 is that buffering pixel data signal P exports.
Simulation process module 12 is by analog power VA power supply, and receives pixel data signal P from digital processing module 11.Simulation process module 12 is to have a shifter 121, a converter 122, one second impact damper 123 and a multiplexer 124, shifter 121 is that first impact damper 112 with digital processing module 11 electrically connects, and converter 122 is to electrically connect the shifter 121 and second impact damper 123, and multiplexer 124 is to electrically connect with second impact damper 123.Shifter 121 is that current potential according to analog power VA is with transition pixel data signal P, and promote the current potential of pixel data signal P and produce a transition data-signal S01, and the pixel data signal P of a position of transition is to use a shifter 121 on the implementation usually, so then use a plurality of shifters 121 if handle a plurality of pixel data signal P.
Converter 122 is to receive a plurality of reference signal Ref from a resistance string, and according to reference signal Ref so that transition data-signal S01 is converted to a drive signal S02, and export with buffering by second impact damper 123 and multiplexer 124, and driving circuit 1 is the pixel that output drive signal S02 drives a two-d display panel, and this just makes the corresponding start of liquid crystal molecule of pixel.
Yet, because the speed in the reaction time of liquid crystal molecule is the voltage difference influence that is subjected to reference signal Ref, so it is increasing that analog power VA is needed; In addition, the processing procedure of digital processing module 11 so digital power VD then can be more and more littler, therefore causes the voltage difference of analog power VA and digital power VD increasing because of more and more advanced.And said circumstances when cooperating with shifter 121, if the design of the yield value of shifter 121 is too little, then when transition pixel data signal P promotes the current potential of pixel data signal P, is easy to generate the problem of transition failure.And if yield value design too big, then when transition, can make moment of analog power VA take out live and flow through greatly.If when handling a plurality of pixels money signal P again simultaneously, then because of the start simultaneously of a plurality of shifters 121, so need the very high magnitude of current of supply, this kind situation causes the supply of whole power supply partly to can't bear load easily, more can cause driving circuit 1 inner member to be damaged when serious.
From the above, how to provide a kind of flat display apparatus that can address the above problem, two-d display panel and driving circuit, one of current just important topic.
Summary of the invention
Because the problems referred to above, the purpose of this invention is to provide and a kind of transition is carried out smoothly, and reduce driving circuit, two-d display panel and the flat display apparatus of substituting electric current and then protection system power supply.
For achieving the above object, be to receive at least one pixel data signal according to a kind of driving circuit of the present invention, driving circuit comprises one first and handles module, current potential conversion module and one second processing module.The first processing module is by the power supply of one first power supply, and exports behind the buffering pixel data signal.Current potential conversion module is to electrically connect by second source power supply and with the first processing module, current potential conversion module is the current potential that improves pixel data signal in the potential range of second source exporting complementary one first data-signal and one second data-signal, and with first data-signal and the conversion of second data-signal to produce one first drive signal and one second drive signal respectively.The second processing module is to be powered by one the 3rd power supply, and electrically connect with current potential conversion module, the second processing module is to improve the current potential of first drive signal to produce one the 3rd drive signal, and select second drive signal or the output of the 3rd drive signal, wherein the current potential of second source is between between the current potential of first power supply and the 3rd power supply.
For achieving the above object, be to comprise a pel array and one drive circuit according to a kind of two-d display panel of the present invention.Driving circuit is to receive at least one pixel data signal, and driving circuit has one first and handles module, current potential conversion module and one second processing module.The first processing module is by the power supply of one first power supply, and exports behind the buffering pixel data signal.Current potential conversion module is to electrically connect by second source power supply and with the first processing module, current potential conversion module is the current potential that improves pixel data signal in the potential range of second source exporting complementary one first data-signal and one second data-signal, and with first data-signal and the conversion of second data-signal to produce one first drive signal and one second drive signal respectively.The second processing module is to be powered by one the 3rd power supply, and electrically connect with current potential conversion module, the second processing module is to improve the current potential of first drive signal to produce one the 3rd drive signal, and select second drive signal or the 3rd drive signal to export pel array to, wherein the current potential of second source is between between the current potential of first power supply and the 3rd power supply.
For achieving the above object, be to comprise a pel array, a light source and one drive circuit according to a kind of flat display apparatus of the present invention.Light source is to produce light to pass pel array to show an image, and driving circuit is to receive at least one pixel data signal, and driving circuit has one first and handles module, current potential conversion module and one second processing module.The first processing module is by the power supply of one first power supply, and exports behind the buffering pixel data signal.Current potential conversion module is to electrically connect by second source power supply and with the first processing module, current potential conversion module is the current potential that improves pixel data signal in the potential range of second source exporting complementary one first data-signal and one second data-signal, and with first data-signal and the conversion of second data-signal to produce one first drive signal and one second drive signal respectively.The second processing module is to be powered by one the 3rd power supply, and electrically connect with current potential conversion module, the second processing module is to improve the current potential of first drive signal to produce one the 3rd drive signal, and select second drive signal or the 3rd drive signal to export pel array to, wherein the current potential of second source is between between the current potential of first power supply and the 3rd power supply.
From the above; because of complying with flat display apparatus of the present invention; two-d display panel and driving circuit thereof; be to increase the power supply of second source as current potential conversion module; and the current potential of second source is between the current potential of first power supply and the 3rd power supply; this kind mode not only can make current potential conversion module not need the supply of high power supply; switch and only need in the potential range of second source, just to do transition smoothly; meaning promptly improves the current potential of pixel data signal; even use a large amount of current potentials to change also start fast together of module; and except the problem that does not have the transition failure produces; also can reduce and take out the live flow, and then protect the stability of whole power supply.
Description of drawings
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, below in conjunction with accompanying drawing the specific embodiment of the present invention is elaborated, wherein:
Fig. 1 is for showing the synoptic diagram of existing a kind of driving circuit;
Fig. 2 is for showing the synoptic diagram according to a kind of flat display apparatus of preferred embodiment of the present invention;
Fig. 3 is for showing the synoptic diagram according to driving circuit in the flat display apparatus of preferred embodiment of the present invention;
Fig. 4 is for showing the synoptic diagram according to shifter in the driving circuit of preferred embodiment of the present invention; And
Fig. 5 is for showing the synoptic diagram according to reflex circuit in the driving circuit of preferred embodiment of the present invention.
Embodiment
Hereinafter with reference to relevant drawings, a kind of driving circuit, two-d display panel and flat display apparatus according to preferred embodiment of the present invention are described.
Please refer to shown in Figure 2ly, the flat display apparatus 2 of preferred embodiment of the present invention is to comprise a two-d display panel 3 and a light source 4.Two-d display panel 3 is to have a pel array 31 and one drive circuit 32.Light source 4 is to be oppositely arranged with two-d display panel 3, and generation light L passes pel array 31 to show an image.The flat display apparatus 2 of present embodiment is a liquid crystal indicator on the implementation, so two-d display panel 3 is to be a display panels, and light source 4 can be a module backlight on the implementation.
Please refer to shown in Figure 3ly, the driving circuit 32 of present embodiment is to receive a plurality of pixel data signal P, and have one first handle module 321, current potential conversion module 322 and one second is handled module 323; And each pixel data P is the data-signal that is respectively a 1bit on the implementation, and also is a digital signal, so be that the pixel data signal P that receives six 1bit with driving circuit 32 is an example at this.It is by one first power supply V1 power supply that first of present embodiment is handled module 321, and current potential conversion module 322 is by second source V2 power supply, and the second processing module 323 is to be powered by one the 3rd power supply V3.The current potential of the second source V2 of present embodiment, be on the implementation between the current potential of the first power supply V1 and the 3rd power supply V3, and the current potential of the 3rd power supply V3 is greater than the first power supply V1 current potential, and for example its scope of the current potential of second source V2 is between 2.5 volts to 13 volts.
In the present embodiment, the first processing module 321 is to have a shift registor 3211, one first impact damper 3212 and one first multiplexer 3213.
Shift registor 3211 is to be electrically connected between first impact damper 3212 and first multiplexer 3213.First multiplexer 3213 is to receive a clock pulse control signal SCC and each pixel data signal P, and selects to export each pixel data signal P to shift registor 3211 with a positive polarity or a negative polarity according to clock pulse control signal SCC; For example: when clock pulse control signal SCC was an electronegative potential, then first multiplexer 3213 was to select with positive polarity output, and when clock pulse control signal SCC was a noble potential, then first multiplexer 3213 was to select to export with negative polarity.
And the definition of positive polarity and negative polarity, it then is the common voltage (common voltage) (figure does not show) that is greater than or less than colorized optical filtering (color filter) substrate in the two-d display panel 3 with magnitude of voltage, when magnitude of voltage then is a positive polarity greater than common voltage, when magnitude of voltage then is a negative polarity less than common voltage, if the magnitude of voltage of event pixel data signal P is greater than common voltage, then pixel data signal P is a positive polarity; If the magnitude of voltage of pixel data signal P is less than common voltage, then pixel data signal P is a negative polarity; And be to be an electronegative potential with first multiplexer 3213 according to clock pulse control signal SCC at this, be example and export each pixel data signal P with positive polarity.
Shift registor 3211 outputs one control signal SC to the first impact damper 3212, and each pixel data signal P of displacement, and control signal SC is control first impact damper 3212 each pixel data signal P of reception, and first impact damper 3212 is to export behind each pixel data signal P of buffering.The shift registor 3211 of present embodiment is to be a two-way shift registor (bidirectional shift register) on the implementation, and first impact damper 3212 is to be a line buffer (line buffer).
Current potential conversion module 322 is to electrically connect with the first processing module 321, and has a plurality of shifters 3221 and a converter 3222.
In the present embodiment, the quantity of shifter 3221 is that the quantity of the pixel data signal P that received with driving circuit 32 is identical on the implementation, a meaning i.e. shifter 3221 is correspondence and the pixel data signal P that receives a 1bit, so when current potential conversion module 322 received the pixel data signal P of six 1bit, then current potential conversion module 322 had six shifters 3221.
Referring again to shown in Figure 4, Fig. 4 is the wherein schematic equivalent circuit of a shifter 3221 of Fig. 3, and each shifter 3221 is to electrically connect with the first processing module 321, and has one first input transistors Q1, one second input transistors Q2, one first load transistor Q3 and one second load transistor Q4.Wherein, the source electrode of the source electrode of the first input transistors Q1 and the second input transistors Q2 electrically connects one the 4th power supply V4, the grid of the first load transistor Q3 electrically connects the drain electrode of the first input transistors Q1, the grid of the second load transistor Q4 electrically connects the drain electrode of the second input transistors Q2, and the source electrode of the source electrode of the first load transistor Q3 and the second load transistor Q4 electrically connects second source V2, the drain electrode of the first load transistor Q3 electrically connects the drain electrode of the second input transistors Q2, and the drain electrode of the second load transistor Q4 electrically connects the drain electrode of the first input transistors Q1.The 4th power supply V4 of present embodiment is an analogue ground power supply.
The grid of the first input transistors Q1 is to receive pixel data signal P, the grid of the second input transistors Q2 is the complementary signal P ' that receives pixel data signal P, shifter 3221 and cooperating by the first input transistors Q1 and the second load transistor Q4, and the cooperating of the second input transistors Q2 and the first load transistor Q3, in the potential range of second source V2, to improve the current potential of pixel data signal P, and export one first data-signal S11, and export one second data-signal S12 in the drain electrode of the first input transistors Q1 in the drain electrode of the second input transistors Q2.The first data-signal S11 of present embodiment and the second data-signal S12 are complementary on the implementation, and are respectively a digital signal, and are to produce totally six to form the right first data-signal S11 and the second data-signal S12 be example with current potential conversion module 322 then at this.
Referring again to shown in Figure 3, converter 3222 is to receive a plurality of reference signal Ref, and electrically connect receiving six couples the first data-signal S11 and the second data-signal S12 with each shifter 3221, converter 3222 be according to reference signal Ref with this six couple's the first data-signal S11 and second data-signal S12 conversion to produce one first drive signal S13 or one second drive signal S14.And converter 3222 is to be that a digital analog converter (digital to analog converter), the first drive signal S13 and the second drive signal S14 are respectively a simulating signal, and has a magnitude of voltage.In addition, in the present embodiment, the first drive signal S13 is positive polarity on the implementation, and the second drive signal S14 is a negative polarity, and promptly the magnitude of voltage of the first drive signal S13 is greater than common voltage for meaning, and the magnitude of voltage of the second drive signal S14 is less than common voltage; And at this is to be example with the converter 3222 output first drive signal S13.
Because current potential conversion module 322 is powered by second source V2, and because of the current potential of second source V2 between the current potential of the first power supply V1 and the 3rd power supply V3, so 322 need of current potential conversion module switch between the first power supply V1 and second source V2, just can avoid shifter 3221 transitions failure, the live of taking out in the time of more reducing transition flows, and then ensures the stability of whole power supply.
Please join according to shown in Figure 3, in the present embodiment, second handles module 323 is and current potential conversion module 322 electrically connects, and has a reflex circuit 3231, one second impact damper 3232 and one second multiplexer 3233 again.
Fig. 5 is a synoptic diagram of reflex circuit 3231 among Fig. 3, and reflex circuit 3231 electrically connects with the converter 3222 of current potential conversion module 322, and has a push actuator OPA and a plurality of resistor R 1, R2.Push actuator OPA has a positive input terminal I1 and a negative input end I2, the second source V2 and the first drive signal S13 are positive input terminal I1 and the negative input end I2 that inputs to push actuator OPA respectively, and push actuator OPA and resistor R 1, R2 produce the 3rd drive signal S15 according to second source V2 so that the first drive signal S13 is raised.The reflex circuit 3231 of present embodiment is an anti-phase closed loop amplifier on the implementation.
Referring again to shown in Figure 3, second impact damper 3232 is to electrically connect with converter 3222 and reflex circuit 3231 respectively, and receive the second drive signal S14 and the 3rd drive signal S15 respectively, export behind second impact damper, 3232 buffering second drive signal S14 and the 3rd drive signal S15.And second multiplexer 3233 is to electrically connect with second impact damper 3232, and selects to export the 3rd drive signal S15 with odd number or even-numbered channels according to clock pulse control signal SCC, or exports the second drive signal S14 to pel array 31 with odd number or even-numbered channels.The odd chanel of present embodiment and even-numbered channels are to be respectively positive polarity output or negative polarity output on the implementation, are to be positive polarity output with the odd chanel at this, and even-numbered channels to be negative polarity be output as example.
In the present embodiment, owing to increased second source V2 and reflex circuit 3231, and second source V2 is the power supply as current potential conversion module 322, and the current potential of second source V2 is between the current potential of the first power supply V1 and the 3rd power supply V3, reflex circuit 3231 then can raise the first drive signal S13 producing the 3rd drive signal S15, therefore can lower power consumption raises the current potential of signal.In addition, make the second drive signal S14 and the 3rd drive signal S15 have enough abilities and can drive pel array, to promote whole quality.
In sum; because of complying with flat display apparatus of the present invention; two-d display panel and driving circuit thereof; be to increase the power supply of second source as current potential conversion module; and the current potential of second source is between the current potential of first power supply and the 3rd power supply; this kind mode not only can make current potential conversion module not need the supply of high power supply; switch and only need in the potential range of second source, just to do transition smoothly; meaning promptly improves the current potential of pixel data signal; even use a large amount of current potentials to change also start fast together of module; and except the problem that does not have the transition failure produces; more can reduce and take out the live flow, and then protect the stability of whole power supply.
The above embodiment only is an illustrative, but not is restrictive.Anyly do not break away from spirit of the present invention and category, and, all should be contained in the appending claims its equivalent modifications of carrying out or change.

Claims (13)

1. a driving circuit receives a plurality of pixel data signals, and this driving circuit comprises:
One first handles module, by the power supply of one first power supply, and exports after cushioning those pixel data signals;
One current potential conversion module, electrically connect by second source power supply and with this first processing module, this current potential conversion module improves the current potential of those pixel data signals to export complementary one first data-signal and one second data-signal in the potential range of this second source, and, export one first drive signal or export one second drive signal with a positive polarity with a negative polarity with selection with this first data-signal and the conversion of this second data-signal; And
One second handles module, power by one the 3rd power supply, and electrically connect with this current potential conversion module, this second processing module improves the current potential of this first drive signal to produce one the 3rd drive signal, and select this second drive signal or the output of the 3rd drive signal, wherein the current potential of this second source is between the current potential of this first power supply and the 3rd power supply.
2. driving circuit as claimed in claim 1 is characterized in that the current potential of the 3rd power supply is greater than the current potential of this first power supply.
3. driving circuit as claimed in claim 1 is characterized in that, the potential range of this second source is between 2.5 volts to 13 volts.
4. driving circuit as claimed in claim 1 is characterized in that, this first processing module comprises:
One first multiplexer receives a clock pulse control signal and those pixel data signals, to select to export those pixel data signals with a positive polarity or a negative polarity according to this clock pulse control signal;
One shift registor electrically connects with this first multiplexer, and exports a control signal, and receives and those pixel data signals that are shifted; And
One first impact damper electrically connects with this shift registor, and wherein this control signal is that this first impact damper of control receives those pixel data signals, exports this current potential conversion module behind these those pixel data signals of first buffer buffers to.
5. driving circuit as claimed in claim 4 is characterized in that, this working storage is a two-way shift registor.
6. driving circuit as claimed in claim 1 is characterized in that, this current potential conversion module comprises:
A plurality of shifters, electrically connect to receive those pixel data signals respectively with this first processing module respectively, and in the potential range of this second source, improve the current potential of these pixel data signals, to export complementary this first data-signal and this second data-signal; And
One converter, electrically connect receiving this first data-signal and this second data-signal with those shifters, and this first data-signal and the conversion of this second data-signal are exported this first drive signal or exported this second drive signal with this negative polarity with this positive polarity selecting.
7. driving circuit as claimed in claim 6 is characterized in that, those shifters comprise:
One first input transistors, its grid receives those pixel data signals;
One second input transistors, its grid receives the complementary signal of those pixel data signals, wherein this first and the source electrode of this second input transistors be to electrically connect one the 4th power supply;
One first load transistor, its grid electrically connects the drain electrode of this first input transistors; And
One second load transistor, its grid electrically connects the drain electrode of this second input transistors, wherein this first and the source electrode of this second load transistor electrically connect this second source, the drain electrode of this first load transistor electrically connects the drain electrode of this second input transistors to export this first data-signal, and the drain electrode of this second load transistor electrically connects the drain electrode of this first input transistors to export this second data-signal.
8. driving circuit as claimed in claim 6 is characterized in that, this converter is a digital analog converter.
9. driving circuit as claimed in claim 1 is characterized in that, this second processing module comprises:
One reflex circuit electrically connects by the power supply of the 3rd power supply and with this current potential conversion module, and this reflex circuit also has a push actuator, and this push actuator receives this second source so that this first drive signal is raised to produce the 3rd drive signal.
10. driving circuit as claimed in claim 9 is characterized in that, this reflex circuit is an anti-phase closed loop amplifier, and wherein this second source and this first drive signal input to a positive input terminal and a negative input end of this push actuator respectively.
11. driving circuit as claimed in claim 9 is characterized in that, this second processing module also comprises:
One second impact damper electrically connects with this current potential conversion module and this reflex circuit, to cushion this second drive signal and the 3rd drive signal respectively; And
One second multiplexer electrically connects with this second impact damper, and selects to export the 3rd drive signal or export this second drive signal with odd number or even-numbered channels with odd number or even-numbered channels.
12. a two-d display panel comprises:
One pel array; And
One drive circuit, receive a plurality of pixel data signals, this driving circuit has one first and handles module, one current potential conversion module and one second is handled module, this first processing module is to be powered by one first power supply, and export after cushioning these pixel data signals, this current potential conversion module electrically connects by second source power supply and with this first processing module, this current potential conversion module improves the current potential of these pixel data signals to export complementary one first data-signal and one second data-signal in the potential range of this second source, and the conversion of this first data-signal and this second data-signal exported one first drive signal or export one second drive signal with a negative polarity with a positive polarity selecting, this second processing module electrically connects by the power supply of one the 3rd power supply and with this current potential conversion module, this second processing module improves the current potential of this first drive signal to produce one the 3rd drive signal, and select this second drive signal or the 3rd drive signal to export this pel array to, wherein the current potential of this second source is between the current potential of this first power supply and the 3rd power supply.
13. a flat display apparatus comprises:
One pel array;
One light source produces light and passes this pel array to show an image; And
One drive circuit, receive a plurality of pixel data signals, this driving circuit comprises one first and handles module, one current potential conversion module and one second is handled module, this first processing module is powered by one first power supply, and export after cushioning these pixel data signals, this current potential conversion module electrically connects by second source power supply and with this first processing module, this current potential conversion module is to improve the current potential of these pixel data signals to export complementary one first data-signal and one second data-signal in the potential range of this second source, and with the conversion of this first data-signal and this second data-signal to select exporting one first drive signal or a negative polarity is exported one second drive signal with a positive polarity, this second processing module is to electrically connect by the power supply of one the 3rd power supply and with this current potential conversion module, this second processing module improves the current potential of this first drive signal to produce one the 3rd drive signal, and select this second drive signal or the 3rd drive signal to export this pel array to, wherein the current potential of this second source is between the current potential of this first power supply and the 3rd power supply.
CNA2007101419510A 2007-08-10 2007-08-10 Driver circuit, planar display panel and planar display apparatus Pending CN101364389A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNA2007101419510A CN101364389A (en) 2007-08-10 2007-08-10 Driver circuit, planar display panel and planar display apparatus

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Application Number Priority Date Filing Date Title
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106257577A (en) * 2015-06-17 2016-12-28 矽创电子股份有限公司 Driving method and system for liquid crystal display

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106257577A (en) * 2015-06-17 2016-12-28 矽创电子股份有限公司 Driving method and system for liquid crystal display
US10152933B2 (en) 2015-06-17 2018-12-11 Sitronix Technology Corp. Driving method and system for liquid crystal display

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Application publication date: 20090211