CN101349933B - Computer system of memory slot of different specifications - Google Patents
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- CN101349933B CN101349933B CN2008101491537A CN200810149153A CN101349933B CN 101349933 B CN101349933 B CN 101349933B CN 2008101491537 A CN2008101491537 A CN 2008101491537A CN 200810149153 A CN200810149153 A CN 200810149153A CN 101349933 B CN101349933 B CN 101349933B
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Abstract
A computer system with the memory slots of different standards comprises a second memory module of a first standard, a second memory slot of a second standard which is connected with the second memory module, and a memory controller connected with the second memory slot, wherein when the second memory module is connected with the second memory slot, the first special signal group of the second memory module of the first standard is transmitted to the second special pin group of the memory controller via the second idle pin group of the second memory slot. The invention provides a computer system with the memory slots of different standards can support the memory modules of different standards to improve the memory efficiency of the computer system with the memory slots of different standards.
Description
Technical field
The application relates to a kind of computer system of supporting memory slot of different specifications, relate in particular to a kind of DDR2 memory modules and can be used in the DDR3 memory bank, or the DDR3 memory modules can be used in the computer system of DDR2 memory bank.
Background technology
Please refer to Fig. 1, it is depicted as a computer system synoptic diagram.Computer system 10 mainly comprises: a central processing unit (CPU) 102, a north bridge chips (North Bridge) 104, with a South Bridge chip (SouthBridge) 106.North bridge chips 104 main every work and the coordinations of being responsible for high speed elements such as central processing unit 102, an internal memory (RAM) 108, an AGP bus (Advanced Graphics Port) 110; Slower part in the systems such as South Bridge chip 106 main responsible IDE (Integrated Device Electronics) device 112 and one USB (Universal Serial Bus) devices 114, its effect is to allow all data effectively transmit.
Please refer to Fig. 2, it is depicted as a memory modules (RAM Module) synoptic diagram.Memory modules 20 mainly comprises: one group of internal memory crystal grain (DIP) 202, a circuit daughter board 204, with one group of pin 206, wherein a plurality of internal memory crystal grain 202 are welded on the circuit daughter board 204.The memory size of memory modules 20 promptly is the sum total of a plurality of internal memory crystal grain 202 capacity.For instance, if memory modules 20 comprises the internal memory crystal grain 202 of eight 128MB, then the memory size of memory modules 20 is 128MBx8=1GB.
Memory modules mainly is installed on the memory bank (RAM Slot) of the motherboard of computer system.Usually on the motherboard two to four memory banks are arranged, if plug two 256MB memory modules on the motherboard simultaneously, then this computer system promptly has the memory size of 256MBx2=512MB; If plug four 256MB memory modules on the motherboard simultaneously, then this computer system promptly has the memory size of 256MBx4=1GB.
Common memory bank specification on the motherboard, from early stage forms data transmission pattern (Single DataRate is hereinafter to be referred as SDR), evolution is to present Double Data transmission mode (Double Data Rate is hereinafter to be referred as DDR).The SDR internal memory was meant in an internal memory clock period (Clock), when a square wave rising edge, carry out single job (reading or writing), the DDR internal memory has then been quoted a kind of new design, it is at an internal memory in the clock period, when the square wave rising edge, carry out single job, therefore also do single job when the negative edge of square wave, in a clock period, the DDR internal memory then can be finished the task that SDR internal memory two cycles just can finish.
The internal memory of DDR specification itself is constantly evolution also, from early stage first generation DDR internal memory (hereinafter to be referred as the DDR1 internal memory), be the second generation DDR internal memory (hereinafter to be referred as the DDR2 internal memory) of main flow up till now, so up-to-date up till now third generation DDR internal memory (hereinafter to be referred as the DDR3 internal memory).The DDR3 internal memory is the regeneration product of DDR2 internal memory.The frequency of operation of DDR3 internal memory is than DDR2 internal memory height, yet DDR3 internal memory operating voltage is 1.5V (volt), but is lower than the operating voltage 1.8V (volt) of DDR2 internal memory.Therefore, the DDR3 internal memory has the faster but more energy-conservation characteristic of speed.
Because the DDR internal memory is incompatible, therefore, when user's desire upgrades to DDR3 with internal memory by DDR2, motherboard and on memory bank also must synchronous upgrading.That is to say that if motherboard is only supported DDR2, only dispose the DDR2 memory bank on the motherboard, then the user only can use the DDR2 memory modules, and the DDR3 memory modules can not be inserted in the DDR2 memory bank.Otherwise, if motherboard is only supported DDR3, only dispose the DDR3 memory bank on the motherboard, then the user only can use the DDR3 memory modules, and the DDR2 memory modules can not be inserted in the DDR3 memory bank.
Because the Memory Controller Hub in the north bridge chips now all can be supported DDR2 and DDR3 memory modules simultaneously, allow the user can freely select to use DDR2 or DDR3 memory modules, part motherboard producer releases the two-in-one motherboard of DDR2/DDR3 (hereinafter to be referred as the DDR-Combo motherboard) that can support DDR2 and DDR3 memory modules simultaneously at present.Please refer to Fig. 3, it is depicted as the DDR-Combo motherboard synoptic diagram that can support DDR2 and DDR3 memory modules.DDR-Combo motherboard 30 mainly comprises: a north bridge chips 302, one the one DDR2 memory bank 304-1, one the 2nd DDR2 memory bank 304-2, one the one DDR3 memory bank 306-1, one the 2nd DDR3 memory bank 306-2.Moreover north bridge chips 302 also comprises a Memory Controller Hub 308.As shown in Figure 3, this DDR-Combo motherboard 30 is supported two groups DDR2 memory bank and two groups DDR3 memory bank.When the user uses the DDR2 memory modules, can be with one or two DDR2 memory modules insertion DDR2 memory banks.When the user uses the DDR3 memory modules, can be with one or two DDR3 memory modules insertion DDR3 memory banks.
Yet motherboard does not allow that DDR2 and DDR3 memory modules are used in the same motherboard of computer system simultaneously.In case the user selects to use the DDR2 memory modules, and when the DDR2 memory modules inserted the DDR2 memory bank, the DDR3 memory bank will leave unused and cause waste.Same, in case the user selects to use the DDR3 memory modules, and when the DDR3 memory modules inserted the DDR3 memory bank, also can cause the DDR2 memory bank idle and cause waste.
Summary of the invention
In view of this, the object of the present invention is to provide a kind of computer system of memory slot of different specifications, to improve the defective of prior art.
A kind of computer system of memory slot of different specifications comprises: one first memory modules belongs to one first specification; One second memory modules belongs to this first specification, and this first specification has one first group and shares signal and one first group of exclusive signal; One first memory bank belongs to this first specification, and this first memory bank has one first group and shares pin, and one first group of exclusive pin is with one first group of sky pin; One second memory bank belongs to one second specification, and this second memory bank tool is shared pin for one second group, and one second group of exclusive pin is with one second group of sky pin; And a Memory Controller Hub, be connected to this first memory bank and this second memory bank, have one first group of shared pins, one first group of exclusive pin is with one second group of exclusive pin; Wherein, when this second memory modules is connected with this second memory bank, this first group this second group shared pin sharing signal via this second memory bank of this second memory modules output, be sent to this first group of shared pins of this Memory Controller Hub, this first group of exclusive signal of this second memory modules output is sent to this second group of exclusive pin of this Memory Controller Hub via this second group of sky pin of this second memory bank; Wherein, when above-mentioned first memory modules is connected with above-mentioned first memory bank, above-mentioned first memory modules is exported above-mentioned first group of above-mentioned first group of shared pin of sharing signal via above-mentioned first memory bank, be sent to above-mentioned first group of shared pins of above-mentioned Memory Controller Hub, above-mentioned first group of exclusive signal of above-mentioned first memory modules output is sent to above-mentioned first group of exclusive pin of above-mentioned Memory Controller Hub via above-mentioned first group of exclusive pin of above-mentioned first memory bank.
The application proposes a kind of computer system of memory slot of different specifications, can support the memory modules of different size simultaneously, promptly the first specification memory modules can be used in the memory bank of second specification on the motherboard, combine with the memory bank that the first specification memory modules inserts in first specification again, therefore can significantly improve the internal memory effect of computer system with memory slot of different specifications.
Description of drawings
By following graphic and explanation the application is elaborated, makes understanding the present invention that the reader can be more deep:
Figure 1 shows that a computer system synoptic diagram;
Figure 2 shows that a memory modules synoptic diagram;
Figure 3 shows that the DDR-Combo motherboard synoptic diagram that to support DDR2 and DDR3 memory modules;
Fig. 4 A is depicted as the DDR2 signal and arranges synoptic diagram;
Fig. 4 B is depicted as the DDR3 signal and arranges synoptic diagram;
Fig. 5 A is depicted as another DDR2 signal and arranges synoptic diagram;
Fig. 5 B is depicted as another DDR3 signal and arranges synoptic diagram;
Fig. 6 A is depicted as according to signal between known north bridge chips shown in the signal classification of DDR2 internal memory and DDR2 internal memory and transmits synoptic diagram;
Fig. 6 B is depicted as according to signal between known north bridge chips shown in the signal classification of DDR3 internal memory and DDR3 internal memory and transmits synoptic diagram; And
Figure 7 shows that north bridge chips of the present invention, DDR2 and DDR3 memory modules, and DDR2 and DDR3 memory bank between signal transmit synoptic diagram.
Embodiment
The application is a kind of computer system of memory slot of different specifications, for example can support DDR2 and DDR3 memory modules simultaneously, and be applied to have on the motherboard of memory slot of different specifications, and the DDR2 memory modules can be used in the DDR3 memory bank on the motherboard, or the DDR3 memory modules can be used in the DDR2 memory bank on the motherboard.
Though DDR2 belongs to different internal memory specifications with DDR3, yet most of signal arrangement (also can be considered the pin in the memory modules, or the arrangement of the pin in the memory bank) be consistent.Just in the specification of the specification of DDR2 and DDR3, about signal arrangement more than 90% communicates.
Please refer to Fig. 4 A and Fig. 4 B, be respectively DDR2 and DDR3 signal shown in it and arrange synoptic diagram.Shown in Fig. 4 A and Fig. 4 B, DDR2 and DDR3 specification all have 240 signals, wherein comprise DDR signal, ground signalling, connect signal (N/A or Dummy) with sky, and sky connects signal institute's reserved part in DDR2 and the DDR3 specification just.
Common and difference part for pointing out that conveniently DDR2 and DDR3 signal are arranged please refer to Fig. 5 A and Fig. 5 B, is respectively another signal of DDR2 and DDR3 shown in it and arranges synoptic diagram.In Fig. 5 A, 240 signals of DDR2 can be divided into: the exclusive signal of first kind of DDR2 self specification, just different signal (hereinafter to be referred as the DDR2 signal) with the DDR3 specification, as signals such as D2_Ma_Clk# 5, D2_Ma_Clk5, D2_Wea#, D2_Maa0, D2_Ma_Clk#4, D2_Ma_Clk4, second kind: share signal with the DDR3 tool and comprise: have the DDR signal and the ground signalling of intercommunity (identical), and the third: sky connects signal.In Fig. 5 B, 240 signals of DDR3 can be divided into: the exclusive signal of first kind of DDR3 self specification, just different signal (hereinafter to be referred as the DDR3 signal) with the DDR2 specification, as+Vttddr, D3_Wea#, signals such as D3_Maa0, D3_Reset#, second kind: share signal with the DDR2 tool and comprise: have the DDR signal and the ground signalling of intercommunity (identical), and the third: sky connects signal.By Fig. 5 A and Fig. 5 B as can be known, in the specification of DDR2 and DDR3, most of signal is the tool intercommunity.
Moreover, the present invention for convenience of description, the signal that the DDR2 internal memory can be sent is divided three classes: the first kind is the signal DDR signal and the ground signalling of DDR2 and DDR3 tool intercommunity, may be defined as DDR2/DDR3 and shares (usefulness) signal; Second class is the exclusive signal of DDR2, may be defined as the exclusive signal of DDR2; The 3rd class is that sky connects signal.
Transmit synoptic diagram according to this three classes signal signal that can draw between north bridge chips and DDR2 internal memory.Please refer to Fig. 6 A, it is to transmit synoptic diagram according to signal between north bridge chips shown in the signal classification of DDR2 internal memory and DDR2 internal memory.This system mainly comprises: a north bridge chips 60, one DDR2 memory banks 62, and with a DDR2 memory modules 64.Moreover north bridge chips 60 also comprises a Memory Controller Hub 602, and Memory Controller Hub 602 also comprises: one group of DDR2/DDR3 share signal pins 604, one group of exclusive signal pins 606 of DDR2, with one group of exclusive signal pins 608 of DDR3.Moreover DDR2 memory bank 62 also comprises: one group of DDR2/DDR3 share signal pin 622, one group of exclusive signal pin 624 of DDR2, with one group of sky pin 626.Moreover DDR2 memory modules 64 also comprises: one group of DDR2 internal memory crystal grain 642, a DDR2 circuit daughter board 644, one group of DDR2/DDR3 share signal pins 646, one group of exclusive signal pins 648 of DDR2, connect pin 650 with one group of sky.
The DDR2/DDR3 that DDR2 internal memory crystal grain 642 is sent shares signal (D1) can be sent to the shared signal pins 646 of DDR2/DDR3 via the wiring of DDR2 circuit daughter board 644; Subsequently, the shared signal (D1) of DDR2/DDR3 is transferred into the shared signal pin 622 of DDR2/DDR3 again; Subsequently, DDR2/DDR3 shares signal (D1) is sent to Memory Controller Hub 602 again via the wiring of motherboard the shared signal pins 604 of DDR2/DDR3.Moreover the exclusive signal of DDR2 (D2) that DDR2 internal memory crystal grain 642 is sent can be sent to the exclusive signal pins 648 of DDR2 via the wiring of DDR2 circuit daughter board 644; Subsequently, the exclusive signal of DDR2 (D2) is transferred into the exclusive signal pin 624 of DDR2 again; Subsequently, the exclusive signal of DDR2 (D2) is sent to the exclusive signal pins 606 of DDR2 of Memory Controller Hub 602 again via the wiring of motherboard.Moreover sky connects pin 650 and is connected to sky pin 626 mutually.
Same, the signal that the DDR3 internal memory is sent also can be divided three classes: the first kind is the signal DDR signal and the ground signalling of DDR3 and DDR2 tool intercommunity, just shares signal for DDR2/DDR3; Second class is the exclusive signal of DDR3, may be defined as the exclusive signal of DDR3; The 3rd class is that sky connects signal.
Same, according to this three classes signal signal transmission synoptic diagram between north bridge chips and DDR3 internal memory that can draw.Please refer to Fig. 6 B, it is to transmit synoptic diagram according to signal between north bridge chips shown in the signal classification of DDR3 internal memory and DDR3 internal memory.This system mainly comprises: north bridge chips 60, one DDR3 memory banks 66, and with a DDR3 memory modules 68.Moreover DDR3 memory bank 66 also comprises: one group of DDR2/DDR3 share signal pin 662, one group of exclusive signal pin 664 of DDR3, with one group of sky pin 666.Moreover DDR3 memory modules 68 also comprises: one group of DDR3 internal memory crystal grain 682, a DDR3 circuit daughter board 684, one group of DDR2/DDR3 share signal pins 686, one group of exclusive signal pins 688 of DDR3, connect pin 690 with one group of sky.
Same, the DDR2/DDR3 that DDR3 internal memory crystal grain 682 is sent shares signal (D1) can be sent to the shared signal pins 686 of DDR2/DDR3 via the wiring of DDR3 circuit daughter board 684; Subsequently, the shared signal (D1) of DDR2/DDR3 is transferred into the shared signal pin 662 of DDR2/DDR3 again; Subsequently, DDR2/DDR3 shares signal (D1) is sent to Memory Controller Hub 602 again via the wiring of motherboard the shared signal pins 604 of DDR2/DDR3.Moreover the exclusive signal of DDR3 (D3) that DDR3 internal memory crystal grain 682 is sent can be sent to the exclusive signal pins 688 of DDR3 via the wiring of DDR3 circuit daughter board 684; Subsequently, the exclusive signal of DDR3 (D3) is transferred into the exclusive signal pin 664 of DDR3 again; Subsequently, the exclusive signal of DDR3 (D3) is sent to the exclusive signal pins 608 of DDR3 of Memory Controller Hub 602 again via the wiring of motherboard.Moreover sky connects pin 690 and is connected to sky pin 666 mutually.
Referring again to Fig. 5 A and Fig. 5 B as can be known, in the signal of DDR2 and DDR3 is arranged, most signal is intercommunity (DDR2/DDR3 shares signal), it is difference (exclusive signal of DDR2 and the exclusive signal of DDR3) that the minority signal is only arranged, and the sky that the quantity of exclusive signal of DDR2 and the exclusive signal of DDR3 all is less than DDR2 and DDR3 memory bank connects pin.Therefore, the present invention promptly is by the way plate rewiring that powers on of DDR3 memory modules, the sky that the exclusive signal (the exclusive signal of DDR3) of the DDR3 that the DDR3 internal memory can be sent is sent to the DDR3 memory modules connects pin, and be resent to the sky pin of DDR2 memory bank, finally, rewiring by motherboard again, the exclusive signal of DDR3 on the sky pin of DDR2 memory bank is sent to the exclusive signal pins of DDR3 of Memory Controller Hub, can realizes that the DDR3 memory modules can be used in the motherboard of DDR2 memory bank.In like manner, by the way plate rewiring that powers on of DDR2 memory modules, the sky that the exclusive signal (the exclusive signal of DDR2) of the DDR2 that the DDR2 internal memory can be sent is sent to the DDR2 memory modules connects pin, and be resent to the sky pin of DDR3 memory bank, finally, rewiring by motherboard again, the exclusive signal of DDR2 on the sky pin of DDR3 memory bank is sent to the exclusive signal pins of DDR2 of Memory Controller Hub, can realizes that the DDR2 memory modules can be used in the motherboard of DDR3 memory bank.
The present invention for convenience of description, below only can be used in the DDR2 memory bank with the DDR3 memory modules motherboard be that example explains.Please refer to Fig. 7, its be depicted as north bridge chips of the present invention, DDR2 and DDR3 memory modules, and DDR2 and DDR3 memory bank between signal transmit synoptic diagram.This system mainly comprises: a north bridge chips 70, one DDR2 memory banks 72, one DDR3 memory banks 74, a DDR3 memory modules 76, and with one the 2nd DDR3 memory modules 78.Moreover north bridge chips 70 also comprises a Memory Controller Hub 702, and Memory Controller Hub 702 also comprises: one group of DDR2/DDR3 share signal pins 704, one group of exclusive signal pins 706 of DDR2, with one group of exclusive signal pins 708 of DDR3.Moreover DDR2 memory bank 72 also comprises: one group of DDR2/DDR3 share signal pin 722, one group of exclusive signal pin 724 of DDR2, with one group of sky pin 726.Moreover a DDR3 memory modules 76 also comprises: one group of DDR3 internal memory crystal grain 762, a DDR3 circuit daughter board 764, one group of DDR2/DDR3 share signal pins 766, one group of exclusive signal pins 768 of DDR3, connect pin 770 with one group of sky.
Because the signal that the 2nd DDR3 memory modules 78 is sent via DDR3 memory bank 74, finally is sent to the process of Memory Controller Hub 702, identical with signal transmission synoptic diagram between known north bridge chips shown in Fig. 6 B and DDR3 internal memory, do not repeat them here.The following signal of only being sent with regard to a DDR3 memory modules 76, via DDR2 memory bank 72, the process that finally is sent to Memory Controller Hub 702 is done explanation.
At first, the DDR2/DDR3 that sent of DDR3 internal memory crystal grain 762 shares signal (D1) and can be sent to DDR2/DDR3 via the wiring of DDR3 circuit daughter board 764 and share signal pins 766; Subsequently, DDR2/DDR3 shares the shared signal pin 722 of DDR2/DDR3 that signal (D1) is transferred into DDR2 memory bank 72 again; Subsequently, DDR2/DDR3 shares signal (D1) is sent to Memory Controller Hub 702 again via the wiring of motherboard the shared signal pins 704 of DDR2/DDR3.Moreover the sky that the exclusive signal of DDR3 (D3) that DDR3 internal memory crystal grain 762 is sent can be sent to part via the rewiring of DDR3 circuit daughter board 764 connects pin 770; Subsequently, the exclusive signal of DDR3 (D3) is transferred into sky pin 726 again; Finally, the exclusive signal of DDR3 (D3) is sent to the exclusive signal pins 708 of DDR3 of Memory Controller Hub 702 again via the rewiring of motherboard.Because whole signals that DDR3 internal memory crystal grain 762 is sent, comprise DDR2/DDR3 and share signal (D1) and the exclusive signal of DDR3 (D3), all can successfully be sent to Memory Controller Hub 702, so and then have been realized that DDR3 memory modules 76 of the present invention can be used in the mainboard system of DDR2 memory bank 72.
Because in DDR2 and DDR3 specification, sky connects the quantity of the quantity of signal greater than DDR2 and the exclusive signal of DDR3, therefore can guarantee the exclusive signal of all DDR3 (D3) that DDR3 internal memory crystal grain 762 is sent, can successively connect the sky pin 726 of pin 770 and DDR2 memory bank 72, finally be sent to the exclusive signal pins 708 of DDR3 of Memory Controller Hub 702 via the sky of a DDR3 memory modules 76.
Moreover, because DDR3 memory modules 76 operating voltage are 1.5V (volt), and DDR2 memory bank 72 operating voltage are 1.8V (volt), can normally be used in DDR2 memory bank 72 in order to make DDR3 memory modules 76, can adopt a power supply switch circuit (Fig. 7 is not shown).Because before not inserting memory modules or the memory modules that is inserted is when being DDR2, the sky pin 726 of DDR2 memory bank 72 does not have any signal input, in case therefore motherboard learns that via the variation of sky pin 726 level of DDR2 memory bank 72 memory modules that is inserted is DDR3, can utilize power supply switch circuit this moment, operating voltage is switched to 1.5V (volt) by 1.8V (volt), and offer DDR3 memory modules 76, because power supply switch circuit has been a known technology, does not repeat them here.
Moreover, though segment chip producer moves to central processing unit (Fig. 7 is not shown) with Memory Controller Hub 702 from north bridge chips 70, yet do not change feature of the present invention.
Moreover, be example though the present invention can be used in the DDR2 memory bank with the DDR3 memory modules, the DDR2 memory modules can be used in the mainboard system of DDR3 memory bank, also can realize via same notion, does not repeat them here.
Moreover, be example though the present invention outputs signal to Memory Controller Hub with memory modules, not as limit.Memory modules also can receive the signal of exporting from Memory Controller Hub via feature of the present invention.
In sum; though the present invention with preferred embodiment openly as above; right its is not in order to limit the present invention; any those of ordinary skills; without departing from the spirit and scope of the present invention; when can doing various changes and retouching, so protection scope of the present invention is when being as the criterion with the scope that claim was defined.
Claims (9)
1. the computer system of a memory slot of different specifications is characterized in that, comprises:
First memory modules belongs to first specification;
Second memory modules belongs to above-mentioned first specification, and above-mentioned first specification has first group and shares signal and first group of exclusive signal;
First memory bank belongs to above-mentioned first specification, and above-mentioned first memory bank has first group and shares pin, and first group of exclusive pin is with first group of sky pin;
Second memory bank belongs to second specification, and the above-mentioned second memory bank tool is shared pin for second group, and second group of exclusive pin is with second group of sky pin; And
Memory Controller Hub is connected to above-mentioned first memory bank and above-mentioned second memory bank, has first group of shared pins, and first group of exclusive pin is with second group of exclusive pin;
Wherein, when above-mentioned second memory modules is connected with above-mentioned second memory bank, above-mentioned first group of above-mentioned second group of shared pin of sharing signal via above-mentioned second memory bank of above-mentioned second memory modules output, be sent to above-mentioned first group of shared pins of above-mentioned Memory Controller Hub, above-mentioned first group of exclusive signal of above-mentioned second memory modules output is sent to above-mentioned second group of exclusive pin of above-mentioned Memory Controller Hub via above-mentioned second group of sky pin of above-mentioned second memory bank;
Wherein, when above-mentioned first memory modules is connected with above-mentioned first memory bank, above-mentioned first memory modules is exported above-mentioned first group of above-mentioned first group of shared pin of sharing signal via above-mentioned first memory bank, be sent to above-mentioned first group of shared pins of above-mentioned Memory Controller Hub, above-mentioned first group of exclusive signal of above-mentioned first memory modules output is sent to above-mentioned first group of exclusive pin of above-mentioned Memory Controller Hub via above-mentioned first group of exclusive pin of above-mentioned first memory bank.
2. computer system according to claim 1 is characterized in that, in above-mentioned second memory bank, the number of above-mentioned second group of sky pin is greater than the number of above-mentioned second group of exclusive pin.
3. computer system according to claim 1 is characterized in that, above-mentioned first group of shared signal is a plurality of same signals of above-mentioned first specification and above-mentioned second specification.
4. computer system according to claim 1 is characterized in that, above-mentioned first group of exclusive signal is a plurality of phase xor signals different with above-mentioned second specification.
5. computer system according to claim 1 is characterized in that above-mentioned Memory Controller Hub is positioned at north bridge chips.
6. computer system according to claim 1 is characterized in that above-mentioned Memory Controller Hub is positioned at central processing unit.
7. computer system according to claim 1, it is characterized in that, aforementioned calculation machine system also comprises power supply switch circuit, be connected to above-mentioned second memory bank, when above-mentioned second group of sky pin of above-mentioned second memory bank do not have above-mentioned first group of exclusive signal to import, above-mentioned power supply switch circuit provided first voltage to above-mentioned second memory bank; When above-mentioned second group of sky pin had above-mentioned first group of exclusive signal to import, above-mentioned power supply switch circuit provided second voltage to above-mentioned second memory bank.
8. computer system according to claim 1 is characterized in that, above-mentioned first specification is a second generation Double Data transmission mode specification, and above-mentioned second specification is a third generation Double Data transmission mode specification.
9. computer system according to claim 1 is characterized in that, above-mentioned first specification is a third generation Double Data transmission mode specification, and above-mentioned second specification is a second generation Double Data transmission mode specification.
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| CN105843326A (en) * | 2015-01-15 | 2016-08-10 | 华硕电脑股份有限公司 | Computer main board with double-specification memory slots, and computer system |
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| CN105843326A (en) * | 2015-01-15 | 2016-08-10 | 华硕电脑股份有限公司 | Computer main board with double-specification memory slots, and computer system |
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