CN101341413A - Measurement arrangement for determining the characteristic line parameters by measuring scattering parameters - Google Patents
Measurement arrangement for determining the characteristic line parameters by measuring scattering parameters Download PDFInfo
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- CN101341413A CN101341413A CNA2006800482173A CN200680048217A CN101341413A CN 101341413 A CN101341413 A CN 101341413A CN A2006800482173 A CNA2006800482173 A CN A2006800482173A CN 200680048217 A CN200680048217 A CN 200680048217A CN 101341413 A CN101341413 A CN 101341413A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/28—Measuring attenuation, gain, phase shift or derived characteristics of electric four pole networks, i.e. two-port networks; Measuring transient response
- G01R27/32—Measuring attenuation, gain, phase shift or derived characteristics of electric four pole networks, i.e. two-port networks; Measuring transient response in circuits having distributed constants, e.g. having very long conductors or involving high frequencies
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2853—Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections
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- Measurement Of Resistance Or Impedance (AREA)
Abstract
The present invention relates to a measurement arrangement for determining the characteristic line parameters by measuring the S-parameters as a function of the frequency of an electrical signal line (14) that achieves an increased measurement bandwidth, namely a measurement bandwidth > 4 GHz. To achieve this, the electrical signal line under test has several neighboring signal lines (12) which are connected to ground on one side and left open on the opposite side in an alternating manner.
Description
Technical field
The present invention relates to be used for determining as the scattering parameter (S parameter) of the function of the frequency of electric signal circuit the measurement mechanism of characteristic line parameter by measurement.
Background technology
In the performance history of high-performance computer nowadays, it is essential being used for the model that the hardware context on all package level measures.Measuring equipment that time domain is different with the different measuring Technology Need in the frequency domain and test board design.A requirement of test board is equal to requirement to product.Therefore, need measure, as the power supply and the ground wire that are distributed in all metal levels on the chip are measured to the transmission line on the chip in the product.In addition, not only interested, and interested in the product as the wire channels utilization in measuring the wall scroll signal transmission line.This shield effectiveness for actual signal coupling behavior on the reflection chip and the metal level between top layer metallic layer and the semi conductive substrate is essential.
A kind of known measuring technique is so-called S parameter measurement, referring to Zinke/Brunswig, " Lehrbuch der Hochfrequenztechnik ", Springer-Verlag, 1989.The S parameter is the reflection and the transmission coefficient of N-terminal-pair network.The equivalent of wall scroll transmission line for example is the two-port network that is characterized by the 2X2S parameter matrix.
By following relationship description two-port network:
Wherein, S
11, S
22, S
12And S
21Be the S parameter, promptly
S
11=input reflection coefficient under the situation of matched load arranged in the output port termination,
S
22=output reflection coefficient under the situation of matched load arranged in the input port termination,
S
12=reverse transfer (insertion) gain under the situation of matched load arranged in the input port termination,
S
21=forward transmitted (insertion) gain under the situation of matched load arranged in the output port termination,
Variable a
1, a
2And b
1, b
2Be to be incident on first and second ports of two-port network and from compound (complex) voltage wave of this first and second ports reflection.
Under this situation, the S parameter measurement is a kind of favourable measuring technique, because the S parameter is than the easier measurement of the parameter of other types with operate under high frequency.
In addition, the also known in the prior art distinct methods that extracts other characteristic line parameters that depend on frequency (such as characteristic impedance Z (f) or propagation constant γ (f) etc.) from the S parameter measurement, thereby can easily obtain these parameters from the S parameter measurement, Thomas-Michael Winkel, Lohit Sagar Dutta, Hartmut Grabinski; " An Accurate Determinationof the Characteristic Impedance of Lossy Lines on Chips Based onHigh Frequency S-Parameter Measurements "; IEEE Multi-ChipModule Conference MCMC ' 96; pp.190-195; February 1996, Thomas-Michael Winkel " Untersuchung der Kopplung zwischenLeitungen auf Silizium-Substraten unterschiedlicher
Unter Verwendung breibandiger Messungen ", Ph D.Thesis, University of Hannover, November 1997.
A specific (special) requirements to high frequency S parameter measurement is in the case: transmission line is not connected with any active device on the chip.Because this cause, if be not connected with receiver with any driver, the parallel signal circuit will be floated.Do not having under driver, receiver and the transistorized situation, when the parallel circuit on the test board must be connected to certain point, can go wrong.
Selection is to allow the two ends of signal line disconnect, but therefore the circuit of floating (floating line) and do not correspond to product can change measurement result.
Second selection is the two-terminal-grounding with the parallel signal circuit.In the case, all signal lines all serve as ground wire, and this does not correspond to product yet.
In principle, driver has Low ESR, and receiver has high impedance.Therefore the 3rd selection is to connect a side of parallel signal circuit and allow a relative side disconnect.Product has been simulated in this selection, but the problem that occur this moment is that high frequency measurement is limited to less than 4GHz on frequency band, because two measurement port present different electric behaviors at two ports in higher frequency range.A port is only seen the parallel circuit of disconnection, and relative port is only seen the parallel circuit of ground connection.As a result, when frequency>4Ghz, in test structure, can excite a more than signal line pattern.
As by previous discussion proof like that, expectation provides a kind of and is used for determining that it is not subjected to the restriction of above-mentioned shortcoming and can brings the remarkable gain of measurement bandwidth as the measuring system of the S parameter of the function of the frequency of electric signal circuit.
Summary of the invention
The present invention relates to be used for the measurement mechanism of determining feature transmission line parameter as the S parameter of the function of the frequency of electric signal circuit by measuring, it has realized the measurement bandwidth that increases, that is, and and measurement bandwidth>4GHz.
Measurement mechanism according to the present invention is characterised in that the feature that describes in detail in the independent claims 1.
In the dependent claims advantageous embodiment of the present invention is had been described in detail.
This creationary measurement mechanism comprises wall scroll signal-under-test circuit (measuring circuit) and several adjacent signals circuits, and wherein measuring circuit and adjacent signals circuit all have first end and the second end, represents the port one (S of two-port network
11) and port 2 (S
22).According to the present invention, an end termination of every adjacent signals circuit has Low ESR, and another end termination of every adjacent signals circuit has high impedance, make all adjacent signals circuits separately first end and the second end all respectively termination Low ESR and high impedance are arranged, and equal or have the quantity of the adjacent signals circuit of high impedance at its first end or its second end no better than in the quantity that its first end or its second end have a low-impedance adjacent signals circuit.
Because this special connection pattern, two ports seem at least much at one.Therefore, have only a signal mode to be excited, enlarged markedly frequency bandwidth.
According to a feature of the present invention, Low ESR is formed by closed end circuit (ground connection), and high impedance is made up of the end open-circuit line.
According to another characteristic of the invention, measuring circuit is floor plan, and by the circuit pattern or be arranged in parallel the adjacent signals circuit is arranged on the same plane of measuring circuit.
More preferably, directly adjacent signals circuit adjacent one another are has different impedances at their first end and their the second end, make the first end of all adjacent signals circuits and the second end respectively alternate ends be connected to Low ESR and high impedance.This causes the arranged alternate on port one and port 2 respectively.This means that two ports all have identical outward appearance, so frequency bandwidth increases to above 20GHz.
According to another characteristic of the invention, the quantity of the adjacent signals circuit of measuring circuit both sides equates.
Further, be directly adjacent to the adjacent signals circuit that measuring circuit arranges and have similar and different impedance at their first end and their the second end respectively.
According to a feature more of the present invention, measuring circuit and adjacent signals circuit are the signal lines in the multilayer chiop, the direction half-twist of signal line between two adjacent layers wherein, and measuring circuit and adjacent signals circuit thereof are arranged in same one deck (measuring layer) by the mode that is arranged in parallel, signal line (adjacent layer circuit) in the layer adjacent with measuring layer is also by parallel arrangement, and first end and their the second end at them also has different impedances respectively, make all adjacent layer circuits separately first end and the second end respectively termination Low ESR and high impedance are arranged, and equal or have the quantity of the adjacent layer circuit of high impedance at its first end or its second end no better than in the quantity that its first end or its second end have a low-impedance adjacent layer circuit.
Preferably, adjacent layer circuit directly adjacent to each other has different impedances at their first end and their the second end, make the first end of all adjacent layer circuits and the second end respectively alternate ends be connected to Low ESR and high impedance.The arranged alternate of this adjacent layer circuit causes measuring bandwidth together with the arranged alternate of adjacent signals circuit and enlarges markedly.Experiment shows that owing to adopt this inventive arrangement such on chip wiring, bandwidth increases to up to 20GHz.
According to another characteristic of the invention, measuring circuit and adjacent lines can be arranged as cluster.
For the outward appearance much at one of two ports realizing bunch, on the imaginary hatch region of this bunch, arrange the end that has Low ESR and high impedance respectively of adjacent signals circuit by mode identical or much at one.
Description of drawings
According to the following description of carrying out in conjunction with the accompanying drawings, other purposes of the present invention, advantage and feature will become clear.
Fig. 1 is the synoptic diagram that has according to the multilayer chiop of the connection pattern of the signal line of prior art;
Fig. 2 is the reflection parameters S that records on port one and port 2 according to Fig. 1
11And S
22Value;
Fig. 3 is the reflection parameters S that records on port one and port 2 according to Fig. 2
11And S
22Phase place;
Fig. 4 is the synoptic diagram that has according to the multilayer chiop of the connection pattern of signal line of the present invention;
Fig. 5 is according to the reflection parameters S that record of Fig. 4 at port symmetry test board
11And S
22Value; And
Fig. 6 is according to the reflection parameters S that record of Fig. 4 at port symmetry test board
11And S
22Phase place.
Embodiment
Fig. 1 shows has the synoptic diagram that asymmetric signal line connects the multilayer chiop 10 of pattern (prior art).
In order to reflect the actual signal coupling behavior on the chip 10, being adjacent to measured signal circuit 14 (so-called measuring circuit) in one deck has increased additional signal circuit 12 (so-called adjacent signals circuit).
In order to reflect the shielding effect of the metal level between top layer metallic layer and base semiconductor, in bottom metal layer, increased additional signal circuit 20 (so-called adjacent layer circuit).All adjacent signals circuits 20 all are an end ground connection, and the other end keeps disconnecting.
As a result, for upper frequency, the reflection parameters S that records as shown in Figures 2 and 3
11And S
22No longer identical.
Since at random with systematic measuring error, the measurement inaccuracy of value is generally~3%.When frequency>4GHz, the difference of two reflection parameters not only all can surpass this value on the value but also on phase place.This means that a more than signal line pattern is activated in this test structure.Therefore, all the highest of transmission line parameters that extract are effective at 4GHz.
The data frequency bandwidth of extracting in order to increase, the test board design need be modified according to the present invention.To guarantee to port one (S
11) 16 and port 2 (S
22) 18 reflection parameters that record are almost equal.Make port one 6,18 see it is symmetrical, can achieve this end from the angle of electricity.
As shown in Figure 4, by with in the adjacent signals circuit 12 every a circuit at port one (S
11) ground connection on 16, and with the every other circuit of adjacent signals circuit 12 at port one (S
11) keep on 16 disconnecting, realized the port symmetry.At port one (S
11) the adjacent signals circuit 12 that keeps on 16 disconnecting is at port 2 (S
22) ground connection on 18.Every other adjacent layer circuit 20 in other metal levels is also with same over-over mode ground connection.
Because this changes, in the frequency range up to 20GHz at least, as at the Fig. 5 of value and shown in Figure 6 at phase place, to port one (S
11) 16 and port 2 (S
22) 18 reflection parameters that record be close to equate.It is general having certain difference between two reflection parameters that record, but as the good criterion of measuring, for value, difference should not surpass the measurement inaccuracy 0.03db (under 20GHz) of expection, for phase place, should not surpass 2 ° of the measurement inaccuracies (under 20GHz) of expection.
Claims (12)
1. measurement mechanism, be used for determining the characteristic line parameter as the scattering parameter of the function of the frequency of electric signal circuit (14) by measurement, this electric signal circuit is a measuring circuit, this measuring circuit has several adjacent signals circuits (12), and this measuring circuit (14) and adjacent signals circuit (12) have first end and the second end respectively, this measurement mechanism is characterised in that, there is Low ESR an end of every adjacent signals circuit (12) all termination, and there is high impedance another end of every adjacent signals circuit (12) all termination, make the first end of all adjacent signals circuits (12) and the second end all respectively termination Low ESR and high impedance are arranged, and equal or have the quantity of the adjacent signals circuit (12) of high impedance at its first end or its second end no better than in the quantity that its first end or its second end have a low-impedance adjacent signals circuit (12).
2. measurement mechanism according to claim 1 is characterized in that: described Low ESR is formed by closed end circuit (ground connection), and described high impedance is formed by the end open-circuit line.
3. according to claim 1 and 2 described measurement mechanisms, it is characterized in that: described measuring circuit (14) is floor plan, and described adjacent signals circuit (12) is arranged on the same plane of described measuring circuit (14) in the mode of circuit pattern.
4. according to claim 1 and 2 described measurement mechanisms, it is characterized in that: measuring circuit (14) is floor plan, and described adjacent signals circuit (12) is arranged on the same plane of described measuring circuit (14) with parallel arrangement.
5. according to the described measurement mechanism of claim 1 to 4, it is characterized in that: the adjacent signals circuit (12) of Bu Zhiing has different impedances at their first end and their the second end respectively directly adjacent to each other.
6. according to the described measurement mechanism of claim 1 to 5, it is characterized in that: the quantity at the adjacent signals circuit (12) of measuring circuit (14) both sides equates.
7. according to the described measurement mechanism of claim 1 to 6, it is characterized in that: the adjacent signals circuit (12) that directly is adjacent to described measuring circuit (14) layout has different impedances at their first end and their the second end respectively.
8. according to the described measurement mechanism of claim 1 to 6, it is characterized in that: the adjacent signals circuit (12) that directly is adjacent to described measuring circuit (14) layout has identical impedance at their first end and their the second end respectively.
9. according to the described measurement mechanism of claim 1 to 8, it is characterized in that: described measuring circuit (14) and described adjacent signals circuit (12) are the signal lines in the multilayer chiop (10), the direction half-twist of signal line between two adjacent layers wherein, described measuring circuit (14) and adjacent signals circuit (12) thereof are arranged in in one deck in the mode that is arranged in parallel, should be with one deck for measuring layer, and the signal line in the layer adjacent with measurement layer (20) is arranged in the mode that is arranged in parallel, be called as the adjacent layer circuit with the described signal line of measuring in the adjacent layer of layer (20), the adjacent layer circuit has different impedances at their first end and their the second end respectively, make the first end of all adjacent layer circuits (20) and the second end termination Low ESR and high impedance respectively, and equal or have the quantity of the adjacent layer circuit (20) of high impedance at its first end or its second end no better than in the quantity that its first end or its second end have a low-impedance adjacent layer circuit (20).
10. measurement mechanism according to claim 9 is characterized in that: the adjacent layer circuit (20) of Bu Zhiing has different impedances at their first end and their the second end respectively directly adjacent to each other.
11. according to claim 1 and 2 described measurement mechanisms, it is characterized in that: described measuring circuit (14) and described adjacent signals circuit (12) are arranged to cluster.
12. measurement mechanism according to claim 11 is characterized in that: on described bunch imaginary hatch region, the end that has Low ESR and high impedance respectively of described adjacent signals circuit (14) is arranged in mode identical or much at one.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP05112641 | 2005-12-21 | ||
EP05112641.5 | 2005-12-21 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN101341413A true CN101341413A (en) | 2009-01-07 |
Family
ID=37969663
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Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNA2006800482173A Pending CN101341413A (en) | 2005-12-21 | 2006-11-23 | Measurement arrangement for determining the characteristic line parameters by measuring scattering parameters |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP1963872A1 (en) |
JP (1) | JP2009520960A (en) |
KR (1) | KR20080087101A (en) |
CN (1) | CN101341413A (en) |
WO (1) | WO2007071519A1 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101782637A (en) * | 2010-03-16 | 2010-07-21 | 南京航空航天大学 | Radio frequency current probe characteristic calibrating method based on electromagnetic compatibility analysis and application |
CN102539936A (en) * | 2010-12-13 | 2012-07-04 | 富士康(昆山)电脑接插件有限公司 | Attenuation measuring method |
CN103278701A (en) * | 2013-04-24 | 2013-09-04 | 东南大学 | Device for measuring scattering parameters of gold bonding wire and use method thereof |
CN106771849A (en) * | 2016-11-15 | 2017-05-31 | 中国电子科技集团公司第四十研究所 | Two method of testings of impedance discontinuity point reflection response on a kind of transmission line |
-
2006
- 2006-11-23 WO PCT/EP2006/068838 patent/WO2007071519A1/en active Application Filing
- 2006-11-23 EP EP06819717A patent/EP1963872A1/en not_active Withdrawn
- 2006-11-23 CN CNA2006800482173A patent/CN101341413A/en active Pending
- 2006-11-23 JP JP2008546327A patent/JP2009520960A/en active Pending
- 2006-11-23 KR KR1020087015496A patent/KR20080087101A/en not_active Application Discontinuation
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101782637A (en) * | 2010-03-16 | 2010-07-21 | 南京航空航天大学 | Radio frequency current probe characteristic calibrating method based on electromagnetic compatibility analysis and application |
CN101782637B (en) * | 2010-03-16 | 2013-04-03 | 南京航空航天大学 | Radio frequency current probe characteristic calibrating method based on electromagnetic compatibility analysis and application |
CN102539936A (en) * | 2010-12-13 | 2012-07-04 | 富士康(昆山)电脑接插件有限公司 | Attenuation measuring method |
CN102539936B (en) * | 2010-12-13 | 2015-12-02 | 富士康(昆山)电脑接插件有限公司 | Measure the method for decay |
CN103278701A (en) * | 2013-04-24 | 2013-09-04 | 东南大学 | Device for measuring scattering parameters of gold bonding wire and use method thereof |
CN103278701B (en) * | 2013-04-24 | 2015-06-17 | 东南大学 | Device for measuring scattering parameters of gold bonding wire and use method thereof |
CN106771849A (en) * | 2016-11-15 | 2017-05-31 | 中国电子科技集团公司第四十研究所 | Two method of testings of impedance discontinuity point reflection response on a kind of transmission line |
CN106771849B (en) * | 2016-11-15 | 2019-07-26 | 中国电子科技集团公司第四十一研究所 | The test method of two impedance discontinuity point reflections response on a kind of transmission line |
Also Published As
Publication number | Publication date |
---|---|
JP2009520960A (en) | 2009-05-28 |
WO2007071519A1 (en) | 2007-06-28 |
KR20080087101A (en) | 2008-09-30 |
EP1963872A1 (en) | 2008-09-03 |
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