CN101335521A - Charge pump for phase lock loop - Google Patents
Charge pump for phase lock loop Download PDFInfo
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- CN101335521A CN101335521A CNA2007101181466A CN200710118146A CN101335521A CN 101335521 A CN101335521 A CN 101335521A CN A2007101181466 A CNA2007101181466 A CN A2007101181466A CN 200710118146 A CN200710118146 A CN 200710118146A CN 101335521 A CN101335521 A CN 101335521A
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Abstract
The invention provides a charge pump used in a phase lock loop. By introducing a constant bias current source, the traditional working pattern that a phase-frequency detector controls the deduction of two current sources is changed to the working pattern that the phase-frequency detector controls the addition of the two current sources; and the function of electrifying and de-electrifying of the current sources of the charge pump is realized by using a same device and the two current sources are kept in the same working state; thus greatly improving the matching situation of the electrifying current and de-electrifying current and further improving the linearity of the charge pump.
Description
Technical field
The present invention relates to communication equipment field, especially relate to the charge pump that is used for phase-locked loop (PLL).
Background technology
Phase-locked loop is used widely in communication transceiver.In the high speed wire communication, phase-locked loop is used for clock recovery and clock generating.In radio communication, phase-locked loop is used to produce local oscillations and modulation, demodulation.
Shown in Figure 1 is the block diagram of a typical phase locked loop.This phase-locked loop is made up of phase discriminator, charge pump, loop filter, frequency divider and voltage controlled oscillator (VCO).Whole loop has constituted negative feedback structure, differs if the signal behind input signal and the voltage controlled oscillator frequency division exists, and then phase discriminator will differ and carry out integration, be converted into electric current by charge pump, changes the size of VCTRL, and regulating frequency is exported to reach balance.Like this, during loop-locking, voltage controlled oscillator is accurately exported the signal of N times of incoming frequency.
In traditional integral frequency divisioil phase-locked loop design, the reference frequency of phase-locked loop can not be greater than the interval of wireless channel.Because the interval of wireless channel is usually narrower, is 200K such as GSM, PHS is 300K, and this makes lower with reference to phase-locked loop frequency.Because stability, PLL loop bandwidth is less than 1/10 of reference frequency usually, and this has just limited the bandwidth of phase-locked loop, and when directly causing channel to switch, the stabilization time that phase-locked loop needs is very long.Because the interior phase noise of band directly is proportional to the ratio of phase-lock-ring output frequency and reference frequency, this makes that also integer phase-locked loop in-band noise is relatively poor in addition.
In order to overcome the problems referred to above of integer phase-locked loop, the fractional phase locked loop technology occurred and be widely used.The fractional phase locked loop that particularly adopts Sigma-Delta modulation is owing to generally being adopted easily in spuious little, the realization.The reference frequency of fractional phase locked loop no longer must be less than or equal to channel width, thereby can use high reference frequency, has improved loop bandwidth and the ratio that has reduced phase-lock-ring output frequency and reference frequency.
But fractional phase locked loop is very high to the linearity requirement of cycle of phase-locked loop, and particularly phase frequency detector and charge pump are in a two-stage of cycle of phase-locked loop, and their linearity is very big to the performance impact of whole phase-locked loop.Traditional charge pump is in phase-locked loop, and phase frequency detector and charge pump are the instantaneous electric charge that is transformed into and differs linear ratio that differs in the phase-locked loop operation process.The linearity of this transfer process just is decided by the linearity of phase frequency detector and charge pump.Wherein phase frequency detector is transformed into the pulse duration that corresponding phase place is leading or lag behind differing.Charge pump is transformed into corresponding electric current width to the pulse duration of phase frequency detector input.Low pass filter subsequently produces the control voltage of oscillator to the input current integration.Such as in the fractional phase locked loop of the sigma-delta modulation of extensively adopting, the nonlinearity of phase frequency detector and charge pump can pass through non-linear frequency mixing to the high frequency quantizing noise of sigma-delta modulator, and fold in the passband of low pass filter subsequently, make low pass filter to suppress to it.This just directly causes the output phase noise of VCO and spurious performance to worsen.
Phase frequency detector is owing to be logical circuit, its non-linear dead band that is mainly derived from phase frequency detector.By introducing the suitable time-delay that resets, can eliminate the dead band of phase frequency detector.
And the non-linear of charge pump mainly caused by NMOS current source that wherein is applied to down branch road and the mismatch problems that is applied to the PMOS current source of branch road.
As shown in Figure 2, at traditional charge pump that is used for phase-locked loop, the current source of last branch road is to flow to subsequently low pass filter from power supply, can only adopt the PMOS current source; And the branch current source is to flow to ground from low pass filter down, can only adopt the NMOS current source to realize.Because NMOS and PMOS itself are exactly various types of devices, even in present state-of-the-art manufacturing process, also can't guarantee their coupling.Simultaneously owing to phase-locked loop control voltage need change in the scope of a broad, because the influence of the output resistance that current source is limited, the change of phase-locked loop control voltage is opposite to the influence of NMOS current source and PMOS current source, just be subjected to phase-locked loop control voltage influence and when becoming big, the PMOS current source will diminish when the NMOS current source under same phase-locked loop control voltage condition.This has just further worsened the mismatch of branch road up and down.
When current source mismatch up and down, might as well can suppose Iup=Idown+ δ I, wherein Iup is a last branch current source size of current, and Idown is branch current source size of current down, and δ I is the current mismatch size.
And the non-linear performance that will worsen fractional phase locked loop of charge pump.Reason is, supposes that working as the leading reference clock phase place of phase-locked loop phase place is θ, and time corresponding is θ/(2 π).At this moment charge pump Idown ON time is θ/(2 π), is θ/(2 π) * Idown thereby take electric charge away from low pass filter; If phase-locked loop phase lag reference clock phase place is θ, at this moment charge pump Iup ON time is θ/(2 π), thereby is (Idown+ δ I) * θ/(2 π) to the low pass filter iunjected charge; When noticing phase-locked loop phase place lead and lag, same differs, but is input to the electric charge of low pass filter and inequality.And the core concept of fractional phase locked loop is exactly by several integer frequency ratios, occurs with different probability, the frequency dividing ratio that to obtain a mean value be decimal.Because charge pump is non-linear, the result who in fact obtains not is the linear averaging of several integer frequency ratios, but linear averaging adds the nonlinear terms that caused by non-linear.
Problem for the current mismatch up and down of improving the conventional charge pump, two kinds of methods are arranged at present: method 1: by current source branch up and down and feedback control loop of a mirror image, a current source size-controlled in feedback control loop in the branch road up and down makes the wherein variation of an other electric current of current tracking.Thereby improve mismatch problems.Be illustrated in figure 3 as its exemplary operation principle, wherein,, also introduced a dummy argument branch road in order to alleviate the electric charge sharing problem.There are several problems in this circuit, and one is that feedback control loop can only limit the charge pump output voltage scope in less charge pump output voltage scope work.Another problem is the feedback control loop limited bandwidth, and when fluctuation took place charge pump output voltage, when being injected into loop filter if any electric current, feedback control loop needed certain stabilization time.In addition, because current source is controlled by operational amplifier, make the output noise of charge pump far exceed simple charge pump.Method 2: as shown in Figure 4,, a branch road is adjusted to the another one branch road mated by a branch current being used the mode of inching.This method also has problems: because charge pump output voltage is uncertain, change with operating frequency and technology, variations in temperature, be difficult to by fine setting stable matching on the another one branch road of branch current.
Summary of the invention
The problem of branch current source mismatch about the objective of the invention is to solve in the charge pump, and a kind of high linearity charge pump that is used for phase-locked loop is provided.
In traditional charge pump circuit, suppose that ideally, electric current mates fully up and down.The Iup ON time is tup, and the Idown ON time is tdn.
The charge Q cp of charge pump output is in a reference cycle
Qcp=Iup*tup-Idown*tdn; (equation 1)
Technical thought of the present invention is: introduce a constant bias current sources, thereby the working method that traditional two current sources by phase frequency detector control subtract each other is become the working method of two current source additions being controlled by phase frequency detector.
Technical scheme of the present invention is as follows:
A kind of charge pump that is used for phase-locked loop, the preceding termination phase frequency detector of described charge pump, the back termination low pass filter of described charge pump; It is characterized in that described charge pump comprises two branch current sources; Last branch road control signal UP and following branch road control signal DOWN from described phase frequency detector control described two branch current sources respectively; In the circuit in the branch current source of the described DOWN of being subjected to signal controlling, also add a constant bias current sources is arranged, thereby make the current source of the described DOWN of being subjected to signal controlling become a last branch current source and a described constant bias current sources sum that is subjected to the control of DOWN inversion signal, wherein, described constant bias current sources satisfies following equation:
T*Idown=Ibais*X (equation 2)
Wherein, T is the reference cycle of described phase-locked loop, and Idown is the following branch current of described charge pump, and Ibias is the electric current of described constant bias current sources, and X is the ON time of described constant bias current sources in T.
With equation 2 substitution equatioies 1, can obtain:
Qcp＝Iup*tup-Idown*tdn+Idown*T-Ibias*X
=Iup*tup+Idown* (T-tdn)-T*Idown (equation 3)
Like this, we will become plus sige (Iup*tup+Idown* (T-tdn)) in the equation 2 by two current source Iup of tup and tdown control and the minus sign (Iup*tup-Idown*tdn) between the Idown in the equation 1.And two electric current summations can be connected in parallel by the current source of two same types, realize very convenient.Simultaneously, the current source that is connected in parallel is under the identical operating bias, and at this moment the limited output resistance problem of current source is identical to the influence of two current sources, thereby has alleviated mismatch problems.
In like manner, technical scheme of the present invention can also be:
A kind of charge pump that is used for phase-locked loop, the preceding termination phase frequency detector of described charge pump, the back termination low pass filter of described charge pump; It is characterized in that described charge pump comprises two branch current sources; Last branch road control signal UP and following branch road control signal DOWN from described phase frequency detector control described two branch current sources respectively; In the circuit in the branch current source of the described UP of being subjected to signal controlling, also add a constant bias current sources is arranged, thereby make the current source of the described UP of being subjected to signal controlling become a following branch current source and a described constant bias current sources sum that is subjected to the control of UP inversion signal, wherein, described constant bias current sources satisfies following equation:
T*Iup＝Ibais*X
Wherein, T is the reference cycle of described phase-locked loop, and Iup is the last branch current of described charge pump, and Ibias is the electric current of described constant bias current sources, and X is the ON time of described constant bias current sources in T.
Wherein, described charge pump can adopt one or more technologies that are selected from the following technology group to realize that described technology group comprises complementary metal oxide semiconductors (CMOS) (CMOS) technology, bipolar semiconductor (Bipolar) technology, bipolar and complementary metal oxide semiconductors (CMOS) (BiCMOS) technology, germanium silicon (GeSi) technology and silicon-on-insulator (SOI) technology.
Because the device of same kind is adopted in the source of branch current up and down of charge pump of the present invention, and the branch current source is along with the change of phase-locked loop control voltage up and down, always work under the identical operating state, thereby keep the coupling in branch current source up and down, realized high linearity.
Description of drawings
Fig. 1 is a typical phase-locked loop circuit block diagram in the prior art;
Fig. 2 is the schematic block circuit diagram of traditional charge pump that is used for phase-locked loop;
Fig. 3 is a kind of schematic block circuit diagram of improving the current mismatch up and down of conventional charge pump;
Fig. 4 is an another kind of schematic block circuit diagram of improving the current mismatch up and down of conventional charge pump;
Fig. 5 is the schematic block circuit diagram of an embodiment of the charge pump that is used for phase-locked loop of the present invention;
Fig. 6 is the physical circuit figure of another embodiment of the charge pump of the present invention of employing CMOS technology;
Fig. 7 is the physical circuit figure of another embodiment of the charge pump of the present invention of employing BiCMOS technology.
Embodiment
As shown in Figure 5, in one embodiment of the invention, the preceding termination phase frequency detector PFD of charge pump of the present invention, the back termination low pass filter LPF of described charge pump.Described charge pump comprises two identical branch current source Icp, and last branch road control signal UP and following branch road control signal DOWN from phase frequency detector PFD control described two branch current sources respectively.In the circuit in following branch current source, add the constant bias current sources is arranged, make the branch current source of the described DOWN of being subjected to signal controlling become a last branch current source and a described constant bias current sources sum that is subjected to the control of DOWN inversion signal, wherein, described constant bias current sources satisfies following equation:
T*Idown=Ibais*X (equation 2)
Wherein, T is the reference cycle of described phase-locked loop, and Idown is the following branch current of described charge pump, and Ibias is the electric current of described constant bias current sources, and X is the ON time of described constant bias current sources in T.
In a reference cycle, the charge Q cp of charge pump output is:
Qcp=Iup*tup+Idown* (T-tdn)-T*Idown (equation 3)
Select T to equal the reference cycle of described phase-locked loop, then in fact Xia Mian current source Idown*T is exactly a current source of normal conducting; And T-tdn is exactly the inversion signal of the Down signal of phase frequency detector output, and this is very easy in realization.
In concrete implementation procedure, if T*Idown and ibais*X mismatch, both may be unequal.But notice that T, Idown, ibais and X are the design constants, all irrelevant with tup, tdown.We might as well suppose in each reference cycle: T*Idown=ibais*X+ ε
Behind pll lock, phase-locked loop can produce the influence that a static phase is offset ε.The linear relationship that flow into this moment between the difference of net charge in the loop filter and tup and tdown is still set up.The linearity of charge pump is unaffected.
As shown in Figure 6, in another embodiment of charge pump of the present invention, adopted CMOS technology.External bias current Icp flows into the drain electrode of M1, and this electric current copies to M2 and M3 by the mode of mirror image.Because the imperfection of duplicating, the drain current of M3 may have deviation with Icp, and the drain current of we mark M3 is Ibias; Simultaneously, the drain current of M2 copies to the drain electrode of M4, M5 and M6 by the mirror image conversion of NMOS to PMOS.Voltage between the drain-gate of M4 may be different with the drain-gate voltage of M5, M6, may cause the electric current of M5 and M6 unequal.The leakage current of we mark M5 is Iup.When M5, M6 work (M8, M9 conducting), because grid, source and the drain voltage of grid, source and the leakage of M6 and M5 are identical, the lining ground of M5 and M6 all connects power supply (not drawing on the figure), so the electric current of M5, M6 can mate (not considering geometric error) fully.The leakage current of we mark M6 also is Iup.
In this enforcement, we get the reference cycle T that ON time X equals phase-locked loop, and promptly constant bias source Ibias equals Iup in design.So in this enforcement, all current mirrors all are 1: 1 current mirrors.On principle, Icp=Iup=Ibias, but because the imperfection that circuit is realized, may there be tiny deviation in Icp, Ibias and Iup, and these deviations do not influence the linearity of charge pump.The linearity of charge pump is by the matching degree decision of two current sources (M5 and M6) of UP and DOWN control, and the present invention adopts with a kind of device by two current sources with UP and DOWN control just, make their grid, source, leakage all the same, thereby guaranteed their matched well with lining ground.
M7, M8 and M9 are the PMOS switch, when control signal conducting when low, turn-off when control signal is high.So inverter inv1 acts on M8 after with the UP signal inversion, as UP when being high, the last branch road conducting that M5 and M8 form.And the DOWN signal is realized the function of T-Tdown by first inverter inv3 negate.By second inverter, act on the PMOS switch then.M7 is the PMOS switch of a normal open, purpose be make M4 as far as possible with M5, M6 Current-source matching.
In the present embodiment, the grid of two current sources is connected in same node, source electrode is connected in same node and drain electrode is connected in same node, thereby has guaranteed that fundamentally two current source working points are identical.Make their coupling not influenced by the control change in voltage of oscillator, also be not subjected to the influence of external disturbance.
As shown in Figure 7, in another embodiment of charge pump of the present invention, adopted BiCMOS technology.Mb1 and Rbias produce an initial bias electric current, and this bias current copies on Mb2 and the Mb3 according to a certain percentage by the mode of PNP tube current mirror image.Mb3 is exactly the fixed bias current that the present invention introduces.And Mb6 changes into the NPN current mirror with the electric current of Mb2, and the mode by current mirror copies on Mb4 and the Mb5 according to a certain percentage.Mc1/Mc2 and Mc3/Mc4 constitute the MOS complementary switch in 2 pairs of Control current sources respectively.By inverter 1, when UP signal when being high, the switch that Mc1/Mc2 constitutes by, when the UP signal when low, the switch conduction that Mc1/Mc2 constitutes is so by introducing inverter 1, in fact current source Mb5 is controlled by the inversion signal of UP.The switch that inverter 2 and Mc3/Mc4 constitute, in the conducting when being high of DOWN signal, when low by, so the Mb4 current source is controlled by the DOWN signal.The ON time of the switch control Mb3 that forms by Mc5/Mc6 and inverter, ON time is T/2 here, T is the cycle of the reference clock of phase-locked loop.When reference clock when being high, the switch conduction that Mc5/Mc6 forms.So here, the ON time X in equation 2 is T/2, in order to guarantee X*Ibias=T*Idown, needs here by suitable current mirror ratio, allows the electric current that flows through Mb3 be 2 times of electric current that flow through Mb4 and Mb5.As preceding surface analysis, the electric current of Mb3 may be because mismatch, can not equal the twice of the electric current of Mb4 and Mb5 accurately, but the electric current of Mb3 is not subjected to the control of UP and DOWN signal, and be subjected to the current source Mb4 of UP and DOWN signal controlling and Mb5 when conducting, and their working point is identical, and type of device is identical, thereby the current source that has guaranteed UP and DOWN signal controlling from principle mates, thereby has improved the linearity of charge pump.
Claims (6)
1. charge pump that is used for phase-locked loop, the preceding termination phase frequency detector of described charge pump, the back termination low pass filter of described charge pump; It is characterized in that described charge pump comprises two branch current sources; Last branch road control signal UP and following branch road control signal DOWN from described phase frequency detector control described two branch current sources respectively; In the circuit in the branch current source of the described DOWN of being subjected to signal controlling, also add a constant bias current sources is arranged, thereby make the current source of the described DOWN of being subjected to signal controlling become a last branch current source and a described constant bias current sources sum that is subjected to the control of DOWN inversion signal, wherein, described constant bias current sources satisfies following equation:
T*Idown＝Ibais*X
Wherein, T is the reference cycle of described phase-locked loop, and Idown is the following branch current of described charge pump, and Ibias is the electric current of described constant bias current sources, and X is the ON time of described constant bias current sources in T.
2. charge pump that is used for phase-locked loop, the preceding termination phase frequency detector of described charge pump, the back termination low pass filter of described charge pump; It is characterized in that described charge pump comprises two branch current sources; Last branch road control signal UP and following branch road control signal DOWN from described phase frequency detector control described two branch current sources respectively; In the circuit in the branch current source of the described UP of being subjected to signal controlling, also add a constant bias current sources is arranged, thereby make the current source of the described UP of being subjected to signal controlling become a following branch current source and a described constant bias current sources sum that is subjected to the control of UP inversion signal, wherein, described constant bias current sources satisfies following equation:
T*Iup＝Ibais*X
Wherein, T is the reference cycle of described phase-locked loop, and Iup is the last branch current of described charge pump, and Ibias is the electric current of described constant bias current sources, and X is the ON time of described constant bias current sources in T.
3. the charge pump that is used for phase-locked loop as claimed in claim 1 or 2 is characterized in that, two current sources of described UP of being subjected to and DOWN signal controlling are same type of current source devices.
4. the charge pump that is used for phase-locked loop as claimed in claim 3 is characterized in that, described two current sources all adopt the complementary metal oxide semiconductors (CMOS) cmos device.
5. the charge pump that is used for phase-locked loop as claimed in claim 3 is characterized in that, described two current sources all adopt bipolar and complementary metal oxide semiconductors (CMOS) BiCMOS device.
6. the charge pump that is used for phase-locked loop as claimed in claim 1 or 2, it is characterized in that, described charge pump can adopt one or more technologies that are selected from the following technology group to realize that described technology group comprises complementary metal oxide semiconductors (CMOS) CMOS technology, bipolar semiconductor Bipolar technology, bipolar and complementary metal oxide semiconductors (CMOS) BiCMOS technology, germanium silicon GeSi technology and silicon-on-insulator SOI technology.
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| CN2007101181466A CN101335521B (en) | 2007-06-29 | 2007-06-29 | Charge pump for phase lock loop |
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| CN2007101181466A CN101335521B (en) | 2007-06-29 | 2007-06-29 | Charge pump for phase lock loop |
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| CN102255504A (en) * | 2011-07-04 | 2011-11-23 | 成都芯源系统有限公司 | Switch control circuit and method thereof |
| CN102347760A (en) * | 2010-07-27 | 2012-02-08 | 中兴通讯股份有限公司 | Charge pump and phase locked loop using charge pump |
| CN103166632A (en) * | 2011-12-09 | 2013-06-19 | 国民技术股份有限公司 | Loop filter and phase-locked loop circuit |
| CN103166455A (en) * | 2011-12-14 | 2013-06-19 | 国民技术股份有限公司 | Charge pump and phase-locked loop circuit |
| CN104143978A (en) * | 2013-05-08 | 2014-11-12 | 博通集成电路（上海）有限公司 | Charge pump, phase-locked loop circuit and method of charge pump |
| CN104506186A (en) * | 2014-12-12 | 2015-04-08 | 苏州文芯微电子科技有限公司 | High-speed phase-locked loop charge pump circuit |
| CN106961273A (en) * | 2017-04-12 | 2017-07-18 | 西安电子科技大学 | Charge pump circuit based on stable state proof and electric leakage-proof safety and the heavy control technology of electric current |
| CN107210748A (en) * | 2015-02-10 | 2017-09-26 | 高通股份有限公司 | Automatic biasing charge pump |
| CN105577171B (en) * | 2014-10-14 | 2018-10-19 | 中芯国际集成电路制造(上海)有限公司 | A kind of circuit structure for phaselocked loop |
| CN110266186A (en) * | 2019-06-14 | 2019-09-20 | 思力科（深圳）电子科技有限公司 | Low-leakage current charge pump circuit |
| CN110858750A (en) * | 2018-08-24 | 2020-03-03 | 联发科技股份有限公司 | Charge pump circuit and related method |
| WO2022041277A1 (en) * | 2020-08-31 | 2022-03-03 | 华为技术有限公司 | Phase-locked loop and radio frequency transceiver |
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- 2007-06-29 CN CN2007101181466A patent/CN101335521B/en not_active Expired - Fee Related
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| CN102347760A (en) * | 2010-07-27 | 2012-02-08 | 中兴通讯股份有限公司 | Charge pump and phase locked loop using charge pump |
| CN102347760B (en) * | 2010-07-27 | 2014-03-12 | 中兴通讯股份有限公司南京分公司 | Charge pump and phase locked loop using charge pump |
| CN102255504A (en) * | 2011-07-04 | 2011-11-23 | 成都芯源系统有限公司 | Switch control circuit and method thereof |
| CN102255504B (en) * | 2011-07-04 | 2013-09-18 | 成都芯源系统有限公司 | Switch control circuit and method thereof |
| CN103166632A (en) * | 2011-12-09 | 2013-06-19 | 国民技术股份有限公司 | Loop filter and phase-locked loop circuit |
| CN103166632B (en) * | 2011-12-09 | 2017-04-12 | 国民技术股份有限公司 | Loop filter and phase-locked loop circuit |
| CN103166455A (en) * | 2011-12-14 | 2013-06-19 | 国民技术股份有限公司 | Charge pump and phase-locked loop circuit |
| CN104143978B (en) * | 2013-05-08 | 2017-04-05 | 博通集成电路（上海）有限公司 | Method in charge pump, phase-locked loop circuit and the charge pump |
| CN104143978A (en) * | 2013-05-08 | 2014-11-12 | 博通集成电路（上海）有限公司 | Charge pump, phase-locked loop circuit and method of charge pump |
| CN105577171B (en) * | 2014-10-14 | 2018-10-19 | 中芯国际集成电路制造(上海)有限公司 | A kind of circuit structure for phaselocked loop |
| CN104506186A (en) * | 2014-12-12 | 2015-04-08 | 苏州文芯微电子科技有限公司 | High-speed phase-locked loop charge pump circuit |
| CN107210748A (en) * | 2015-02-10 | 2017-09-26 | 高通股份有限公司 | Automatic biasing charge pump |
| CN106961273A (en) * | 2017-04-12 | 2017-07-18 | 西安电子科技大学 | Charge pump circuit based on stable state proof and electric leakage-proof safety and the heavy control technology of electric current |
| CN106961273B (en) * | 2017-04-12 | 2020-05-26 | 西安电子科技大学 | Charge pump circuit based on stable anti-creeping protection and current sink control technology |
| CN110858750A (en) * | 2018-08-24 | 2020-03-03 | 联发科技股份有限公司 | Charge pump circuit and related method |
| US10879798B2 (en) | 2018-08-24 | 2020-12-29 | Mediatek Inc. | Charge pump circuit with capacitor swapping technique and associated method |
| CN110266186A (en) * | 2019-06-14 | 2019-09-20 | 思力科（深圳）电子科技有限公司 | Low-leakage current charge pump circuit |
| WO2022041277A1 (en) * | 2020-08-31 | 2022-03-03 | 华为技术有限公司 | Phase-locked loop and radio frequency transceiver |
| US11581807B2 (en) | 2020-09-10 | 2023-02-14 | Realtek Semiconductor Corporation | Charge pump device |
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