CN101307488A - Polycrystalline silicon thin film preparation method - Google Patents
Polycrystalline silicon thin film preparation method Download PDFInfo
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- CN101307488A CN101307488A CNA2007100406443A CN200710040644A CN101307488A CN 101307488 A CN101307488 A CN 101307488A CN A2007100406443 A CNA2007100406443 A CN A2007100406443A CN 200710040644 A CN200710040644 A CN 200710040644A CN 101307488 A CN101307488 A CN 101307488A
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Abstract
The invention discloses a preparation method for a polycrystalline silicon film, which relates to a manufacturing technology in the semiconductor field. The preparation method comprises the following steps that: steps for depositing the polycrystalline silicon film are divided into at least two steps, and a treatment step of assistant gas is performed between each two steps to inhibit the growth of crystal grains. The assistant gas can be nitrogen or hydrogen or helium gas. Compared with the prior art, the crystal grains of the polycrystalline silicon film produced by the preparation method are smaller, which can effectively reduce the penetration of implanted ions to a semi-conductor substrate during the subsequent ion implantation process to the polycrystalline silicon film, and effectively improve the accuracy of characteristic dimension during the subsequent process of etching the polycrystalline silicon film, thereby reducing the attenuation of the performance of a semiconductor device.
Description
Technical field
The present invention relates to the manufacturing technology of semiconductor applications, specifically, relate on a kind of semiconducter device preparation method as the polysilicon membrane of grid.
Background technology
Semiconducter device generally comprises the semiconductor silicon substrate, be positioned at the gate oxide (being generally silicon-dioxide, also may be silicon nitride etc.) above the substrate and be deposited on polysilicon membrane above the gate oxide, and wherein polysilicon membrane is the grid of semiconducter device.Along with development of semiconductor, the travelling speed of semiconducter device is more and more faster, the integrated level of chip circuit is more and more higher, also more and more lower to current consumption, thereby make semiconducter device polysilicon gate characteristic size (critical dimension, CD), the thickness of gate oxide or the like parameter diminishes gradually, like this at polysilicon membrane near the gate oxide place, be easier to form vague and general layer, influence the on state characteristic of semiconducter device.In addition, the thickness of vague and general layer also is subjected to ion implantation concentration, the degree of depth and the influence of polysilicon membrane heat treating method of polysilicon membrane.At present industry often reduces the thickness of vague and general layer by the ion implantation concentration that improves polysilicon membrane, with the performance that the reduces semiconducter device attenuation degree at vague and general layer.
For 65 nanometers or more high-precision technology generation, pre-doping techniques (carrying out ion doping before to the polysilicon membrane etching) is widely used in the polysilicon membrane of semiconducter device.In order to reduce the thickness of polysilicon membrane near the vague and general layer in gate oxide place, guaranteeing to increase the ionic concn of polysilicon membrane under the situation that other parameters meet as far as possible, the ion implantation dosage of general polysilicon membrane can reach 2~5E15/ square centimeter.Be the non-impurity-doped deposition at present as the more employing of polysilicon membrane of grid.Because the structure of non-impurity-doped polysilicon membrane is typical columnar grain, in ion implantation process, because ion implantation concentration is generally higher, the ion that injects is easy to infiltrate semiconducter substrate by polysilicon membrane crystal boundary edge, cause the variation of semiconducter substrate channel ion dosage, thereby cause the decay of performance of semiconductor device, reduce yield rate.
For the ion of avoiding injecting polysilicon membrane infiltrates semiconducter substrate, can improve the ion implantation method of polysilicon membrane, condition, also can control, as consistence, the size of crystal grain and shape of crystal grain of control polysilicon membrane thickness or the like polysilicon membrane itself.The invention provides the preparation method of new polysilicon membrane, it stops ion to infiltrate semiconducter substrate by the method that reduces the polysilicon membrane grain size.
(Chemical Vapor Deposition process CVDP) is the method for preparing polysilicon membrane that generally adopts in chemical vapour deposition.Prior preparation method is as follows: at first in the reaction chamber with silane gas (SiH4 or Si2H6) input deposition apparatus, under the certain temperature condition, silane gas decomposes generation active particle Si, H, SiH2 and SiH3 or the like; Described active particle is in the absorption and the diffusion of semiconductor substrate surface; The bioactive molecule that on semiconducter substrate, the is adsorbed generation polysilicon membrane that reacts in its surface, and emit H2.
Summary of the invention
The technical problem that the present invention solves is to provide a kind of preparation method who reduces the polysilicon membrane of semiconducter device decay.
For solving the problems of the technologies described above, the invention provides a kind of preparation method of polysilicon membrane, this method comprises that the step with deposited polycrystalline silicon thin film was divided into at least two steps and carries out, and carries out the assist gas treatment step to suppress increasing of crystal grain between per two steps.
Further, described assist gas is a kind of gas in nitrogen, hydrogen, the helium or two or more mixed gass.
Further, the time of at every turn carrying out the assist gas treatment step is 5-10 second.
Compared with prior art, adopt the crystal grain of the polysilicon membrane that preparation method of the present invention obtains less, follow-up to the polysilicon membrane ion implantation process in, can effectively reduce the infiltration of injecting the ion pair semiconducter substrate, simultaneously in the process of subsequent etch polysilicon membrane, also can improve the control accuracy of characteristic dimension, thereby reduce the decay of performance of semiconductor device, reach the beneficial effect that improves semiconductor device yield.
Description of drawings
To the description of one embodiment of the invention, can further understand purpose, specific structural features and the advantage of its invention by following in conjunction with its accompanying drawing.Wherein, accompanying drawing is:
Fig. 1 is for adopting preparation method's of the present invention schematic flow sheet.
Embodiment
Below in conjunction with Fig. 1 the preparation method of polysilicon membrane disclosed by the invention is described in further detail.
The preparation method of polysilicon membrane of the present invention comprises the steps: to provide the deposition apparatus that carries out deposition reaction, this deposition apparatus can be the device that single-wafer is carried out chemical vapour deposition, also can be that the logarithm wafer is carried out sedimentary high temperature furnace pipe simultaneously, this deposition apparatus is provided with reaction chamber that carries out deposition reaction and several breather lines that communicate with reaction chamber, it is silane gas (SiH4 or Si2H6) that some pipeline is used for the transport of reactant gases body, some is used to carry assist gas such as nitrogen, hydrogen or helium or the like; The step of deposited polycrystalline silicon thin film was divided into at least two steps carries out, the about 600-650 degree of temperature condition, and go on foot between the deposition steps per two and to carry out the assist gas treatment step.
If carrying out the time of deposited polycrystalline silicon thin film step is 60 seconds, divided for 4 steps carried out deposition step according to preparation method of the present invention, in the present embodiment, four evenly distribute times in step, promptly each step carried out 15 seconds.Deposition step begins, open the breather line that the transport of reactant gases body is a silane gas (hereinafter to be referred as " pipeline M "), silane gas imported carry out the 1st step deposition step 15 seconds in the reaction chamber, close pipeline M, open the breather line (hereinafter to be referred as " pipeline N ") of carrying assist gas simultaneously, input nitrogen, hydrogen, helium or other have the gas of similar gas characteristic or the mixed gas of two or more above-mentioned gas carries out the gas processing step, about 5-10 second, close pipeline N then, opening conduits M, carried out the 2nd step deposition step 15 seconds, carry out the gas processing step then, until carrying out the 4th step deposition step, the polysilicon membrane of deposition preset thickness.In addition, need to prove, the time of deposition step distributes and can be provided with as required, a few step deposition steps can evenly distribute, also can unequally distribute, as long as carry out the assist gas treatment step between per two deposition steps, just can significantly reduce the brilliant key of crystal grain, play effective inhibition crystal grain in the horizontal direction with the effect of the growth of vertical direction.
Table 1 is that same wafer adopts existing 1 step deposition step preparation method, and adopts the preparation method of 4 steps of the present invention and 5 step deposition steps and assist gas treatment step to obtain the crystal grain diameter comparison sheet.Wherein the unit of length and diameter is a nanometer.As can be known, adopt preparation method of the present invention from table one, the average grain diameter of the polysilicon membrane of acquisition is respectively 44.42 nanometers and 46.77 nanometers, and all mean diameter 52.66 nanometers than the crystal grain that adopts existing method acquisition polysilicon membrane are little.
Table one
The present invention is by carrying out the deposition step branch multistep of deposited polycrystalline silicon thin film, and carries out the assist gas treatment step between per two steps, suppressed the growth of the crystal grain in the polysilicon membrane forming process greatly.The polysilicon membrane that adopts preparation method of the present invention to obtain not only has typical preferably columnar crystal structure, and crystal grain is less, follow-up polysilicon membrane is carried out in the ion implantation process like this, inject the crystal boundary edge that ion is not easy to pass crystal grain, reduce even avoided injecting the infiltration of ion pair semiconducter substrate, reduce the decay of performance of semiconductor device effectively, improved the yield rate of product.
In addition, because semiconducter device develops towards precise treatment, the thickness of polysilicon membrane also can be more and more thinner, if adopt the preparation method of existing polysilicon membrane, crystal grain is bigger, and in the etching process, the precision of characteristic dimension just is not easy control.If adopt preparation method of the present invention, the crystal grain of polysilicon membrane is less, can improve the precision of characteristic size in the etching process greatly.
Claims (6)
1. the preparation method of a polysilicon membrane is characterized in that, this method was divided into at least two steps with the step of deposited polycrystalline silicon thin film carries out, and carries out the assist gas treatment step to suppress increasing of crystal grain between per two steps.
2. the preparation method of polysilicon membrane as claimed in claim 1 is characterized in that: described assist gas is a kind of gas in nitrogen, hydrogen, the helium or two or more mixed gass.
3. the preparation method of polysilicon membrane as claimed in claim 1, it is characterized in that: the time of at every turn carrying out the assist gas treatment step is 5-10 second.
4. the preparation method of polysilicon membrane as claimed in claim 1 is characterized in that: described deposition step was divided into for four steps to carry out, and carries out the nitrogen treatment step between per two steps.
5. the preparation method of polysilicon membrane as claimed in claim 1 is characterized in that: described deposition step was divided into for five steps to carry out, and carries out the nitrogen treatment step between per two steps.
6. the preparation method of polysilicon membrane as claimed in claim 1 is characterized in that: the deposition apparatus of preparation polysilicon membrane comprises the breather line of carrying the reactant gases that carries out deposition step and the breather line that is used to carry assist gas.
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Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101859698B (en) * | 2009-04-09 | 2012-03-14 | 上海先进半导体制造股份有限公司 | Groove etching and polycrystalline silicon injection process |
CN102412130A (en) * | 2011-03-30 | 2012-04-11 | 上海华力微电子有限公司 | Method for improving carrier mobility of transistor by utilizing gate polycrystalline silicon |
CN104217940A (en) * | 2014-09-24 | 2014-12-17 | 上海华力微电子有限公司 | Preparation method of polycrystalline silicon film |
CN104849861A (en) * | 2015-06-01 | 2015-08-19 | 中国科学院光电技术研究所 | Method for preparing high-performance optical thin film |
CN105529249A (en) * | 2016-02-29 | 2016-04-27 | 上海华力微电子有限公司 | Polycrystal silicon preparation method |
CN111628047A (en) * | 2020-06-01 | 2020-09-04 | 江苏顺风光电科技有限公司 | Manufacturing method of N-type TOPCon solar cell |
CN111834207A (en) * | 2019-04-22 | 2020-10-27 | 上海新微技术研发中心有限公司 | Method for depositing polycrystalline silicon film |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6670263B2 (en) * | 2001-03-10 | 2003-12-30 | International Business Machines Corporation | Method of reducing polysilicon depletion in a polysilicon gate electrode by depositing polysilicon of varying grain size |
CN100349283C (en) * | 2002-07-03 | 2007-11-14 | 旺宏电子股份有限公司 | Method for promoting performance of flash memory by using microcrystalline silicon film as floating gate |
KR100573482B1 (en) * | 2004-06-29 | 2006-04-24 | 에스티마이크로일렉트로닉스 엔.브이. | A method for forming a poly silicon layer in semiconductor device |
-
2007
- 2007-05-15 CN CN2007100406443A patent/CN101307488B/en not_active Expired - Fee Related
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101859698B (en) * | 2009-04-09 | 2012-03-14 | 上海先进半导体制造股份有限公司 | Groove etching and polycrystalline silicon injection process |
CN102412130A (en) * | 2011-03-30 | 2012-04-11 | 上海华力微电子有限公司 | Method for improving carrier mobility of transistor by utilizing gate polycrystalline silicon |
CN104217940A (en) * | 2014-09-24 | 2014-12-17 | 上海华力微电子有限公司 | Preparation method of polycrystalline silicon film |
CN104849861A (en) * | 2015-06-01 | 2015-08-19 | 中国科学院光电技术研究所 | Method for preparing high-performance optical thin film |
CN105529249A (en) * | 2016-02-29 | 2016-04-27 | 上海华力微电子有限公司 | Polycrystal silicon preparation method |
CN111834207A (en) * | 2019-04-22 | 2020-10-27 | 上海新微技术研发中心有限公司 | Method for depositing polycrystalline silicon film |
CN111628047A (en) * | 2020-06-01 | 2020-09-04 | 江苏顺风光电科技有限公司 | Manufacturing method of N-type TOPCon solar cell |
CN111628047B (en) * | 2020-06-01 | 2023-02-28 | 常州顺风太阳能科技有限公司 | Manufacturing method of N-type TOPCon solar cell |
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