CN101257329B - Controlling method and system in emitter - Google Patents

Controlling method and system in emitter Download PDF

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Publication number
CN101257329B
CN101257329B CN 200710197190 CN200710197190A CN101257329B CN 101257329 B CN101257329 B CN 101257329B CN 200710197190 CN200710197190 CN 200710197190 CN 200710197190 A CN200710197190 A CN 200710197190A CN 101257329 B CN101257329 B CN 101257329B
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power amplifier
voltage
antenna
signal
output
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CN101257329A (en
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阿里亚·贝扎特
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Avago Technologies General IP Singapore Pte Ltd
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Zyray Wireless Inc
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Abstract

Methods and systems for mitigating a voltage standing wave ratio in a transmitter are disclosed and may comprise calibrating an output power of a power amplifier integrated within a chip using a resistor that models an impedance of an antenna that is externally coupled to the amplifier while the antenna is decoupled. The gain and output power of the amplifier may be determined utilizing the known resistance and a voltage that is measured at an input of the power amplifier, or at a number of points prior to the power amplifier. When the antenna may be coupled to the transmitter, the transmitter output power may then be controlled utilizing the voltage measurements prior to the power amplifier to avoid measuring reflected waves in instances when the antenna impedance may vary. The power amplifier may be of a design that comprises reverse isolation to reduce reflected waves from the antenna.

Description

Control method in the reflector and control system
Technical field
The present invention relates to power amplifier, more particularly, relate to a kind of method and system for reducing the reflector voltage standing wave ratio.
Background technology
Power amplification circuit in the wireless system is the large-signal device normally.In WLAN (wireless local area network) (WLAN) system, for example, power amplifier (PA) circuit is to arrive the peak power emission output signal of 30dBm to the average power between the 20dBm, about 20 between 10dBm.In such wlan system, may use polytype modulation scheme, for example from binary phase shift keying (BPSK) to 512 grades of (level) quadrature amplitude modulation (512-QAM), thereby power output alters a great deal, so that the ratio of peak power and average power is also very large, for example 10dBm is to 15dBm.
The power stage of power amplifier can be subject to the impact of antenna impedance.Design the impedance phase coupling of suitable its output impedance of power amplifier and antenna.If because some reason changes antenna impedance, will cause signal to reflect at power amplifier antenna place, namely usually said voltage standing wave ratio (VSWR).When VSWR greater than 1 the time because gain control circuit is attempted the output voltage fluctuation that the compensatory reflex signal brings, the power output of amplifier can change.To adopt outside discrete directional coupler for a solution that reduces VSWR at present.
When power amplifier and other RF transmitter circuit (such as digital to analog converter (DAC), low pass filter (LPF), frequency mixer and RF programmable gain amplifier (RFPGA)) are integrated in the integrated circuit (IC), the suffered restriction of power amplifier circuit performance will further aggravate.Yet, owing to there is the urgent demand of integrated more function in single IC, the increase of thing followed semiconductor device quantity, to promote semiconductor fabrication towards the future development that reduces dimensions of semiconductor devices, these special semiconductor fabrications will bring more restriction to the performance of integrated power amplifier circuit.For example, utilize 65nmCMOS technique will limit the scope of input power (PA provides linear power output to amplify for it).In the wlan standard (such as IEEE 802.11) AM-AM of regulation and or the requirement of the AM-PM distortion factor will get rid of the output signal that the power amplifier that utilizes 65nm CMOS technique for example to produce is launched with high-output power.
Compare the follow-up system that will introduce by reference to the accompanying drawings of the present invention, other limitation of prior art and drawback are apparent for the person of ordinary skill of the art.
Summary of the invention
The present invention relates to be used to the method and system that reduces voltage standing wave ratio on transmitting power or the transmitting power control loop.
According to an aspect of the present invention, control method in a kind of reflector is provided, comprise and use resistance that the power output that is integrated in the power amplifier on the chip is calibrated, wherein said resistance is used for simulation is connected to the antenna of described power amplifier from the outside impedance.
As preferably, described method also comprises the power output of controlling described power amplifier based on the voltage that detects at described power amplifier input.
As preferably, described method also comprises the voltage that detects described power amplifier input.
As preferably, described method also comprises the voltage that detects the power amplifier driver output that links to each other with the input of described power amplifier.
As preferably, described method also comprises the power output of controlling described power amplifier before the input of described power amplifier based on the described voltage that detected.
As preferably, described method also is included in the transmission channel before the described power amplifier input one or more positions and detects one or more magnitudes of voltage.
As preferably, described method also comprises based on detected one or more magnitudes of voltage and generates yield values.
As preferably, described method also comprises the power output of controlling described power amplifier based on the yield value that generates.
As preferably, described method also comprises the reverse isolation gain of selecting described power amplifier, to reduce voltage standing wave ratio (VSWR) impact.
As preferably, described method also is included in when carrying out described calibration, is connected disconnection between described antenna and the described power amplifier.
As preferably, described resistance is integrated on the described chip.
As preferably, described resistance is integrated in the transmit/receive switch that links to each other with described reflector.
As preferably, described resistance is connected to described chip from the outside.
According to a further aspect in the invention, provide the control system in a kind of reflector, comprising:
One or more circuit in the chip, it uses resistance that the power output that is integrated in the power amplifier on the chip is calibrated, and described resistance is used for simulation is connected to the antenna of described power amplifier from the outside impedance.
As preferably, described one or more circuit are controlled the power output of described power amplifier based on the voltage that detects at described power amplifier input.
As preferably, the voltage of the described power amplifier input of described one or more electric circuit inspection.
As preferably, the voltage of the power amplifier driver output that described one or more electric circuit inspection link to each other with the input of described power amplifier.
As preferably, described one or more circuit are based on the power output of the described power amplifier of described voltage control that detected before the input of described power amplifier.
As preferably, corresponding one or more magnitudes of voltage are detected in one or more positions in the transmission channel of described one or more circuit before described power amplifier input.
As preferably, described one or more circuit generate yield values based on detected one or more magnitudes of voltage.
As preferably, described one or more circuit are controlled the power output of described power amplifier based on the yield value that generates.
As preferably, described one or more circuit are selected the reverse isolation gain of described power amplifier, to reduce voltage standing wave ratio (VSWR) impact.
As preferably, when carrying out described calibration, be connected disconnection between described antenna and the described power amplifier.
As preferably, described resistance is integrated on the described chip.
As preferably, described resistance is integrated in the transmit/receive switch that links to each other with described reflector.
As preferably, described resistance is connected to described chip from the outside.
According to another aspect of the invention, provide a kind of in reflector the method for control circuit, comprise and use one or more upper voltage detectors that the power output that is integrated in the power amplifier on the chip is calibrated, one or more the linking to each other in wherein said one or more upper voltage detectors and the following device:
The input of described power amplifier;
Be positioned at a level before the power amplifier input described in the transmission channel (chain) of described reflector.
As preferably, described method comprises that also described one or more upper voltage detectors correspondingly detect one or more magnitudes of voltage.
As preferably, described method comprises that also the one or more magnitudes of voltage based on described detection generate yield values.
As preferably, described method also comprises the power output of controlling described power amplifier based on the yield value that generates.
Various advantage of the present invention, various aspects and character of innovation, and the details of exemplified embodiment wherein will describe in detail in following description and accompanying drawing.
Description of drawings
The invention will be further described below in conjunction with drawings and Examples, in the accompanying drawing:
Figure 1A is the schematic diagram that can be used for the exemplary portable terminal in the embodiment of the invention;
Figure 1B is according to the exemplary I of the embodiment of the invention and the schematic diagram of Q transmission channel;
Fig. 2 is the schematic diagram according to embodiment of the invention transmission channel output stage under emission mode;
Fig. 3 is the schematic diagram according to embodiment of the invention transmission channel output stage under calibration/receiving mode;
Fig. 4 is according to the power amplifier calibration of the embodiment of the invention and the flow chart of control procedure illustrative steps.
Embodiment
The present invention relates to the method and system of control circuit in reflector.The solution of the present invention comprises uses on the sheet resistance (on-chip) that the power amplifier output power that is integrated in the chip is calibrated, and does not wherein connect when upper when antenna, goes up resistance for described and can simulate the antenna impedance that is connected to amplifier from the outside.The gain of amplifier and power output can be determined with known resistance with at the voltage that the input of amplifier or a plurality of points before amplifier detect.When antenna is connected to reflector, can control with for example power amplifier voltage detecting value before the power output of reflector, when antenna impedance changes, to avoid the detection of reflected ripple.Designing power amplifier becomes to comprise the reverse isolation function, to reduce the backward-wave from antenna.
Figure 1A is the schematic diagram that can be used for the exemplary portable terminal in the embodiment of the invention.Shown in Figure 1A, portable terminal 150 comprises RF receiver 153a, RF reflector 153b, T/R switch 152, digital baseband processor 159, processor 155, power management block (PMU) 161 and memory 157.Antenna 151 can be connected to T/R switch 152.When T/R switch 152 placed " R " or receives, antenna 151 was connected with RF receiver 153a, and when T/R switch 152 placed " T " or emission, antenna 151 was connected with RF reflector 153b.
RF receiver 153a comprise suitable logic, circuit and or code, for the treatment of the RF signal that receives.RF receiver 153a can receive the RF signal of employed each frequency range of various wireless communication systems (for example bluetooth, WLAN, GSM and/or cdma system).
Digital baseband processor 159 comprises suitable logic, circuit and/or code, for the treatment of baseband frequency signal.Relevant this point, digital baseband processor 159 can be processed and/or the signal (outwards to send by wireless transmission medium) that will send to RF reflector 153b is processed the signal that receives from RF receiver 153a.Based on the information in the processed signal, digital baseband processor 159 can also provide control signal and/or feedback information to RF receiver 153a and RF reflector 153b.Digital baseband processor 159 can send the information in the processed signal and/or data to processor 155 and/or memory 157.In addition, RF reflector 153b be processed and be sent to digital baseband processor 129 can from processor 155 and/or memory 157 reception information, to it, outwards to send by wireless transmission medium.
RF reflector 153b comprises suitable logic, circuit and/or code, for the treatment of the RF signal that will outwards send.RF reflector 153b can send the RF signal of employed each frequency range of various wireless communication systems (for example bluetooth, WLAN, GSM and/or cdma system).
Processor 155 comprises suitable logic, circuit and/or code, is used to portable terminal 150 to control and/or carries out data processing operation.Processor 155 can be used for controlling at least a portion in RF receiver 153a, RF reflector 153b, digital baseband processor 159 and/or the memory 157.Relevant this point, processor 125 can produce at least one signal that is used for 150 built-in functions of control portable terminal.
Memory 157 comprises suitable logic, circuit and/or code, is used for data and/or out of Memory that memory mobile terminal 150 uses.For example, memory 157 can be used for storing the data after the processing that digital baseband processor 159 and/or processor 155 generate.Memory 157 also can be used for storage information, such as configuration information, and the operation of at least one module of these Information Availabilities in control portable terminal 150.For example, memory 157 can comprise the necessary information for configuration RF receiver 153a, can receive the RF signal of suitable frequency range.
Power management block (PMU) 161 comprise suitable logic, circuit and or code, be used for the power demand of each assemblies in the managing mobile terminal 150.PMU 161 can generate battery voltage signal Vbat.
Figure 1B is according to the exemplary I of the embodiment of the invention and the schematic diagram of Q transmission channel.As shown in Figure 1B, transmission channel 100 comprises digital to analog converter (DAC) 105 and 107, low pass filter 109 and 111, source class (active stage, AS) 113,115,123 is arranged, homophase up-conversion mixer 117 and quadrature up-conversion frequency mixer 119, adder 120, power amplification driver (PAD) 125, power amplifier (PA) 127, transmitting/receiving (T/R) switch 129 and antenna 133.The homophase passage comprises DAC 105, LPF 109, AS 113 and homophase up-conversion mixer 117.Orthogonal channel comprises DAC 107, LPF 111, AS 115 and quadrature up-conversion frequency mixer 119.Polarization shown in Figure 1B (polar) reflector 100 is a kind of specific embodiments of the RF reflector 153b among Figure 1A.
DAC 105 comprise suitable logic, circuit and or code, be used for digital signal is converted to simulation output.DAC 105 is used for receiving input signal, and namely the in-phase digital intermediate-freuqncy signal 101.This input signal can comprise one or more bits of representative digit value.Supplied with digital signal can be baseband signal, this baseband signal can be mapped to constellation point based on modulation type.The constellation point of shining upon can be represented by analog signal amplitude.Quantity number or the character of the bit that is represented by analog signal amplitude can be determined based on modulation type.DAC 105 can produce analog output signal, and this analog output signal will be sent to the input of low pass filter 109.DAC 107 and DAC 105 are basic identical.DAC 107 can receive input signals 103 from baseband processor 135, correspondingly produces analog signal and is sent to the input of low pass filter 111.
LPF 109 comprise suitable logic, circuit and or code, be used for the selective cut-off frequency, wherein LPF109 can frequency of fadings be higher than the amplitude of the input signal component (component) of cut-off frequency; And the amplitude that makes frequency be lower than the input signal component of cut-off frequency be able to " by " or unattenuated, although or it is decayed, the degree of decay is lower than frequency is higher than the decay that the input signal component of cut-off frequency carries out.In each embodiment of the present invention, LPF 109 can be passive (passive) filter, such as use resistance, electric capacity and or inductance element consist of; Also can be active (active) filter, such as realizing with operational amplifier.LPF 111 and LPF109 are basic identical.LPF 111 can receive analog input signals from DAC 107, correspondingly produces low-pass filter signal and is sent to the input of source class 115.
AS 113 comprise suitable logic, circuit and or code, the input signal that makes it possible to decay is to generate the output signal of decay.The attenuation that AS 113 produces for example with the dB metering, can determine that based on input control signal this control signal can be generated by processor 155 (as shown in Figure 1A).AS 113 can receive the output signal that LPF 109 produces.AS 113 can produce through increasing (applied gain) or the output signal that decays and sending it to homophase up-conversion mixer 117.AS 115 and AS 113 are basic identical.The input of AS 115 can be connected to the output of low pass filter 111, and the output of AS 115 is connected to the input of frequency mixer 119.
Homophase up-conversion mixer 117 comprise suitable logic, circuit and or code, can be by input signal being modulated to generate the RF signal.Homophase up-conversion mixer 117 can utilize input local oscillation signal LO117 that input signal is modulated.Signal after the modulation is the RF signal.Reflector homophase up-conversion mixer 117 can produce the approximate RF signal of carrier frequency and local oscillation signal LO117 frequency.Homophase up-conversion mixer 117 can receive the output signal that source class 113 generates, and generating output signal sends adder 120 to.Quadrature up-conversion frequency mixer 119 is basic identical with homophase up-conversion mixer 117.The input of quadrature up-conversion frequency mixer 119 is connected to the input of adder 120.
Adder 120 comprise suitable logic, circuit and or code, be used for receiving analog input signal and generating output signal, and this output signal be enter adder signal and.Adder 120 can receive the output signal of homophase up- conversion mixer 117 and 119 generations of quadrature up-conversion frequency mixer, generates signal 121.
AS 123 comprise suitable logic, circuit and or code, the input signal that makes it possible to decay is to generate the output signal of decay.The attenuation that AS 123 produces for example with the dB metering, can determine that based on input control signal this control signal can be generated by processor 155 (as shown in Figure 1A).AS 123 can receive the output signal that adder 120 produces.AS 113 can produce through the output signal of increase or decay and with it and send PAD 125 to.
PAD 125 comprise suitable logic, circuit and or code, be used for receiving analog input signal, generate the output signal that is used for Driver amplifier.PAD 125 can receive the control signal of input, and this control signal can be generated by processor 155.The control signal that receives can be used to set amount of gain or the attenuation of PAD 125.PAD 125 can receive the output signal that AS 123 generates.PAD 125 can produce output signal and send PA 127 to.
PA 127 comprise suitable logic, circuit and or code, can have transmitting of enough signal powers (for example with the dBm metering) with generation by amplification input signal, outwards to send by radio communication media.PA 127 can receive the control signal of input, and this control signal can be generated by processor 155.The control signal that receives can be used to set amount of gain or the attenuation of PA 127.
Transmitting/receiving (T/R) switch 129 comprise suitable logic, circuit and or code, be used for switched antenna 133 between transmission channel 100 and RF receiver.Antenna 133 comprises the proper circuit for emission or reception RF signal.
Baseband processor 135 comprise suitable logic, circuit and or code, make it possible to pack processing and be contained in binary data in the input baseband signal.Baseband processor 135 is basic identical with the digital baseband processor 159 shown in Figure 1A.Baseband processor 135 can be carried out corresponding to one or more layers Processing tasks in the applicable Protocol REference Model (PRM).For example, baseband processor 135 can be carried out that physics (PHY) layer is processed, layer 1 (L1) processes, medium access control (MAC) layer is processed, logic link control (LLC) layer is processed, layer 2 (L2) process and or process according to carrying out upper-layer protocol based on binary load.The Processing tasks that baseband processor 135 is carried out can be described as the processing in the numeric field.Baseband processor 135 can also be based on to the processing of binary load certificate and generate control signal.
In operating process, baseband processor 135 can generate the data that comprise bit sequence, outwards to send by radio communication media.Baseband processor 135 can generate the control signal for configuration RF transmission channel 100, in order to use specific modulation type to send data.Based on specific modulation type, baseband processor can send a part of data (homophase base band (IBB) signal) to DAC 105, sends another part data (quadrature base band (QBB) signal) to DAC 107.But DAC 105 received bit sequences also produce the analog signal that comprises symbol sebolic addressing.Quantity by the bit of single character representation can be determined based on specific modulation type.DAC 107 equally also can generate analog signal.
The analog signal that DAC 105 and DAC 107 generate may comprise undesired frequency content.Can decay respectively DAC 105 and DAC 107 of LPF109 and LPF 111 generates in the signal these and do not want the signal amplitude of frequency content.Baseband processor 135 can be configured homophase up-conversion mixer 117, selects suitable local oscillator LO117 signal frequency, to modulating from the filtering signal of LPF 109.Modulation signal output from homophase up-conversion mixer 117 comprises I component RF signal.Baseband processor 135 can align equally to be handed in conversion mixer 119 and is configured, in order to generate Q component RF signal according to the filtering signal from LPF 111.These signals carry out add operation by the adder 120 that is positioned at two frequency mixers 117 and 119 outputs, thereby generate multiplex modulated signal.
AS 123 can amplify the compound RF signal of quadrature, and wherein the multiplication factor that provides of AS 123 can be set based on the control signal that baseband processor 135 generates.PAD 125 can carry out the second level and amplify to the signal that AS 123 generates, and the signal that 127 couples of PAD of PA 125 generate carries out third level amplification.When T/R switch 129 is arranged on " T " or emission mode, can send in the radio communication media by transmitting antenna 133 from the amplifying signal of PA 127.
Fig. 2 is the schematic diagram according to embodiment of the invention transmission channel output stage under emission mode.As shown in Figure 2, transmission channel 200 include source class (active stage) 205, gain control module 207, PAD209, voltage detector 213,219,239 and 241, PA 215, with T/R switch 223 and the antenna 221 of load resistance 225.The resistance of load resistance 225 is designed to be complementary with the impedance of antenna 221 and the output impedance of PA 215, for example 50 Ω.
Have source class 205 to comprise suitable logic, circuit and/or code, the input signal that makes it possible to decay is to generate the output signal through decay, and the amount that wherein decays for example with the dB metering, can be determined based on input control signal.There is source class 205 can receive the output signal that baseband analog level (as shown in Figure 1B) generates.There is source class can generate through increasing (applied gain) or the output signal that decays and sending it to PAD 209.
PAD 209 comprises suitable logic, circuit and/or code, is used for receiving analog input signal, generates the output signal that is used for Driver amplifier.PAD 209 can be from gain control module 207 reception control signals as input signal, to set amount of gain or the attenuation of PAD 209.PAD 209 can receive the output signal 243 that source class 205 generates.PAD 209 can produce output signal and send PA 215 to.
PA 215 comprises suitable logic, circuit and/or code, can the amplification input signal generation have transmitting of enough signal powers (for example with the dBm metering), outwards to send by radio communication media.PA 215 can be from gain control module 207 reception control signals as input, in order to set amount of gain or the attenuation of PA 215, and generating output signal is sent to transmitting/receiving (T/R) switch 223.
Transmitting/receiving (T/R) switch 223 comprises suitable logic, circuit and/or code, is used for switched antenna 133 between transmission channel 100 and RF path.Antenna 221 comprises the proper circuit for emission or reception RF signal.Resistance 225 can be integrated in the T/R switch 223.
Voltage detector 213,219,239 and 241 can comprise suitable logic, circuit and/or code, for detection of the voltage level of signal.In one embodiment of the invention, voltage detector 213,219,239 and 241 comprises envelope detector.Voltage detector 239 and 241 is the dotted line frame in Fig. 2, represents that this two place is the optional installation site of a plurality of voltage detectors, and can be other voltage monitors beyond voltage detector 213 and 219.Voltage detector 213,219,239 and 241 can be sensed voltage level, and the generation signal sends to gain control module 207.
In operating process, when being in emission mode, transmission channel 200 attempts receiving analog input signal 201, and this signal is increased suitable gain so that the transmitting power of antenna 221 reaches required level.Input signal 201 can be sent to source class 205, and gain or decay are provided, and the gain control signal 231 that its level is sent by gain control module 207 is determined.There is the output signal of source class 205 to send PAD209 to.PAD 209 provides gain or decay, and the gain control signal 229 that its level is sent by gain control module 207 is determined.The output signal 211 of PAD 209 sends PA 215 to.Voltage detector 213 detects the voltage of output signal 211, and sends gain control module 207 to.PA 215 provides gain or decay, and the gain control signal 227 that its level is sent by gain control module 207 is determined.The output impedance of PA 215 can be designed to the impedance phase coupling with antenna 221, and for example 50 Ω are reflected at the antenna place to avoid output signal 217.Voltage detector 219 detects the Voltage-output 217 of PA 215, and sends gain control module 207 to.The output signal 217 of PA 215 is sent to the input of switch 223.Switch 223 can be connected to transmission channel 200 or receive path with antenna 221.Under emission mode, switch 223 is connected to transmission channel 200 with antenna 221, so that the output signal 217 that receives from PA 215 may outwards be launched by antenna.
Gain control module 207 can be from voltage detector 213,219,239 and 241 receiver voltage signals, and can generate gain control signal 227,229,231 and 245.By the voltage of output signal 217 and the voltage of output signal 211 are compared, can determine the gain of PA 215.But under the impedance of antenna 221 is not constant situation, as being touched when it or next door when being placed with object, because the output impedance of PA 215 and the impedance mismatch of antenna 221, forward signal 235 will meet with reflection.In the situation of impedance mismatch, when reflected signal 237 arrives PA 215, there is a phase difference between itself and the forward signal 235, so that consisting of enhancement (constructively) mutually, disturb these two signals, so that the voltage of the output signal 217 that voltage detector 219 detects is higher mistakenly.Equally, reflected signal 237 arrives PA 215, and there are phase difference in its and forward signal 235, so that occur weakening property (destructively) interference between the signal, causes the voltage of the output signal 217 that voltage detector 219 detects on the low side mistakenly.
In the RF reflector of prior art, because the change in voltage that signal reflex causes can cause the power output of transmission channel larger change to occur.Also can use directional coupler in the prior art.Directional coupler only detects forward wave and ignores reflected wave.If the output of directional coupler is connected with voltage (envelope) detector, the output that then measures will not be subjected to the impact of antenna-reflected.But the directional coupler general size is too large on interested frequency, to such an extent as to it can't be integrated on the silicon substrate, therefore needs external module, so that cost and size all increase.
In the present invention, by utilizing the second voltage detector, for example be arranged on the voltage detector 213 between PAD 209 and the PA 215, can alleviate power output and change large phenomenon.The second voltage detector can be placed on any one-level before the PA 215.PA 215 can be designed to have high reverse isolation degree, such as the cascode among the CMOS (cascode) design, to reduce the gain of reverse signal.Adopt this mode, the voltage of output signal 211 can be isolated with reflected wave, and gain control module can be controlled the gain of transmission channel 200 more accurately.
Fig. 3 is the schematic diagram according to embodiment of the invention transmission channel output stage under calibration/receiving mode.As shown in the figure, under calibration/receiving mode, transmission channel 300 includes source class (active stage) 305, gain control module 307, PAD 309, voltage detector 313,319,337 and 339, PA 315, with T/R switch 323 and the antenna 321 of load resistance 325, these assemblies with described in Fig. 2, have source class 205, gain control module 207, PAD 209, voltage detector 213,219,239 and 241, PA 215, T/R switch 223, load resistance 225 and antenna 221 basic identical.In one embodiment of the invention, voltage detector 313,319,337 and 339 comprises envelope detector.
Can be sent to the input of source class 305 by the test signal 301 of baseband analog level (as shown in Figure 1B) generation.The output of gain control module 307 can be connected to another input of source class 305.There is the output of source class 305 to be connected to the input of PAD 309.The output of PAD 309 is connected to the input of PA 315.One end of voltage detector 313 is connected to the output of PAD 309, and the other end of voltage detector 313 is connected to the input of gain control module 307.The output of gain control module 307 is connected to another input of PA 315.The output of PA 315 is connected to switch 323.One end of voltage detector 319 is connected to the output of PA315, and the other end of voltage detector 319 is connected to the input of gain control module 307.One end of voltage detector 337 is connected to the output of source class 305, and the other end of voltage detector 337 is connected to gain control module 307.One end of voltage detector 339 is connected to the input of source class 305, and the other end of voltage detector 339 is connected to gain control module 307.T/R switch 323 is connected to receive path with antenna 321, and transmission channel 300 is connected to load resistance 325.
In operating process, when under calibration/receiving mode, transmission channel 300 can receive the test signal 301 that is generated by baseband analog level (as shown in Figure 1B), for this signal provides required gain, and detection signal 301,311,317 and 335 voltage.Test signal 301 has been sent to source class 305.Have source class 305 to receive test signal 301, and gain or decay are provided, the gain control signal 331 that its level is sent by gain control module 307 is determined.There is the output signal of source class 305 to send PAD 309 to.PAD 309 provides gain or decay, and the gain control signal 329 that its level is sent by gain control module 307 is determined.The output signal 311 of PAD 309 sends PA 315 to.Voltage detector 313 detects the voltage of output signal 311, and sends gain control module 307 to.PA 315 provides gain or decay, and the gain control signal 327 that its level is sent by gain control module 307 is determined.The output impedance of PA 315 can be designed to the impedance phase coupling with antenna 221, and for example 50 Ω are reflected at the antenna place to avoid output signal 317.Voltage detector 319 detects the Voltage-output 317 of PA 315, and sends gain control module 307 to.The output signal 317 of PA 315 is sent to switch 323.Switch 223 can be connected to transmission channel 200 antenna 321 or load resistance 325.
Under calibration/receiving mode, switch 323 is connected to load resistance 325 with transmission channel 300, and antenna 321 is connected to receive path.Adopt this mode, in the time of for example can starting in system, the load impedance that working load resistance 325 is given, with respect to the non-constant characteristic of the impedance of antenna 321 (owing to antenna 321 touched or antenna 321 near have object to exist to cause that antenna impedance changes), transmission channel 300 is calibrated.When known test signal 301 entered have the known load impedance transmission channel 300 of (load resistance 325), by the voltage that comparative voltage detector 319 and 313 detects, gain control module 307 can accurately be calibrated the gain of PA 315.
In another embodiment of the present invention, with respect to load resistance 325, when being connected to antenna, calibrates transmission channel 300.Gain calibration is similar to the situation that working load resistance 325 is calibrated, and just the T/R switch is set to " T " or emission mode (antenna is connected to transmission channel 300).
Fig. 4 is according to the power amplifier detector gain calibration of the embodiment of the invention and the flow chart of control procedure illustrative steps.Flow chart 400 as shown in Figure 4 after beginning step 401, begins to carry out gain calibration in step 403.In step 405, T/R switch 323 switches on the load resistance 325, so that impedance is given value, in order to PA 315 is calibrated.In step 407, voltage detector 313 and 319 detects output voltage 311 and 317 respectively.In step 409, determine the gain of PA 315 from the output voltage 311 and 317 that detects.In step 411, T/R switch 323 switches to antenna 321 transmission channel 300 is set to emission mode.Input signal 201 sends transmission channel 200 to.In step 413,207 pairs of gain control module have the gain of source class 205, PAD209 and PA 215 to arrange, to obtain required power output.In step 415, voltage detector 213 detects the voltage of output signal 211, is used for the power output of monitoring PA, thereby is not subjected to be reflected back from antenna 221 impact of the signal (because antenna 221 impedance variation cause) of PA.In step 417, if need to change power output, flow process returns 413.If do not need to change power output, flow process can arrive ending step 419.
In one embodiment of the invention, the method and system that the power output of utilizing 325 pairs of resistance on the sheet to be integrated in the power amplifier 15 on the chip is calibrated has been described, wherein do not connect when upper when antenna, resistance can be simulated the impedance of the antenna 321 that is connected to amplifier from the outside on the sheet.The gain of amplifier 315 and power output can be determined with known resistance with at the voltage that the input of amplifier or a plurality of points before amplifier detect.When antenna 321 is connected to reflector 300, can control with the voltage detecting value before the power amplifier 315 power output of reflector, when antenna impedance changes, to avoid the detection of reflected ripple.Power amplifier 315 can be designed to comprise the reverse isolation function, to reduce the backward-wave from antenna 321.In other embodiment of the present invention, can utilize antenna 321, the power output of calibrating power amplifier 315 by the voltage at detecting amplifier 315 inputs and amplifier 315 input prime places.
Some embodiments of the present invention can comprise the computer-readable memory that stores computer program, wherein this computer program has at least one for the code segment at the network transmission information, when this at least one code segment is carried out by computer, can make this computer carry out above-mentioned one or more steps.
The present invention can pass through hardware, software, and perhaps soft and hardware is in conjunction with realizing.The present invention can realize with centralized system at least one computer system, perhaps be realized with dispersing mode by the different piece in the computer system that is distributed in several interconnection.Anyly can realize that the computer system of described method or miscellaneous equipment all are applicatory.The combination of software and hardware commonly used can be the general-purpose computing system that computer program is installed, and by installing and carry out described program-con-trolled computer system, it is moved by described method.In computer system, utilize processor and memory cell to realize described method.
Embodiments of the invention can be used as plate level product (board level product) and implement, and are integrated on the one single chip with the other parts of different integrated levels with system such as one single chip, application-specific integrated circuit (ASIC) (ASIC) or as independent parts.The integrated level of system depends primarily on speed and cost consideration.Modern processors is various in style, makes it possible to adopt the processor that can find in the market.Optionally, if processor can be used as ASIC core or logic module, the processor that then can find in the market can be used as the part of ASIC device, with the firmware of various functions.
The present invention can also implement by computer program, and described program comprises whole features that can realize the inventive method, when it is installed in the computer system, by operation, can realize method of the present invention.Computer program in the present specification refers to: any expression formula that can adopt one group of instruction that any program language, code or symbol write, this instruction group makes system have information processing capability, with direct realization specific function, or after carrying out following one or two step, a) convert other Languages, coding or symbol to; B) reproduce with different forms, realize specific function.
The present invention describes by several specific embodiments, it will be appreciated by those skilled in the art that, without departing from the present invention, can also carry out various conversion and be equal to alternative the present invention.In addition, for particular condition or concrete condition, can make various modifications to the present invention, and not depart from the scope of the present invention.Therefore, the present invention is not limited to disclosed specific embodiment, and should comprise the whole execution modes that fall in the claim scope of the present invention.

Claims (2)

1. the control method in the reflector is characterized in that, comprises using resistance that the power output that is integrated in the power amplifier on the chip is calibrated, and described resistance has the impedance identical with the antenna that is connected to described power amplifier from the outside;
Under emission mode, transmission channel is connected to described antenna, the power output of calibrating power amplifier by the magnitude of voltage of a plurality of positions before detection power amplifier in and the power amplifier input;
Under calibration/receiving mode, transmission channel is connected to described resistance, the impedance of the described antenna of described resistance simulation; Detect the magnitude of voltage of described power amplifier input and power amplifier input a plurality of positions before;
Generate yield value and control the power output of described power amplifier based on the yield value that generates based on detected magnitude of voltage;
Described method also comprises the reverse isolation gain of selecting described power amplifier, to reduce the voltage standing wave ratio impact.
2. the control system in the reflector is characterized in that, comprising:
Chip, described chip comprises a plurality of circuit, described a plurality of circuit comprise successively connect source class (205), power amplification driver (209), power amplifier (215), transmitting/receiving (T/R) switch (223) arranged; Wherein, use resistance that the power output that is integrated in the described power amplifier on the chip is calibrated, described resistance has the impedance identical with the antenna that is connected to power amplifier from the outside;
Under emission mode, transmitting/receiving (T/R) switch is connected to described antenna, the power output of calibrating power amplifier by the magnitude of voltage of a plurality of positions before detection power amplifier in and the power amplifier input;
Under calibration/receiving mode, transmitting/receiving (T/R) switch is connected to described resistance, the impedance of the described antenna of described resistance simulation; Detect the before magnitude of voltage of a plurality of positions of described power amplifier input and power amplifier input;
Generate yield value and control the power output of described power amplifier based on the yield value that generates based on detected magnitude of voltage;
Described system also comprises the reverse isolation gain of selecting described power amplifier, to reduce the voltage standing wave ratio impact.
CN 200710197190 2006-12-06 2007-12-04 Controlling method and system in emitter Active CN101257329B (en)

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US11/618,181 US7873332B2 (en) 2006-12-06 2006-12-29 Method and system for mitigating a voltage standing wave ratio

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CN2007101991016A Active CN101257322B (en) 2006-12-06 2007-12-05 Method and system for processing signal received by communication medium
CNA2007101968626A Pending CN101207389A (en) 2006-12-06 2007-12-06 Method and system for receiving and/or sending signals via a radio communication media
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CN101257321A (en) 2008-09-03
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CN101207399B (en) 2014-06-04
CN101257322A (en) 2008-09-03
CN101257322B (en) 2012-05-30
CN101257329A (en) 2008-09-03
CN101257321B (en) 2011-12-14
CN101212441A (en) 2008-07-02
CN101212441B (en) 2015-04-29
CN101207389A (en) 2008-06-25

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