CN101257329A - Method and system for controlling circuit in emitter - Google Patents
Method and system for controlling circuit in emitter Download PDFInfo
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- CN101257329A CN101257329A CN 200710197190 CN200710197190A CN101257329A CN 101257329 A CN101257329 A CN 101257329A CN 200710197190 CN200710197190 CN 200710197190 CN 200710197190 A CN200710197190 A CN 200710197190A CN 101257329 A CN101257329 A CN 101257329A
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Abstract
Methods and systems for mitigating a voltage standing wave ratio in a transmitter are disclosed and may comprise calibrating an output power of a power amplifier integrated within a chip using a resistor that models an impedance of an antenna that is externally coupled to the amplifier while the antenna is decoupled. The gain and output power of the amplifier may be determined utilizing the known resistance and a voltage that is measured at an input of the power amplifier, or at a number of points prior to the power amplifier. When the antenna may be coupled to the transmitter, the transmitter output power may then be controlled utilizing the voltage measurements prior to the power amplifier to avoid measuring reflected waves in instances when the antenna impedance may vary. The power amplifier may be of a design that comprises reverse isolation to reduce reflected waves from the antenna.
Description
Technical field
The present invention relates to power amplifier, more particularly, relate to a kind of method and system that is used for reducing the reflector voltage standing wave ratio.
Background technology
Power amplification circuit in the wireless system is the large-signal device normally.In the wireless lan (wlan) system, for example, power amplifier (PA) circuit is to arrive the peak power emission output signal of 30dBm to the average power between the 20dBm, about 20 between 10dBm.In such wlan system, may use polytype modulation scheme, for example from binary phase shift keying (BPSK) to 512 grades of (level) quadrature amplitude modulation (512-QAM), thereby power output alters a great deal, make that the ratio of peak power and average power is also very big, for example 10dBm is to 15dBm.
The power output of power amplifier can be subjected to the influence of antenna impedance.Design the impedance phase coupling of suitable its output impedance of power amplifier and antenna.If, will cause signal to reflect, just usually said voltage standing wave ratio (VSWR) at power amplifier antenna place because some reason changes antenna impedance.When VSWR greater than 1 the time because gain control circuit is attempted the output voltage fluctuation that the compensatory reflex signal is brought, the power output of amplifier can change.A solution that is used to reduce VSWR at present is to adopt outside discrete directional coupler.
When power amplifier and other RF transmitter circuit (such as digital to analog converter (DAC), low pass filter (LPF), frequency mixer and RF programmable gain amplifier (RFPGA)) are integrated in the integrated circuit (IC), the suffered restriction of power amplifier circuit performance will further aggravate.Yet, owing to exist in the urgent demand of integrated more function among the single IC, the increase of thing followed semiconductor device quantity, develop towards the direction that reduces dimensions of semiconductor devices promoting semiconductor fabrication, these special semiconductor fabrications will bring more restriction to the performance of integrated power amplifier circuit.For example, utilize 65nmCMOS technology will limit the scope of input power (PA provides linear power output to amplify for it).In the wlan standard (as IEEE 802.11) AM-AM of regulation and or the requirement of the AM-PM distortion factor will get rid of and utilize power amplifier that 65nm CMOS technology for example produces with the high-output power output signals transmitted.
Compare the follow-up system that will introduce in conjunction with the accompanying drawings of the present invention, other limitation of prior art and drawback are conspicuous for the person of ordinary skill of the art.
Summary of the invention
The present invention relates to be used to reduce the method and system of voltage standing wave ratio on transmitting power or the transmitting power control loop.
According to an aspect of the present invention, provide a kind of in reflector the method for control circuit, comprise and use resistance that the power output that is integrated in the power amplifier on the chip is calibrated, wherein said resistance is used to simulate the impedance that is connected to the antenna of described power amplifier from the outside.
As preferably, described method also comprises based on the power output of controlling described power amplifier at the detected voltage of described power amplifier input.
As preferably, described method also comprises the voltage that detects described power amplifier input.
As preferably, described method also comprises the voltage of the power amplifier driver output that detection links to each other with the input of described power amplifier.
As preferably, described method also comprises the power output of controlling described power amplifier based on detected described voltage before the input of described power amplifier.
As preferably, described method also is included in the transmission channel before the described power amplifier input one or more positions and detects one or more magnitudes of voltage.
As preferably, described method also comprises based on detected one or more magnitudes of voltage and generates yield values.
As preferably, described method also comprises the power output of controlling described power amplifier based on the yield value that is generated.
As preferably, described method also comprises the reverse isolation gain of selecting described power amplifier, to reduce voltage standing wave ratio (VSWR) influence.
As preferably, described method also is included in when carrying out described calibration, is connected disconnection between described antenna and the described power amplifier.
As preferably, described resistance is integrated on the described chip.
As preferably, described resistance is integrated in the transmit/receive switch that links to each other with described reflector.
As preferably, described resistance is connected to described chip from the outside.
According to a further aspect in the invention, provide a kind of in reflector the system of control circuit, comprising:
One or more circuit in the chip, it uses resistance that the power output that is integrated in the power amplifier on the chip is calibrated, and described resistance is used to simulate the impedance that is connected to the antenna of described power amplifier from the outside.
As preferably, described one or more circuit are based on the power output of controlling described power amplifier at the detected voltage of described power amplifier input.
As preferably, the voltage of the described power amplifier input of described one or more electric circuit inspection.
As preferably, the voltage of the power amplifier driver output that described one or more electric circuit inspection link to each other with the input of described power amplifier.
As preferably, described one or more circuit are based on the power output of the described power amplifier of detected described voltage control before the input of described power amplifier.
As preferably, corresponding one or more magnitudes of voltage are detected in one or more positions in the transmission channel of described one or more circuit before described power amplifier input.
As preferably, described one or more circuit generate yield values based on detected one or more magnitudes of voltage.
As preferably, described one or more circuit are controlled the power output of described power amplifier based on the yield value that is generated.
As preferably, described one or more circuit are selected the reverse isolation gain of described power amplifier, to reduce voltage standing wave ratio (VSWR) influence.
As preferably, when carrying out described calibration, be connected disconnection between described antenna and the described power amplifier.
As preferably, described resistance is integrated on the described chip.
As preferably, described resistance is integrated in the transmit/receive switch that links to each other with described reflector.
As preferably, described resistance is connected to described chip from the outside.
According to another aspect of the invention, provide a kind of in reflector the method for control circuit, comprise and use one or more to go up voltage detectors the power output that is integrated in the power amplifier on the chip is calibrated, wherein said one or more one or more linking to each other of going up in voltage detectors and the following device:
The input of described power amplifier;
Be positioned at a level before the power amplifier input described in the transmission channel (chain) of described reflector.
As preferably, described method comprises that also described one or more are gone up voltage detectors and correspondingly detect one or more magnitudes of voltage.
As preferably, described method comprises that also the one or more magnitudes of voltage based on described detection generate yield values.
As preferably, described method also comprises the power output of controlling described power amplifier based on the yield value that is generated.
Various advantage of the present invention, various aspects and character of innovation, and the details of the embodiment of example shown in it will describe in detail in following description and accompanying drawing.
Description of drawings
The invention will be further described below in conjunction with drawings and Examples, in the accompanying drawing:
Figure 1A is the schematic diagram that can be used for the exemplary portable terminal in the embodiment of the invention;
Figure 1B is according to the exemplary I of the embodiment of the invention and the schematic diagram of Q transmission channel;
Fig. 2 is the schematic diagram according to embodiment of the invention transmission channel output stage under emission mode;
Fig. 3 is the schematic diagram according to embodiment of the invention transmission channel output stage under calibration/receiving mode;
Fig. 4 is according to the power amplifier calibration of the embodiment of the invention and the flow chart of control procedure illustrative steps.
Embodiment
The present invention relates to the method and system of control circuit in reflector.The solution of the present invention comprises that resistance (on-chip) is calibrated the power amplifier output power that is integrated in the chip on the use sheet, wherein when antenna does not connect, goes up resistance for described and can simulate the antenna impedance that is connected to amplifier from the outside.Amplifier Gain and power output can use known resistance and amplifier input terminal or on a plurality of points before the amplifier detected voltage determine.When antenna is connected to reflector, can use voltage detecting value before the power amplifier for example to control the power output of reflector, when antenna impedance changes, to avoid the detection of reflected ripple.Designing power amplifier becomes to comprise the reverse isolation function, to reduce the backward-wave from antenna.
Figure 1A is the schematic diagram that can be used for the exemplary portable terminal in the embodiment of the invention.Shown in Figure 1A, portable terminal 150 comprises RF receiver 153a, RF reflector 153b, T/R switch 152, digital baseband processor 159, processor 155, power management block (PMU) 161 and memory 157.Antenna 151 can be connected to T/R switch 152.When T/R switch 152 placed " R " or receives, antenna 151 was connected with RF receiver 153a, and when T/R switch 152 placed " T " or emission, antenna 151 was connected with RF reflector 153b.
Power management block (PMU) 161 comprise suitable logic, circuit and or code, be used for the power demand of each assemblies in the managing mobile terminal 150.PMU 161 can generate battery voltage signal V
Bat
Figure 1B is according to the exemplary I of the embodiment of the invention and the schematic diagram of Q transmission channel.Shown in Figure 1B, transmission channel 100 comprises digital to analog converter (DAC) 105 and 107, low pass filter 109 and 111, source class (active stage, AS) 113,115,123, homophase up-conversion mixer 117 and quadrature up-conversion frequency mixer 119 are arranged, adder 120, power amplification driver (PAD) 125, power amplifier (PA) 127, emission/reception (T/R) switch 129 and antenna 133.The homophase passage comprises DAC 105, LPF 109, AS 113 and homophase up-conversion mixer 117.Orthogonal channel comprises DAC 107, LPF 111, AS 115 and quadrature up-conversion frequency mixer 119.Polarization shown in Figure 1B (polar) reflector 100 is a kind of specific embodiments of the RF reflector 153b among Figure 1A.
DAC 105 comprise suitable logic, circuit and or code, be used for digital signal is converted to simulation output.DAC 105 is used for receiving inputted signal, and promptly the in-phase digital intermediate-freuqncy signal 101.This input signal can comprise the one or more bits that are used for representing digital value.Supplied with digital signal can be a baseband signal, this baseband signal can be mapped to constellation point based on modulation type.Institute's mapped constellation points can be represented by analog signal amplitude.The quantity number or the character of the bit of being represented by analog signal amplitude can be determined based on modulation type.DAC 105 can produce analog output signal, and this analog output signal will be sent to the input of low pass filter 109.DAC 107 and DAC 105 are basic identical.DAC 107 can be from baseband processor 135 receiving inputted signals 103, correspondingly produce analog signal and are sent to the input of low pass filter 111.
LPF 109 comprise suitable logic, circuit and or code, be used to select cut-off frequency, wherein LPF109 can frequency of fadings be higher than the amplitude of the input signal component (component) of cut-off frequency; And the amplitude that makes frequency be lower than the input signal component of cut-off frequency be able to " by " or unattenuated, though or it is decayed, the degree of decay is lower than the decay that input signal component carried out that frequency is higher than cut-off frequency.In each embodiment of the present invention, LPF 109 can be passive (passive) filter, such as use resistance, electric capacity and or inductance element constitute; Also can be active (active) filter, such as using operational amplifier to realize.LPF 111 and LPF 109 are basic identical.LPF 111 can receive analog input signals from DAC 107, correspondingly produces low-pass filter signal and is sent to the input of source class 115.
AS 113 comprise suitable logic, circuit and or code, the input signal that makes it possible to decay is to generate the output signal of decay.The attenuation that AS 113 produces for example with the dB metering, can determine that this control signal can be generated by processor 155 (as shown in Figure 1A) based on input control signal.AS 113 can receive the output signal that LPF 109 produces.AS 113 can produce through increasing (applied gain) or the output signal that decays and sending it to homophase up-conversion mixer 117.AS 115 and AS 113 are basic identical.The input of AS 115 can be connected to the output of low pass filter 111, and the output of AS 115 is connected to the input of frequency mixer 119.
Homophase up-conversion mixer 117 comprise suitable logic, circuit and or code, can generate the RF signal by input signal is modulated.Homophase up-conversion mixer 117 can utilize input local oscillation signal LO117 that input signal is modulated.Signal after the modulation is the RF signal.Reflector homophase up-conversion mixer 117 can produce carrier frequency and the approximate RF signal of local oscillation signal LO117 frequency.Homophase up-conversion mixer 117 can receive the output signal that source class 113 generates, and the generation output signal sends adder 120 to.Quadrature up-conversion frequency mixer 119 is basic identical with homophase up-conversion mixer 117.The input of quadrature up-conversion frequency mixer 119 is connected to the input of adder 120.
Adder 120 comprise suitable logic, circuit and or code, be used to receive analog input signal and generate output signal, and this output signal be enter adder signal and.Adder 120 can receive the output signal of homophase up-conversion mixer 117 and 119 generations of quadrature up-conversion frequency mixer, generates signal 121.
AS 123 comprise suitable logic, circuit and or code, the input signal that makes it possible to decay is to generate the output signal of decay.The attenuation that AS 123 produces for example with the dB metering, can determine that this control signal can be generated by processor 155 (as shown in Figure 1A) based on input control signal.AS 123 can receive the output signal that adder 120 produces.AS 113 can produce through the output signal of increase or decay and with it and send PAD 125 to.
PAD 125 comprise suitable logic, circuit and or code, be used to receive analog input signal, generate the output signal that is used for the driving power amplifier.PAD 125 can receive the control signal of input, and this control signal can be generated by processor 155.The control signal that receives can be used to set amount of gain or the attenuation of PAD 125.PAD 125 can receive the output signal that AS 123 generates.PAD 125 can produce output signal and send PA 127 to.
PA 127 comprise suitable logic, circuit and or code, can have transmitting of enough signal powers (for example with the dBm metering) with generation by amplification input signal, outwards to send by radio communication media.PA 127 can receive the control signal of input, and this control signal can be generated by processor 155.The control signal that receives can be used to set amount of gain or the attenuation of PA 127.
Emission/reception (T/R) switch 129 comprise suitable logic, circuit and or code, be used for switched antenna 133 between transmission channel 100 and RF receiver.Antenna 133 comprises the proper circuit that is used to launch or receive the RF signal.
Baseband processor 135 comprise suitable logic, circuit and or code, make it possible to pack processing and be contained in binary data in the input baseband signal.Baseband processor 135 is basic identical with the digital baseband processor 159 shown in Figure 1A.Baseband processor 135 can be carried out corresponding to one or more layers Processing tasks in the Protocol REference Model (PRM) that is suitable for.For example, baseband processor 135 can be carried out that physics (PHY) layer is handled, layer 1 (L1) handles, medium access control (MAC) layer is handled, logic link control (LLC) layer is handled, layer 2 (L2) handle and or handle according to carrying out upper-layer protocol based on binary load.The Processing tasks that baseband processor 135 is carried out can be described as the processing in the numeric field.Baseband processor 135 can also be based on to the processing of binary load certificate and generate control signal.
In operating process, baseband processor 135 can generate the data that comprise bit sequence, outwards to send by radio communication media.Baseband processor 135 can generate the control signal that is used to dispose RF transmission channel 100, so that use specific modulation type to send data.Based on specific modulation type, baseband processor can send a part of data (homophase base band (IBB) signal) to DAC 105, sends another part data (quadrature base band (QBB) signal) to DAC 107.DAC 105 can receive bit sequence and produce the analog signal that comprises symbol sebolic addressing.Quantity by the bit of single character representation can be determined based on specific modulation type.DAC 107 equally also can generate analog signal.
The analog signal that DAC 105 and DAC 107 generate may comprise undesired frequency content.Can decay respectively DAC 105 and DAC 107 of LPF109 and LPF 111 generates in the signal these and do not want the signal amplitude of frequency content.Baseband processor 135 can be configured homophase up-conversion mixer 117, selects suitable local oscillator LO117 signal frequency, so that to modulating from the filtering signal of LPF 109.Modulation signal output from homophase up-conversion mixer 117 comprises I component RF signal.Baseband processor 135 can align equally to be handed in conversion mixer 119 and is configured, so that generate Q component RF signal according to the filtering signal from LPF 111.These signals carry out add operation by the adder 120 that is positioned at two frequency mixers 117 and 119 outputs, thereby generate multiplex modulated signal.
AS 123 can amplify the compound RF signal of quadrature, and wherein the multiplication factor that provided of AS 123 can be set based on the control signal that baseband processor 135 generates.PAD 125 can carry out the second level and amplify to the signal that AS 123 generates, and the signal that 127 couples of PAD of PA 125 generate carries out third level amplification.When T/R switch 129 is arranged on " T " or emission mode, can send in the radio communication media by transmitting antenna 133 from the amplifying signal of PA 127.
Fig. 2 is the schematic diagram according to embodiment of the invention transmission channel output stage under emission mode.As shown in Figure 2, transmission channel 200 includes source class (active stage) 205, gain control module 207, PAD209, voltage detector 213,219,239 and 241, PA 215, the T/R switch 223 that has load resistance 225 and antenna 221.The resistance of load resistance 225 is designed to be complementary with the impedance of antenna 221 and the output impedance of PA 215, for example 50 Ω.
Have source class 205 to comprise suitable logic, circuit and/or code, the input signal that makes it possible to decay is to generate the output signal through decay, and wherein the amount that is decayed for example with the dB metering, can be determined based on input control signal.There is source class 205 can receive the output signal that baseband analog level (as shown in Figure 1B) generates.There is source class can generate through increasing (applied gain) or the output signal that decays and sending it to PAD 209.
Emission/reception (T/R) switch 223 comprises suitable logic, circuit and/or code, is used for switched antenna 133 between transmission channel 100 and RF path.Antenna 221 comprises the proper circuit that is used to launch or receive the RF signal.Resistance 225 can be integrated in the T/R switch 223.
Voltage detector 213,219,239 and 241 can comprise suitable logic, circuit and/or code, is used for the voltage level of detection signal.In one embodiment of the invention, voltage detector 213,219,239 and 241 comprises envelope detector.Voltage detector 239 and 241 is a frame of broken lines in Fig. 2, represents that this two place is the optional installation site of a plurality of voltage detectors, and can be other voltage monitors beyond voltage detector 213 and 219.Voltage detector 213,219,239 and 241 can be sensed voltage level, and the generation signal sends to gain control module 207.
In operating process, when being in emission mode, transmission channel 200 attempts receiving analog input signal 201, and this signal is increased suitable gain so that the transmitting power of antenna 221 reaches required level.Input signal 201 can be sent to source class 205, and gain or decay are provided, and the gain control signal 231 that its level is sent by gain control module 207 is determined.There is the output signal of source class 205 to send PAD209 to.PAD 209 provides gain or decay, and the gain control signal 229 that its level is sent by gain control module 207 is determined.The output signal 211 of PAD 209 sends PA 215 to.Voltage detector 213 detects the voltage of output signal 211, and sends gain control module 207 to.PA 215 provides gain or decay, and the gain control signal 227 that its level is sent by gain control module 207 is determined.The output impedance of PA 215 can be designed to the impedance phase coupling with antenna 221, and for example 50 Ω are reflected at the antenna place to avoid output signal 217.Voltage detector 219 detects the voltage output 217 of PA 215, and sends gain control module 207 to.The output signal 217 of PA 215 is sent to the input of switch 223.Switch 223 can be connected to transmission channel 200 or receive path with antenna 221.Under emission mode, switch 223 is connected to transmission channel 200 with antenna 221, and the feasible output signal 217 that receives from PA 215 may outwards be launched by antenna.
In the RF reflector of prior art, because the change in voltage that signal reflex causes can cause the power output of transmission channel bigger change to occur.Also can use directional coupler in the prior art.Directional coupler only detects forward wave and ignores reflected wave.If the output of directional coupler is connected with voltage (envelope) detector, the output that then measures will not be subjected to the influence of antenna-reflected.But the directional coupler general size is too big on interested frequency, to such an extent as to it can't be integrated on the silicon substrate, therefore needs external module, makes cost and size all increase.
In the present invention,, for example be arranged on the voltage detector 213 between PAD 209 and the PA 215, can alleviate power output and change big phenomenon by utilizing second voltage detector.Second voltage detector can be placed on any one-level before the PA 215.PA 215 can be designed to have high reverse isolation degree, as the design of the cascode amplifier (cascode) among the CMOS, to reduce the gain of reverse signal.Adopt this mode, the voltage of output signal 211 can be isolated with reflected wave, and gain control module can be controlled the gain of transmission channel 200 more accurately.
Fig. 3 is the schematic diagram according to embodiment of the invention transmission channel output stage under calibration/receiving mode.As shown in the figure, under calibration/receiving mode, transmission channel 300 includes source class (active stage) 305, gain control module 307, PAD 309, voltage detector 313,319,337 and 339, PA 315, the T/R switch 323 that has load resistance 325 and antenna 321, these assemblies with combine Fig. 2 described in have source class 205, gain control module 207, PAD 209, voltage detector 213,219,239 and 241, PA 215, T/R switch 223, load resistance 225 and antenna 221 basic identical.In one embodiment of the invention, voltage detector 313,319,337 and 339 comprises envelope detector.
Can be sent to the input of source class 305 by the test signal 301 of baseband analog level (shown in Figure 1B) generation.The output of gain control module 307 can be connected to another input of source class 305.There is the output of source class 305 to be connected to the input of PAD 309.The output of PAD 309 is connected to the input of PA 315.One end of voltage detector 313 is connected to the output of PAD 309, and the other end of voltage detector 313 is connected to the input of gain control module 307.The output of gain control module 307 is connected to another input of PA 315.The output of PA 315 is connected to switch 323.One end of voltage detector 319 is connected to the output of PA315, and the other end of voltage detector 319 is connected to the input of gain control module 307.One end of voltage detector 337 is connected to the output of source class 305, and the other end of voltage detector 337 is connected to gain control module 307.One end of voltage detector 339 is connected to the input of source class 305, and the other end of voltage detector 339 is connected to gain control module 307.T/R switch 323 is connected to receive path with antenna 321, and transmission channel 300 is connected to load resistance 325.
In operating process, when under calibration/receiving mode, transmission channel 300 can receive the test signal 301 that is generated by baseband analog level (shown in Figure 1B), for this signal provides required gain, and the voltage of detection signal 301,311,317 and 335.Test signal 301 has been sent to source class 305.Source class 305 acceptance test signals 301 are arranged, and gain or decay are provided, the gain control signal 331 that its level is sent by gain control module 307 is determined.There is the output signal of source class 305 to send PAD 309 to.PAD 309 provides gain or decay, and the gain control signal 329 that its level is sent by gain control module 307 is determined.The output signal 311 of PAD 309 sends PA 315 to.Voltage detector 313 detects the voltage of output signal 311, and sends gain control module 307 to.PA 315 provides gain or decay, and the gain control signal 327 that its level is sent by gain control module 307 is determined.The output impedance of PA 315 can be designed to the impedance phase coupling with antenna 221, and for example 50 Ω are reflected at the antenna place to avoid output signal 317.Voltage detector 319 detects the voltage output 317 of PA 315, and sends gain control module 307 to.The output signal 317 of PA 315 is sent to switch 323.Switch 223 can be connected to transmission channel 200 antenna 321 or load resistance 325.
Under calibration/receiving mode, switch 323 is connected to load resistance 325 with transmission channel 300, and antenna 321 is connected to receive path.Adopt this mode, for example can be when system start-up, working load resistance 325 given load impedance, with respect to the non-constant characteristic of the impedance of antenna 321 (owing to antenna 321 touched or antenna 321 near have object to exist to cause that antenna impedance changes), transmission channel 300 is calibrated.When known test signal 301 entered have the known load impedance transmission channel 300 of (load resistance 325), by comparative voltage detector 319 and 313 detected voltages, gain control module 307 can accurately be calibrated the gain of PA 315.
In another embodiment of the present invention, with respect to load resistance 325, when being connected to antenna, calibrates transmission channel 300.Gain calibration is similar to the situation that working load resistance 325 is calibrated, and just the T/R switch is set to " T " or emission mode (antenna is connected to transmission channel 300).
Fig. 4 is according to the power amplifier detector gain calibration of the embodiment of the invention and the flow chart of control procedure illustrative steps.Flow chart 400 as shown in Figure 4 after beginning step 401, begins to carry out gain calibration in step 403.In step 405, T/R switch 323 switches on the load resistance 325, makes that impedance is a given value, so that PA 315 is calibrated.In step 407, voltage detector 313 and 319 detects output voltage 311 and 317 respectively.In step 409, determine the gain of PA 315 from detected output voltage 311 and 317.In step 411, T/R switch 323 switches to antenna 321 transmission channel 300 is set to emission mode.Input signal 201 sends transmission channel 200 to.In step 413,207 pairs of gain control module have the gain of source class 205, PAD 209 and PA 215 to be provided with, to obtain required power output.In step 415, voltage detector 213 detects the voltage of output signal 211, is used to monitor the power output of PA, thereby is not subjected to the influence of the signal (because of antenna 221 impedance variation cause) from antenna 221 reflected back PA.In step 417, change power output if desired, flow process returns 413.If do not need to change power output, flow process can arrive end step 419.
In one embodiment of the invention, describe the power output of utilizing 325 pairs of resistance on the sheet to be integrated in the power amplifier 15 on the chip and carried out Calibration Method and system, wherein when antenna did not connect, resistance can be simulated the impedance of the antenna 321 that is connected to amplifier from the outside on the sheet.The gain of amplifier 315 and power output can use known resistance and amplifier input terminal or on a plurality of points before the amplifier detected voltage determine.When antenna 321 is connected to reflector 300, can use power amplifier 315 voltage detecting value before to control the power output of reflector, when antenna impedance changes, to avoid the detection of reflected ripple.Power amplifier 315 can be designed to comprise the reverse isolation function, to reduce the backward-wave from antenna 321.In other embodiment of the present invention, can utilize antenna 321, the power output of calibrating power amplifier 315 by the voltage at detecting amplifier 315 inputs and amplifier 315 input prime places.
Some embodiments of the present invention can comprise the computer-readable memory that stores computer program, wherein this computer program has the code segment that at least one is used for the information of transmitting at network, when this at least one code segment is carried out by computer, can make this computer carry out above-mentioned one or more steps.
The present invention can pass through hardware, software, and perhaps soft, combination of hardware realizes.The present invention can realize with centralized system at least one computer system, perhaps be realized with dispersing mode by the different piece in the computer system that is distributed in several interconnection.Anyly can realize that the computer system of described method or miscellaneous equipment all are applicatory.The combination of software and hardware commonly used can be the general-purpose computing system that computer program is installed, and by installing and carry out described program-con-trolled computer system, it is moved by described method.In computer system, utilize processor and memory cell to realize described method.
Embodiments of the invention can be used as plate level product (board level product) and implement, and are integrated on the single chip with the other parts of different integrated levels with system as single chip, application-specific integrated circuit (ASIC) (ASIC) or as independent parts.The integrated level of system depends primarily on speed and cost consideration.Modern processors is various in style, makes it possible to adopt the processor that can find in the market.Optionally, if processor can be used as ASIC core or logic module, then the processor that can find in the market can be used as the part of ASIC device, has the firmware of various functions.
The present invention can also implement by computer program, and described program comprises whole features that can realize the inventive method, when it is installed in the computer system, by operation, can realize method of the present invention.Computer program in the present specification refers to: one group of any expression formula of instructing that can adopt any program language, code or symbol to write, this instruction group makes system have information processing capability, with direct realization specific function, or after carrying out following one or two step, a) convert other Languages, coding or symbol to; B) reproduce with different forms, realize specific function.
The present invention describes by several specific embodiments, it will be appreciated by those skilled in the art that, without departing from the present invention, can also carry out various conversion and be equal to alternative the present invention.In addition, at particular condition or concrete condition, can make various modifications to the present invention, and not depart from the scope of the present invention.Therefore, the present invention is not limited to disclosed specific embodiment, and should comprise the whole execution modes that fall in the claim scope of the present invention.
Claims (10)
1, a kind of in reflector the method for control circuit, it is characterized in that, comprise and use resistance that the power output that is integrated in the power amplifier on the chip is calibrated, wherein said resistance is used to simulate the impedance that is connected to the antenna of described power amplifier from the outside.
2, method according to claim 1 is characterized in that, comprises based on the power output of controlling described power amplifier at the detected voltage of described power amplifier input.
3, method according to claim 2 is characterized in that, comprises the voltage that detects described power amplifier input.
4, method according to claim 3 is characterized in that, comprises the voltage of the power amplifier driver output that detection links to each other with the input of described power amplifier.
5, method according to claim 2 is characterized in that, comprises the power output of controlling described power amplifier based on detected described voltage before the input of described power amplifier.
6, a kind of in reflector the system of control circuit, it is characterized in that, comprising:
One or more circuit in the chip, it uses resistance that the power output that is integrated in the power amplifier on the chip is calibrated, and described resistance is used to simulate the impedance that is connected to the antenna of described power amplifier from the outside.
7, system according to claim 6 is characterized in that, described one or more circuit are based on the power output of controlling described power amplifier at the detected voltage of described power amplifier input.
8, system according to claim 7 is characterized in that, the voltage of the described power amplifier input of described one or more electric circuit inspection.
9, system according to claim 8 is characterized in that, the voltage of the power amplifier driver output that described one or more electric circuit inspection link to each other with the input of described power amplifier.
10, a kind of in reflector the method for control circuit, it is characterized in that, comprise and use one or more to go up voltage detectors the power output that is integrated in the power amplifier on the chip is calibrated, wherein said one or more one or more linking to each other of going up in voltage detectors and the following device:
The input of described power amplifier;
Be positioned at a level before the power amplifier input described in the transmission channel (chain) of described reflector.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US86881806P | 2006-12-06 | 2006-12-06 | |
| US60/868,818 | 2006-12-06 | ||
| US11/618,181 US7873332B2 (en) | 2006-12-06 | 2006-12-29 | Method and system for mitigating a voltage standing wave ratio |
| US11/618,181 | 2006-12-29 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101257329A true CN101257329A (en) | 2008-09-03 |
| CN101257329B CN101257329B (en) | 2013-03-20 |
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| CN200710199438.7A Active CN101207399B (en) | 2006-12-06 | 2007-12-03 | Method and system for controlling circuit in an emitter |
| CN 200710197190 Active CN101257329B (en) | 2006-12-06 | 2007-12-04 | Controlling method and system in emitter |
| CN2007101991016A Active CN101257322B (en) | 2006-12-06 | 2007-12-05 | Method and system for processing signal received by communication medium |
| CN2007101934009A Active CN101257321B (en) | 2006-12-06 | 2007-12-05 | Method and system for processing signal |
| CN200710196863.0A Expired - Fee Related CN101212441B (en) | 2006-12-06 | 2007-12-06 | Method and system for processing signal in communication system |
| CNA2007101968645A Pending CN101207420A (en) | 2006-12-06 | 2007-12-06 | Method and system for processing signal |
| CNA2007101968626A Pending CN101207389A (en) | 2006-12-06 | 2007-12-06 | Method and system for receiving and/or sending signals via a radio communication media |
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| CN200710199438.7A Active CN101207399B (en) | 2006-12-06 | 2007-12-03 | Method and system for controlling circuit in an emitter |
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| CN2007101991016A Active CN101257322B (en) | 2006-12-06 | 2007-12-05 | Method and system for processing signal received by communication medium |
| CN2007101934009A Active CN101257321B (en) | 2006-12-06 | 2007-12-05 | Method and system for processing signal |
| CN200710196863.0A Expired - Fee Related CN101212441B (en) | 2006-12-06 | 2007-12-06 | Method and system for processing signal in communication system |
| CNA2007101968645A Pending CN101207420A (en) | 2006-12-06 | 2007-12-06 | Method and system for processing signal |
| CNA2007101968626A Pending CN101207389A (en) | 2006-12-06 | 2007-12-06 | Method and system for receiving and/or sending signals via a radio communication media |
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Cited By (2)
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| CN103931121A (en) * | 2011-11-15 | 2014-07-16 | 高通股份有限公司 | Transmit power calibration in a communication system |
| CN108365826A (en) * | 2017-12-26 | 2018-08-03 | 浙江禾川科技股份有限公司 | A kind of programmable gain amplifier |
Families Citing this family (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010169504A (en) * | 2009-01-22 | 2010-08-05 | Anritsu Corp | Jitter transfer characteristic measuring instrument |
| US8275331B2 (en) * | 2009-04-21 | 2012-09-25 | Qualcomm, Incorporated | PA gain state switching based on waveform linearity |
| US8442581B2 (en) * | 2009-06-05 | 2013-05-14 | Mediatek Inc. | System for the coexistence between a plurality of wireless communication modules |
| US9504092B2 (en) | 2009-07-09 | 2016-11-22 | Mediatek Inc. | System for the coexistence between a plurality of wireless communications modules sharing single antenna |
| US9025583B2 (en) | 2009-07-09 | 2015-05-05 | Mediatek Inc. | System for the coexistence between a plurality of wireless communication module sharing single antenna |
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| US8125276B2 (en) * | 2010-03-12 | 2012-02-28 | Samsung Electro-Mechanics | Sharing of inductor interstage matching in parallel amplification system for wireless communication systems |
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Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FI103442B (en) * | 1993-09-24 | 1999-06-30 | Nokia Telecommunications Oy | Digital radio link system and radio link device |
| JPH09321681A (en) * | 1996-05-31 | 1997-12-12 | Fujitsu Ltd | Transmission power controller |
| JPH10173453A (en) * | 1996-12-09 | 1998-06-26 | Sony Corp | High-frequency variable gain amplifying device and radio communication equipment |
| US6208875B1 (en) * | 1998-04-08 | 2001-03-27 | Conexant Systems, Inc. | RF architecture for cellular dual-band telephones |
| US6084473A (en) * | 1998-12-29 | 2000-07-04 | Maxim Integrated Products, Inc. | Multipoint controlled high dynamic range variable gain amplifier |
| JP2001284998A (en) * | 2000-03-31 | 2001-10-12 | Mitsubishi Electric Corp | Wireless transmitter |
| US6960962B2 (en) * | 2001-01-12 | 2005-11-01 | Qualcomm Inc. | Local oscillator leakage control in direct conversion processes |
| AU2002231210A1 (en) * | 2001-03-14 | 2002-10-03 | California Institute Of Technology | Concurrent dual-band receiver architecture |
| CN1706106A (en) * | 2002-10-15 | 2005-12-07 | 塞瑞费克无线公司 | DC trimming circuit for radio frequency (RF) down-conversion |
| GB2394133A (en) * | 2002-10-17 | 2004-04-14 | Toumaz Technology Ltd | Radio receiver with reconfigurable filtering arrangement |
| AU2003278525A1 (en) * | 2002-12-11 | 2004-06-30 | Koninklijke Philips Electronics N.V. | Three-phase mixer-systems |
| US6882220B2 (en) * | 2003-06-27 | 2005-04-19 | Sige Semiconductor Inc. | Integrated power amplifier circuit |
| JP4247673B2 (en) * | 2003-10-31 | 2009-04-02 | ソニー株式会社 | Transmission / reception device, transmission device, and reception device |
| US7356317B2 (en) * | 2004-07-14 | 2008-04-08 | Silicon Storage Technology, Inc. | Adaptive-biased mixer |
-
2007
- 2007-12-03 CN CN200710199438.7A patent/CN101207399B/en active Active
- 2007-12-04 CN CN 200710197190 patent/CN101257329B/en active Active
- 2007-12-05 CN CN2007101991016A patent/CN101257322B/en active Active
- 2007-12-05 CN CN2007101934009A patent/CN101257321B/en active Active
- 2007-12-06 CN CN200710196863.0A patent/CN101212441B/en not_active Expired - Fee Related
- 2007-12-06 CN CNA2007101968645A patent/CN101207420A/en active Pending
- 2007-12-06 CN CNA2007101968626A patent/CN101207389A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103931121A (en) * | 2011-11-15 | 2014-07-16 | 高通股份有限公司 | Transmit power calibration in a communication system |
| CN103931121B (en) * | 2011-11-15 | 2016-01-20 | 高通股份有限公司 | Transmission power calibration in communication system |
| CN108365826A (en) * | 2017-12-26 | 2018-08-03 | 浙江禾川科技股份有限公司 | A kind of programmable gain amplifier |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101212441A (en) | 2008-07-02 |
| CN101257321B (en) | 2011-12-14 |
| CN101257321A (en) | 2008-09-03 |
| CN101257322A (en) | 2008-09-03 |
| CN101207389A (en) | 2008-06-25 |
| CN101207420A (en) | 2008-06-25 |
| CN101212441B (en) | 2015-04-29 |
| CN101207399B (en) | 2014-06-04 |
| CN101257329B (en) | 2013-03-20 |
| CN101257322B (en) | 2012-05-30 |
| CN101207399A (en) | 2008-06-25 |
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