CN101252691A

CN101252691A - Method for multi-processor to parallel implement high-definition picture filtering

Info

Publication number: CN101252691A
Application number: CN 200810065557
Authority: CN
Inventors: 陈晨航; 梁立伟; 王宁
Original assignee: ZTE Corp
Current assignee: ZTE Corp
Priority date: 2008-03-12
Filing date: 2008-03-12
Publication date: 2008-08-27
Anticipated expiration: 2028-03-12
Also published as: CN101252691B

Abstract

The invention relates to a method for realizing high-definition image filtration through the parallel of multi-processor. The invention adopts the steps that firstly, the macro-blocks in image macro-block rows are divided into shares in the number identical with the number of processors in sequence; then filtration is performed, after filtration to the corresponding shares in the macro-block rows is completed by the previous processor, subsequent filtering operation to the next share in the macro-block row is performed by the next processor, and filtration to the corresponding share in the next macro-block row is performed by the previous processor, followed by analogy, until the completion of the filtration of a frame. Through the method, dada in a macro-block row is divided into shares in the number identical with the number of the processors by utilizing characteristics of large data volume of video with high definition format, each processor is in charge of computation to pixel filtration of different rows, previously, the previous filtration ensures data both at the upper side and the left side to be available and the parallel computation to be smoothly performed. Through the method, filtration and computation can be simultaneously performed by almost all the processors, thereby the resource of the multi-processor is effectively utilized, and the processing efficiency is enhanced.

Description

A kind of parallel multiprocessor is realized the method for high-definition picture filtering

Technical field

The invention belongs to the image information compression field, be specifically related to the method that a kind of high-definition picture is compiled (or separating) sign indicating number filtering Parallel Implementation on the multi-disc processor.

Background technology

MPEG-4 PART-10 AVC suggestion, promptly standard H.264 with its video image compression efficient and quality of reconstructed images that is better, has obtained the favor of industry.But high definition H.264 is a cost with the room and time complexity, under equal video coding condition, H.264 coding realize needed consuming time be H.263 more than 3 times, and H.264 need bigger memory headroom to store huge intermediate data.Therefore, when with H264 to high-definition picture (as D1,720p, 1080i) encode (or decoding, be without loss of generality, unified below with coding) time, present single processor such as DSP, ARM, or FPGA is difficult to support real-time coding, particularly when volume is separated high definition or full HD image, even need processor more than 2 to finish the coding of one road image.

When one road video sequence being encoded with the processor of (hereinafter referred to as multi-disc) more than two or two, just produced a problem, promptly how to make the ability of multi-disc processor perform to maximum.If wherein a processor is in operation, what other processor do not have respectively with a slice idle so.But the multi-disc processor is if operation simultaneously then must must guarantee the not conflict of multi-disc data access.

H.264 the loop filtering of Yin Ruing is a kind of a kind of new method that can the self adaptation deblocking effect.H.264 loop filtering can be removed the blocking effect of coding and rebuilding image effectively, is one of bright spot H.264.H.264 loop filtering is divided into the filtering of level and vertical boundary.When current macro is carried out filtering, need use the data of top macro block and left side macro block, as shown in Figure 1.Therefore, in to current macro filtering, must do filtering,, cause the difficulty of multi-disc processor parallel computation thus so that its data can be used to the data of the macro block on the top and left side.A kind of simple feasible solution is the processing that monolithic processor is finished whole two field picture, and the efficient of Shi Xianing has been wasted the resource of other processors undoubtedly like this, because before Filtering Processing is finished, other processors can not carry out other any actions.Another scheme is that brightness and colourity are separated by two digital signal processors (Digital Signal Processing, DSP) handle, but the data volume of considering brightness is one times (picture format is 4:2:0) of colourity, and computation complexity also almost is one times of colourity, total resource overhead nearly 4: 1, therefore this scheme does not make full use of the resource of multi-disc processor yet.

In H.264 solution of today, be a kind of selection commonly used based on the mode of DSP, because of the speed of dsp chip is more and more higher, integrated function from strength to strength, performance also strengthens big day by day.

Summary of the invention

Problem to be solved by this invention is, provide a kind of parallel multiprocessor to realize the method for high-definition picture filtering, this method can make full use of the resource of multi-disc processor, make the multi-disc processor can finish filtering concurrently, thereby finish filtering with less resource occupation, fast speeds.

A kind of parallel multiprocessor of the present invention is realized the method for high-definition picture filtering, may further comprise the steps:

Step 1: the macro block of image macro row is divided into the umber identical with the processor number in order;

Step 2: after last processor finished the filtering of macro-block line counterpart, next processor then carries out the filtering operation of this macro-block line next part, and last processor carries out the filtering of the counterpart of next macro-block line, and the like, until finishing a frame filtering.

Described step 2 further may further comprise the steps:

Steps A: first part of filtering of first first macro-block line of processor processing, at this moment, other processors are idle;

Step B: first part of filtering of second macro-block line of first processor processing, meanwhile, and second part of filtering of second first macro-block line of filter process, other filters are idle;

Step C: by that analogy, up to the first part of filtering with several macro-block line of first processor processing and processor number, so far, processor begins parallel running;

Step D: first processor continues to handle first part of filtering of next macro-block line; Other processors are handled the filtering of the counterpart of corresponding macro-block line accordingly; And the like, until first part of filtering of first last macro-block line of processor processing;

Step e: first processor is idle, second part of filtering of second last macro-block line of processor processing, and the like, until finishing a frame filtering.

The intact reconstruction of described processor processing writes on the chip external memory.

In the described step 1, if the macroblock number of macro-block line can not be divided exactly by the processor number, then the macro block of remainder part divides in the end in the portion.

The present invention has utilized the big characteristics of the video data volume of HD, the data of a macro-block line are divided into part identical with the processor number, each processor is responsible for calculating the pixel filter of different rows, and before this, a preceding filtering has made top, left data to use, and makes parallel computation to carry out smoothly.Such processing procedure almost is that all processor filtering is simultaneously calculated, and has effectively utilized very much the resource of multi-disc processor, has improved treatment effeciency.

Description of drawings

Fig. 1 is a filtering boundary schematic diagram H.264;

Fig. 2 is the flow chart of the method for the invention;

Fig. 3 is the filtering schematic diagram of the present invention when being four DSP.

Embodiment

The present invention is described in further detail below in conjunction with Fig. 2 and Fig. 3.

Among the present invention, suppose that the number of processor is N, and the macro block line number of establishing image is M, the macroblock number of every row is L.L can be divided exactly by N, also can not be divided exactly by N.Under the situation that L can be divided exactly by N, every part of macroblock number is that [L/N] is individual; Under the situation that L can not be divided exactly by N, the macroblock number in every part of preceding N-1 part is that [L/N] is individual, and the macroblock number of N part is that L-(N-1) * [L/N] is individual.

Present embodiment is an example with DSP, gets N=4, is respectively DSP_0, DSP_1, DSP_2 and DSP_3; And L can be divided exactly by N, promptly is divided into 4 parts:

The first step

DSP_0 is to first 1/4 row filtering of first macro-block line.Data reconstruction after the filtering writes on (following steps all are stored in chip external memory after finishing) in the chip external memory.At this moment, DSP_1, DSP_2, DSP_3 is idle to be hung up.

Second step

DSP_1 begins second 1/4 capable pixel filter to first macro-block line.Meanwhile, DSP_0 is to the preceding 1/4 row filtering of second macro-block line, and DSP_2, DSP3 continue idle.

The 3rd step

DSP_2 begins the 3rd 1/4 capable filtering to first macro-block line.Meanwhile, DSP_1 is then to second 1/4 capable filtering of second macro-block line; DSP_0 then to the 3rd macro-block line first 1/4 the row filtering; DSP_3 continues idle.

The 4th step

DSP_3 begins last the 1/4 row filtering to first macro-block line.Meanwhile, DSP_2 is to the 3rd 1/4 capable filtering of second macro-block line; DSP_1 is to second 1/4 capable filtering of the 3rd macro-block line; DSP_0 then to the 4th macro-block line first 1/4 the row filtering.So far, 4 DSP begin parallel computation.

The 5th step

The process of similar step 4, all DSP are to the correspondence 1/4 row filtering of next macro-block line, to the last first 1/4 row of a macro-block line k=M macro-block line.

The 6th step

DSP_0 is idle, and other processors are finished the filtering of 1/4 macro-block line of the correspondence of next macro-block line.

The 7th step

DSP_0, DSP_1 is idle, and DSP_2, DSP_3 finish the filtering of corresponding 1/4 macro-block line.

The 8th step

DSP_0, DSP_1, DSP_2 is idle, and DSP_3 finishes the i.e. filtering of last 1/4 row of M macro-block line of last macro-block line.So far, finished the filtering of whole two field picture.

The present invention is embodied as example with DSP and describes, but is without loss of generality, and the present invention also is applicable to other chips such as FPGA, ARM, ASIC.

Claims

1, a kind of parallel multiprocessor is realized the method for high-definition picture filtering, it is characterized in that, may further comprise the steps:

Step 2: after last processor finished the filtering of corresponding part of macro-block line, next processor then carries out filtering operation a under this macro-block line, and last processor carries out corresponding part filtering of next macro-block line, and the like, finish until a frame filtering.

2, parallel multiprocessor as claimed in claim 1 is realized the method for high-definition picture filtering, it is characterized in that step 2 further may further comprise the steps:

Steps A: first processor finished first part of filtering of first macro-block line, and at this moment, other processors are idle;

Step B: first processor finished first part of filtering of second macro-block line, and meanwhile, second filter finished second part of filtering of first macro-block line, and other filters are idle;

Step C: by that analogy, finish and the first part filtering of processor number with several macro-block line up to first processor, processor begins parallel running;

Step D: first processor continues to finish first part of filtering of next macro-block line; Other processors are finished the filtering of the counterpart of corresponding macro-block line accordingly; And the like, finish first part of filtering of last macro-block line until first processor;

Step e: first processor is idle, and second processor finished second part of filtering of last macro-block line, and the like, until finishing a frame filtering.

3, parallel multiprocessor as claimed in claim 1 or 2 is realized the method for high-definition picture filtering, it is characterized in that, the intact reconstruction of described processor processing writes on the chip external memory.

4, parallel multiprocessor as claimed in claim 1 is realized the method for high-definition picture filtering, it is characterized in that, in the step 1, if the macroblock number of macro-block line can not be divided exactly by the processor number, then the macro block of remainder part divides in the end in the portion.