CN101252372B - Method for switching main and standby master-control panel in double star-type system - Google Patents
Method for switching main and standby master-control panel in double star-type system Download PDFInfo
- Publication number
- CN101252372B CN101252372B CN2008101036630A CN200810103663A CN101252372B CN 101252372 B CN101252372 B CN 101252372B CN 2008101036630 A CN2008101036630 A CN 2008101036630A CN 200810103663 A CN200810103663 A CN 200810103663A CN 101252372 B CN101252372 B CN 101252372B
- Authority
- CN
- China
- Prior art keywords
- signal
- control unit
- corea
- main control
- coreb
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Cash Registers Or Receiving Machines (AREA)
- Control Of Steam Boilers And Waste-Gas Boilers (AREA)
Abstract
The invention relates to a switching method of a main control unit and a main spare unit in the binary system. In the switching method, four hardware connecting lines used for switching control signals are arranged between a main control unit CoreA and a main control unit CoreB; the control signals are respectively defined to be CoreA on-position, CoreA main/spare state, CoreB on-position and CoreB main/spare state; the hardware connecting lines combine with logic circuits in the complex programmable logic devices (CPLD) designed on the main control unit CoreA and the main control unit CoreB to realize the switch control; the logic circuit of the CPLD is composed of a D trigger, a data selector MUX and a NAND gate. The switching method can improve the efficiency of the switching control signal line pair of the main spare unit; because the hardware is adopted without the participation of the software, the switching speed and the stability are improved.
Description
Technical field
The present invention relates to the method that master and backup discs is switched, be specifically related to the method that active/standby main control unit is switched in a kind of double star-type system.
Background technology
In the communication equipment of Modern Telecommunication level, often require equipment to have very high reliability.The normally typical hub-and-spoke configuration of the inside structure of equipment just has a main control unit to realize exchanges data and controlled function, and other business interface dish is attached thereto by the backboard signal.Because the port density of equipment is very high, so in case main control unit breaks down, will cause a large amount of users to be affected.Be this situation that prevents to occur, in equipment, adopt the dual star topology structure that two main control units are installed usually, as shown in Figure 1.One of two dishes are in the master and use state, are also referred to as main attitude, and another dish is in stand-by state, are also referred to as attitude fully.
Active/Standby Changeover mechanism in the double star-type system is divided into two parts: first, the decision mechanism of initial active/standby state; Second portion, the active/standby state Switchover mechanism in the running.How two main control units determined self working state when initial condition decision mechanism realization equipment initially powered on, and promptly that piece dish is in the master and is in stand-by state with state, that piece among both; In equipment running process,, finish switching of the two active/standby states of dish by Switchover mechanism in case the situation of main control unit operation irregularity takes place.
The decision mechanism of the initial active/standby state of first will be realized following target: at first, under the normal condition that two dishes power on simultaneously, the dish that is positioned at the major trough position can enter main attitude, and the dish of groove position can enter attitude fully and be positioned at fully.Secondly, under the situation that two dishes one power on after earlier, no matter be in which groove position, always the dish that powers on earlier can enter main attitude, after the dish that powers on can enter attitude fully, and can the former state not impacted.At last, only insert in equipment under the situation of a dish, this dish enters main attitude.
The active/standby state Switchover mechanism of second portion will be realized switching of active/standby state under following several situations in equipment running process: first kind of situation, and webmaster is assigned the Forced Switch order to the main control unit that is in main attitude; Second kind of situation, the main control unit that is in main attitude is reset; The main control unit that is in main attitude is pulled out away.
Disclosed prior art has comprised the method that some control panel activestandby states are switched.For example, on March 26th, 2003, disclosed number was that CN1405985, denomination of invention are for just having proposed a kind of implementation method of masterslave switchover in the patent application of " masterslave switchover control circuit and implementation method ".The control circuit that this technical scheme adopts comprises cpu i/f, parallel/serial conversion, command process circuit, state processing circuit and timing generating circuit.Its operation principle is: cpu i/f receives the command word that cpu system is sent out, and be transmitted to parallel/serial treatment circuit, parallel/serial conversion and command process circuit receive and handle the command word that cpu system sends, simultaneously, send the state comparison circuit of handshake to another veneer, sends active/standby with the state comparison circuit of word to this plate, state comparison circuit comparison handshake and the active/standby word of using, and, generate and switch control signal according to the action of comparative result control timing comparator circuit.The main and standby rearranging method of the prior art exists following problem: first: switching between active/standby main control unit needs software to participate in control, and reaction speed is slow; Second: the judgement to active/standby main control unit current state exists risk, may cause two main control units to be in main attitude simultaneously; The 3rd: it is active/standby with the state comparison circuit of word to this plate, occupying system resources to need software timing to send.
Summary of the invention
The object of the invention is to provide main and standby master-control panel reverse method in a kind of double star-type system.
Technical scheme of the present invention adopts 4 hardware lines of switching control signal is set between CoreA, CoreB main control unit, signal is defined as respectively that CoreA is on the throne, the active/standby state of CoreA, on the throne, the active/standby state of CoreB of CoreB, in conjunction with the control that the last designed inner logical circuit realization of CPLD (CPLD) of main control unit CoreA, CoreB is switched, described CPLD logical circuit is made up of d type flip flop, data selector MUX and NAND gate.
Main and standby master-control panel reverse method in a kind of double star provided by the invention system comprises:
First kind of situation, when only there being main control unit CoreA dish to insert the respective grooves position, and when not having another dish CoreB, after the device power, signal B1 is 1, signal A2 is 1, so signal A1 is output as 0, this dish CoreA is in the state of using of leading;
Second kind of situation, when only there being main control unit CoreB to insert the respective grooves position, and when not having another dish CoreA, after the device power, signal A1 is 1, signal B2 is 1, so B1 is output as 0, dish CoreB is in the main state of using;
The third situation, main control unit CoreA, CoreB dish all inserts groove position separately; CoreA powers on earlier as fruit tray, and the result is as first kind of situation, promptly coils CoreA and is in and mainly coils CoreB with state and be in stand-by state; CoreB powers on earlier as fruit tray, and the result is as second kind of situation, promptly coils CoreA and is in stand-by state and coils CoreB and be in the main state of using; If two dish CoreA, CoreB power on simultaneously, not before signalization A2, the B2 logical value, signal A2, B2 are default value 0, the equal output logic value 1 of this twinkling signal A1, B1 in application program; The groove position signal CTRLB control data selector MUX of dish CoreB is with the d type flip flop bypass, the value of the signal B1 that dish CoreB upward exports depends on the value of the signal A1 that another input of MUX is introduced, in application program with signal A2, B2 after the equal set logic value 1, NAND gate on the dish CoreA is because the logical value that two inputs are introduced all is 1, then signal A1 is set to 0 earlier, be that main control unit CoreA is in main attitude, and another main control unit CoreB still is in attitude fully;
The 4th kind of situation, when two main control unit CoreA, CoreB dish was simultaneously on the throne, webmaster was assigned the Forced Switch order, and it is main when use state forcing to be provided with dish CoreA when webmaster, and application program only need be changed to 0 with B2 according to instruction; Otherwise webmaster is forced to be provided with dish CoreB and is led when using state, and application program is changed to 0 with A2;
The 5th kind of situation, dish CoreA, CoreB are simultaneously on the throne, reset to being in main dish CoreA with state, the CPLD circuit when resetting with signal zero clearing on the throne, the zero clearing that is reset of the register of signal A2 correspondence causes signal A1 output 1, signal B1 output 0, dish CoreA transfers attitude fully by main to state, and dish CoreB transfers main attitude to by stand-by state;
The 6th kind of situation, dish CoreA, CoreB are simultaneously on the throne, extract the dish CoreA that is in main attitude, and its result is promptly coiled CoreB by the standby state of using of leading that transfers to as second kind of situation.
Method as mentioned above, wherein, A1 is the signal of the active/standby state of representative main control unit CoreA, and A2 is a representative main control unit CoreA signal on the throne, and B1 is the signal of the active/standby state of representative main control unit CoreB, and B2 is a representative main control unit CoreB signal on the throne; A1, A2 output to the signal of another main control unit CoreB for main control unit CoreA; B1, B2 output to the signal of main control unit CoreA for main control unit CoreB; Signal A2, B2 wherein offers the status signal that another main control unit reads by a main control unit.
Method as mentioned above, wherein, signal A1 or B1 by on when moving high level to, its signal logic value is 0, represents that respectively main control unit CoreA or main control unit CoreB are in the main state of using; Otherwise when signal A1 or B1 dropped to low level, its signal logic value was 1, represented that respectively main control unit CoreA or main control unit CoreB are in stand-by state; Signal A2, B2 are the upward output of CPLD internal register of dish separately, and described A2, B2 are in high level, and then its signal logic value is 0, represent this dish not on the throne, otherwise A2, B2 are in low level, its signal logic value is 1, represent this dish on the throne, and the default logic value of A2, B2 two signals is 0; After being positioned at main control unit CoreA, CoreB on the slot separately and powering on, application program of operation is changed to 1 with the logical value of signal A2 on the throne, B2 automatically on it, to show all on the throne and operate as normal of two dishes, can participate in switching.
Method as mentioned above, wherein, groove position signal CTRLA, CTRLB offer the groove position signal of main control unit CoreA and main control unit CoreB by backboard by socket terminals, and this signal is used for controlling respectively the output of data selector MUX on the main control unit separately; The groove position signal CTRLA that A groove position provides controls the Q end output signal of the data selector MUX output d type flip flop of the main control unit CoreA on this groove position, the groove position signal CTRLB that B groove position provides controls the data selector MUX of the main control unit CoreB on this groove position with the d type flip flop bypass, after equipment is initially powered on, main control unit CoreA is in the master and uses state, and main control unit CoreB is in stand-by state.
Technique effect of the present invention is mainly reflected in following several respects:
First, improved master and backup discs and switched the right efficient of control signal wire, because time method is used two pairs of holding wires, wherein a pair of holding wire participates in masterslave switchover control, another is used for the normal state on the throne of indicating panel to holding wire, avoids two-wire to the race and hazard phenomenon in the control mode;
The second, when equipment inserts two main control units and powers on simultaneously, need not to adopt the method for software delay to determine that is in major state, and determine to have higher reliability by groove position information signal CTRLA/B.
Method of the present invention participates in owing to adopting simple hardware controls to need not software, has improved the speed of switching and reliability.
Description of drawings
Fig. 1 is the double star-type system configuration diagram of the main and standby master-control panel reverse method of employing the inventive method;
Fig. 2 is provided with the schematic diagram of control signal between two main control units for adopting the inventive method;
Fig. 3 is the logical circuit schematic diagram of CPLD inside on the main control unit that adopts the inventive method.
Embodiment
The present invention is described in detail below in conjunction with accompanying drawing.
Fig. 2 be the main control unit CoreA that adopts the inventive method setting with main control unit CoreB between be used for coiling the control signal that active/standby state is switched to two: A1 is the signal of the active/standby state of representative main control unit CoreA, A2 is a representative main control unit CoreA signal on the throne, B1 is the signal of the active/standby state of representative main control unit CoreB, and B2 is a representative main control unit CoreB signal on the throne.As shown in Figure 2, A1, A2 output to the signal of another main control unit CoreB for main control unit CoreA; B1, B2 output to the signal of main control unit CoreA for main control unit CoreB.Wherein, signal A2, B2 offer the status signal that another main control unit reads by a main control unit.
Fig. 3 is the logical circuit schematic diagram that adopts the last set complex programmable logic device (CPLD) inside of main control unit CoreA, the CoreB of the inventive method.The CPLD logical circuit that is used to switch control on each main control unit is made up of d type flip flop, data selector MUX and NAND gate.As shown in Figure 3, two main control unit CoreA are identical with the CoreB hardware configuration, CoreA is an example with dish, the signal B1 on the throne of this dish is transferred to the input D end of d type flip flop and the input of data selector MUX, the output Q end of d type flip flop is transferred to another input of data selector MUX, the groove position signal CTRLA of this dish is transferred to the control end of data selector MUX, control MUX selects one of them to export to an input of NAND gate from the two-way input end signal, another input of this NAND gate has been transfused to the signal B2 on the throne from other main control unit Core B, and NAND gate is carried out the activestandby state signal that output signal after the computing is this dish CoreA with two input end signals.The structure of dish CoreB is identical with dish CoreA, distinguishes the signal difference of the selected output of two dish data selector MUX that only is groove position signal difference as described below and causes.
Below each road signal is described in detail.Signal A1 or B1 by on when moving high level to, its signal logic value is 0, represents that respectively main control unit CoreA or main control unit CoreB are in the main state of using; Otherwise when signal A1 or B1 dropped to low level, its signal logic value was 1, represented that respectively main control unit CoreA or main control unit CoreB are in stand-by state.Signal A2, B2 are the upward output of CPLD internal register of dish separately, and described A2, B2 are in high level, and then its signal logic value is 0, represent this dish not on the throne, otherwise A2, B2 are in low level, its signal logic value is 1, represent this dish on the throne, and the default logic value of A2, B2 two signals is 0.Signal CTRLA, CTRLB offer the groove position signal of main control unit CoreA and main control unit CoreB by backboard by socket terminals, and this signal is used for controlling respectively the output of data selector MUX on the main control unit separately.The groove position signal CTRLA that A groove position provides controls the Q end output signal of the data selector MUX output d type flip flop of the main control unit CoreA on this groove position, the groove position signal CTRLB that B groove position provides controls the data selector MUX of the main control unit CoreB on this groove position with the d type flip flop bypass, determine thus after equipment initially powers on, main control unit CoreA is in the master and uses state, and main control unit CoreB is in stand-by state.Need to prove that after being positioned at main control unit CoreA, CoreB on the slot separately and powering on, application program of operation is changed to 1 with the logical value of signal A2 on the throne, B2 automatically on it,, can participate in switching to show all on the throne and operate as normal of two dishes.
Table 1 is the logical signal truth table of Active/Standby Changeover control signal A1, B1, A2, B2 between two main control unit CoreA, the CoreB.
The A dish:
| A2 | ?B1 | ?A1 |
| ?0 | ?0 | ?1 |
| ?0 | ?1 | ?1 |
| ?1 | ?0 | ?1 |
| ?1 | ?1 | ?0 |
The B dish:
| B2 | ?A1 | ?B1 |
| ?0 | ?0 | ?1 |
| ?0 | ?1 | ?1 |
| ?1 | ?0 | ?1 |
| ?1 | ?1 | ?0 |
Table 1
Describe the course of work that circuit shown in Figure 3 is carried out the inventive method in detail below in conjunction with table 1: first kind of situation, when only there being main control unit CoreA dish to insert the respective grooves position, and do not have another dish during CoreB, after the device power, signal B1 is 1, signal A2 is 1, so signal A1 is output as 0, this dish CoreA is in the main state of using.Second kind of situation, when only there being main control unit CoreB to insert the respective grooves position, and when not having another dish CoreA, after the device power, signal A1 is 1, signal B2 is 1, so B1 is output as 0, dish CoreB is in the main state of using.The third situation, main control unit CoreA, CoreB dish all inserts groove position separately.CoreA powers on earlier as fruit tray, and the result is as first kind of situation, promptly coils CoreA and is in and mainly coils CoreB with state and be in stand-by state; CoreB powers on earlier as fruit tray, and the result is as second kind of situation, promptly coils CoreA and is in stand-by state and coils CoreB and be in the main state of using.If two dish CoreA, CoreB power on simultaneously, not before signalization A2, the B2 logical value, signal A2, B2 are default value 0, the equal output logic value 1 of this twinkling signal A1, B1 in application program.With reference to Fig. 3, because the groove position signal CTRLB control data selector MUX of dish CoreB is with the d type flip flop bypass, the value of therefore coiling the signal B1 of the last output of CoreB depends on the value of the signal A1 that another input of MUX is introduced, thus in application program with signal A2, B2 after the equal set logic value 1, NAND gate on the dish CoreA is because the logical value that two inputs are introduced all is 1, then signal A1 is set to 0 earlier, promptly main control unit CoreA is in main attitude, and another main control unit CoreB still is in attitude fully.The 4th kind of situation, when two main control unit CoreA, CoreB dishes are simultaneously on the throne, webmaster is assigned the Forced Switch order, it is main when using state forcing to be provided with dish CoreA when webmaster, application program only needs that according to instruction B2 is changed to 0 and gets final product, otherwise webmaster is forced to be provided with dish CoreB and is led when using state, and application program is changed to 0 with A2 and gets final product.The 5th kind of situation, dish CoreA, CoreB are simultaneously on the throne, reset to being in main dish CoreA with state, owing to adopt the CPLD circuit of the inventive method to be designed to when resetting with signal zero clearing on the throne, therefore the register of the signal A2 correspondence zero clearing that is reset causes signal A1 output 1, signal B1 output 0 thus, promptly coil CoreA and transfer attitude fully to state, and dish CoreB transfers main attitude to by stand-by state by main.The 6th kind of situation, dish CoreA, CoreB are simultaneously on the throne, extract the dish CoreA that is in main attitude, and its result is promptly coiled CoreB by the standby state of using of leading that transfers to as second kind of situation.
Should be noted that all any improved methods that does not break away from inventive concept all belong to protection scope of the present invention, the concrete protection range of the present invention is defined by the claims.
Claims (2)
1. main and standby master-control panel reverse method in the double star-type system comprises:
Set complex programmable logic device (CPLD) on main control unit CoreA, CoreB, the CPLD logical circuit that is used to switch control on each main control unit is made up of d type flip flop, data selector MUX and NAND gate, and two main control unit CoreA are identical with the CoreB hardware configuration; CoreA is an example with dish, the signal B1 on the throne of this dish is transferred to the input D end of d type flip flop and the input of data selector MUX, the output Q end of d type flip flop is transferred to another input of data selector MUX, the groove position signal CTRLA of this dish is transferred to the control end of data selector MUX, control MUX selects one of them to export to an input of NAND gate from the two-way input end signal, another input of this NAND gate has been transfused to the signal B2 on the throne from other main control unit Core B, and NAND gate is carried out the activestandby state signal that output signal after the computing is this dish CoreA with two input end signals; The structure of dish CoreB is identical with dish CoreA;
The signal that adopts is as follows:
Signal A1 is the signal of the active/standby state of representative main control unit CoreA, and signal A2 is a representative main control unit CoreA signal on the throne, and signal B1 is the signal of the active/standby state of representative main control unit CoreB, and signal B2 is a representative main control unit CoreB signal on the throne; Signal A1, A2 output to the signal of another main control unit CoreB for main control unit CoreA; Signal B1, B2 output to the signal of main control unit CoreA for main control unit CoreB; Signal A2, B2 wherein offers the status signal that another main control unit reads by a main control unit;
Signal A1 or B1 by on when moving high level to, its signal logic value is 0, represents that respectively main control unit CoreA or main control unit CoreB are in the main state of using; Otherwise when signal A1 or B1 dropped to low level, its signal logic value was 1, represented that respectively main control unit CoreA or main control unit CoreB are in stand-by state; Signal A2, B2 are the upward output of CPLD internal register of dish separately, described signal A2, B2 are in high level, then its signal logic value is 0, represent this dish not on the throne, otherwise signal A2, B2 are in low level, its signal logic value is 1, represents this dish on the throne, and the default logic value of signal A2, B2 two signals is 0; After being positioned at main control unit CoreA, CoreB on the slot separately and powering on, application program of operation is changed to 1 with the logical value of signal A2 on the throne, B2 automatically on it, to show all on the throne and operate as normal of two dishes, can participate in switching;
First kind of situation, when only there being main control unit CoreA dish to insert the respective grooves position, and when not having another dish CoreB, after the device power, signal B1 is 1, signal A2 is 1, so signal A1 is output as 0, this dish CoreA is in the state of using of leading;
Second kind of situation, when only there being main control unit CoreB to insert the respective grooves position, and when not having another dish CoreA, after the device power, signal A1 is 1, signal B2 is 1, so signal B1 is output as 0, dish CoreB is in the main state of using;
The third situation, main control unit CoreA, CoreB dish all inserts groove position separately; CoreA powers on earlier as fruit tray, and the result is as first kind of situation, promptly coils CoreA and is in and mainly coils CoreB with state and be in stand-by state; CoreB powers on earlier as fruit tray, and the result is as second kind of situation, promptly coils CoreA and is in stand-by state and coils CoreB and be in the main state of using; If two dish CoreA, CoreB power on simultaneously, not before signalization A2, the B2 logical value, signal A2, B2 are default value 0, the equal output logic value 1 of this twinkling signal A1, B1 in application program; The groove position signal CTRLB control data selector MUX of dish CoreB is with the d type flip flop bypass, the value of the signal B1 that dish CoreB upward exports depends on the value of the signal A1 that another input of MUX is introduced, in application program with signal A2, B2 after the equal set logic value 1, NAND gate on the dish CoreA is because the logical value that two inputs are introduced all is 1, then signal A1 is set to 0 earlier, be that main control unit CoreA is in main attitude, and another main control unit CoreB still is in attitude fully;
The 4th kind of situation, when two main control unit CoreA, CoreB dish was simultaneously on the throne, webmaster was assigned the Forced Switch order, and it is main when use state forcing to be provided with dish CoreA when webmaster, and application program only need be changed to 0 with signal B2 according to instruction; Otherwise webmaster is forced to be provided with dish CoreB and is led when using state, and application program is changed to 0 with signal A2;
The 5th kind of situation, dish CoreA, CoreB are simultaneously on the throne, reset to being in main dish CoreA with state, the CPLD circuit when resetting with signal zero clearing on the throne, the zero clearing that is reset of the register of signal A2 correspondence causes signal A1 output 1, signal B1 output 0, dish CoreA transfers attitude fully by main to state, and dish CoreB transfers main attitude to by stand-by state;
The 6th kind of situation, dish CoreA, CoreB are simultaneously on the throne, extract the dish CoreA that is in main attitude, and its result is promptly coiled CoreB by the standby state of using of leading that transfers to as second kind of situation.
2. method according to claim 1, it is characterized in that: under the third situation, groove position signal CTRLA, CTRLB offer the groove position signal of main control unit CoreA and main control unit CoreB by backboard by socket terminals, and this signal is used for controlling respectively the output of data selector MUX on the main control unit separately; The groove position signal CTRLA that A groove position provides controls the Q end output signal of the data selector MUX output d type flip flop of the main control unit CoreA on this groove position, the groove position signal CTRLB that B groove position provides controls the data selector MUX of the main control unit CoreB on this groove position with the d type flip flop bypass, after equipment is initially powered on, main control unit CoreA is in the master and uses state, and main control unit CoreB is in stand-by state.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2008101036630A CN101252372B (en) | 2008-04-10 | 2008-04-10 | Method for switching main and standby master-control panel in double star-type system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2008101036630A CN101252372B (en) | 2008-04-10 | 2008-04-10 | Method for switching main and standby master-control panel in double star-type system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101252372A CN101252372A (en) | 2008-08-27 |
| CN101252372B true CN101252372B (en) | 2011-05-04 |
Family
ID=39955573
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2008101036630A Expired - Fee Related CN101252372B (en) | 2008-04-10 | 2008-04-10 | Method for switching main and standby master-control panel in double star-type system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101252372B (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109101372A (en) * | 2018-08-03 | 2018-12-28 | 广州广哈通信股份有限公司 | Redundancy switching method, storage medium and the Shelf Management Module of Shelf Management Module |
| CN111338992A (en) * | 2020-02-25 | 2020-06-26 | 邦彦技术股份有限公司 | VPX machine frame board card management method and device based on FPGA |
| CN112486062B (en) * | 2020-11-23 | 2021-10-15 | 西安航天动力试验技术研究所 | Rocket engine test dual-machine real-time control system and switching method |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1536772A (en) * | 2003-04-08 | 2004-10-13 | 中兴通讯股份有限公司 | Main and standby boards inverter device and its inversion method |
| CN1601991A (en) * | 2003-09-22 | 2005-03-30 | 中兴通讯股份有限公司 | Device and method of processing main spared inversion of synchronous system |
-
2008
- 2008-04-10 CN CN2008101036630A patent/CN101252372B/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1536772A (en) * | 2003-04-08 | 2004-10-13 | 中兴通讯股份有限公司 | Main and standby boards inverter device and its inversion method |
| CN1601991A (en) * | 2003-09-22 | 2005-03-30 | 中兴通讯股份有限公司 | Device and method of processing main spared inversion of synchronous system |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101252372A (en) | 2008-08-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102387084B (en) | System structure based on Rapid IO (Input Output) protocol packet exchange | |
| CN105335327A (en) | Reconfigurable/dual redundancy VPX3U signal processing carrier board based on Soc | |
| CN110275680B (en) | Double-control double-active storage system | |
| US20180181536A1 (en) | Cpu interconnect apparatus and system, and cpu interconnect control method and control apparatus | |
| CN100478935C (en) | PCIE channel expansion device, system and its collocation method | |
| CN101252372B (en) | Method for switching main and standby master-control panel in double star-type system | |
| US7085861B2 (en) | Serial ATA control circuit for automatically switching connection path | |
| CN102103471B (en) | Data transmission method and system | |
| CN105005545A (en) | Line card serial port switching device and line card serial port switching method | |
| CN100372253C (en) | Switching method and device for service port in double master control system | |
| CN105763488B (en) | Data center aggregation core switch and backboard thereof | |
| CN113626359A (en) | Signal switching device and method for flash memory chip of server | |
| CN100586101C (en) | Switching between layer 2 switches as destination | |
| CN108800482B (en) | Air conditioner cluster control method | |
| CN110554881A (en) | Switching chip working mode remote switching system and method based on CPLD | |
| CN110062303A (en) | Adaptive high capacity of switch optical communication equipment framework based on mesh network | |
| CN107181702B (en) | Device for realizing RapidIO and Ethernet fusion exchange | |
| CN103472746B (en) | The redundancy control method of dual master control equipment and dual master control equipment | |
| CN102231700A (en) | Exchange card switching information transmission method and exchange card hot backup system | |
| CN112636932B (en) | Dynamic adjustment method and system for equipment power consumption | |
| CN101958797A (en) | Ethernet power supply system and operating method | |
| CN108933687A (en) | A kind of power consumption control method and device | |
| CN203733107U (en) | Quick active/standby shifting device in active-standby system | |
| CN102355370B (en) | Method for Ethernet board-level protection, device and system | |
| CN112463670A (en) | Storage controller access method and related device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110504 Termination date: 20210410 |