CN101247128A - Pulse-width modulation type optical fiber communication coding/decoding method and circuit with synchronous clock - Google Patents
Pulse-width modulation type optical fiber communication coding/decoding method and circuit with synchronous clock Download PDFInfo
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Abstract
The present invention relates to a pulse width modulating optical fiber communication encoding/decoding method with a synchronous clock and the circuit thereof, and the invention belongs to the technique field of the optical fiber communication. The method has the following key points: (a) the period of each code element is T. Each period is equally an impulse from zero level to high level, and the ending of each code element is equally zero level. The pulse width of code ''0'' is T0 and the pulse width of code ''1'' is T1, and T0<T1<T; (b) the receiving end detects the ascending edge of the starting of each code element to obtain the bit aligning information, and obtains the code value by detecting the width of high-level impulse in each code element. The encoding and decoding circuit of the invention is simple and reliable, and the realization is easy and convenient. The invention is especially suitable for various series-formed optical fiber communication transmissions in the industrial control.
Description
Technical field
The present invention relates to optical fiber communication, particularly relate to a kind of industrial controlling optical fiber communication sign indicating number type method and coding/decoding circuit.
Background technology
Optical fiber and digital communication has advantages such as capacity is big, loss is low, antijamming capability is strong, has obtained in recent years developing rapidly, is widely used in systems such as telecommunications, electric power, railway, mining industry.
In digital communication system, signal can adopt different sign indicating number types to transmit.And in optical fiber digital communication syst, because light can only be represented binary signal with this dual mode of switching, therefore, numerous bipolar codes, multilevel code all can not be suitable for.The basic circuit sign indicating number that optical fiber and digital communication is used must be a unipolar code.
From the signal of derived digital signal unipolarity nonreturn to zero code (NRZ) normally, be characterized in that represent data " 1 ", " 0 " respectively with high level and low level (normally zero level), its level remains unchanged in the code-element period.Shown in (a) in the accompanying drawing 1.Adopt the signal of this coded format transmission to be easy to most handle.But also there are some shortcomings in the signal of unipolarity nonreturn to zero code.For example, do not contain clock information in this coding, can not directly extract synchronizing signal, therefore, when having long continuous " 1 " or continuous " 0 " signal segment in the data flow, will cause the minimizing of timing information, make the clock recovery of receiving terminal become difficult.
In order to address the above problem, usually unipolarity nonreturn to zero code signal is carried out certain processing, convert other form to and transmit again.Unipolarity NRZ (RZ) is a kind of sign indicating number type form commonly used, is characterized in, adopts a width to represent " 1 " sign indicating number less than the return-to-zero pulse of element duration, the time does not send pulse and transmit " 0 " sign indicating number.Shown in (b) in the accompanying drawing 1.Compare with the unipolarity nonreturn to zero code, its pulse duration narrows down, and is not having the termination to a code element just not get back to null value constantly.The advantage of this coding is to comprise clock information in the data flow that sends, and receiving terminal can therefrom extract synchronizing signal.
Because there is not pulse in " 0 " signal of above-mentioned unipolarity NRZ, so receiver side can not carry out the judgement of the synchronous and data of position by the method for direct detection pulse.And the method for the extraction synchronizing signal that adopts usually as circuit complexity such as filter method, phase locking techniques, realizes that difficulty is big.
In addition, sign indicating number type commonly used in the optical fiber communication also has Manchester's code, mBnB sign indicating number etc., all comprises clock signal in their information, but their transmission rate also is increased to k (1＜k≤2) times of the preceding nonreturn to zero code speed of coding.And the k value hour, its coding-decoding circuit more complicated.
Asynchronous communication then need not be in the frequency and the phase place of receiving terminal detection signal clock, and the clock of its sending and receiving is separately independently, and the frequency of clock and phase place do not require in full accord, allow to exist certain error.Receiving terminal in asynchronous communication, an independently clock is arranged usually, and the N of the pulse frequency bit data frequency of its generation doubly detects line status with this independent clock, be that receiver carries out the N/2 counting to detecting pulse, detect the level of received signal in the full moment of each counting.Like this, the speed of asynchronous communication just is subjected to certain restriction.
Summary of the invention
The objective of the invention is to propose a kind of code element and carry the optical fiber communication code method of synchronizing signal and easy coding/decoding circuit.
A kind of pulse-width modulation type optical fiber communication coding/decoding method with synchronised clock is characterized in that may further comprise the steps:
(a), coding method: the cycle of each code element is T, is a pulse from the zero level to the high level, and the end of each code element is zero level, and the pulse duration of sign indicating number " 0 " is T
0, the width of sign indicating number " 1 " is T
1, and T
0＜T
1＜T;
(b), coding/decoding method: receiving terminal to obtain bit synchronization information, obtains code value by the width that detects high level pulse in each code element by detecting the rising edge that each code element begins.
A kind of detailed process that realizes said method:
(a), described coding method detailed process is as follows: the parallel data that information source is sent is converted to serial data through parallel serial conversion unit, promptly obtained one group of unipolarity nonreturn to zero code, input comparator again, the triangular wave that sends with the triangular wave generating unit carries out the comparison of level; When the parallel serial conversion unit output low level was logical zero, comparator output width was T
0Burst pulse; When parallel serial conversion unit output high level was logical one, comparator output width was T
1Broad pulse; When the parallel serial conversion unit data transaction finishes, clock trigger element output low level, output unit is blocked no level output;
(b), described coding/decoding method detailed process is as follows: the time-delay trigger element detects the rising edge of received signal, after detecting rising edge, postpones regular hour τ, sends the input end of clock of a skip signal to string and converting unit, wherein T
0＜τ＜T
1, string and converting unit are under the control of this skip signal, and the pulse signal that its data input pin reads in immediately and delays time the trigger element signal input part and connect is because the delay time T of time-delay trigger element is designed to greater than T
0And less than T
1If at this moment pulse signal is a broad pulse, because T
1＞τ, thus be still high level through signal input part after the delay time T, if at this moment pulse signal is a burst pulse, because T
0＜τ becomes low level through signal input part after the delay time T, finishes the position decoding of " 1 " or " 0 " thus; The skip signal of time-delay trigger element also is input to the input of counting unit simultaneously, when the count value to the data code element expires a frame, the control data latch units latchs the parallel data that reception converts, thereby finishes the decoding and the parallel conversion of a frame serial data.
A kind of coding/decoding circuit of realizing the pulse-width modulation type optical fiber communication coding/decoding method of above-mentioned synchronised clock is characterized in that by forming with lower unit:
(a), coding circuit: the output of information source links to each other with the input of parallel serial conversion unit, the output of parallel serial conversion unit links to each other with the input of comparator, triangular wave generating unit output links to each other with the backward end of comparator, and comparator output terminal links to each other with the input of output unit; The input end of clock of parallel serial conversion unit and triangular wave generating unit all links to each other with same clock unit, so that the triangle wave frequency equates with the frequency of nonreturn to zero code signal.Above-mentioned clock unit also links to each other with the input of a clock trigger element simultaneously, the output of clock trigger element is connected with described triple gate output unit Enable Pin, during DTD, clock trigger element output low level, triple gate output unit Enable Pin is sealed, the isolated data output is avoided the luminous tube Chang Liang of back optical fiber transmitting terminal.
(b), decoding circuit: the serial signal that receiving terminal receives is divided into two-way, and one the tunnel links to each other with the string and the input of converting unit, and another road links to each other with the input of the trigger element of delaying time; The output of time-delay trigger element also is divided into two-way, and one the tunnel directly links to each other with the input end of clock of string and converting unit, and another road links to each other with counting unit; The output of counting unit links to each other with the Enable Pin of data latch unit; The output of string and converting unit connects the input of data latch unit.
Adopt the signal of this sign indicating number type to comprise synchronised clock information, each code element begins by a direct impulse, to have expressed position information be " 0 " or " 1 " to the pulse duration of signal in synchronizing cycle, promptly the signal of two kinds of duty ratios is represented " 0 " and " 1 " respectively, synchronised clock information need not increase transfer rate, the Code And Decode circuit is simple and reliable, realizes easy and conveniently, is particularly suitable for the fiber-optic communications traffic of all kinds of serial patterns in the Industry Control.
Description of drawings
Fig. 1 is the schematic diagram of several digital communication sign indicating number types, and wherein (a) is unipolarity nonreturn to zero code (NRZ), (b) is unipolarity NRZ (RZ), (c) the sign indicating number type that proposes for the present invention.
Fig. 2 is the data sampling sequential schematic diagram of sign indicating number type of the present invention.
Fig. 3 is the schematic diagram of transmitting terminal coding circuit embodiment.
Fig. 4 is the schematic diagram of receiving terminal decoding circuit embodiment.
The number in the figure title: 301 is the information source unit, and 302 is parallel serial conversion unit, and 303 is the triangular wave generating unit, 304 is clock unit, 305 is comparator unit, and 306 is the triple gate output unit, and 307 is the clock trigger element, R1 and R2 are that reference potential is provided with resistance, R3 is the logic level input resistance, and 401 are string and converting unit, and 402 for postponing trigger element, 403 is counting unit, and 404 is data latch unit.
Embodiment
Optical fiber communication sign indicating number type proposed by the invention, utilize the difference of pulse duration to represent respectively " 0 " and " 1 ".Shown in (c) in the accompanying drawing 1.Concrete execution mode is:
The cycle of each code element is T, begin to be one from zero level to the positive level pulse, the sign indicating number " 0 " pulse width T
0Narrow, and the width T of sign indicating number " 1 "
1Wide; The end of each code element is zero level.
Compare with common unipolarity NRZ, all there are direct impulse in " 1 " sign indicating number of this sign indicating number type and the beginning of " 0 " sign indicating number.Because the beginning of each code element all has the rising edge of a level, therefore, receiving terminal only needs just can obtain bit synchronization information by detecting this rising edge.As shown in Figure 2, after detecting rising edge, the time-delay regular time τ judgement of taking a sample to received signal can accurately be read the data message in encoding.
Sign indicating number type proposed by the invention can be obtained by simple conversion by common unipolarity nonreturn to zero code, and coding circuit is easy.Describe below in conjunction with embodiment.
Among the embodiment, delivery section adopts the unipolarity nonreturn to zero code of information source and triangular wave is intersected the method for cutting, and promptly both are input to the positive inverting input of a comparator respectively, carry out the comparison of level, and output promptly obtains the coded format of needs.As shown in Figure 3, the parallel data that information source 301 is sent is converted to serial data through parallel serial conversion unit 302, has promptly obtained one group of unipolarity nonreturn to zero code.Nonreturn to zero code is input comparator 305 again, and the triangular wave that sends with triangular wave generating unit 303 carries out the comparison of level.The in-phase input end of comparator 305 presets the initial reference current potential by R1, R2, when parallel serial conversion unit 302 output low levels are logical zero, by R3 reference potential is dragged down comparator 305 output burst pulses; When parallel serial conversion unit 302 output high level are logical one, reference potential is raised comparator 305 output broad pulses by R3.When parallel serial conversion unit 302 data transaction finish, clock trigger element 307 output low levels, triple gate output unit 306 Enable Pins are sealed, and isolate data output end when making DTD, avoid the luminous tube Chang Liang of back optical fiber transmitting terminal.Parallel serial conversion unit 302, triangular wave generating unit 303, clock trigger element 307 all use the clock signal of same clock unit 304, and the triangle wave frequency equates with the frequency of nonreturn to zero code signal is strict.Compare with the triangular wave of the other end by " 0 " or " 1 " that is input to comparator 305 1 ends, just can obtain required signal, i.e. the signal of two kinds of duty ratios with two kinds of pulse durations.Whole decoding circuit is simple and reliable, can be made up of conventional general-purpose chip, can select monostable flipflop for use as clock trigger element 307.
Sign indicating number type proposed by the invention, because each code element begins by a direct impulse, therefore, it is also easier to decode, and can save circuit such as filter, phase-locked loop, adopts the digit chip of minority to realize.In addition, compare, can save N doubly to the independent clock of signal transmission rate with the receiving terminal of asynchronous communication.Describe in conjunction with the embodiments below.
Among the embodiment, receiving terminal adopts time-delay trigger element 402 to detect clock information, promptly detects the rising edge of received signal.After time-delay trigger element 402 detects rising edge, postpone regular hour τ, send the input end of clock of a skip signal to string and converting unit 401.This skip signal is actual to be exactly the clock information of accepting data bit.String and converting unit 401 are under the control of this skip signal, and the pulse signal that its data input pin reads in immediately and delays time trigger element 402 signal input parts and connect is because be designed to T the time of delay of time-delay trigger element 402
0＜τ＜T
1, at this moment if broad pulse, T
1＞τ is still high level through signal input part after the delay time T, at this moment if burst pulse, and T
0＜τ becomes low level through signal input part after the delay time T, finishes the position decoding of " 1 " or " 0 " thus.The skip signal of time-delay trigger element 402 also is input to the input of counting unit 403 simultaneously, when the count value to the data code element expires a frame, control data latch units 404 latchs the parallel data that reception converts, thereby finishes the decoding and the parallel conversion of a frame serial data.This coding/decoding method can 8 of byte, 16 of individual characters, 32 of double words or multiword 8N position are a frame job.This shows that receiving terminal only uses a spot of integrated chip, for example delayed-trigger 402 can adopt monostable flipflop, satisfies delay time T by the value of choosing its external capacitance-resistance.
Claims (3)
1. pulse-width modulation type optical fiber communication coding/decoding method with synchronised clock is characterized in that may further comprise the steps:
(a), coding method: the cycle of each code element is T, is a pulse from the zero level to the high level, and the end of each code element is zero level, and the pulse duration of sign indicating number " 0 " is T
0, the width of sign indicating number " 1 " is T
1, and T
0＜T
1＜T;
(b), coding/decoding method: receiving terminal to obtain bit synchronization information, obtains code value by the width that detects high level pulse in each code element by detecting the rising edge that each code element begins.
2. the pulse-width modulation type optical fiber communication coding/decoding method of band synchronised clock according to claim 1 is characterized in that:
(a), described coding method detailed process is as follows: the parallel data that information source (301) is sent is converted to serial data through parallel serial conversion unit (302), promptly obtained one group of unipolarity nonreturn to zero code, input comparator (305) again, the triangular wave that sends with triangular wave generating unit (303) carries out the comparison of level; When parallel serial conversion unit (302) when output low level is logical zero, comparator (305) output width is T
0Burst pulse; When parallel serial conversion unit (302) output high level was logical one, comparator (305) output width was T
1Broad pulse; When parallel serial conversion unit (302) data transaction finished, clock trigger element (307) output low level made triple gate output unit (306) be blocked no level output;
(b), described coding/decoding method detailed process is as follows: time-delay trigger element (402) detects the rising edge of received signal, after detecting rising edge, postpones regular hour τ, sends the input end of clock of a skip signal to string and converting unit (401), wherein T
0＜τ＜T
1, string and converting unit (401) are under the control of this skip signal, and its data input pin reads in and the trigger element of delaying time (402) signal input part and the pulse signal that connects immediately, because the delay time T of time-delay trigger element (402) is designed to greater than T
0And less than T
1If at this moment pulse signal is a broad pulse, because T
1＞τ, thus be still high level through signal input part after the delay time T, if at this moment pulse signal is a burst pulse, because T
0＜τ becomes low level through signal input part after the delay time T, finishes the position decoding of " 1 " or " 0 " thus; The skip signal of time-delay trigger element (402) also is input to the input of counting unit (403) simultaneously, when the count value to the data code element expires a frame, control data latch units (404) latchs the parallel data that reception converts, thereby finishes the decoding and the parallel conversion of a frame serial data.
3. coding/decoding circuit of realizing the pulse-width modulation type optical fiber communication coding/decoding method of the described synchronised clock of claim 2 is characterized in that by forming with lower unit:
(a), coding circuit: the output of information source (301) links to each other with the input of parallel serial conversion unit (302), the output of parallel serial conversion unit (302) links to each other with the input of comparator (305), triangular wave generating unit (303) output links to each other with the backward end of comparator (305), and comparator (305) output links to each other with the input of triple gate output unit (306); The input end of clock of parallel serial conversion unit (302) and triangular wave generating unit (303) all links to each other with same clock unit (304), so that the triangle wave frequency equates with the frequency of nonreturn to zero code signal; Described clock unit (304) also links to each other with the input of clock trigger element (307) simultaneously, and the output of clock trigger element (307) is connected with described triple gate output unit (306) Enable Pin;
(b), decoding circuit: the serial signal that receiving terminal receives is divided into two-way, and one the tunnel links to each other with the string and the input of converting unit (401), and another road links to each other with the input of the trigger element (402) of delaying time; The output of time-delay trigger element (402) also is divided into two-way, and one the tunnel directly links to each other with the input end of clock of string and converting unit (401), and another road links to each other with counting unit (403); The output of counting unit (403) links to each other with the Enable Pin of data latch unit (404); The output of string and converting unit (401) connects the input of data latch unit (404).
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