CN101237226A - Oscillator - Google Patents

Oscillator Download PDF

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Publication number
CN101237226A
CN101237226A CNA2008100579061A CN200810057906A CN101237226A CN 101237226 A CN101237226 A CN 101237226A CN A2008100579061 A CNA2008100579061 A CN A2008100579061A CN 200810057906 A CN200810057906 A CN 200810057906A CN 101237226 A CN101237226 A CN 101237226A
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China
Prior art keywords
pipe
reference voltage
circuit
voltage
generating circuit
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CNA2008100579061A
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CN100557973C (en
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张赛
刘奎伟
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Zhaoyi Innovation Technology Group Co ltd
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Beijing Xinji Jiayi Microelectronic Science & Tech Co Ltd
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Abstract

The invention discloses an oscillator; the frequency of an output signal of the oscillator can be adjusted along with the temperature; the oscillator comprises a reference voltage generating circuit, a reference current generating circuit and an oscillating signal generating circuit; the reference voltage generating circuit is connected between a power voltage and the ground and outputs a first reference voltage, a second reference voltage and a third reference voltage; the first reference voltage is greater than the second and the third reference voltages; the reference current generating circuit is connected with the reference voltage generating circuit and generates a reference current in direct proportion to an absolute temperature under the effect of the first and the third reference voltages; the oscillating signal generating circuit is connected with the reference voltage generating circuit and the reference current generating circuit and generates an oscillating signal under the effect of the reference current and the first and the second reference voltages. The oscillator of the invention uses no resistor in the whole circuit; the frequency of the output signal can be adjusted along with the change of the temperature.

Description

A kind of oscillator
Technical field
The present invention relates to a kind of oscillator, relate in particular to a kind of frequency with the adjustable oscillator of temperature.
Background technology
In present most Design of Digital System, clock is indispensable part, adopts external active or passive oscillation device that clock signal is provided usually.Providing the advantage of clock signal by external oscillator is stable performance, designs easyly, and shortcoming is to increase chip area.Requirement to wiring and processing when high frequency designs is relatively stricter, therefore adopts external oscillator that clock signal is provided, and can increase system cost and design difficulty undoubtedly.
Current increasing design is that oscillator is accomplished in the sheet, is fit to accomplish that the oscillator in the sheet generally has ring oscillator and RC oscillator.But these two kinds of oscillators not only frequency and power consumption are subjected to the influence of supply voltage and technology very big, and frequency is along with the rising meeting step-down of oscillator temperature.Resistance is as a kind of device commonly used, not only is subjected to the technogenic influence fluctuation very big, makes the oscillator frequency instability, and will use the big slightly resistance of volume, and chip area will strengthen, and has improved the cost of chip.
Not slack-off when the frequency that needs oscillator with variation of temperature, when especially needing frequency to raise with temperature, more than two kinds of oscillators just can't realize.
Summary of the invention
Technical problem to be solved by this invention is to be a kind of oscillator need be provided, and its output signal frequency is adjustable with temperature.
In order to solve the problems of the technologies described above, the present invention at first provides a kind of oscillator, comprising:
Generating circuit from reference voltage connects supply voltage and ground, exports first reference voltage, second reference voltage and the 3rd reference voltage, and described first reference voltage is greater than described second reference voltage and the 3rd reference voltage;
Reference current generating circuit links to each other with described generating circuit from reference voltage, under described first reference voltage and the 3rd reference voltage effect, produces the reference current that is proportional to absolute temperature;
Oscillator signal produces circuit, links to each other with reference current generating circuit with described generating circuit from reference voltage, under described reference current, first reference voltage and the second reference voltage effect, produces oscillator signal.
In the aforesaid oscillator, described generating circuit from reference voltage can comprise that tandem circuit and some grades of reference voltages provide circuit, wherein:
Described tandem circuit connects supply voltage and ground, output offset voltage;
Reference voltages at different levels provide circuit all to connect supply voltage and ground, and the reference voltage that raises step by step is provided under the effect of described bias voltage after the cascade successively, and adjacent two-stage reference voltage provides the voltage difference of circuit adjustable.
Further, described tandem circuit can comprise the P type MOSFET pipe P that drain electrode links to each other 0With N type MOSFET pipe N 0
P 0The source electrode of pipe connects supply voltage, and grid and drain electrode link together, and draws described bias voltage;
N 0The substrate ground connection of pipe, grid and source electrode offer the cascade that reference voltage provides circuit.
Further, reference voltages at different levels provide circuit all can comprise a power supply P type MOSFET pipe and the common grid N pipe formed of the N type MOSFET pipe that is connected of grid is right altogether by two, and the P type of powering MOSFET manages P kReference voltage provides in the unit under the pipe:
P kThe grid of pipe is first cascade point, connects P 0The grid of pipe;
P kThe source electrode of pipe is second cascade point, connects supply voltage;
Form the right N of the described pipe of grid N altogether K1Pipe and N K2Pipe, substrate link together and are third level connection point, ground connection;
N K1The drain electrode of pipe connects P kThe drain electrode of pipe;
N K2The drain electrode of pipe is reference voltage leading point and cascade leading point;
N K2The source electrode of pipe is a fourth stage connection point, and the 1st grade of reference voltage provides the fourth stage connection point of unit to meet N 0The source electrode of pipe, reference voltages at different levels backward provide the fourth stage connection point of circuit to connect the cascade leading point of previous stage.
Also further, described adjacent two-stage reference voltage provides the voltage difference of circuit, can provide N in the circuit by changing described reference voltage at different levels K1Pipe and N K2The ratio of the breadth length ratio of pipe is regulated.
In the aforesaid oscillator, the reference voltage that described generating circuit from reference voltage produces can be exported to described reference current generating circuit and oscillator signal and produce circuit further respectively by a filter capacitor.
Further, described filter capacitor can realize that the grid of MOSFET pipe is an end of described filter capacitor by the MOSFET pipe, and source electrode, drain electrode and substrate link together and be the other end of described filter capacitor.
In the aforesaid oscillator, reference current generating circuit can comprise current mirror.
In the aforesaid oscillator, described oscillator signal produces circuit can comprise sawtooth wave generating circuit and square wave generation circuit, wherein:
Sawtooth wave generating circuit links to each other with reference current generating circuit with described generating circuit from reference voltage, under described first reference voltage, reference current and supply voltage effect, produces sawtooth waveforms;
Square wave generation circuit links to each other with sawtooth wave generating circuit with described generating circuit from reference voltage, under the described second reference voltage effect, produces the square wave with described sawtooth waveforms same frequency.
Further, described sawtooth wave generating circuit can comprise current source, comparator, charging capacitor, N type MOSFET pipe MN1 and buffer, wherein:
Described reference current is input to the described current source that connects supply voltage, and described current source also connects the drain electrode of MN1 pipe; The source ground of MN1 pipe; Charging capacitor one end connects supply voltage, and the other end connects the drain electrode of MN1 pipe and the in-phase input end of described comparator simultaneously by tie point S; The inverting input of described comparator is imported described first reference voltage, and output connects the grid of MN1 pipe through described buffer;
MN1 closed when described comparator was output as low level, and described supply voltage charges to the S point by described charging capacitor under the reference current effect; When the S point voltage reached described first reference voltage, described comparator upset was output as high level, opens MN1, and it is zero that S point discharges into voltage rapidly, and described comparator overturns and is output as low level, closes MN1, formed a sawtooth waveforms and exported through the S point.
And described square wave generation circuit can comprise comparator and buffer, and the in-phase input end of described comparator inserts described sawtooth waveforms, and inverting input inserts described second reference voltage, and output connects described buffer; Under the described sawtooth waveforms and the second reference voltage effect, the output of described comparator produces the square wave with described sawtooth waveforms same frequency through described buffer.
Further, described charging capacitor can realize that the grid of MOSFET pipe is an end of described charging capacitor by the MOSFET pipe, and source electrode, drain electrode and substrate link together and be the other end of described charging capacitor.
The invention allows for a kind of generating circuit from reference voltage, comprise that tandem circuit and some grades of reference voltages provide circuit, wherein:
Described generating circuit from reference voltage comprises that tandem circuit and some grades of reference voltages provide circuit, wherein:
Described tandem circuit connects supply voltage and ground, output offset voltage;
Reference voltages at different levels provide circuit all to connect supply voltage and ground, and the reference voltage that raises step by step is provided under the effect of described bias voltage after the cascade successively, and adjacent two-stage reference voltage provides the voltage difference of circuit adjustable.
In the aforesaid generating circuit from reference voltage, described tandem circuit can comprise the P type MOSFET pipe P that drain electrode links to each other 0With N type MOSFET pipe N 0
P 0The source electrode of pipe connects supply voltage, and grid and drain electrode link together, and draws described bias voltage;
N 0The substrate ground connection of pipe, grid and source electrode offer the cascade that reference voltage provides circuit.
In the aforesaid generating circuit from reference voltage, reference voltages at different levels provide circuit all can comprise a power supply P type MOSFET pipe and the common grid N pipe formed of the N type MOSFET pipe that is connected of grid is right altogether by two, and the P type of powering MOSFET manages P kReference voltage provides in the unit under the pipe:
P kThe grid of pipe is first cascade point, connects P 0The grid of pipe;
P kThe source electrode of pipe is second cascade point, connects supply voltage;
Form the right N of the described pipe of grid N altogether K1Pipe and N K2Pipe, substrate link together and are third level connection point, ground connection;
N K1The drain electrode of pipe connects P kThe drain electrode of pipe;
N K2The drain electrode of pipe is reference voltage leading point and cascade leading point;
N K2The source electrode of pipe is a fourth stage connection point, and the 1st grade of reference voltage provides the fourth stage connection point of unit to meet N 0The source electrode of pipe, reference voltages at different levels backward provide the fourth stage connection point of circuit to connect the cascade leading point of previous stage.
Further, described adjacent two-stage reference voltage provides the voltage difference of circuit, can provide N in the circuit by changing described reference voltage at different levels K1Pipe and N K2The ratio of the breadth length ratio of pipe is regulated.
Further, described generating circuit from reference voltage may further include several filter capacitors, and described reference voltage is exported after described filter capacitor filtering.
Also further, described filter capacitor can realize that the grid of MOSFET pipe is an end of described filter capacitor by the MOSFET pipe, and source electrode, drain electrode and substrate link together and be the other end of described filter capacitor.
Compared with prior art, the present invention has the following advantages:
(1) low-power consumption, the whole electric currents on the whole oscillator have only several microamperes;
(2) area is little, has only tens transistors on the whole pierce circuit plate altogether;
(3) frequency of oscillator output signal is not subjected to the influence of supply voltage and technology;
(4) frequency of oscillator output signal can be followed variation of temperature and be regulated;
(5) entire circuit is not used resistance.
Description of drawings
Fig. 1 is the structural representation of oscillator embodiment of the present invention;
Fig. 2 is a generating circuit from reference voltage structural representation in the embodiment of the invention;
Fig. 3 is a reference current generating circuit structural representation in the embodiment of the invention;
Fig. 4 is a sawtooth wave generating circuit structural representation in the embodiment of the invention;
Fig. 5 is a square wave generation circuit structural representation in the embodiment of the invention.
Embodiment
Describe embodiments of the present invention in detail below with reference to drawings and Examples, how the application technology means solve technical problem to the present invention whereby, and the implementation procedure of reaching technique effect can fully understand and implements according to this.
Basic thought of the present invention is not use resistance in the oscillator, and PTAT (the proportional to absolute temperature that is directly proportional with absolute temperature of employing, being proportional to absolute temperature) electric current is as input current, realizes the output of oscillator signal by introducing reference voltage.The oscillator of Shi Xianing is not only low in energy consumption like this, area is little, and output frequency and supply voltage and technology are irrelevant, and the frequency of oscillator can be regulated along with variation of temperature.
Fig. 1 shows the structural representation of the embodiment of the invention, comprising:
Generating circuit from reference voltage 10 is used to produce three and supply voltage V DdIrrelevant reference voltage, the wherein first reference voltage V Ref1With the 3rd reference voltage V Ref3Supply with reference current generating circuit 20, the second reference voltage V Ref2Supplying party's wave generation circuit 40, the first reference voltage V Ref1Also supply with sawtooth wave generating circuit 30, wherein the first reference voltage V Ref1Greater than the 3rd reference voltage V Ref3
Reference current generating circuit 20 produces a reference current I RefSupply with sawtooth wave generating circuit 30, reference current I RefSize by the first reference voltage V Ref1With the 3rd reference voltage V Ref3Difference decision, reference current I RefBe the PTAT electric current.
Sawtooth wave generating circuit 30 is at the first reference voltage V Ref1With reference current I RefEffect produces sawtooth waveforms OUT1, and exports to square wave generation circuit 40 down;
Square wave generation circuit 40 is at the second reference voltage V of generating circuit from reference voltage 10 generations Ref2Under the effect, according to the sawtooth waveforms OUT1 of sawtooth wave generating circuit 30 outputs, the square wave of generation and sawtooth waveforms OUT1 same frequency is exported as clock signal clk.
Above-mentioned sawtooth wave generating circuit 30 and square wave generation circuit 40, the oscillator signal that is actually oscillator produces circuit, in the middle of the embodiment of the invention, is to be that 50% square wave describes of the present invention with output duty cycle.In the middle of other embodiment of the present invention, export the oscillator signal of other character if desired, according to basic thought of the present invention, on generating circuit from reference voltage 10 and reference current generating circuit 20 bases that the present invention proposes, can select for use in the prior art existing other oscillator signals to produce circuit fully and produce corresponding oscillator signal.
In conjunction with shown in Figure 2, three reference voltages that above-mentioned generating circuit from reference voltage 10 is produced, be linked into again in reference current generating circuit 20, sawtooth wave generating circuit 30 and the square wave generation circuit 40 after all respectively connecing a filter capacitor (not shown), play the effect of stationary filtering, filter capacitor is realized by MOSFET (mos field effect transistor), the grid of this MOSFET pipe is an end, and source electrode, drain electrode and substrate link together and be the other end.The MOSFET pipe is operated in degree of depth linear zone in this circuit, and power consumption is minimum.This circuit has only been used a small amount of MOSFET pipe in addition, and it is very little to take chip area.
As shown in Figure 2, generating circuit from reference voltage 10 provides circuits cascading on a tandem circuit by some grades of reference voltages.Tandem circuit wherein comprises a P type MOSFET pipe P 0With a N type MOSFET pipe N 0, P 0Pipe connects supply voltage V for diode connected mode (grid of MOSFET pipe connects together with drain electrode), source electrode Dd, and P 0The drain electrode of pipe and N 0The drain electrode of pipe links to each other, N 0The substrate of pipe meets V Ss(ground connection GND).P 0The grid of pipe and source electrode are used to provide bias voltage and circuit are provided for reference voltages at different levels.Need to prove in addition, as not specializing the connected mode of each MOSFET pipe substrate, represent that all the substrate of each MOSFET pipe links to each other with source electrode in this specification.
Each grade reference voltage of generating circuit from reference voltage 10 provides circuit, includes a power supply P type MOSFET pipe P k(k is the positive integer more than or equal to 1, is used for representing that certain one-level reference voltage provides the progression of circuit) and a common grid N pipe are right, and common grid N pipe wherein is referred to as N respectively to being the N type MOSFET pipe that two grids link together K1And N K2Fig. 2 shows altogether from the 1st to m common m level reference voltage circuit is provided, wherein m=n+1.M level reference voltage shown in the figure provides circuit except the 1st grade, and all the other are at different levels all to adopt same cascade system to be connected to the previous stage reference voltage provides on the circuit.Below narrate the 1st, 2 grade of reference voltage respectively the internal structure and the connected mode of circuit are provided, provide to clearly demonstrate reference voltages at different levels circuit is how to be cascaded on the tandem circuit, and how to produce three and supply voltage V DdIrrelevant reference voltage.
Illustrate that at first the 1st grade of reference voltage provides the internal structure and the connected mode of circuit.The 1st grade of reference voltage provides the P of the power supply P type MOSFET pipe in the circuit 1, its grid provides first cascade point of circuit to be connected to P as the 1st grade of reference voltage 0The grid of pipe, source electrode provides second cascade point of circuit to be connected to P as the 1st grade of reference voltage 0The source electrode of pipe, drain electrode are received the 1st grade of reference voltage provides the common grid N in the circuit to manage on the grid of two right N type MOSFET pipes.Grid N pipe is to comprising N type MOSFET pipe N altogether 11And N 12, N 11Pipe also connects with the diode connected mode, and N 11Pipe and N 12The substrate of pipe links together, and provides the third level connection point of circuit to connect V as the 1st grade of reference voltage Ss, N 11The source electrode of pipe connects N 12The drain electrode of pipe, N 12The drain electrode of pipe also connects the N in the tandem circuit 0The grid of pipe, N 12The source electrode of pipe provides the fourth stage connection point of circuit to be connected to N as the 1st grade of reference voltage 0The source electrode of pipe.N 12Provide the function that realizes resistance in the circuit at the 1st grade of reference voltage.N 12The drain electrode of pipe provides the cascade leading point of circuit for the 1st grade of reference voltage, also is the leading point of reference voltage simultaneously, provides from the 1st grade of reference voltage if desired and draws reference voltage the circuit, then from N 12The drain electrode of pipe also promptly is total to the right source-drain electrode joint of grid N pipe and draws.
Illustrate that then the 2nd grade of reference voltage provides the internal structure and the connected mode of circuit.The 2nd grade of reference voltage provides the P of the power supply P type MOSFET pipe in the circuit 2Grid provide first cascade point of circuit to be connected to P as the 2nd grade of reference voltage 0The grid of pipe, source electrode provides second cascade point of circuit to be connected to P as the 2nd grade of reference voltage 0The source electrode of pipe, drain electrode are connected to the 2nd grade of reference voltage provides two right N type MOSFET pipe N of the common grid N pipe in the circuit 21And N 22Grid on, N wherein 22Provide the function that realizes resistance in the circuit at the 2nd grade of reference voltage.N 21Pipe also connects with the diode connected mode, N 21Pipe and N 22The substrate of pipe links together, and provides the third level connection point of circuit to connect V as the 2nd grade of reference voltage Ss, N 21The source electrode of pipe connects N 22The drain electrode of pipe, N 22The source electrode of pipe provides the fourth stage connection point of circuit to be connected to N as the 2nd grade of reference voltage 12The drain electrode of pipe.N 22The drain electrode of pipe in other words altogether the right source-drain electrode joint of grid N pipe provide the cascade leading point of circuit for the 2nd grade of reference voltage, offering the 3rd level reference voltage provides the fourth stage connection point of circuit to finish cascade.Simultaneously, provide circuit to draw reference voltage from the 2nd grade of reference voltage if desired, then provide circuit to draw the right source-drain electrode joint of grid N pipe altogether from the 2nd grade of reference voltage.
Provide circuit from the 3rd level reference voltage, reference voltages at different levels backward provide the internal structure and the connected mode of circuit, and the internal structure and the connected mode of circuit can be provided with reference to the 2nd grade of reference voltage; Reference voltages at different levels backward provide circuit is how to be cascaded to the previous stage reference voltage to provide on the circuit, can provide circuit is how to be cascaded to the 1st grade of reference voltage to provide on the circuit with reference to the 2nd grade of reference voltage.The reference voltages at different levels backward that begin from 3rd level provide circuit, power supply P type MOSFET pipe P wherein kGrid provide first cascade point of circuit to be connected to P as this grade reference voltage 0The grid of pipe, source electrode provides second cascade point of circuit to be connected to P as this grade reference voltage 0The source electrode of pipe, the N of grid N pipe centering altogether K1Pipe and N K2The substrate of pipe links together, and provides the third level connection point of circuit to connect V as this grade reference voltage Ss, N K2The source electrode of pipe provides the fourth stage connection point of circuit to be connected to the previous stage reference voltage as this grade reference voltage circuit grid N pipe centering source-drain electrode joint altogether is provided.N K2The drain electrode of pipe in other words altogether the right source-drain electrode joint of grid N pipe provide the cascade leading point of circuit for this grade reference voltage, offering back one-level level reference voltage provides the fourth stage connection point of circuit to finish cascade.Simultaneously, provide circuit to draw reference voltage from certain one-level reference voltage if desired, then draw from the source-drain electrode joint of this grade.The reference voltages at different levels backward that begin from 3rd level provide circuit, its internal structure and connected mode, and how to be cascaded to the particular content that the previous stage reference voltage provides circuit, be not described in detail.
And then description references voltage generation circuit 10 is how three reference voltages are provided.Reference voltage provides since the 1st grade of reference voltage that circuit is equivalent step by step to raise, up to the m level for the highest.The rising amplitude of each step voltage is the same, because the 1st grade voltage is very low, can not use substantially in actual applications.Three reference voltages all are to draw from grid N pipe centering source-drain electrode joint altogether, if also promptly draw in these three reference voltages one of them in the m level, that is exactly at N M1The source electrode of pipe and N M2Draw the drain electrode junction of pipe.Difference is that the reference voltage of drawing three reference voltages provides in the circuit, draws the first reference voltage V Ref1Reference voltage provide circuit progression for the highest, draw the second reference voltage V Ref2With the 3rd reference voltage V Ref3Reference voltage provide the progression of circuit to be less than to draw the first reference voltage V Ref1Reference voltage circuit progression is provided, also promptly to guarantee V Ref2And V Ref3Less than V Ref1
It is equivalent that adjacent two-stage reference voltage provides the voltage difference between the circuit, is assumed to be Δ V, if V Ref1With V Ref3Between differ n level reference voltage circuit be provided, so:
V ref 1 - V ref 3 = nΔV = n ( kT q ln ( 1 + S 1 S 2 ) ) (formula 1)
Wherein:
K is a Boltzmann constant;
Q is the quantity of electric charge of an electronics;
T is an absolute temperature;
S 1Be above-mentioned N K1The breadth length ratio of pipe:
S 2Be above-mentioned N K2The breadth length ratio of pipe.
Wherein, each is to being total to grid N pipe centering, the ratio S of two N type MOSFET pipe breadth length ratios 1/ S 2 All equate.By formula 1 as can be known, regulate S 1/ S 1, will change V Ref1With V Ref3Difference.
Generating circuit from reference voltage 10 adopts the voltage that begins from the linear district of the degree of depth, provide in the circuit altogether grid N pipe to this circuit boosted voltage size step by step by reference voltages at different levels, so oscillator of the present invention has the characteristics of super low-power consumption.
Fig. 3 shows reference current generating circuit schematic diagram of the present invention, typically can adopt the current-mirror structure that does not contain resistance, saves chip area.In the middle of other embodiment of the present invention, reference current generating circuit 20 also can replace by the circuit that other prior aries can realize.Supply voltage V among the figure DdThe P that connects a P type MOSFET pipe B2Source electrode, and the P of x P type MOSFET pipe B1<x:0〉source electrode, that x wherein represents is P B1And N A2Quantity, can select voluntarily according to concrete needs.P B1<x:0〉grid link to each other formation diode connected mode, and P with drain electrode B1<x:0〉grid also with P B2The grid of pipe links to each other.P B1<x:0〉drain electrode connect the N of a N type MOSFET pipe A1Drain electrode, N A1The grid of pipe inserts the first reference voltage V Ref1P B2The drain electrode of pipe connects the N of x N type MOSFET pipe A2<x:0〉drain electrode, N A2<x:0〉drain electrode also link to each other with grid, also constitute the diode connected mode, the 3rd reference voltage V Ref3From P B2The drain electrode of pipe inserts.Reference current I RefFrom N A1The drain electrode of pipe is drawn, N A1The source electrode of pipe and N A2<x:0〉source electrode all meet V Ss
Following formula is reference current I RefRelational expression with temperature:
I ref = μ n C ox W L * V 2 2 ( 1 - m ) 2 (formula 2)
Wherein:
μ nBe negative temperature coefficient, determine by technology;
C OxBe gate capacitance;
W/L is N A1The breadth length ratio of pipe;
V 2=V Ref1-V Ref3, be positive temperature coefficient;
M=1/ab, wherein a is N A2Breadth length ratio than last N A1The ratio of breadth length ratio, b is P B1Breadth length ratio than last P B2The ratio of breadth length ratio.
Can be drawn by formula 2, the temperature coefficient of reference current can be regulated, wherein negative temperature coefficient μ nCan regulate positive temperature coefficient V by technology 2Progression by reference voltage is regulated.Regulate the ratio S of two N types of grid N pipe centering MOSFET pipe breadth length ratio altogether 1/ S 2, just can regulate reference current I RefWith the relation of temperature, and strengthen ratio S 1/ S 2The speed that reference current is strengthened is faster along with the rising of temperature, otherwise temperature raises the reduction but reference current builds up speed (need to prove that reference current remains increasing, but speed can slow down).Reference current I RefVariation can directly cause the variation of the sawtooth waveforms frequency that sawtooth wave generating circuit 30 produces.
As shown in Figure 4, above-mentioned sawtooth wave generating circuit 30 comprises the first comparator cmp1 that is used to export sawtooth waveforms and is used to accept supply voltage V DdThe charging capacitor C1 of charging, the charging current of sawtooth wave generating circuit 30 is by reference current I RefDecision.Reference current I RefBe input to one and connect supply voltage V DdCurrent source, this current source connects the drain electrode of the N type MOSFET pipe MN1 of a discharge when being used for the voltage upset, the substrate of MN1 pipe and source ground.Charging capacitor C1 is realized that by MOSFET the method that is linked in the circuit also is that grid is an end, and source electrode, drain electrode and substrate link together and be the other end.Connect supply voltage V DdCharging capacitor C1, the other end is connected to the drain electrode of MN1 and the in-phase input end of the first comparator cmp1 simultaneously by tie point S.Supply voltage is input to the in-phase input end of the first comparator cmp1 behind charging capacitor C1, the inverting input of the first comparator cmp1 inserts the first reference voltage V that generating circuit from reference voltage 10 produces Ref1, the output of the first comparator cmp1 is input to the grid of MOSFET pipe MN1 through the first buffer buffer1.
Because comparator all is the low-power consumption components and parts, (slew rate) is slower for its conversion speed, in order to obtain the sawtooth waveforms of rule, by introducing the more sensitive buffer of change in voltage is remedied the slower defective of slew rate, also promptly as shown in the figure drive MN1 by the first buffer buffer1.
Below in conjunction with the course of work of sawtooth wave generating circuit 30, describe the operation principle of sawtooth wave generating circuit 30 in detail.If S point initial voltage is zero, the first comparator cmp1 is output as low level, and MN1 closes.Supply voltage V DdBy charging capacitor C1 the S point is charged, charging current is by reference current I RefDecision.The voltage of ordering as S reaches the first reference voltage V Ref1The time, first comparator cmp1 upset is output as high level, opens MN1, and it is zero making S point discharge into voltage rapidly, and the first comparator cmp1 overturns and is output as low level, thereby closes MN1, forms a sawtooth waveforms and exports through the S point.After the S point voltage is zero, once more by supply voltage V DdIt is charged, repeat above-mentioned charge and discharge process, form continuous sawtooth waveforms OUT1 output in view of the above.The peak value of sawtooth waveforms OUT1 is the first reference voltage V Ref1
Sawtooth wave period is by the first reference voltage V Ref1, charging capacitor C1 and reference current I RefValue decision.Concrete, by the electricity basic principle as can be known:
C=Q/U (formula 3)
Wherein:
C is the capacitance of charging capacitor C1;
Q is the electric charge that gathers on the charging capacitor C1;
U is the magnitude of voltage on the charging capacitor C1, is the first reference voltage V herein Ref1Value.
Because the charge Q of gathering on the charging capacitor C1 equals the product in charging current and charging interval, convolution 3 can get again:
T=C*U/I (formula 4)
Wherein:
T is the sawtooth wave period that sawtooth wave generating circuit 30 is produced;
I is described reference current I RefValue, be the PTAT current value herein.
Can be drawn by formula 4, along with the rising of temperature, the PTAT current value will increase, at the capacitance and the first reference voltage V of charging capacitor C1 Ref1Under the situation that value remains unchanged, the sawtooth period that is inversely proportional to the PTAT current value will diminish, so the frequency of oscillator of the present invention can be adjusted with variation of temperature.
Because charging capacitor C1 is realized by MOSFET, and the charging capacitor C1 and the first reference voltage V Ref1Value be not with technology and supply voltage V DdChange, add reference current I RefBe the PTAT electric current, so sawtooth is accelerated with the temperature rising wave period.
As shown in Figure 5, above-mentioned square wave generation circuit 40 comprises the second comparator cmp2 and the second buffer buffer2.The in-phase input end of the second comparator cmp2 inserts the sawtooth waveforms OUT1 of sawtooth wave generating circuit 30 outputs, and the inverting input of the second comparator cmp2 inserts the second reference voltage V that generating circuit from reference voltage 10 produces Ref2, the second reference voltage V Ref2Value be the first reference voltage V Ref1Half, this is that the duty ratio according to square wave is 50% to determine.If the waveform of output is other duty ratios, then, determine the second reference voltage V according to the concrete numerical value of duty ratio Ref2With the first reference voltage V Ref1Proportionate relationship.The second comparator cmp2 is at the sawtooth waveforms OUT1 and the second reference voltage V Ref2Effect under, the output and the square wave OUT2 of sawtooth waveforms OUT1 same frequency.Square wave OUT2 exports as clock signal clk through the effect of the second buffer buffer2.Introduce the reason of the second buffer buffer2, identical with the first buffer buffer1 role in the aforementioned sawtooth wave generating circuit 30, in order to drive follow-up circuit.
The present invention has realized a kind of frequency adjustable, with supply voltage and the irrelevant oscillator of technology, has reduced the quiescent current of oscillator, makes that the power consumption of oscillator is very little; Oscillator of the present invention does not comprise resistance only with tens MOSFET realizations simultaneously, makes wiring simple, and chip area is little.The present invention typically can be used as RAM circuit refresh clock generator and uses.The electric leakage meeting of random asccess memory is accelerated along with the rising of temperature, need refresh with higher frequency, the compensation charge loss, therefore oscillator of the present invention just can be used as RAM circuit refresh clock generator, the power consumption of oscillator of the present invention is little simultaneously, has reduced the quiescent current of random asccess memory.The number of transistors of oscillator of the present invention is few in addition, has reduced chip area.
Though the disclosed execution mode of the present invention as above, the execution mode that described content just adopts for the ease of understanding the present invention is not in order to limit the present invention.Technical staff in any the technical field of the invention; under the prerequisite that does not break away from the disclosed spirit and scope of the present invention; can do any modification and variation what implement in form and on the details; but scope of patent protection of the present invention still must be as the criterion with the scope that appending claims was defined.

Claims (18)

1, a kind of oscillator is characterized in that, comprising:
Generating circuit from reference voltage connects supply voltage and ground, exports first reference voltage, second reference voltage and the 3rd reference voltage, and described first reference voltage is greater than described second reference voltage and the 3rd reference voltage;
Reference current generating circuit links to each other with described generating circuit from reference voltage, under described first reference voltage and the 3rd reference voltage effect, produces the reference current that is proportional to absolute temperature;
Oscillator signal produces circuit, links to each other with reference current generating circuit with described generating circuit from reference voltage, under described reference current, first reference voltage and the second reference voltage effect, produces oscillator signal.
2, oscillator as claimed in claim 1 is characterized in that:
Described generating circuit from reference voltage comprises that tandem circuit and some grades of reference voltages provide circuit, wherein:
Described tandem circuit connects supply voltage and ground, output offset voltage;
Reference voltages at different levels provide circuit all to connect supply voltage and ground, and the reference voltage that raises step by step is provided under the effect of described bias voltage after the cascade successively, and adjacent two-stage reference voltage provides the voltage difference of circuit adjustable.
3, oscillator as claimed in claim 2 is characterized in that:
Described tandem circuit comprises the P type MOSFET pipe P that drain electrode links to each other 0With N type MOSFET pipe N 0
P 0The source electrode of pipe connects supply voltage, and grid and drain electrode link together, and draws described bias voltage;
N 0The substrate ground connection of pipe, grid and source electrode offer the cascade that reference voltage provides circuit.
4, oscillator as claimed in claim 3 is characterized in that:
Reference voltages at different levels provide circuit to include a power supply P type MOSFET pipe and the common grid N pipe formed of the N type MOSFET pipe that is connected of grid is right altogether by two, and the P type of powering MOSFET manages P kReference voltage provides in the unit under the pipe:
P kThe grid of pipe is first cascade point, connects P 0The grid of pipe;
P kThe source electrode of pipe is second cascade point, connects supply voltage;
Form the right N of the described pipe of grid N altogether K1Pipe and N K2Pipe, substrate link together and are third level connection point, ground connection;
N K1The drain electrode of pipe connects P kThe drain electrode of pipe;
N K2The drain electrode of pipe is reference voltage leading point and cascade leading point;
N K2The source electrode of pipe is a fourth stage connection point, and the 1st grade of reference voltage provides the fourth stage connection point of unit to meet N 0The source electrode of pipe, reference voltages at different levels backward provide the fourth stage connection point of circuit to connect the cascade leading point of previous stage.
5, oscillator as claimed in claim 4 is characterized in that:
Described adjacent two-stage reference voltage provides the voltage difference of circuit, provides N in the circuit by changing described reference voltage at different levels K1Pipe and N K2The ratio of the breadth length ratio of pipe is regulated.
6, oscillator as claimed in claim 1 is characterized in that:
The reference voltage that described generating circuit from reference voltage produces further respectively by a filter capacitor, is exported to described reference current generating circuit and oscillator signal and is produced circuit.
7, oscillator as claimed in claim 6 is characterized in that:
Described filter capacitor realizes that by the MOSFET pipe grid of MOSFET pipe is an end of described filter capacitor, and source electrode, drain electrode and substrate link together and be the other end of described filter capacitor.
8, oscillator as claimed in claim 1 is characterized in that:
Reference current generating circuit comprises current mirror.
9, oscillator as claimed in claim 1 is characterized in that:
Described oscillator signal produces circuit and comprises sawtooth wave generating circuit and square wave generation circuit, wherein:
Sawtooth wave generating circuit links to each other with reference current generating circuit with described generating circuit from reference voltage, under described first reference voltage, reference current and supply voltage effect, produces sawtooth waveforms;
Square wave generation circuit links to each other with sawtooth wave generating circuit with described generating circuit from reference voltage, under the described second reference voltage effect, produces the square wave with described sawtooth waveforms same frequency.
10, oscillator as claimed in claim 9 is characterized in that:
Described sawtooth wave generating circuit comprises current source, comparator, charging capacitor, N type MOSFET pipe MN1 and buffer, wherein:
Described reference current is input to the described current source that connects supply voltage, and described current source also connects the drain electrode of MN1 pipe; The source ground of MN1 pipe; Charging capacitor one end connects supply voltage, and the other end connects the drain electrode of MN1 pipe and the in-phase input end of described comparator simultaneously by tie point S; The inverting input of described comparator is imported described first reference voltage, and output connects the grid of MN1 pipe through described buffer;
MN1 closed when described comparator was output as low level, and described supply voltage charges to the S point by described charging capacitor under the reference current effect; When the S point voltage reached described first reference voltage, described comparator upset was output as high level, opens MN1, and it is zero that S point discharges into voltage rapidly, and described comparator overturns and is output as low level, closes MN1, formed a sawtooth waveforms and exported through the S point.
11, oscillator as claimed in claim 10 is characterized in that:
Described charging capacitor realizes that by the MOSFET pipe grid of MOSFET pipe is an end of described charging capacitor, and source electrode, drain electrode and substrate link together and be the other end of described charging capacitor.
12, oscillator as claimed in claim 9 is characterized in that:
Described square wave generation circuit comprises comparator and buffer, and the in-phase input end of described comparator inserts described sawtooth waveforms, and inverting input inserts described second reference voltage, and output connects described buffer; Under the described sawtooth waveforms and the second reference voltage effect, the output of described comparator produces the square wave with described sawtooth waveforms same frequency through described buffer.
13, a kind of generating circuit from reference voltage is characterized in that, comprises that tandem circuit and some grades of reference voltages provide circuit, wherein:
Described generating circuit from reference voltage comprises that tandem circuit and some grades of reference voltages provide circuit, wherein:
Described tandem circuit connects supply voltage and ground, output offset voltage;
Reference voltages at different levels provide circuit all to connect supply voltage and ground, and the reference voltage that raises step by step is provided under the effect of described bias voltage after the cascade successively, and adjacent two-stage reference voltage provides the voltage difference of circuit adjustable.
14, generating circuit from reference voltage as claimed in claim 13 is characterized in that:
Described tandem circuit comprises the P type MOSFET pipe P that drain electrode links to each other 0With N type MOSFET pipe N 0
P 0The source electrode of pipe connects supply voltage, and grid and drain electrode link together, and draws described bias voltage;
N 0The substrate ground connection of pipe, grid and source electrode offer the cascade that reference voltage provides circuit.
15, generating circuit from reference voltage as claimed in claim 13 is characterized in that:
Reference voltages at different levels provide circuit to include a power supply P type MOSFET pipe and the common grid N pipe formed of the N type MOSFET pipe that is connected of grid is right altogether by two, and the P type of powering MOSFET manages P kReference voltage provides in the unit under the pipe:
P kThe grid of pipe is first cascade point, connects P 0The grid of pipe;
P kThe source electrode of pipe is second cascade point, connects supply voltage;
Form the right N of the described pipe of grid N altogether K1Pipe and N K2Pipe, substrate link together and are third level connection point, ground connection;
N K1The drain electrode of pipe connects P kThe drain electrode of pipe;
N K2The drain electrode of pipe is reference voltage leading point and cascade leading point;
N K2The source electrode of pipe is a fourth stage connection point, and the 1st grade of source electrode that reference voltage provides the fourth stage connection point of unit to connect the N0 pipe, reference voltages at different levels backward provide the fourth stage connection point of circuit to connect the cascade leading point of previous stage.
16, generating circuit from reference voltage as claimed in claim 15 is characterized in that:
Described adjacent two-stage reference voltage provides the voltage difference of circuit, provides N in the circuit by changing described reference voltage at different levels K1Pipe and N K2The ratio of the breadth length ratio of pipe is regulated.
17, as the described generating circuit from reference voltage of each claim in the claim 13 to 16, it is characterized in that:
Described generating circuit from reference voltage further comprises several filter capacitors, and described reference voltage is exported after described filter capacitor filtering.
18, generating circuit from reference voltage as claimed in claim 17 is characterized in that:
Described filter capacitor realizes that by the MOSFET pipe grid of MOSFET pipe is an end of described filter capacitor, and source electrode, drain electrode and substrate link together and be the other end of described filter capacitor.
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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103026623A (en) * 2010-07-27 2013-04-03 飞思卡尔半导体公司 Latch circuit, flip-flop circuit and frequency divider
CN101833345B (en) * 2009-03-10 2013-07-10 承景科技股份有限公司 Bias circuit
CN104868878A (en) * 2015-05-21 2015-08-26 来安县新元机电设备设计有限公司 Signal generation circuit and signal generator
CN107659269A (en) * 2017-10-19 2018-02-02 无锡华润矽科微电子有限公司 low-power consumption oscillator circuit structure
CN107681994A (en) * 2017-09-23 2018-02-09 深圳大学 A kind of pierce circuit
CN110581688A (en) * 2018-06-08 2019-12-17 华邦电子股份有限公司 Oscillator circuit
CN111831041A (en) * 2019-04-15 2020-10-27 爱思开海力士有限公司 Voltage generator, semiconductor device using the same, and semiconductor system

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101833345B (en) * 2009-03-10 2013-07-10 承景科技股份有限公司 Bias circuit
CN103026623A (en) * 2010-07-27 2013-04-03 飞思卡尔半导体公司 Latch circuit, flip-flop circuit and frequency divider
CN103026623B (en) * 2010-07-27 2016-06-22 飞思卡尔半导体公司 Latch circuit, flip-flop circuit and frequency divider
CN104868878A (en) * 2015-05-21 2015-08-26 来安县新元机电设备设计有限公司 Signal generation circuit and signal generator
CN107681994A (en) * 2017-09-23 2018-02-09 深圳大学 A kind of pierce circuit
CN107681994B (en) * 2017-09-23 2020-11-17 深圳大学 Oscillator circuit
CN107659269A (en) * 2017-10-19 2018-02-02 无锡华润矽科微电子有限公司 low-power consumption oscillator circuit structure
CN110581688A (en) * 2018-06-08 2019-12-17 华邦电子股份有限公司 Oscillator circuit
CN110581688B (en) * 2018-06-08 2023-08-25 华邦电子股份有限公司 oscillator circuit
CN111831041A (en) * 2019-04-15 2020-10-27 爱思开海力士有限公司 Voltage generator, semiconductor device using the same, and semiconductor system
CN111831041B (en) * 2019-04-15 2022-07-05 爱思开海力士有限公司 Voltage generator, semiconductor device using the same, and semiconductor system

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