CN101233663A - Single chip microcontroller including battery management and protection - Google Patents
Single chip microcontroller including battery management and protection Download PDFInfo
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- CN101233663A CN101233663A CNA200680002538XA CN200680002538A CN101233663A CN 101233663 A CN101233663 A CN 101233663A CN A200680002538X A CNA200680002538X A CN A200680002538XA CN 200680002538 A CN200680002538 A CN 200680002538A CN 101233663 A CN101233663 A CN 101233663A
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Abstract
A microcontroller is disclosed. The microcontroller comprises a processor system and a high voltage interface coupled to the processor system and adapted to be coupled to a battery. The microcontroller further includes a battery management system for monitoring the battery and managing the battery based upon th monitoring of the battery. The microcontroller is a single chip. This one-chip solution saves design cost and PCB space in addition to broadening the functionality of the smar battery application. With the accuracy of the microcontroller, the charge status of the battery can be predicted more accurately and therefore effectively increases actual battery capacity.
Description
Technical field
Usually, the present invention relates to a kind of microcontroller, relate more specifically to a kind of single chip microcontroller that comprises battery management and protection system.
Background technology
Demand to the portable application such as notebook, mobile phone and digital camera increases day by day.These use miniaturization day by day, advanced and follow fiercer price competition.Do not have application element thereof can avoid these strong demands, requisite applied power source is that battery can not make an exception certainly.The development of battery capacity is lagging behind the requirement of application, and the control of chemical reaction will be deferred to strict safety requirements in the battery, this feasible restriction that is difficult to break through chemical technology.Expect that battery size is littler and price is lower except that using, this makes the date of battery manufacturer more sad.
Advanced battery, or intelligent battery contain a large amount of electronic components.This comprises guarantees that battery unit does not damage or do not jeopardize user's fail-safe circuit; Resolve battery condition and according to the function for monitoring and the logic of cell load estimation dump energy; And with the communicating by letter of main program.The realization that existing intelligent battery is used will be adopted at least two integrated circuits: the microcontroller and the AFE (analog front end) of guaranteeing battery protection and measurement that are used for battery management.In addition, some also needs dump energy estimation and the 3rd essential chip of other monitored parameter, promptly contains the EEPROM of the data that are exclusively used in battery chemistries.These solutions are with high costs and occupy board space.
Also have, the current capacity of rechargeable battery is lower usually.For the application of the high instantaneous energy of needs, this problem is overcome by adopting many battery series connection.This produces higher voltage, makes to have higher-energy under the reduced-current.Higher voltage is a problem for standard semiconductor, because these semiconductors can be tackled the voltage between 2～5 volts usually.Intelligent battery manufacturer solves this high pressure I/O problem by using the independent driver circuit.This has increased cost, weight and the complexity of system.
Therefore, need a kind of system and method that is used to overcome the problems referred to above.The present invention promptly is devoted to satisfy such needs.
Summary of the invention
A kind of single chip microcontroller is disclosed.Described single chip microcontroller comprises processor system and the high voltage interface that links to each other with this processor system, and this high voltage interface is fit to be connected with battery.Described single chip microcontroller also comprises the battery management system that is used to monitor described battery and manages battery based on battery monitoring.Described microcontroller is a single-chip.Except expanding functional that this intelligent battery uses, this single-chip solution has also been saved design cost and PCB space.The precision that relies on described microcontroller, thus the state of charge that can predict battery more accurately effectively increases the actual battery capacity.
Description of drawings
Fig. 1 is the block diagram according to the embodiment of microcontroller of the present invention.
Fig. 2 is the block diagram according to the embodiment of pressurizer of the present invention.
Fig. 3 is the block diagram according to a kind of embodiment of FET control system of the present invention.
Fig. 3 A is the schematic diagram of a kind of operating circuit of the described FET control system of use according to the present invention.
Fig. 4 shows a kind of embodiment according to battery equilibrium FET line map of the present invention.
Fig. 5 shows a kind of embodiment according to voltage ADC of the present invention.
Fig. 6 is the block diagram of the embodiment of CC-ADC.
Fig. 7 shows the embodiment according to low-power consumption bandgap voltage reference of the present invention.
Fig. 8 shows the embodiment according to battery protection cpu i/f of the present invention.
Embodiment
Usually, the present invention relates to a kind of microcontroller, relate more specifically to a kind of single chip microcontroller that comprises battery management and protection system.Following description is used to make those skilled in the art can make and use the present invention, and these descriptions are present in the text of patent application and its claim.To the various improvement of preferred implementation described herein and General Principle and feature is cheer and bright to those skilled in the art.Therefore, embodiment shown in the invention is not restricted to, and should be given and principle described herein and feature the wideest consistent scope.
System and a method according to the invention provides a kind of single-chip devices that comprises battery management and protection.In single nude film, microcontroller comprises CPU and can be by the direct pressurizer of power supply of multi-unit battery.Described microcontroller also comprises the analog to digital converter that is suitable for battery detection, high-voltage charge and discharge fet driver, cell balancing function and battery protecting circuit independently.Except expanding functional that this intelligent battery uses, this single-chip solution has also been saved design cost and PCB space.By means of the accuracy of described microcontroller, can predict the state of charge of battery more accurately.The state of charge of battery is understood many more, just can before reaching the level that battery unit self begins to damage, be consumed this battery unit more.Thereby increase the actual capacity of battery.
Described microcontroller has the high voltage I/O, helps very much the part sum in the minimizing system.Described microcontroller also comprises built-in pressurizer.This pressurizer can be worked described microcontroller in predetermined voltage range (promptly 4 volts～25 volts).The battery cell voltage of described analog to digital converter input channel energy measurement up to 25 volts, thus external high voltage AFE (analog front end) rejected.This device also provides a plurality of built-in fet drivers that can calculate the 25V level, so need not external fet driver.
The battery monitoring function of described microcontroller is applicable to intelligent battery.Described battery monitoring function comprises the voltage-mode number converter, least significant bit (LSB) worst error of this transducer when 12 volts of direct currents be+and-1, this provides the good voltage measurement to the entire cell unit.Special-purpose electric quantity metering current sense ADC can high-resolution (as 18 bit resolutions) and is carried out continuous current surveillance accurately.Reference voltage source makes the high accuracy of described microcontroller battery monitoring become possibility on the sheet of calibration back error+-1%.For example, 10/795, No. 027 U. S. application of submitting on March 4th, 2004 that is entitled as " Method and Apparatus ofTemperature Compensation for an Integrated Circuit Chip Using On-ChipSensor and Computation Means " of also all incorporating this paper by reference into has been described the example of this class calibration.Voltage and current is measured the dump energy in the feasible very accurately estimating battery, makes application system draw more energy from battery.As everyone knows, if the unit of battery is exhausted under a certain voltage level, this battery unit may be impaired.Yet,, just can make safely to exhaust very not have the impaired risk of battery unit near this level if can definitely know this level.If can definitely know battery state of charge, just may be with aforementioned security limitations further near exhausting.When the accuracy of measurement mechanism is low, the safety frequency band must be inserted estimation to guarantee that the user can close safely.Utilizable energy when this safe frequency band represents that described estimation can be trusted really.Microcontroller according to the present invention provides the precision of utilizing this energy required.
Refer now to elaboration, to illustrate in greater detail feature of the present invention below in conjunction with accompanying drawing.With a kind of concrete microcontroller is that the present invention will be described for background; Yet those skilled in the art will be appreciated that feature of the present invention can be used and this use drops in the spirit and scope of the present invention in various devices.The Smart Battery AVR (ATmega 406) that Atmel company makes is a kind of device that comprises feature of the present invention." the ATmega 406 Preliminary Complete Document " in June, 2005 are described ATmega 406, all incorporate it into this paper by reference.
Fig. 1 is the block diagram according to the embodiment of microcontroller 100 of the present invention.Microcontroller 100 in one embodiment comprises following assembly: processor, data/address bus 118, the band read while write (read-while-write) function at the system programmable flash memory, EEPROM134, SRAM132, a plurality of general purpose working register (not shown), many general purpose I/O line (not shown), many general high-voltage I/O line (not shown), debugging is supported and programming jtag interface 139 on the sheet, two wide modulation of dai channel and comparison pattern apply flexibly timer/counter 147 and 148, wake-up timer 136, the two-wire interface module 142 of adaptive system management bus (SM-bus), inside and outside interruption, watchdog timer able to programme 124 with built-in oscillator, with four optional energy-saving modes of software.Microcontroller 100 also comprises oscillating circuit/clock forming circuit 120, power supply supervision circuit 126 and charger testing circuit 128.Described data/address bus 118 and port one 38,140,144 link to each other with 142.
In an embodiment, CPU 116 has abundant instruction set and described a plurality of general purpose working register concurrently.These registers all are directly connected to ALU (ALU) (not shown), make two independent register can be accessed in being executed in an individual instructions in the clock cycle.Formed framework has higher code efficiency, and realizes the treating capacity than fast ten times of existing CISC microcontrollers.
Idle pulley makes other chip functions continue to work when stopping CPU 116.Power-down mode allows pressurizer 102, battery protecting circuit 106, watchdog timer 124 and wake-up timer 136 operations, and all other chip functions of stopping using are until interrupt or hard reboot next time.In battery saving mode, wake-up timer 136, battery protecting circuit 106 and CC-ADC 114 continue operation.
Flash memory 130 allows and can carry out programming in system to program storage by existing nonvolatile storage programmable device or by boot on the sheet of operation on the CPU 116 again on the sheet.Boot can use any interface to download application program in the described flash memory.When upgrading the sector of application program flash memory, the software in the guiding quickflashing 130 will continue operation, thereby the real operation that reads while write is provided.By with the flash memory on CPU 116 and the one chip 130, ADC 110 and 114, reserve battery protective circuit 106, cell balancing FET 108 and pressurizer 102 combinations, microcontroller 100 provides a kind of high flexible and cost-effective battery applications solution.
Battery protecting circuit 106 monitoring battery voltages and charge/discharge current are to detect illegal situation and to protect this battery to avoid these illegal situations where necessary.Described illegal situation refers to the degree of depth under voltage of interdischarge interval, the short circuit of interdischarge interval and the overcurrent of charging and interdischarge interval.
The balanced FET 108 in integrated battery unit makes and carries out the cell balancing algorithm with software mode.
Refer now to elaboration, to illustrate in greater detail the feature of microcontroller 100 below in conjunction with accompanying drawing.
High-voltage I/O
For battery monitoring and management devices provide some high voltage input and output:
-input to pressurizer.This input is to the device power supply of directly drawing from this battery, and voltage range is 4～25 volts.
-input to and be used for the voltage ADC that each battery cell voltage is measured.
The input that-detection battery charger exists.
High voltage drain open circuit output (Open Drain Output:PCO).
-export charging, discharge and precharge FET to.
This high voltage technique makes and flash program memory and logical circuit and accurate analog circuit can be integrated on the same nude film as high voltage tolerance limit I/O.But microcontroller 100 tolerance limit high voltages (25 volts) make its suitable multi-unit battery.
Fig. 2 is the block diagram according to the embodiment of pressurizer 102 of the present invention.
Modern semiconductors is worked under the power supply of 2～5 volts of scopes usually.Therefore, the battery of voltage up to 25 volts can not be directly to described semiconductor power supply.Microcontroller 100 is powered by built-in pressurizer 102 by this battery.The voltage that is input to pressurizer 102 allows changing in 4～25 volts.This voltage is become to be applicable to the 3.3v of described built-in logic circuit, low-voltage I/O line and analog circuit by internal regulation.For making the minimise power consumption between lay-up period, described pressurizer selectively comprises power consumption control module 202.When microcontroller 100 enters low-power mode, pressurizer 102 will reduce the consumption of pressurizer self, and then help to reduce power consumption.1 μ F is set, or bigger external decoupling capacitor 206 is used for the work of pressurizer 102.
Battery management
Intelligent battery is the monitoring battery parameter not only, and it also will be according to the environment of these these batteries of parameter management.Microcontroller 100 provide battery charge algorithm, cell balancing and with the communicating by letter of main program with management and protection battery.
FET control system 104
Fig. 3 is the block diagram according to the embodiment of FET control system 104 of the present invention.Fig. 3 A is the schematic diagram that utilizes according to the operating circuit of FED control system of the present invention.Referring to Fig. 1, Fig. 3 and Fig. 3 A; except the control signal of stopping using from the FET of battery protecting circuit 106, described CPU also can by write described FET control and status register 302 stop using charging FET (C-FET) 352, discharge FET (D-FET) 354 or stop using above-mentioned both.Please note and necessarily can not allow CPU 116 to enable the FET that stops using by battery protecting circuit 106.
From the output of the pulse width modulator (PWM) of 8 bit timers/counter 0, i.e. signal OC0B can be configured to directly drive C-FET 352 via fet driver 310, precharge FET (PC-FET) or both.This can be used for controlling the charging of battery unit.This PWM is set to the 2:0 position in register.Note that described OC0B pin need not to be set to output.This means described PWM output to can be used for driving C-FET 352 and/or PC-FET 350 and do not take the OC0B pin.
If C-FET 352 stops using and D-FET 354 enables, will the flow through body drain diode of C-FET 352 of discharging current, vice versa.Be the potential heating problem of avoiding being caused by this situation, software must guarantee that D-FET 354 is not deactivated when charge current flows, and C-FET 352 is not deactivated when discharging current flows.
If battery by deep discharge, can produce big surge current when linking to each other with charger.To this situation, suggestion is carried out precharge to this battery earlier by current-limiting resistance.For this purpose, microcontroller 100 is provided with precharge FET 350 (PC-FET) control output.This output is defaulted as enables.
If microcontroller 100 has entered power-down mode, all FET control outputs will be deactivated.When being connected with charger, CPU 116 can revive.When power-down mode is revived, C-FET 352 and D-FET 354 control outputs will be kept dead status and PC-FET 350 is defaulted as and enables.Be increased to when being enough to allow to charge normal when CPU 116 detects battery cell voltage, it can enable C-FET 352 and D-FET 354 control outputs and inactive PC-PEF 350 control outputs.If hereinafter the galvanic cell protection (CBP) that elaborates is activated, described current protection timer will guarantee to have the time delay time in 1 second before software can be restarted described external FET.
Fig. 4 shows an embodiment according to cell balancing FET 108 line maps of the present invention.Microcontroller 100 comprises cell balancing FET 402a～402d.Microcontroller 100 provides a cell balancing FET 402a～402d for each battery unit.FET 402a～402d is directly controlled by application program, and described cell balancing algorithm can be realized by software.In an embodiment, FET 402a～402d and each battery unit are connected in parallel.Cell balancing FET 402a～402d is deactivated in the power-down mode.
Exemplary currents (T by cell balancing FET 402a～402d
CB) be 2mA.Cell balancing FET 402a～402d is by 406 controls of cell balancing control register.In the present embodiment, adjacent FET can not be enabled simultaneously.If attempt to enable two adjacent FET, they two all will be deactivated.
SMBus
TM
118
In the PC battery applications, SMBus (System Management Bus: System Management Bus) be the standard of communicating by letter with PC.Microcontroller 100 provides the two-wire serial interface with this SMBus operating such.
-simple but powerful and communication interface flexibly only needs two buses
-support that simultaneously the principal and subordinate operates
-7 bit address space allow nearly 128 different subordinates addresses
-support how main arbitrate (Multi-master arbitration)
The operation of-4MHz clock reaches the 100kHz data transmission bauds
The output driver of-slew rate restriction
-noise suppression circuit stops the spiking on the bus line
-have a general subordinate complete able to programme address of calling support
-when CPU was in sleep pattern, Address Recognition causes to be waken up
Utilize the described SMBus interface of programming function certainly of CPU to can be used for the refresh routine code.
Battery parameter
As previously mentioned, microcontroller 100 comprises the EEPROM 134 that stores data.It forms independently data space, wherein read-write byte.This data space is used for storage to the vital critical data of battery applications.
Voltage measurement
Single battery cell voltage in the battery needs differential ADC to measure.For the level adjustment that will record cell voltage is the level of ADC, be provided with built-in gain.Use single ended channels to measure other parameter on the diverse location in the battery, as regulation voltage and temperature etc.
Fig. 5 shows an embodiment according to voltage ADC 110 of the present invention.The V-ADC control system 506 that the V-ADC 110 of this execution mode comprises a plurality of differential passages, is used to receive 502,12 σ-δ ADC 504 of input multiplexer of differential passage, communicates by letter with input Port Multiplier 502 and σ-δ ADC 504.V-ADC control and status register 508 receive data and provide data to data/address bus 116 from data/address bus 116.V-ADC control and status register 508 also receive data and provide data to V-ADC control system 506 from V-ADC control system 506.V-ADC 110 also comprises from σ-δ ADC 504 and receives data and the V-ADC data register 510 of data is provided to data/address bus 116.Four the differential passages (PV1-NV, PV2-PV1, PV3-PV2, PV4-PV3) that are used for the battery cell voltage measurement are scaled to meet the gamut of described V-ADC.In addition, also having six is the single ended channels of benchmark with the ground signal.A passage is used to measure built-in nude film temperature sensor (VTEMP), and (ADC3～ADC0) measurement is used for the pin of the port A of battery cell temperature supervision to four passages, and a passage (ADC4) is measured built-in regulation voltage VREG.The ADC-4 input is also scaled to meet the gamut of V-ADC.
For accurately measuring cell voltage, be provided with calibration register for each battery cell voltage gain at described analog circuit front end.The calibration value that dispatches from the factory is stored in this register, and with corresponding calibration value the V-ADC conversion of battery cell voltage is carried out convergent-divergent to revise the gain error in the described AFE (analog front end).This calibration used software to carry out usually.
The counting electronic device
The PC battery often is in excessive use; It is often depleted then to recharge under some load levels.Wish how long intelligent battery can also keep current loading before depleted being reported in arbitrarily it preset time.For this service is provided to the terminal use, thereby described battery need definitely be known this battery and emitted how many energy this quantity of deduction the capacity that is full of from this battery.In case determine battery remaining power, the residual charge algorithm just can be estimated the remaining time based on existing load.The calibration of different electrical voltage points is accurate inadequately on the charging curve; Intelligent battery also need initiatively write down and count the charging current and the discharging current of this battery.
As previously mentioned, microcontroller 100 also is included as coulomb counting and has made special-purpose coulomb of count module/number converter (CC-ADC) optimizing 114 and sample with the charge or discharge electric current to the described external sensing resistor of flowing through.Transferring the U.S. Patent application co-pending 11/043 that is entitled as " Current Sensing Analog to Digital Converterand Method of Use " of present assignee, 669[3446P] in this clock ADC has been described.
Fig. 6 is the block diagram of the embodiment of CC-ADC 114.CC-ADC 114 comprises sigma delta modulator 602, decimation filter 604 and 606, current comparator 608, normal current IRQ level 610, control and status register 612 and 8 bit data bus 118.Sigma delta modulator 602 provides data to decimation filter 604.Decimation filter 604 provides data to decimation filter 606, current comparator 608 and 8 bit data bus 118.Normal current IRQ level 610 receives data and provides data to 8 bit data bus 118 and current comparator 608 from 8 bit data bus 118.Control and status register 612 receive data from 8 bit data bus 118, and provide data to decimation filter 604 and 606.Decimation filter 606 receives data from control and status register 612 and decimation filter 604, and provides data to 8 bit data bus 118.Two different output valves are arranged: transient current and accumulative total electric current.The change-over time of transient current output is short, and its cost is that resolution is lower.The accumulative total electric current is output as a coulomb counting provides the height precise current to measure.
The output of accumulative total electric current is high-resolution, the high accuracy output with programmable transition time.Conversion value is the accurate measured value of average current in the change-over period.If interrupt being activated, whenever finish once new accumulative total current conversion, CC-ADC 114 just generates an interruption.
When CC-ADC in when conversion, CPU 116 can enter sleep pattern and wait for interruption from described accumulative total current conversion.After adding was used for coulomb new accumulative total current value of counting, CPU 116 can return sleep pattern.This has reduced the service load of described CPU, and makes more time be in low-power consumption mode, reduces power consumption.
If the result of transient current conversion is greater than programmable threshold, CC-ADC can generate interruption.This makes normal current situation is detected.This allows the super low-power consumption operation, and at this moment CC-ADC 114 can be configured to enter the normal current detecting pattern with programmable current sampling interval.Before the user software designated time intervals is closed, CC-ADC 114 will carry out the transient current conversion repeatedly at it.This allows to carry out described normal current when keeping most of times of CC-ADC to close and detects.
Built-in reference voltage source 112
Fig. 7 shows the embodiment according to low-power consumption bandgap voltage reference 112 of the present invention.Low-power consumption bandgap voltage reference 112 provides reference voltage (V on the sheet of accurate 1.100V for described microcontroller
REF).This V
REFThe benchmark that is used as pressurizer 102 on the sheet, V-ADC 110 and CC-ADC 114 (Fig. 1).In a preferred embodiment, two ADC 110 and 114 benchmark use the buffer 704 that has external decoupling capacitor 706, make and realize remarkable noiseproof feature with lowest power consumption.The reference voltage V of CC-ADC 114
REF_P/ V
REF_NScaledly be complementary with gamut with the current sense input pin.Such setting also makes V-ADC 110 and CC-ADC to work simultaneously.
Float lowlyer for using temperature after the factory-run school standard, microcontroller 100 comprises two step calibration algorithms.For example, in aforementioned 10/795, No. 027 U. S. application, this algorithm has been described.First preset temperature is as 85 ℃, and second step carried out when second preset temperature (as room temperature).The calibration of dispatching from the factory is defaulted as 85 ℃, and this result is stored in the described flash memory.Second calibration steps can be carried out as the instruction in the testing process by the user.This step requires accurate input voltage and stable room temperature.Also can when operation, change this calibration register in software, to carry out temperature-compensating.Arbitrary temp in the described temperature range all can reach accurate.
Also have, microcontroller 100 comprises the built-in temperature sensor (not shown) that monitors described nude film temperature in another embodiment.With the proportional voltage of absolute temperature, VPART generates in reference voltage source circuit and is connected to this multiplexer at the V-ADC input.This temperature sensor can be used for the temperature in the oscillator 120 on described reference voltage source and the sheet is floated compensation when doing operation.
The battery protection cpu i/f
Fig. 8 shows the embodiment according to battery protection cpu i/f of the present invention.This battery protection cpu i/f comprises that galvanic cell protective circuit (CBPC) 804 and voltage battery protective circuit (VBPC) 802 and a plurality of battery protection parameter can lock register 806,808,810,812 and 814.Described interface is connected with 8 bit data bus 118 with FET control system 104.
Various protections have interrupt identification.CPU 116 can read and remove each sign, and each sign has interrupt enable separately.All signs of enabling combine with single battery protection interrupt requests to CPU 116.This interruption can wake CPU 116 up from any mode of operation except power-down mode.Logical one can be removed described interrupt identification from the position, position (bit locations) that CPU116 writes interrupt identification.
Both sign did not have mode bit (status bits) to show that microcontroller 100 has entered power-down mode yet.This is because of being power down at this pattern CPU 116.Yet when CPU 116 reruned, by monitoring its reboot flag, CPU 116 can detect its experience off-position just.
Described overcurrent and short-circuit protection parameter Reprogrammable are to adapt to dissimilar batteries.By writing the I/O register described parameter is set.The described parameter register of lockable after initial setting up is to prevent any further renewal, until next hard reboot.
Security parameter stores
In a preferred embodiment, can lock battery protection parameter that is arranged in the described battery protection parameter register and the disable function that is arranged in the inactive register of described battery protection, to stop further software upgrading.In case these registers can not be accessed before the locking, next hard reboot.This provides the safe mode of protecting these registers to avoid the accidental modification of software due to out of control.Be recommended in restart after immediately by these registers of software setting, protect these registers to avoid further renewal then.
Galvanic cell protective circuit (CBPC) 804 monitors described charging and discharging current, C-FET, PC-FET and D-FET if the situation of overcurrent or short circuit that detects is just stopped using.Three different detection level able to programme are arranged: discharge over-current detects level, charge over-current detects level and short circuit detection levpl.The external filter of PI/NI input pin can cause that the time delay of short-circuit detecting is excessive.Therefore, using independently, the PPI/NNI input is used for the galvanic cell protection.Two different time delays able to programme that are used for the activated current battery protection are arranged: short-circuit reaction time and overcurrent reaction time.After the galvanic cell protection was activated, application software must be restarted described FET.In an embodiment, battery protecting circuit 106 is provided with software can restart described discharge FET lag time before, for example 1 second.This is for providing safety guarantee just in case this application software is unexpectedly restarted the situation of described discharge FET too early.
Protection activates and also sends interruption to CPU 116.This battery protection interrupts and can not enabled or stopped using by 116 of CPU.The effect of various battery protection types is listed in table 1 in this embodiment.
The effect of table 1 battery protection type
| The battery protection type | Interrupt requests | C-FET | D-FET | PC-FET | Cell balancing FET | MCU |
| Detect degree of depth under voltage | CPU withdraws from restarts | Stop using | Stop using | Stop using | Stop using | Outage |
| The discharge over-current protection | Enter and withdraw from | Stop using | Stop using | Stop using | Operation | Operation |
| The charge over-current protection | Enter and withdraw from | Stop using | Stop using | Stop using | Operation | Operation |
| Short-circuit protection | Enter and withdraw from | Stop using | Stop using | Stop using | Operation | Operation |
For reducing power consumption, the protection of short circuit and discharge over-current is all automatically terminated when described D-FET stops using.The charge over-current protection also is deactivated when C-FET and PC-FET are deactivated.But note that when C-FET or PC-FET are controlled by PWM the charge over-current protection of never stopping using automatically.
Hereinafter each battery protection of the above-mentioned type and their feature are elaborated.
Degree of depth under voltage protection
Degree of depth under voltage protection guarantees that the battery unit discharge can not be lower than degree of depth under voltage able to programme and detect level.If the voltage of described VFET pin is lower than the time of this level and surpasses the time delay time able to programme, described FET is cut off automatically and described microcontroller enters power-down mode.250ms is provided with the degree of depth under voltage early alert interrupt identification (DUVIF) in the battery protection interrupt register before described microcontroller enters power-down mode.The chance that this takes the necessary measures for CPU116 before dump.
Described degree of depth under voltage time delay time and degree of depth under voltage detect level and are arranged in the battery protection degree of depth under voltage register (BPDUV), and this register is the part of battery protection level register.Described parameter register can be locked to next hard reboot after initial configuration, to prevent further renewal.
The discharge over-current protection
The galvanic cell protective circuit is by the voltage of the PPI/NNI input pin monitoring battery electric current of sampling.Differential operational amplifier amplifies this voltage with suitable gain.The output of this operational amplifier is made comparisons by voltage reference on analog comparator and accurate, the programmable chip.If shunt resistance voltage surpasses the overcurrent protection reaction time in the time that described discharge over-current detects on the level, microcontroller 100 activates the discharge over-current protection.The system that is sampled by built-in ULP (super low-power consumption) oscillator locking is used for overcurrent and short-circuit protection.This guarantees reliable clock source, skew elimination and low power consumption.
When the discharge over-current protection was activated, external D-FET, PC-FET and C-FET were deactivated and the current protection timer initiation.This timer guarantees that above-mentioned FET is deactivated a preset time cycle (i.e. 1 second).When thinking safe, application software must then be provided with DFE in FET control and the status register and CFE position to reactivate normal operation.The load of battery is still excessive if D-FET is restarted, and the discharge over-current protection will be activated again.
The charge over-current protection
If the voltage of PPI/NNI pin surpasses overcurrent protection reaction time, microcontroller 100 activating charge overcurrent protections in the time that charge over-current detects on the level.
When charge over-current protection was activated, external D-FET, PC-FET and C-FET were deactivated and the current protection timer is activated.This timer guarantees that above-mentioned FET was deactivated for 1 second at least.When thinking safe, DFE in FET control and the status register 302 (Fig. 3) and CFE position are set to restart normal operation.The electric current that charger provides if C-FET is restarted continues too high, and the charge over-current protection will be activated again.
Short-circuit protection
Second level that high current detecting is set is to accelerate the reaction time to very big discharging current.If discharging current surpasses the short-circuit reaction time greater than the time of short circuit detection levpl, short-circuit protection is activated.
When short-circuit protection was activated, D-FET, PC-FET and C-FET were deactivated and the current protection timer is activated.This timer guarantees that above-mentioned D-FET, PC-FET and C-FET are deactivated a second at least.When thinking safe, application software must then be provided with DFE in FET control and the status register and CFE position to reactivate normal operation.If D-FET is restarted before short-circuit state is eliminated, short-circuit protection will be activated again.
Power consumption
For avoiding damaging battery when the long term storage, the electric weight of battery autophage is the least possible to be very important.By rejecting external element and all functions being integrated in a single-chip package, single-chip realizes helping to reduce system's power consumption.In addition, microcontroller 100 provides the various low-power consumption modes that are called sleep pattern.Sleep pattern can be closed in the microcontroller 100 application program and is not used module, thereby can economize on electricity.Microcontroller 100 provides four kinds of sleep patterns, allows the requirement customization power consumption of user according to application program:
1. idle pulley, CPU 116 is stopped but all peripheral functionality elements continue operation in this pattern.
2.ADC noise reduction mode, this pattern is improved the noise circumstance of ADC in power saving.If V-ADC 110 (Fig. 1) is activated, just begin conversion automatically in case enter this pattern.
3. battery saving mode, in this pattern fast the RC oscillator be deactivated.Only there are battery protecting circuit 106 and low speed oscillator to measure electric current CC-ADC 114 (Fig. 1) in addition and keep operation.
4. power-down mode, RC and low speed RC clock are stopped fast in this pattern.Battery protection, watchdog timer 124 (Fig. 1) or external interrupt or SMBus matching addresses can be waken this device up.
5. power-down mode makes pressurizer 102 (Fig. 1) can cut off 116 power supplies to CPU, only stays pressurizer 102 and charging testing circuit 128 to continue operation.Even microcontroller 100 guarantees that the brownout battery unit is not impaired yet in this pattern.
Table 2 shows the important power consumption data of an embodiment of microcontroller 100.
| Situation | Current drain |
| The 1MHz of operation | 1.2mA |
| Idle 1MHz | 0.6mA |
| Power saving | 90μA |
| Power down | 20μA |
| Outage | 2μA |
System and a method according to the invention provides a kind of microcontroller that contains battery management and protection.This microcontroller provides a kind of single-chip devices that contains battery protection and management.Except expanding functional that this intelligent battery uses, this single-chip solution has also been saved design cost and PCB space.The precision that relies on described microcontroller, thus the state of charge that can predict battery more accurately effectively increases the actual battery capacity.
Though embodiment shown in the basis has illustrated the present invention, those skilled in the art is easy to recognize and can changes within the spirit and scope of the present invention these embodiments do changes and these.Therefore, those skilled in the art can carry out many changes and not break away from the spirit and scope of claims.
Claims (22)
1. microcontroller comprises:
Processor system;
High voltage interface, it is connected to described processor system and is fit to and is connected with battery; With
Battery management system is used to monitor described battery and based on the described battery of described monitor management to battery,
Wherein, described microcontroller is a single-chip.
2. microcontroller as claimed in claim 1 is characterized in that described battery management system comprises battery protecting circuit, is used to prevent the illegal situation on the described battery and protects described battery to exempt from these situations when needed.
3. microcontroller as claimed in claim 2 is characterized in that, described illegal situation comprises the degree of depth under voltage of interdischarge interval, the short circuit of interdischarge interval and or their combination in any in the overcurrent during the charge or discharge.
4. microcontroller as claimed in claim 1 is characterized in that, described processor system comprises:
CPU (CPU) and
The data/address bus of communicating by letter with described CPU.
5. microcontroller as claimed in claim 1 is characterized in that, described battery management system comprises:
The suitable pressurizer that is connected with described battery through described high voltage interface, described pressurizer will be supplied with the voltage-regulation of described microcontroller to predetermined level.
6. microcontroller as claimed in claim 5 is characterized in that, can change between basic 25 volts direct currents at basic 4 volts to the input of described pressurizer, and described pressurizer to provide to described microcontroller be that 3.3 volts inside is imported substantially.
7. microcontroller as claimed in claim 1 is characterized in that, described battery management system comprises: first analog to digital converter (ADC) is used to provide transient current and accumulative total electric current.
8. microcontroller as claimed in claim 7 is characterized in that, when described transient current during greater than the programmable gate threshold currents a described ADC generate interruption to described microcontroller to allow low power operation.
9. microcontroller as claimed in claim 7, it is characterized in that described battery management system comprises second analog to digital converter (ADC), is used for the voltage measurement of described battery unit, wherein, described first and second ADC are used to the voltage and current of the described battery of continuous monitoring.
10. microcontroller as claimed in claim 9 is characterized in that described battery management system comprises reference voltage source on the sheet that is connected to described first and second ADC, for described first and second ADC provide accurate reference voltage.
11. microcontroller as claimed in claim 1 is characterized in that, described battery management system comprises the FET control system, is used for the charging and the discharge of described battery.
12. microcontroller as claimed in claim 4 is characterized in that, described battery management system comprises a plurality of cell balancing FET that are connected to described battery unit and are connected to described data/address bus, and wherein each battery unit has a cell balancing FET.
13. microcontroller as claimed in claim 4; it is characterized in that; described battery protecting circuit comprises the galvanic cell protective circuit, and described galvanic cell protective circuit is by monitoring from the charging of described battery and discharging current to prevent over-current condition or short-circuit state.
14. microcontroller as claimed in claim 4 is characterized in that, described battery protecting circuit comprises that the battery protecting circuit at degree of depth under voltage is lower than predetermined level to guarantee that described battery unit can not be discharged to.
15. a microcontroller comprises:
Processor system;
High voltage interface, it is connected to described processor system and is fit to and is connected with battery; With
Battery management system, be used to monitor described battery and based on the described battery of described monitor management to battery, wherein, described battery management system comprises: battery protecting circuit is used to prevent the illegal situation on the described battery and protect described battery to exempt from these situations when needed; First analog to digital converter (ADC) is used to provide transient current and accumulative total electric current, wherein when described transient current during greater than the programmable gate threshold currents a described ADC generate interruption to described microcontroller with the permission low power operation; Second analog to digital converter (ADC) is used for the voltage measurement of described battery unit, and wherein said first and second ADC are used to the voltage and current of the described battery of continuous monitoring; And be connected to reference voltage source on the sheet of described first and second ADC, be used to described first and second ADC that accurate reference voltage is provided,
Wherein, described microcontroller is a single-chip.
16. microcontroller as claimed in claim 15, it is characterized in that described illegal situation comprises that described illegal situation comprises the degree of depth under voltage of interdischarge interval, the short circuit of interdischarge interval and or their combination in any in the overcurrent during the charge or discharge.
17. microcontroller as claimed in claim 15 is characterized in that, described processor system comprises:
CPU (CPU) and
The data/address bus of communicating by letter with described CPU.
18. microcontroller as claimed in claim 15 is characterized in that, described battery management system comprises:
Be fit to through described high voltage interface and the pressurizer that described battery is connected, be used for and supply with the voltage-regulation of described microcontroller to predetermined level.
19. microcontroller as claimed in claim 15 is characterized in that, to the input of described pressurizer can basically 4 volts to changing between 25 volts of direct currents basically, and described pressurizer provides to described microcontroller in inside and is essentially 3.3 volts input.
20. microcontroller as claimed in claim 15 is characterized in that, described battery management system comprises reference voltage source on the sheet that connects described first and second ADC, is used to described first and second ADC that accurate reference voltage is provided.
21. microcontroller as claimed in claim 15; it is characterized in that; described battery protecting circuit comprises the galvanic cell protective circuit, and this galvanic cell protective circuit is by monitoring from the charging of described battery and discharging current to prevent over-current condition or short-circuit state.
22. microcontroller as claimed in claim 15 is characterized in that, described battery protecting circuit comprises that the battery protecting circuit at degree of depth under voltage is lower than predetermined level to guarantee that described battery unit can not be discharged to.
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US64546005P | 2005-01-19 | 2005-01-19 | |
| US60/645,460 | 2005-01-19 | ||
| US11/335,057 US7759902B2 (en) | 2005-01-19 | 2006-01-18 | Single chip microcontroller including battery management and protection |
| US11/335,057 | 2006-01-18 | ||
| PCT/US2006/001951 WO2006078850A2 (en) | 2005-01-19 | 2006-01-19 | Single chip microcontroller including battery management and protection |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101233663A true CN101233663A (en) | 2008-07-30 |
| CN101233663B CN101233663B (en) | 2011-06-29 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2006800024550A Pending CN101203920A (en) | 2005-01-19 | 2006-01-18 | Sampling and level shifting circuit |
| CN2006800024762A Expired - Fee Related CN101107760B (en) | 2005-01-19 | 2006-01-18 | Current sensing analog-to-digital converter and method of use |
| CN200680002538XA Active CN101233663B (en) | 2005-01-19 | 2006-01-19 | Single chip microcontroller including battery management and protection |
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| Application Number | Title | Priority Date | Filing Date |
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| CNA2006800024550A Pending CN101203920A (en) | 2005-01-19 | 2006-01-18 | Sampling and level shifting circuit |
| CN2006800024762A Expired - Fee Related CN101107760B (en) | 2005-01-19 | 2006-01-18 | Current sensing analog-to-digital converter and method of use |
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Also Published As
| Publication number | Publication date |
|---|---|
| CN101233663B (en) | 2011-06-29 |
| CN101203920A (en) | 2008-06-18 |
| CN101107760A (en) | 2008-01-16 |
| CN101107760B (en) | 2010-05-19 |
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