CN101233624B - Alternating current light emitting device - Google Patents

Alternating current light emitting device Download PDF

Info

Publication number
CN101233624B
CN101233624B CN2006800283235A CN200680028323A CN101233624B CN 101233624 B CN101233624 B CN 101233624B CN 2006800283235 A CN2006800283235 A CN 2006800283235A CN 200680028323 A CN200680028323 A CN 200680028323A CN 101233624 B CN101233624 B CN 101233624B
Authority
CN
China
Prior art keywords
light emitting
light
emitting unit
electrode
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2006800283235A
Other languages
Chinese (zh)
Other versions
CN101233624A (en
Inventor
李在皓
拉克鲁瓦·伊夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seoul Viosys Co Ltd
Original Assignee
Seoul Optodevice Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seoul Optodevice Co Ltd filed Critical Seoul Optodevice Co Ltd
Publication of CN101233624A publication Critical patent/CN101233624A/en
Application granted granted Critical
Publication of CN101233624B publication Critical patent/CN101233624B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/10Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00
    • H10H29/14Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00 comprising multiple light-emitting semiconductor components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/85Packages
    • H10H20/857Interconnections, e.g. lead-frames, bond wires or solder balls

Landscapes

  • Led Device Packages (AREA)
  • Led Devices (AREA)

Abstract

The present invention relates to a light emitting device in which light emitting cells of a first light emitting cell block are connected in parallel to light emitting cells of a second light emitting cell block corresponding thereto. A light emitting device of the present invention comprises a substrate, and first and second light emitting cell blocks formed on the substrate and having a plurality of light emitting cells electrically connected in series to one another, respectively. Each of the light emitting cells has an N-electrode and a P-electrode. A P-electrode at one end of the first light emitting cell block is connected to an N-electrode at one end of the second light emitting cell block, and an N-electrode at the other end of the first light emitting cell block is connected to a P-electrode at the other end of the second light emitting cell block. The P-electrode of each of the light emitting cells of the first light emitting cell block and the P-electrode of each of the light emitting cells of the second light emitting cell block corresponding thereto, or the N-electrode of each of the light emitting cells of the first light emitting cell block and the N-electrode of each of the light emitting cells of the second light emitting cell block corresponding thereto are electrically connected to each other. In the light emitting device of the present invention, the light emitting cells of the first light emitting cell block and the light emitting cells of the second light emitting cell block corresponding thereto are respectively connected in parallel so that a current can cross the light emitting cells of the first and second light emitting cell blocks.

Description

交流发光器件AC light emitting device

技术领域 technical field

本发明是有关于一种发光器件,并且特别是有关于一种具有并联连接的发光单元的交流(AC)发光器件。The present invention relates to a light emitting device, and in particular to an alternating current (AC) light emitting device having light emitting units connected in parallel.

背景技术 Background technique

在传统的发光器件中,缓冲层、N型半导体层、有源层以及P型半导体层依序地形成于基板上。通过光刻工艺(photolithographic process)对P型半导体层以及有源层进行干蚀刻,以暴露基板,使得多个特定尺寸的发光单元在基板上彼此隔离。用来作为欧姆触点(ohmic contact)的金属层形成于N型半导体层与P型半导体层上。通过光学工艺(photo process)沉积金属膜,以便电连接暴露的N型金属层与暴露于相邻的发光单元的P型金属层上的区域,并且导电材质(例如,金(Au))通过空气桥工艺(air bridge process)在空气中连接相邻的发光单元。In a conventional light emitting device, a buffer layer, an N-type semiconductor layer, an active layer and a P-type semiconductor layer are sequentially formed on a substrate. The P-type semiconductor layer and the active layer are dry-etched through a photolithographic process to expose the substrate, so that a plurality of light-emitting units with specific sizes are isolated from each other on the substrate. A metal layer used as an ohmic contact is formed on the N-type semiconductor layer and the P-type semiconductor layer. A metal film is deposited by a photo process so as to electrically connect the exposed N-type metal layer and the area exposed to the P-type metal layer of the adjacent light-emitting unit, and the conductive material (for example, gold (Au)) passes through the air The air bridge process connects adjacent light-emitting units in the air.

随后,通过例如电镀等方法将金属凸块形成于P型金属层上的一定区域内,金属凸块的厚度为大约5至30μm,由此完成基板的制造。以隔离的发光单元为基础来划分以上述方法制造的器件基板,并且进行倒装式接合(flipbonding),以使发光单元的顶部接合到图案化的子镶嵌基板(submount substrate)的表面。随后,将子镶嵌基板切割成特定尺寸以形成倒装芯片(flip chip)。各子镶嵌基板晶粒接合(die-bond)到封装基板上进行组装,并且封装基板的电极通过金属配线连接到子镶嵌基板的接合垫(bonding pad)上,由此完成交流(AC)倒装芯片。Subsequently, a metal bump is formed in a certain area on the P-type metal layer by a method such as electroplating, and the thickness of the metal bump is about 5 to 30 μm, thereby completing the manufacture of the substrate. The device substrate manufactured by the above method is divided on the basis of isolated light emitting units, and flip-chip bonding is performed so that the tops of the light emitting units are bonded to the surface of a patterned submount substrate. Subsequently, the sub-damascene substrate is cut into specific dimensions to form flip chips. Each sub-damascene substrate is die-bond to the package substrate for assembly, and the electrodes of the package substrate are connected to the bonding pads of the sub-damascene substrate through metal wires, thereby completing AC (AC) switching. Install the chip.

这种AC发光器件具有分别在两个不同方向上并联连接的电极,并且以如下方式操作:当AC发光器件连接到AC电源上时,在正向偏压阶段,在正向方向上连接的发光器件阵列被点亮,而在反向偏压阶段,在反向方向上连接的发光器件阵列被点亮。This AC light emitting device has electrodes connected in parallel in two different directions, respectively, and operates in such a way that when the AC light emitting device is connected to an AC power source, during the forward bias phase, the electrodes connected in the forward direction emit light The array of devices is turned on, and in the reverse bias phase, the array of light emitting devices connected in the reverse direction is turned on.

然而,由于这种集成的AC发光单元阵列在两个不同方向上连接,当电流在正向方向上流动并因而发光单元阵列被点亮时,漏电流可能会流经一发光单元阵列的某些发光单元。同时,由于后续发光单元中的过大的压降所产生的过电流的流动而引起发光单元的发光不均匀,会损坏发光单元并且缩短其寿命。However, since such an integrated AC light-emitting cell array is connected in two different directions, when current flows in the forward direction and thus the light-emitting cell array is lit, leakage current may flow through some parts of a light-emitting cell array. Lighting unit. Meanwhile, non-uniform light emission of the light emitting units due to flow of overcurrent generated by excessive voltage drop in subsequent light emitting units may damage the light emitting units and shorten their lifespan.

发明内容 Contents of the invention

本发明用于解决上述问题。因而,本发明的目的是提供一种发光器件,其中即便在某些发光单元中出现过电流,允许此电流穿越在另一方向上连接的发光单元。The present invention is intended to solve the above-mentioned problems. Accordingly, an object of the present invention is to provide a light emitting device in which even if an overcurrent occurs in some light emitting cells, the current is allowed to pass through the light emitting cells connected in the other direction.

本发明的另一目的是提供一种发光器件,其能够确保均匀的光发射以及延长AC发光器件的寿命。Another object of the present invention is to provide a light emitting device capable of ensuring uniform light emission and prolonging the lifetime of the AC light emitting device.

为了实现上述目的,本发明的发光器件包括基板;以及形成于基板上并且分别具有多个彼此串联电连接的发光单元的第一和第二发光单元区块(lighting cell block)。各发光单元具有N电极和P电极。第一发光单元区块一端的P电极连接到第二发光单元区块一端的N电极,并且第一发光单元区块另一端的N电极连接到第二发光单元区块另一端的P电极。第一发光单元区块的各发光单元的P电极和与之对应的第二发光单元区块的各发光单元的P电极彼此电连接,或者第一发光单元区块的各发光单元的N电极和与之对应的第二发光单元区块的各发光单元的N电极彼此电连接。发光器件更可包括倒装接合(flip-bonded)于第一与第二发光单元区块上的子镶嵌基板。子镶嵌基板与相应的发光单元之间形成金属垫。In order to achieve the above object, the light emitting device of the present invention includes a substrate; and first and second lighting cell blocks formed on the substrate and respectively having a plurality of light emitting cells electrically connected to each other in series. Each light emitting unit has an N electrode and a P electrode. The P electrode at one end of the first light emitting cell block is connected to the N electrode at one end of the second light emitting cell block, and the N electrode at the other end of the first light emitting cell block is connected to the P electrode at the other end of the second light emitting cell block. The P electrodes of each light-emitting unit of the first light-emitting unit block are electrically connected to the P electrodes of each light-emitting unit of the corresponding second light-emitting unit block, or the N electrodes of each light-emitting unit of the first light-emitting unit block are connected to each other. The N electrodes of the light emitting units of the corresponding second light emitting unit block are electrically connected to each other. The light emitting device may further include a sub-damascene substrate flip-bonded on the first and second light emitting unit blocks. A metal pad is formed between the sub-damascene substrate and the corresponding light emitting unit.

此外,子镶嵌基板上可形成金属配线,并且第一发光单元区块的各发光单元的P电极和与之对应的第二发光单元区块的各发光单元的P电极通过金属配线彼此电连接,或者第一发光单元区块的各发光单元的N电极和与之对应的第二发光单元区块的各发光单元的N电极通过金属配线彼此电连接。In addition, metal wires can be formed on the sub-mosaic substrate, and the P electrodes of the light-emitting units of the first light-emitting unit block and the P electrodes of the corresponding light-emitting units of the second light-emitting unit block are electrically connected to each other through the metal wires. connection, or the N electrodes of the light emitting units of the first light emitting unit block and the N electrodes of the corresponding light emitting units of the second light emitting unit block are electrically connected to each other through metal wires.

发光单元可包括:形成于基板上的N型半导体层;形成于N型半导体层的区域内的P型半导体层;以及分别形成于N型和P型半导体层上的N电极和P电极。The light emitting unit may include: an N-type semiconductor layer formed on a substrate; a P-type semiconductor layer formed in a region of the N-type semiconductor layer; and N and P electrodes respectively formed on the N-type and P-type semiconductor layers.

附图说明 Description of drawings

通过结合附图给出的优选实施例的后续描述,本发明的上述以及其它目的、特征以及优点清楚易懂,其中:The above and other objects, features and advantages of the present invention are clear and understandable through the following description of preferred embodiments given in conjunction with the accompanying drawings, wherein:

图1是根据本发明一实施例的发光器件的平面图;1 is a plan view of a light emitting device according to an embodiment of the present invention;

图2是根据本发明一实施例的发光器件的等效电路图;2 is an equivalent circuit diagram of a light emitting device according to an embodiment of the present invention;

图3至图6是显示根据本发明一实施例的发光器件的制造工艺的截面图;3 to 6 are cross-sectional views showing a manufacturing process of a light emitting device according to an embodiment of the present invention;

图7是根据本发明另一实施例的发光器件的透视图;7 is a perspective view of a light emitting device according to another embodiment of the present invention;

图8和图9是根据本发明其它实施例的发光器件的子镶嵌基板的平面图;以及8 and 9 are plan views of sub-damascene substrates of light emitting devices according to other embodiments of the present invention; and

图10至图12是根据本发明其它实施例的发光器件的制造工艺的截面图。10 to 12 are cross-sectional views of a manufacturing process of a light emitting device according to other embodiments of the present invention.

具体实施方式 Detailed ways

下文中,将参照附图详细地描述本发明的优选实施例。Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

然而,本发明并不局限于以下实施例,而是能够以不同形式实施。提供这些实施例仅是为了说明的目的,并且使本领域技术人员能够全面地理解本发明的范围。在全部附图中,相似的元件由相似的附图标记所标识。However, the present invention is not limited to the following embodiments, but can be implemented in various forms. These examples are provided for illustrative purposes only, and to enable those skilled in the art to fully understand the scope of the present invention. Throughout the drawings, similar elements are identified by similar reference numerals.

尽管下文要描述的第一和第二发光单元区块是分开的并且单独进行描述,但要注意到它们是形成于单个基板上的发光单元。Although the first and second light-emitting unit blocks to be described below are separated and described individually, it is noted that they are light-emitting units formed on a single substrate.

图1至图6是根据本发明一实施例的发光器件的视图。1 to 6 are views of a light emitting device according to an embodiment of the present invention.

如图1和图2所示,根据本发明一实施例的发光器件包括:位于基板100一侧的第一发光单元区块,其具有由第一配线200串联连接的多个正向偏置的发光单元250a;位于基板100另一侧的第二发光单元区块,其具有经第一配线200串联连接的多个反向偏置的发光单元250b;以及将第一发光单元区块的发光单元250a电连接到第二发光单元区块的发光单元250b的第二配线210。As shown in FIGS. 1 and 2 , a light emitting device according to an embodiment of the present invention includes: a first light emitting unit block located on one side of a substrate 100 , which has a plurality of forward biased cells connected in series by a first wiring 200 the light-emitting unit 250a of the substrate 100; the second light-emitting unit block on the other side of the substrate 100, which has a plurality of reverse-biased light-emitting units 250b connected in series through the first wiring 200; The light emitting unit 250a is electrically connected to the second wiring 210 of the light emitting unit 250b of the second light emitting unit block.

基板100是指用于制造发光装置的普通晶圆,并且由蓝宝石(sapphire)、SiC或类似材料制成。本实施例使用由蓝宝石制成的基板进行晶体生长。也就是,上述多层结构通过外延生长(epitaxial growth)形成于用于晶体生长的基板上。The substrate 100 refers to a general wafer used for manufacturing a light emitting device, and is made of sapphire, SiC, or the like. This embodiment uses a substrate made of sapphire for crystal growth. That is, the above-mentioned multilayer structure is formed on a substrate for crystal growth by epitaxial growth.

发光单元250包括:形成于基板100上的缓冲层110;形成于缓冲层110上的N型半导体层120;形成于N型半导体层120上的特定区域内的有源层140;形成于有源层140上的P型半导体层160;形成于N型半导体层120上的N电极125;以及形成P型半导体层160上的P电极165。The light emitting unit 250 includes: a buffer layer 110 formed on the substrate 100; an N-type semiconductor layer 120 formed on the buffer layer 110; an active layer 140 formed in a specific area on the N-type semiconductor layer 120; P-type semiconductor layer 160 on layer 140 ; N-electrode 125 formed on N-type semiconductor layer 120 ; and P-electrode 165 formed on P-type semiconductor layer 160 .

缓冲层110用于降低基板100与晶体生长后形成的后续层之间的晶格失配(lattice mismatch),并且包含氮化物半导体材料AlN或GaN。The buffer layer 110 is used to reduce the lattice mismatch between the substrate 100 and subsequent layers formed after crystal growth, and includes a nitride semiconductor material AlN or GaN.

N型半导体层120是产生电子的层,并且由N型化合物半导体层以及N型衬层(clad layer)形成。此时,N型化合物半导体层由掺杂有N型杂质的GaN制成。The N-type semiconductor layer 120 is a layer that generates electrons, and is formed of an N-type compound semiconductor layer and an N-type clad layer. At this time, the N-type compound semiconductor layer is made of GaN doped with N-type impurities.

有源层140是电子与空穴重组的区域,其具有预定的能带隙(band gap),并且形成为具有量子阱结构。进一步,有源层140可包含InGaN,并且由电子与空穴的组合所发射的光的波长依据构成有源层140的材料的种类而发生变化。因而,优选地依据有源层140的目标波长来控制半导体材料的组分。The active layer 140 is a region where electrons and holes are recombined, has a predetermined energy band gap, and is formed to have a quantum well structure. Further, the active layer 140 may include InGaN, and the wavelength of light emitted by a combination of electrons and holes varies depending on the kind of material constituting the active layer 140 . Thus, the composition of the semiconductor material is preferably controlled depending on the target wavelength of the active layer 140 .

P型半导体层160是产生空穴的层,并且由P型衬层和P型化合物半导体层形成。此时,P型化合物半导体层由掺杂有P型杂质的AlGaN制成。The P-type semiconductor layer 160 is a hole-generating layer, and is formed of a P-type liner layer and a P-type compound semiconductor layer. At this time, the P-type compound semiconductor layer is made of AlGaN doped with P-type impurities.

N电极125与P电极165是用于将发光单元250电连接到外部配线的电极,并且N电极125形成为具有Ti/Au的叠层结构。P电极165由透明地导电薄膜(氧化铟锡/Indium Tin Oxide,ITO)制成,并经第一配线200均匀地传输电压输出到P型半导体层160。The N electrode 125 and the P electrode 165 are electrodes for electrically connecting the light emitting unit 250 to external wiring, and the N electrode 125 is formed to have a stacked structure of Ti/Au. The P electrode 165 is made of a transparent conductive film (Indium Tin Oxide, ITO), and uniformly transmits a voltage to the P-type semiconductor layer 160 through the first wiring 200 .

进一步,第一配线200通过电镀等方法由导电材质(例如金(Au))形成,以便连接彼此相邻的N型与P型半导体层120与160。Further, the first wiring 200 is formed of a conductive material (such as gold (Au)) by means of electroplating, so as to connect the adjacent N-type and P-type semiconductor layers 120 and 160 .

第二配线210将第一发光单元区块的发光单元250a电连接到与之对应的第二发光区块的发光单元250b上,第二配线210由金属例如金(Au)形成。也就是,如根据本实施例的图2的等效电路所示的,正向与反向偏置的发光单元250a与250b经第二配线210并联连接。因而,即使当AC电力施加到发光单元上并且在某些发光单元中出现过电流时,电流可穿越(cross)在另一方向上连接的发光单元,由此防止由过电流对发光单元250的损坏。The second wire 210 electrically connects the light emitting unit 250a of the first light emitting unit block to the corresponding light emitting unit 250b of the second light emitting block, and the second wire 210 is formed of a metal such as gold (Au). That is, as shown in the equivalent circuit of FIG. 2 according to the present embodiment, forward and reverse biased light emitting units 250 a and 250 b are connected in parallel via the second wiring 210 . Thus, even when AC power is applied to the light emitting units and an overcurrent occurs in some of the light emitting units, the current can cross the light emitting units connected in the other direction, thereby preventing damage to the light emitting unit 250 by the overcurrent. .

图3至图6是显示根据本发明一实施例的发光器件的制造工艺的截面图。3 to 6 are cross-sectional views showing a manufacturing process of a light emitting device according to an embodiment of the present invention.

下面参照图3-图6讨论上述发光器件的制造工艺。缓冲层110、N型半导体层120、有源层140以及P型半导体层160依序地形成于蓝宝石基板100上(图3)。之后,光阻涂附在整个结构上,并且随后使用掩模进行光刻工艺来形成第一光阻图案,该第一光阻图案用于图案化各发光单元。The manufacturing process of the above-mentioned light emitting device will be discussed below with reference to FIGS. 3-6 . The buffer layer 110 , the N-type semiconductor layer 120 , the active layer 140 and the P-type semiconductor layer 160 are sequentially formed on the sapphire substrate 100 ( FIG. 3 ). Afterwards, a photoresist is coated on the entire structure, and then a photolithography process is performed using a mask to form a first photoresist pattern for patterning each light emitting unit.

接下来,使用第一光阻图案作为蚀刻掩模并通过蚀刻工艺来部分地移除P型半导体层、有源层、N型半导体层以及缓冲层,并且移除第一光阻图案以便物理且电隔离发光单元图案(图4)。Next, the P-type semiconductor layer, the active layer, the N-type semiconductor layer, and the buffer layer are partially removed by an etching process using the first photoresist pattern as an etching mask, and the first photoresist pattern is removed to physically and Electrically isolate the light-emitting cell pattern (FIG. 4).

随后,将光阻涂附到整个结构上,并且通过使用掩模进行光刻工艺来形成第二光阻图案。Subsequently, a photoresist is coated on the entire structure, and a second photoresist pattern is formed by performing a photolithography process using a mask.

接下来,通过使用第二光阻图案作为蚀刻掩模并进行蚀刻工艺来部分地移除P型半导体层和有源层,以暴露N型半导体层120(图5)。此时,一同移除一定厚度的N型半导体层120。之后,通过预定的剥离工艺(stripping process)移除第二光阻图案。Next, the P-type semiconductor layer and the active layer are partially removed by using the second photoresist pattern as an etching mask and performing an etching process to expose the N-type semiconductor layer 120 ( FIG. 5 ). At this time, a certain thickness of the N-type semiconductor layer 120 is removed together. Afterwards, the second photoresist pattern is removed through a predetermined stripping process.

透明的导电薄膜形成于P型半导体层160上,以便制造P电极165。也就是,形成第三光阻图案,并经第三光阻图案暴露P型半导体层160,P电极165随后形成于第三光阻图案上,并且通过剥离工艺移除第三光阻图案,使得P电极165形成于P型半导体层160上。接下来,N电极125形成于N型半导体层120上,N电极125由金属(例如Ti、Au、Ag、Pt、Al或Cu)导电膜形成。之后,通过空气桥(air bridge)或阶梯覆盖(step coverage)工艺用第一配线200连接一发光单元的N电极和与之相邻的另一发光单元的P电极,由此制造第一与第二发光单元区块(图6)。A transparent conductive film is formed on the P-type semiconductor layer 160 to manufacture the P-electrode 165 . That is, a third photoresist pattern is formed, and the P-type semiconductor layer 160 is exposed through the third photoresist pattern, the P electrode 165 is subsequently formed on the third photoresist pattern, and the third photoresist pattern is removed by a lift-off process, so that The P electrode 165 is formed on the P-type semiconductor layer 160 . Next, the N-electrode 125 is formed on the N-type semiconductor layer 120, and the N-electrode 125 is formed of a conductive film of a metal (such as Ti, Au, Ag, Pt, Al, or Cu). After that, the N electrode of one light-emitting unit and the P-electrode of another light-emitting unit adjacent to it are connected with the first wiring 200 through an air bridge (air bridge) or step coverage process, thereby manufacturing the first and second light-emitting units. The second light-emitting unit block (FIG. 6).

上述第一发光单元区块两端的N电极与P电极分别连接到第二发光单元区块两端的P电极与N电极,第二发光单元区块的阳极与阴极方向与第一发光单元区块相反。通过空气桥或阶梯覆盖工艺用第二配线210连接第一发光单元区块的发光单元250a和与之对应的第二发光单元区块的发光单元250b,由此完成AC发光器件(参见图1)。The N electrodes and P electrodes at both ends of the first light emitting unit block are respectively connected to the P electrodes and N electrodes at both ends of the second light emitting unit block, and the direction of the anode and the cathode of the second light emitting unit block is opposite to that of the first light emitting unit block . The light-emitting unit 250a of the first light-emitting unit block and the corresponding light-emitting unit 250b of the second light-emitting unit block are connected with the second wiring 210 through an air bridge or step covering process, thereby completing the AC light-emitting device (see FIG. 1 ).

此时,发光单元的P电极通过第二配线彼此连接。很显然,N电极也可以通过第二配线彼此连接。进一步,尽管在上述工艺中,第一与第二配线通过两种工艺形成,但是它们可以通过一种工艺同时形成。At this time, the P electrodes of the light emitting units are connected to each other through the second wiring. Obviously, the N electrodes can also be connected to each other through the second wiring. Further, although in the above process, the first and second wirings are formed by two processes, they may be simultaneously formed by one process.

空气桥工艺的步骤如下:在要彼此连接的芯片之间涂附感光液体并通过光学工艺进行显影,以便形成光阻图案;通过例如真空沉积等方法首先在第一光阻图案上形成薄膜,薄膜由金属或类似材料制成;并且通过例如电镀或金属沉积等方法再次在薄膜上涂附特定厚度的含金的导电材质。随后,使用溶解溶液来移除光阻图案,使得导电材质下方的所有部分被移除并且仅在空气中形成桥形式的导电材质。The steps of the air bridge process are as follows: apply a photosensitive liquid between the chips to be connected to each other and develop it through an optical process to form a photoresist pattern; first form a thin film on the first photoresist pattern by methods such as vacuum deposition, the thin film Made of metal or similar material; and coated again with a specific thickness of gold-containing conductive material on the film by methods such as electroplating or metal deposition. Subsequently, a dissolving solution is used to remove the photoresist pattern, so that all parts under the conductive material are removed and only the conductive material in the form of a bridge is formed in the air.

进一步,在阶梯覆盖工艺中,在要彼此连接的芯片之间涂附感光液体并通过光学工艺进行显影,使得要彼此连接的部分未被覆盖,同时其它部分覆盖光阻图案,并且通过例如电镀或金属沉积等方法在光阻图案上涂附特定厚度的含金的导电材质。随后,使用溶解溶液来移除光阻图案,使得所有未被导电材料覆盖的部分被移除,并且仅留下覆盖部分以便电连接要彼此连接的芯片。Further, in the step-covering process, a photosensitive liquid is applied between the chips to be connected to each other and developed by an optical process, so that the parts to be connected to each other are not covered, while other parts are covered with the photoresist pattern, and are processed by, for example, electroplating or Metal deposition and other methods coat a specific thickness of gold-containing conductive material on the photoresist pattern. Subsequently, a dissolving solution is used to remove the photoresist pattern, so that all portions not covered by the conductive material are removed, and only the covered portion is left to electrically connect the chips to be connected to each other.

接下来,将描述根据本发明另一实施例的发光器件,其具有倒装芯片结构,其中通过子镶嵌基板的金属凸块连接对应的发光单元。在后续实施例中省略了与上述实施例重复的描述。Next, a light emitting device according to another embodiment of the present invention will be described, which has a flip chip structure in which corresponding light emitting units are connected through metal bumps of a sub-damascene substrate. In subsequent embodiments, descriptions that overlap with the above-mentioned embodiments are omitted.

图7至图9是显示本发明另一实施例的视图。7 to 9 are views showing another embodiment of the present invention.

图7显示了根据本发明另一实施例的发光器件。此发光器件包括:第一基板,其包含位于基板100一侧的具有串联连接的多个正向偏置的发光单元250a的第一发光单元区块和位于基板100另一侧的具有串联连接的多个反向偏置的发光单元250b的第二发光单元区块;以及倒装接合到第一基板上的子镶嵌基板300,以便彼此电连接第一发光单元区块的各发光单元250a的P电极165与第二发光单元区块的各发光单元250b的P电极165。Fig. 7 shows a light emitting device according to another embodiment of the present invention. This light-emitting device includes: a first substrate, which includes a first light-emitting unit block with a plurality of forward-biased light-emitting units 250a connected in series on one side of the substrate 100 and a plurality of forward-biased light-emitting units 250a connected in series on the other side of the substrate 100. A second light-emitting unit block of a plurality of reverse-biased light-emitting units 250b; and a sub-damascene substrate 300 flip-chip bonded to the first substrate, so as to electrically connect the Ps of each light-emitting unit 250a of the first light-emitting unit block to each other. The electrode 165 is connected to the P electrode 165 of each light emitting unit 250b of the second light emitting unit block.

金属凸块用于倒装接合到子镶嵌基板300上,并且形成于P电极165上。通过在预定温度下执行超声波接合(ultrasonic bonding)或回流焊接工艺(reflowsoldering)预定的时间段来倒装接合金属凸块。尽管金(Au)、Pb/Sn或类似材料可用于作为金属凸块180,但在本实施例中可使用Pb/Sn。Metal bumps are used for flip-chip bonding to the sub-Damascene substrate 300 and are formed on the P-electrodes 165 . The metal bumps are flip-chip bonded by performing ultrasonic bonding or reflow soldering at a predetermined temperature for a predetermined period of time. Although gold (Au), Pb/Sn, or similar materials may be used as the metal bump 180, Pb/Sn may be used in this embodiment.

超声波接合工艺是在金属凸块180具有像金(Au)这样的高熔点的情况下所采用的工艺。施加竖直压力和60Hz的水平超声波振动来在室温下实现接合。由于通过压力和振动打破氧化膜来产生金属触点并且操作在室温下进行,因而形成冷焊接。The ultrasonic bonding process is a process employed in the case where the metal bump 180 has a high melting point like gold (Au). Bonding was achieved at room temperature by applying vertical pressure and horizontal ultrasonic vibrations at 60 Hz. Cold welds are formed because the metal contacts are created by breaking the oxide film through pressure and vibration and the operation is carried out at room temperature.

回流焊接工艺是在金属凸块180具有低熔点的合金(例如Pb/Sn)情况下所采用的工艺。回流焊接工艺用于通过使得印刷电路布配线板(printedcircuit wiring board)(其上提供有焊膏并且安装有电子器件)经过加热炉来电连接印刷电路布线板与电子器件,熔炉具有设定好焊接温度(solderingtemperature)的高温大气。回流焊接工艺根据加热源可以分类成红外回流(infrared reflow)、热空气回流(hot airreflow)、红外及热空气回流(infrared andhot air reflow)、使用惰性溶液或类似溶液的蒸发潜热的回流。The reflow soldering process is a process used in the case that the metal bump 180 has an alloy with a low melting point (eg, Pb/Sn). The reflow soldering process is used to electrically connect a printed circuit wiring board and electronic devices by passing a printed circuit wiring board (on which solder paste is provided and electronic devices are mounted) through a heating furnace with a set soldering Temperature (solderingtemperature) of the high temperature atmosphere. The reflow soldering process can be classified into infrared reflow, hot air reflow, infrared and hot air reflow, and reflow using the latent heat of evaporation of an inert solution or similar solution according to the heating source.

第一发光单元区块具有通过由金属制成的第一配线200串联连接的正向偏置的发光单元250a。第二发光单元区块的结构与第一发光单元区块相同,但是具有由第一配线200串联连接的反向偏置的发光单元250b。当施加AC电力时,第一发光单元区块在正电压的情况下被点亮,而第二发光单元区块则在负电压的情况下被点亮。The first light emitting cell block has forward biased light emitting cells 250a connected in series through the first wiring 200 made of metal. The structure of the second light-emitting cell block is the same as that of the first light-emitting cell block, but has reverse-biased light-emitting cells 250 b connected in series by the first wiring 200 . When AC power is applied, the first light-emitting unit block is turned on under a positive voltage, and the second light-emitting unit block is turned on under a negative voltage.

子镶嵌基板300用于从发光单元250散热并向发光单元施加外部电力。第一发光单元区块的各发光单元的电极与第二发光单元区块的各发光单元的电极在子镶嵌基板300上通过金属配线彼此连接。也就是,金属垫320形成于子镶嵌基板300上以便电连接正向偏置的发光单元250a的P电极165和与之对应的反向偏置的发光单元250b的P电极。此时,金属垫320可通过图8所示的第二配线210a或者图9所示的配线210b连接。图9所示的配线210b在金属垫形成于子镶嵌基板300上时连接于金属垫320之间。The sub-mosaic substrate 300 is used to dissipate heat from the light emitting unit 250 and apply external power to the light emitting unit. The electrodes of the light-emitting units in the first light-emitting unit block and the electrodes of the light-emitting units in the second light-emitting unit block are connected to each other on the sub-mosaic substrate 300 through metal wires. That is, the metal pad 320 is formed on the sub-damascene substrate 300 so as to electrically connect the P-electrode 165 of the forward-biased light-emitting unit 250a and the corresponding P-electrode of the reverse-biased light-emitting unit 250b. At this time, the metal pads 320 may be connected through the second wiring 210 a shown in FIG. 8 or the wiring 210 b shown in FIG. 9 . The wiring 210 b shown in FIG. 9 is connected between the metal pads 320 when the metal pads are formed on the sub-damascene substrate 300 .

与根据上述实施例的发光单元相比,各发光单元进一步包括形成于P电极165上的金属凸块180。P电极165是欧姆电极并且起到经第一配线200将电压输出均匀地传输到P型半导体层160上的作用。Each light emitting unit further includes a metal bump 180 formed on the P electrode 165 compared to the light emitting unit according to the above-described embodiments. The P electrode 165 is an ohmic electrode and functions to uniformly transmit a voltage output to the P-type semiconductor layer 160 via the first wiring 200 .

图10至图12是根据本发明其它实施例的发光器件的制造工艺的截面图。10 to 12 are cross-sectional views of a manufacturing process of a light emitting device according to other embodiments of the present invention.

将参照图10至图12讨论上述发光器件的制造工艺。在根据本发明的其它实施例的发光器件中,半导体层通过与上述实施例相同的方法形成于基板100上,通过空气桥或阶梯覆盖工艺用第一配线200连接一发光单元的N电极125与另一发光单元的P电极165,并且将由合金(例如Pb/Sn)制成的金属凸块180接合到P电极165的顶部,以便制造第一与第二发光单元区块(图10)。A manufacturing process of the above-described light emitting device will be discussed with reference to FIGS. 10 to 12 . In light-emitting devices according to other embodiments of the present invention, the semiconductor layer is formed on the substrate 100 by the same method as in the above-mentioned embodiments, and the N-electrode 125 of a light-emitting unit is connected with the first wiring 200 through an air bridge or step covering process. P-electrode 165 of another light-emitting unit, and a metal bump 180 made of an alloy (eg, Pb/Sn) is bonded to the top of the P-electrode 165 to fabricate the first and second light-emitting unit blocks (FIG. 10).

此时,为了防止金属凸块180在熔化时由于湿度(wetness)而流到其它位置,可在金属凸块的周围形成钝化层(未图示)。钝化层不仅起到绝缘金属凸块180的作用,还保护发光单元250不受杂质、湿气或类似物的影响。At this time, in order to prevent the metal bump 180 from flowing to other locations due to wetness during melting, a passivation layer (not shown) may be formed around the metal bump. The passivation layer not only functions to insulate the metal bump 180, but also protects the light emitting unit 250 from impurities, moisture, or the like.

第一发光单元区块两端的P电极和N电极与第二发光单元区块两端的N电极以及P电极彼此连接,以便完成第一基板。The P electrodes and N electrodes at both ends of the first light emitting unit block are connected to the N electrodes and P electrodes at both ends of the second light emitting unit block, so as to complete the first substrate.

同时,子镶嵌基板300具有由导电且导热的材料制成的下层,此材料例如是SiC、Si、Ge、SiGe、AlN或金属,并且使用单独的模具进行制造。电介质膜310形成于此下层的整个表面上,电介质膜310由流动电流为1μA或更低的电介质材料或完全不流动电流的绝缘材料制成。此时,如果不用导电材作为子镶嵌基板300的下层,则可以不形成电介质膜310。在本实施例中,使用金属化材料(也就是,具有优越的导电性的材料)来增强导热性。因而,形成电介质膜310来提供足够的绝缘。之后,使用预定的掩模图案通过丝网印刷方法或沉积工艺将例如由Cr、Au、Ti或Cu等金属制成的金属垫320形成于子镶嵌基板300的电介质膜310上,使得第一基板的金属凸块180由于其湿度而接合到子镶嵌基板300上。Meanwhile, the sub-damascene substrate 300 has a lower layer made of an electrically and thermally conductive material such as SiC, Si, Ge, SiGe, AlN, or metal, and is manufactured using a separate mold. A dielectric film 310 is formed on the entire surface of this lower layer, and the dielectric film 310 is made of a dielectric material that flows a current of 1 μA or less or an insulating material that does not flow a current at all. At this time, if no conductive material is used as the lower layer of the sub-damascene substrate 300, the dielectric film 310 may not be formed. In this embodiment, metallization materials (ie, materials with superior electrical conductivity) are used to enhance thermal conductivity. Thus, the dielectric film 310 is formed to provide sufficient insulation. Afterwards, a metal pad 320 made of metal such as Cr, Au, Ti, or Cu is formed on the dielectric film 310 of the sub-damascene substrate 300 by a screen printing method or a deposition process using a predetermined mask pattern, so that the first substrate The metal bumps 180 are bonded to the sub-Damascene substrate 300 due to its humidity.

在形成金属垫320之后,要连接到外部的接合垫330a与330b形成于子镶嵌基板300的两端,由此完成子镶嵌基板300(图11)After forming the metal pad 320, bonding pads 330a and 330b to be connected to the outside are formed at both ends of the sub-damascene substrate 300, thereby completing the sub-damascene substrate 300 (FIG. 11)

之后,第一基板与子镶嵌基板300通过倒装芯片工艺彼此接合(图12)。也就是,通过回流焊接工艺使形成于第一基板的P电极165上的金属凸块180成球形,并且将正向与反向偏置的发光单元250a和250b的P电极接合到子镶嵌基板300的金属垫320上。Thereafter, the first substrate and the sub-damascene substrate 300 are bonded to each other by a flip chip process (FIG. 12). That is, the metal bumps 180 formed on the P electrodes 165 of the first substrate are spherically formed through a reflow soldering process, and the P electrodes of the forward and reverse biased light emitting units 250a and 250b are bonded to the sub-damascene substrate 300. on the metal pad 320.

此时,各正向偏置的发光单元250a的P电极165和与之对应的各反向偏置的发光单元250b的P电极165通过金属垫320彼此电连接。金属垫320通过第二配线210彼此连接,或者它们可以通过在形成金属垫320时形成的配线彼此连接。At this time, the P electrodes 165 of each forward-biased light-emitting unit 250 a and the corresponding P-electrodes 165 of each reverse-biased light-emitting unit 250 b are electrically connected to each other through the metal pad 320 . The metal pads 320 are connected to each other by the second wiring 210 , or they may be connected to each other by a wiring formed when the metal pad 320 is formed.

尽管相应发光单元区块的电极通过上文所描述的子镶嵌基板300上的金属配线彼此连接,但本发明并不局限于此。相应发光单元区块的电极可在第一基板上彼此连接。也就是,通过与上述实施例相同的方法利用第二配线210在第一基板上将第一发光单元区块的各第一发光单元250a的P电极165和与之对应的第二发光单元区块的各发光单元的P电极165彼此电连接。Although the electrodes of the corresponding light emitting unit blocks are connected to each other through the metal wires on the sub-damascene substrate 300 described above, the present invention is not limited thereto. Electrodes of corresponding light emitting cell blocks may be connected to each other on the first substrate. That is, the P electrode 165 of each first light-emitting unit 250a of the first light-emitting unit block and the corresponding second light-emitting unit area are connected on the first substrate by using the second wiring 210 through the same method as the above-mentioned embodiment. The P electrodes 165 of the light emitting cells of the block are electrically connected to each other.

由于在倒装芯片工艺中使用回流焊接工艺接合金属凸块180,因此可以获得自对准效果。Since the metal bump 180 is bonded using a reflow soldering process in a flip chip process, a self-alignment effect may be obtained.

在已经进行此工艺后,将子镶嵌基板300切割成特定尺寸,以形成倒装芯片,进行晶粒接合使得各子镶嵌基板300安装于基板(未图示)上以便进行组装,并且进行组装的基板的电极通过配线连接到子镶嵌基板300的接合垫330a以及330b上,藉此完成AC倒装芯片。After this process has been performed, the sub-Damascene substrates 300 are cut into specific dimensions to form flip chips, die bonding is performed so that each sub-Damascene substrate 300 is mounted on a substrate (not shown) for assembly, and the assembly is performed. The electrodes of the substrate are connected to the bonding pads 330a and 330b of the sub-damascene substrate 300 through wires, thereby completing the AC flip chip.

晶粒接合是一种半导体器件的组装技术,并且是一种将半导体芯片安装到封装体上的技术。晶粒接合用于将半导体芯片固定于封装体上并且实现芯片与封装体之间的电连接。一般来说,热压接合(thermocompression bonding)或超声波焊接技术可用于晶粒接合。Die bonding is an assembly technique of a semiconductor device, and is a technique of mounting a semiconductor chip on a package. Die bonding is used to fix the semiconductor chip on the package and realize the electrical connection between the chip and the package. Generally, thermocompression bonding or ultrasonic welding techniques can be used for die bonding.

如上文所描述的,根据本发明,形成于AC发光器件内的多个发光单元彼此并联连接。因而,可以提供一种发光器件,其中即使在某些发光单元中出现漏电流,此电流可穿越在另一方向上连接的发光单元,由此避免由于漏电流在某些发光单元上产生的过载且确保均匀的光发射,并且延长AC发光器件的寿命。As described above, according to the present invention, a plurality of light emitting units formed in an AC light emitting device are connected to each other in parallel. Thus, it is possible to provide a light-emitting device in which even if leakage current occurs in some light-emitting units, this current can pass through light-emitting units connected in the other direction, thereby avoiding overload on some light-emitting units due to leakage current and Ensures uniform light emission and prolongs the life of AC light emitting devices.

本发明的范围不限于上述实施例,而是由所附权利要求定义。本领域技术人员显然可以进行各种修改和修饰,这些修改和修饰落在权利要求定义的范围内。The scope of the present invention is not limited to the above-described embodiments, but is defined by the appended claims. Various modifications and modifications will be apparent to those skilled in the art, which fall within the scope defined in the claims.

Claims (6)

1.一种发光器件,其特征在于其包括:1. A light emitting device, characterized in that it comprises: 基板;以及substrate; and 第一和第二发光单元区块,形成于所述基板上,并且分别具有多个彼此串联电连接的发光单元,各所述发光单元具有N电极和P电极,The first and second light-emitting unit blocks are formed on the substrate and respectively have a plurality of light-emitting units electrically connected to each other in series, each of the light-emitting units has an N electrode and a P electrode, 其中所述第一发光单元区块一端的P电极连接到所述第二发光单元区块一端的N电极,并且所述第一发光单元区块另一端的N电极连接到所述第二发光单元区块的另一端的P电极;并且Wherein the P electrode at one end of the first light emitting unit block is connected to the N electrode at one end of the second light emitting unit block, and the N electrode at the other end of the first light emitting unit block is connected to the second light emitting unit the P electrode at the other end of the block; and 所述第一发光单元区块的各发光单元的P电极和与之对应的所述第二发光单元区块的各发光单元的P电极或者所述第一发光单元区块的各发光单元的N电极和与之对应的所述第二发光单元区块的各发光单元的N电极彼此电连接。The P electrode of each light emitting unit of the first light emitting unit block and the corresponding P electrode of each light emitting unit of the second light emitting unit block or the N electrode of each light emitting unit of the first light emitting unit block The electrodes and the corresponding N electrodes of the light emitting units of the second light emitting unit block are electrically connected to each other. 2.如权利要求1所述的发光器件,其特征在于:进一步包括倒装接合于所述第一和第二发光单元区块上的子镶嵌基板。2. The light emitting device according to claim 1, further comprising a sub-damascene substrate flip-chip bonded to the first and second light emitting unit blocks. 3.如权利要求2所述的发光器件,其特征在于:在所述子镶嵌基板与所述相应发光单元之间形成金属垫。3. The light emitting device according to claim 2, wherein a metal pad is formed between the sub-damascene substrate and the corresponding light emitting unit. 4.如权利要求2或3所述的发光器件,其特征在于:在所述子镶嵌基板上形成金属配线,并且所述第一发光单元区块的各发光单元的P电极和与之对应的所述第二发光单元区块的各发光单元的P电极通过所述金属配线彼此电连接,或者所述第一发光单元区块的各发光单元的N电极和与之对应的所述第二发光单元区块的各发光单元的N电极通过所述金属配线彼此电连接。4. The light-emitting device according to claim 2 or 3, characterized in that: metal wiring is formed on the sub-damascene substrate, and the P electrodes of each light-emitting unit in the first light-emitting unit block correspond to The P electrodes of the light-emitting units of the second light-emitting unit block are electrically connected to each other through the metal wiring, or the N electrodes of the light-emitting units of the first light-emitting unit block and the corresponding first The N electrodes of the light emitting units of the two light emitting unit blocks are electrically connected to each other through the metal wiring. 5.如权利要求4所述的发光器件,其特征在于其中所述子镶嵌基板的金属配线包括金属垫,并且所述金属垫通过第二配线或者通过形成于所述金属垫之间的配线进行连接。5. The light emitting device according to claim 4, wherein the metal wiring of the sub-damascene substrate includes metal pads, and the metal pads pass through the second wiring or through the metal pads formed between the metal pads. Wiring for connection. 6.如权利要求1-3中任意一项所述的发光器件,其特征在于其中所述发光单元包括:6. The light emitting device according to any one of claims 1-3, wherein the light emitting unit comprises: 形成于所述基板上的N型半导体层;an N-type semiconductor layer formed on the substrate; 形成于所述N型半导体层上的一定区域内的P型半导体层;以及a P-type semiconductor layer formed in a certain area on the N-type semiconductor layer; and 分别形成于所述N型和P型半导体层上的N电极和P电极。An N electrode and a P electrode are respectively formed on the N-type and P-type semiconductor layers.
CN2006800283235A 2005-08-08 2006-08-08 Alternating current light emitting device Expired - Fee Related CN101233624B (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR1020050072291 2005-08-08
KR1020050072291A KR100616415B1 (en) 2005-08-08 2005-08-08 AC light emitting device
KR10-2005-0072291 2005-08-08
PCT/KR2006/003118 WO2007018401A1 (en) 2005-08-08 2006-08-08 Alternating current light emitting device

Publications (2)

Publication Number Publication Date
CN101233624A CN101233624A (en) 2008-07-30
CN101233624B true CN101233624B (en) 2012-03-21

Family

ID=37601220

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2006800283235A Expired - Fee Related CN101233624B (en) 2005-08-08 2006-08-08 Alternating current light emitting device

Country Status (6)

Country Link
US (1) US8350276B2 (en)
EP (1) EP1915786A4 (en)
JP (1) JP2009505393A (en)
KR (1) KR100616415B1 (en)
CN (1) CN101233624B (en)
WO (1) WO2007018401A1 (en)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100616415B1 (en) * 2005-08-08 2006-08-29 서울옵토디바이스주식회사 AC light emitting device
KR100634307B1 (en) * 2005-08-10 2006-10-16 서울옵토디바이스주식회사 Light emitting device and manufacturing method thereof
WO2009152062A2 (en) * 2008-06-09 2009-12-17 Nitek, Inc. Ultraviolet light emitting diode with ac voltage operation
KR100974923B1 (en) * 2007-03-19 2010-08-10 서울옵토디바이스주식회사 Light emitting diode
US8461613B2 (en) 2008-05-27 2013-06-11 Interlight Optotech Corporation Light emitting device
JP5123269B2 (en) * 2008-09-30 2013-01-23 ソウル オプト デバイス カンパニー リミテッド Light emitting device and manufacturing method thereof
KR100986570B1 (en) * 2009-08-31 2010-10-07 엘지이노텍 주식회사 Semiconductor light emitting device and fabrication method thereof
DE102009051129A1 (en) * 2009-10-28 2011-06-01 Osram Opto Semiconductors Gmbh Optoelectronic component and method for producing an optoelectronic component
TWI420959B (en) * 2010-10-20 2013-12-21 Advanced Optoelectronic Tech Led module
US9373666B2 (en) 2011-02-25 2016-06-21 The Regents Of The University Of Michigan System and method of forming semiconductor devices
KR101220426B1 (en) 2011-09-19 2013-02-05 서울옵토디바이스주식회사 Light emitting device having plurality of light emitting cells
JP5939055B2 (en) * 2012-06-28 2016-06-22 住友電気工業株式会社 Semiconductor device and manufacturing method of semiconductor device
US10910350B2 (en) * 2014-05-24 2021-02-02 Hiphoton Co., Ltd. Structure of a semiconductor array
JP6928233B2 (en) 2017-04-05 2021-09-01 日亜化学工業株式会社 Light emitting device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5094970A (en) * 1988-11-07 1992-03-10 Mitsubishi Denki Kabushiki Kaisha Method of making a light emitting diode array
US6770498B2 (en) * 2002-06-26 2004-08-03 Lingsen Precision Industries, Ltd. LED package and the process making the same

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5464470U (en) * 1977-10-14 1979-05-08
JPS5464470A (en) 1977-11-01 1979-05-24 Toshiba Corp Pouring type tool
US5936599A (en) * 1995-01-27 1999-08-10 Reymond; Welles AC powered light emitting diode array circuits for use in traffic signal displays
CN1159750C (en) * 1997-04-11 2004-07-28 日亚化学工业株式会社 Growth method of nitride semiconductor
WO1999020085A1 (en) 1997-10-10 1999-04-22 Se Kang Electric Co., Ltd. Electric lamp circuit and structure using light emitting diodes
US6885035B2 (en) * 1999-12-22 2005-04-26 Lumileds Lighting U.S., Llc Multi-chip semiconductor LED assembly
US6547249B2 (en) * 2001-03-29 2003-04-15 Lumileds Lighting U.S., Llc Monolithic series/parallel led arrays formed on highly resistive substrates
JP3824497B2 (en) * 2001-04-18 2006-09-20 株式会社沖データ Light emitting element array
JP3822545B2 (en) * 2002-04-12 2006-09-20 士郎 酒井 Light emitting device
JP4309106B2 (en) 2002-08-21 2009-08-05 士郎 酒井 InGaN-based compound semiconductor light emitting device manufacturing method
EP2149906A3 (en) * 2002-08-29 2014-05-07 Seoul Semiconductor Co., Ltd. Light-emitting device having light-emitting diodes
US7009199B2 (en) * 2002-10-22 2006-03-07 Cree, Inc. Electronic devices having a header and antiparallel connected light emitting diodes for producing light from AC current
US7213942B2 (en) * 2002-10-24 2007-05-08 Ac Led Lighting, L.L.C. Light emitting diodes for high AC voltage operation and general lighting
US7473934B2 (en) * 2003-07-30 2009-01-06 Panasonic Corporation Semiconductor light emitting device, light emitting module and lighting apparatus
US20050133806A1 (en) * 2003-12-17 2005-06-23 Hui Peng P and N contact pad layout designs of GaN based LEDs for flip chip packaging
TW200501464A (en) 2004-08-31 2005-01-01 Ind Tech Res Inst LED chip structure with AC loop
JP3904571B2 (en) * 2004-09-02 2007-04-11 ローム株式会社 Semiconductor light emitting device
KR100616415B1 (en) * 2005-08-08 2006-08-29 서울옵토디바이스주식회사 AC light emitting device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5094970A (en) * 1988-11-07 1992-03-10 Mitsubishi Denki Kabushiki Kaisha Method of making a light emitting diode array
US6770498B2 (en) * 2002-06-26 2004-08-03 Lingsen Precision Industries, Ltd. LED package and the process making the same

Also Published As

Publication number Publication date
US20080210954A1 (en) 2008-09-04
EP1915786A1 (en) 2008-04-30
KR100616415B1 (en) 2006-08-29
WO2007018401A1 (en) 2007-02-15
US8350276B2 (en) 2013-01-08
EP1915786A4 (en) 2011-12-14
JP2009505393A (en) 2009-02-05
CN101233624A (en) 2008-07-30

Similar Documents

Publication Publication Date Title
CN101233624B (en) Alternating current light emitting device
JP4632690B2 (en) Semiconductor light emitting device and manufacturing method thereof
US7192797B2 (en) Light emitting device and manufacture method thereof
US7736945B2 (en) LED assembly having maximum metal support for laser lift-off of growth substrate
JP5513707B2 (en) Interconnection of semiconductor light emitting devices
US10475778B2 (en) Optoelectronic component and method for producing an optoelectronic component
JP5432234B2 (en) Mounting for semiconductor light emitting devices
US20070126016A1 (en) Light emitting device and manufacture method thereof
US7364926B2 (en) Method for manufacturing gallium nitride light emitting diode devices
JP2002057374A (en) Semiconductor light emitting device
CN1971952A (en) Converse welding method of high power LED chip
JP2005051233A (en) Semiconductor light emitting device and manufacturing method thereof
CN102237349A (en) light emitting device
KR100708604B1 (en) Flip chip light emitting device using low melting metal bump and manufacturing method thereof
JP2023051712A (en) Method for manufacturing light-emitting device
KR20230111840A (en) Light emitting diode module

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
C56 Change in the name or address of the patentee

Owner name: SEOUL WEIAOSHI CO., LTD.

Free format text: FORMER NAME: SEOUL OPTO DEVICE CO., LTD.

CP03 Change of name, title or address

Address after: South Korea Gyeonggi Do Anshan City

Patentee after: SEOUL VIOSYS Co.,Ltd.

Address before: Gyeonggi Do, South Korea

Patentee before: SEOUL OPTO DEVICE Co.,Ltd.

CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20120321

CF01 Termination of patent right due to non-payment of annual fee