CN101232284A - Anti-electromagnetic interference low-power dissipation high pressure driving circuit - Google Patents
Anti-electromagnetic interference low-power dissipation high pressure driving circuit Download PDFInfo
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- CN101232284A CN101232284A CNA200810020736XA CN200810020736A CN101232284A CN 101232284 A CN101232284 A CN 101232284A CN A200810020736X A CNA200810020736X A CN A200810020736XA CN 200810020736 A CN200810020736 A CN 200810020736A CN 101232284 A CN101232284 A CN 101232284A
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Abstract
The invention provides a drive circuit with low power consumption and high pressure which can resist electromagnetic interference. The drive circuit comprises a level conversion stage (1), a buffer stage (2) and a high pressure output stage (3), wherein a first control signal and a second control signal (LV1, LV2) are connected with the level conversion stage (1); the output (HV2) of the level conversion stage (1) and a third control signal (LV3-1, LV3-2 to LV3-n) are connected with the buffer stage (2); the output (HV3-n) of the buffer stage (2) and a fourth control signal as well as a fifth control signal (LV4, LV5) are connected with the high pressure output stage (3); the high pressure output stage (3) comprises a electromagnetic interference resistance circuit module composed of a high pressure N-type MOS tube; the fifth control signal (LV5) is connected with a grid of the N-type MOS tube; the output of the high pressure output stage is connected with a drain electrode of the N-type MOS tube; a source electrode of the N-type MOS tube is earthed. On the premise that the chip area is not increased, the invention realizes the function of reducing the electromagnetic interference by using the simple circuit.
Description
Technical field
The present invention relates to a kind of low-power dissipation high pressure driving circuit, particularly a kind of low-power dissipation high pressure driving circuit of anti-electromagnetic interference.During work, low pressure generally (comprises 5V) below 5V, and high pressure can be from 5V to 500V, even higher.
Background technology
Develop rapidly along with semicon industry, the application of all kinds of power integrated chips constantly enlarges, the for example control of alternating current machine, Driving Circuit Technology of Flat Panel Display, printer driver circuit and sound power amplification system or the like, and these chip for driving all need high-voltage driving circuit to be used to drive load.But because the operating voltage of this class chip is bigger, output pin is more, and the saltus step meeting of output level causes and the rapid variation of electric current cause electromagnetic emission, thereby influence the operate as normal of peripheral circuits or equipment, even to the certain influence of human body generation.Cause simultaneously in the resistance of circuit and the contact conductor resistance to have extra energy loss, bring the power problems of system and stability to reduce, and not enough environmental protection.
Summary of the invention
The objective of the invention is to address the above problem, a kind of anti-electromagnetic interference low-power dissipation high pressure driving circuit is provided, it can realize reducing the function of electromagnetic interference with ball bearing made using under the prerequisite that does not increase chip area.
The present invention adopts following technical scheme to solve technical problem:
A kind of anti-electromagnetic interference low-power dissipation high pressure driving circuit, comprise level conversion level, high pressure output stage, first, second control signal connects first, second input of level conversion level, the output of level conversion level connects the first input end of high pressure output stage, the 4th control signal connects second input of high pressure output stage, comprise the anti-electromagnetic interference circuit module of forming by high-pressure N-shaped metal-oxide-semiconductor in the high pressure output stage, the 5th control signal connects the grid of above-mentioned N type metal-oxide-semiconductor, the output of high pressure output stage connects the drain electrode of above-mentioned N type metal-oxide-semiconductor, the source ground of above-mentioned N type metal-oxide-semiconductor.
A kind of anti-electromagnetic interference low-power dissipation high pressure driving circuit, comprise level conversion level, high pressure output stage, first, second control signal connects first, second input of level conversion level, the output of level conversion level connects the first input end of high pressure output stage, the 4th control signal connects second input of high pressure output stage, comprise the anti-electromagnetic interference module of forming by high-pressure N-shaped IGBT in the high pressure output stage, the 5th control signal connects the grid of above-mentioned N type IGBT, the anode of the above-mentioned N type of the output of above-mentioned high pressure output stage IGBT, the minus earth of above-mentioned N type IGBT.
In addition, be provided with buffer stage between level conversion level and high pressure output stage, the output of level conversion level connects the first input end of buffer stage, and the 3rd control signal connects other inputs of buffer stage, and the output of buffer stage connects the first input end of high pressure output stage.
Compared with prior art, the present invention has following advantage:
(1) reduced power consumption under the prerequisite that chip area does not change.
(2) high-voltage driving circuit uses several separate low-voltage signals to control, and by rational sequencing control, can guarantee that the high pressure P pipe of buffer stage and high pressure output stage and high pressure N pipe can not open simultaneously, also just can not have the power consumption of conducting simultaneously.
(3) existence of buffer stage circuit can greatly reduce the size of level conversion level high-voltage tube, thus conducting power consumption when can greatly reduce the level conversion level.
(4) this high-voltage driving circuit is by regulating the sequential of several separate low-voltage control signals, and the duty ratio that can make the high pressure output signal is near 1.
(5) on prior art high-tension circuit basis, increase a N type high-voltage tube newly, realized reducing the function of electromagnetic interference.
(6) influence of this chip to peripheral circuits and environment, more environmental protection have been reduced.
(7) the buffer stage circuit can shield the interference of high pressure output signal to level conversion level circuit, and the antijamming capability of whole high-voltage driving circuit strengthens greatly.
(8) circuit is convenient, realizes simply the function practicality.
Description of drawings
Fig. 1 (a) is the general high voltage drive circuit theory diagram of anti-electromagnetic interference (hereinafter to be referred as EMI), and Fig. 1 (b) is anti-EMI, have the high-voltage driving circuit theory diagram of buffer stage.
Fig. 2 (a) is the general high voltage drive circuit of anti-EMI, the high-voltage driving circuit that Fig. 2 (b) is anti-EMI, have buffer stage, be made up of the high pressure NMOS pipe, the anti-EMI of Fig. 2 (c), the high-voltage driving circuit that has buffer stage, is made up of N type IGBT.
Fig. 3 (a) is that the buffer stage number is an odd number, and promptly afterbody n is the input and output waveform of odd number; Fig. 3 (b) is that the buffer stage number is an even number, the input and output waveform when promptly afterbody n is even number.
Fig. 4 is the oscillogram of high pressure output signal HV2 and low-voltage control signal LV3_n.
Fig. 5 is the oscillogram of high pressure output signal HV3_n and low-voltage control signal LV4, LV5.
Fig. 6 is the output waveform behind the anti-EMI circuit module of increase.
Embodiment
Fig. 1 (a) is the general high voltage drive circuit theory diagram of anti-EMI, it mainly is made up of two parts: level conversion level 1 and high pressure output stage 3, realize by several low-voltage signals (at 0V and Vcc (5V for example, represent low-tension supply) between change) control, be converted to a high pressure output signal Q (between 0V and Vccp (for example 200V represents high voltage source), changing).The present invention increases the module of an anti-EMI for reducing electromagnetic interference in the high drive level.Consider the low-power consumption of drive circuit, before the high pressure output stage, increase what buffer stage, theory diagram is shown in Fig. 1 (b), mainly form: level conversion level 1 by three parts, buffer stage 2 and high pressure output stage 3, realize the high drive function, the same module of an anti-EMI that increases in the high drive level is to reduce electromagnetic interference.
Fig. 2 (a) is the general high voltage drive circuit of anti-EMI, and it mainly is made up of level conversion level 1 and high pressure output stage 3 two parts, increases anti-EMI module in high pressure output stage 3.Consider the low-power consumption of drive circuit, before the high pressure output stage, increase what buffer stage, shown in Fig. 2 (b), be anti-EMI, the high-voltage driving circuit that has buffer stage, form by the high pressure NMOS pipe, and the high-voltage driving circuit of prior art is cast out anti-EMI module exactly in Fig. 2 (b).The buffer stage number is 0 situation, i.e. n=0 in the situation corresponding diagram 2 (b) of Fig. 2 (a).This circuit realizes that with the high pressure NMOS pipe in addition, we also can realize this circuit with other high-voltage tube without type, as in Fig. 2 (c), have considered to change the high pressure NMOS pipe into N type IGBT, and its circuit structure and function and Fig. 2 (b) are similar.
Control signal is several separate, has certain driving force, satisfy the signal of certain time sequence relation, major function is that late-class circuit is driven, can adopt the circuit of various ways to realize, for example phase inverter cascade, NAND gate and NOR gate etc., the progression by regulating phase inverter and the breadth length ratio of low pressure N pipe and low pressure P pipe, can obtain the low-voltage driving waveform of needs, as the control signal LV1 among Fig. 2 (a), LV2, LV4, LV5, Fig. 2 (b), control signal LV1 among Fig. 2 (c), LV2, LV3_1, LV3_2, LV3_n, LV4, LV5, satisfy as Fig. 3 (a) in output waveform, (b) delay shown in requires down, and drive circuit is realized low-power consumption, anti-electromagnetic interference.Because the number of buffer stage can be set as required, therefore may be odd number, also may be that (situation of Fig. 2 (a) is corresponding to n=0 for even number, be the situation of even number), its essence is consistent, guarantee exactly to guarantee not have the existence of conducting electric current, reduced energy consumption with one-level P type high-voltage tube and the conducting simultaneously of N type high-voltage tube.Its control signal LV1 and LV2 are as the input signal of level conversion level N type high-voltage tube; Control signal LV3_1, LV3_2 ... LV3_n is as the input signal of the N type high-voltage tube of buffer stage; As the input signal of high pressure output stage N type high-voltage tube, next this process will go through respectively for low-voltage control signal LV4 and LV5.
The level conversion level receives control signal LV1, LV2, utilizes these two control signals to produce the high voltage control signal HV2 that voltage changes between 0V and Vccp.High voltage control signal HV2 is used for controlling the P type high-voltage tube P3 of output buffer stage.
The level conversion level also comprises two N type high-voltage tube N1 and N2 in addition.Two electrodes of first transistor N1 (source of NMOS pipe, leakage, negative electrode, the anode of N type IGBT) are ground connection and node HV1 respectively; And two electrodes of second transistor N2 (source of NMOS pipe, leakage, negative electrode, the anode of N type IGBT) difference ground connection and node HV2.The grid of N1 and N2 link to each other with LV2 with control signal LV1 respectively.In order to guarantee the low-power consumption of level conversion level, guarantee that any moment high-voltage tube N1 and N2 do not open simultaneously, therefore control signal LV1 and LV2 must satisfy the certain time sequence relation, and promptly certain control signal LV2 that guarantees has reduced to low level before control signal LV1 becomes high level.Equally, certain control signal LV1 that guarantees has reduced to low level before control signal LV2 becomes high level.Specifically shown in Fig. 3 (a) and (b).
In Fig. 2 (a), it after the level conversion level high pressure output stage, and in Fig. 2 (b), after the level conversion level, buffer stage is set, what buffer stage can be, each grade is made up of a P type high-voltage tube P3_n and a N type high-voltage tube N3_n respectively, and the source of P type high-voltage tube P3_n, leakage link to each other with node HV3_n with Vccp respectively, and the voltage control signal HV2 that the level conversion level produces is as the gate electrode input of P3; Two electrodes of N3_n (source of NMOS pipe, leakage, negative electrode, the anode of N type IGBT) link to each other with HV3_n with ground respectively, and control signal LV3_n is as the gate electrode input of N3_n.By the time-delay of the sequential between the low-voltage control signal, make control signal HV2 and control signal LV3_n interlaced, as shown in Figure 4, can guarantee not conducting simultaneously of P3_n and N3_n, just guaranteed that also buffer stage does not have the electric current of conducting simultaneously and exists.Simultaneously, because the existence of buffer stage circuit can shield the interference of high pressure output signal to level conversion level circuit, improved the antijamming capability of whole drive circuit.
The high pressure output stage is the part that this circuit directly is used for driving external load, generally is area the best part in the circuit therefore.The high pressure output stage is made up of a P type high-voltage tube P4 and two N type high-voltage tube N4, N5, the source of P4 links to each other with output Q with Vccp respectively with leaking, the voltage control signal HV3_n (among Fig. 2 (a) is HV_2, is equivalent to HV3_0) that buffer stage produces is as the input signal of P4 grid; The source of two electrodes of N4 (source of NMOS pipe, leakage, negative electrode, the anode of N type IGBT) is leaked respectively and is linked to each other with output Q with ground, and control signal LV4 is as the gate electrode input of N4; Two electrode connections of N5 are consistent with N4, link to each other with output Q with ground respectively, and the control signal LV5 that low-voltage control circuit produces is as the gate electrode input of N5.Because output stage is a breadth length ratio the best part in the circuit, avoiding the electric current of conducting simultaneously is most important parts in the circuit design, if there is the electric current of conducting simultaneously, the total power consumption of circuit may increase several times so.Therefore LV4, LV5 and HV3_n also will satisfy interlacedly, as shown in Figure 5, can guarantee that like this can there be the situation of while conducting in P4 and N4, N5.
Simultaneously, because the effect of transistor N5 is to reduce electromagnetic interference EMI, its grid control end LV5 and LV4 need satisfy the certain time sequence relation, at rising edge, control signal LV4 has certain time-delay than control signal LV5, it is not very high that trailing edge is required, as Fig. 3 (a) and (b), sequential shown in Figure 5.Like this, become height and control signal LV4 when not uprising at control signal LV5, output is connected to ground by N5.Need be with the size design of N5 less, for example just about 1/10th of N4, like this, output slowly reduces by N5, before output was reduced to ground, control signal LV4 also uprised, output is connected to ground rapidly by N4.Therefore obtain output trailing edge waveform shown in Figure 6, the output trailing edge has two parts, a comparatively mild output t
F-slowWith a comparatively steep decline.There is a mild output can reduce voltage over time like this, reduces the electric field that induced current produces, correspondingly,, reduce of the influence of this chip peripheral circuits and environment because electromagnetic induction phenomenon reduces the magnetic field that this output produces.The present invention, is not to be plummeted to zero, but slowly changes when allowing output change from high to low by increasing transistor N5, has reduced the electric field that induced current produces, and has reached the function that reduces EMI.
Claims (3)
1. anti-electromagnetic interference low-power dissipation high pressure driving circuit, comprise level conversion level (1), high pressure output stage (3), first, second control signal (LV1, LV2) connects first, second input of level conversion level (1), the output (HV2) of level conversion level (1) connects the first input end of high pressure output stage (3), the 4th control signal (LV4) connects second input of high pressure output stage (3), it is characterized in that
Comprise the anti-electromagnetic interference circuit module of forming by high-pressure N-shaped metal-oxide-semiconductor in the high pressure output stage (3), the 5th control signal (LV5) connects the grid of above-mentioned N type metal-oxide-semiconductor, the output (Q) of high pressure output stage (3) connects the drain electrode of above-mentioned N type metal-oxide-semiconductor, the source ground of above-mentioned N type metal-oxide-semiconductor.
2. anti-electromagnetic interference low-power dissipation high pressure driving circuit, comprise level conversion level (1), high pressure output stage (3), first, second control signal (LV1, LV2) connects first, second input of level conversion level (1), the output (HV2) of level conversion level (1) connects the first input end of high pressure output stage (3), the 4th control signal (LV4) connects second input of high pressure output stage (3), it is characterized in that
Comprise the anti-electromagnetic interference circuit module of forming by high-pressure N-shaped IGBT in the high pressure output stage (3), the 5th control signal (LV5) connects the grid of above-mentioned N type IGBT, the anode of the above-mentioned N type of output (Q) IGBT of above-mentioned high pressure output stage (3), the minus earth of above-mentioned N type IGBT.
3. anti-electromagnetic interference low-power dissipation high pressure driving circuit according to claim 1 and 2 is characterized in that,
Between level conversion level (1) and high pressure output stage (3), be provided with buffer stage (2), the output (HV2) of level conversion level (1) connects the first input end of buffer stage (2), the 3rd control signal (LV3_1, LV3_2 ... LV3_n) connect other inputs of buffer stage (2), the output (HV3_n) of buffer stage (2) connects the first input end of high pressure output stage (3).
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| CNA200810020736XA CN101232284A (en) | 2008-02-22 | 2008-02-22 | Anti-electromagnetic interference low-power dissipation high pressure driving circuit |
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| CNA200810020736XA CN101232284A (en) | 2008-02-22 | 2008-02-22 | Anti-electromagnetic interference low-power dissipation high pressure driving circuit |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102761241A (en) * | 2011-04-28 | 2012-10-31 | 苏州博创集成电路设计有限公司 | Low-electromagnetic-interference low-power-consumption high-voltage driving circuit |
| CN105127001A (en) * | 2015-09-11 | 2015-12-09 | 江苏万邦微电子有限公司 | High-voltage drive circuit device with particle blocking function |
| CN105279339A (en) * | 2015-11-10 | 2016-01-27 | 中国科学院电工研究所 | Insulated gate bipolar transistor (IGBT) model for electromagnetic interference simulation analysis |
| CN112311379A (en) * | 2019-12-17 | 2021-02-02 | 成都华微电子科技有限公司 | CML level to CMOS logic level conversion circuit |
-
2008
- 2008-02-22 CN CNA200810020736XA patent/CN101232284A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102761241A (en) * | 2011-04-28 | 2012-10-31 | 苏州博创集成电路设计有限公司 | Low-electromagnetic-interference low-power-consumption high-voltage driving circuit |
| CN105127001A (en) * | 2015-09-11 | 2015-12-09 | 江苏万邦微电子有限公司 | High-voltage drive circuit device with particle blocking function |
| CN105279339A (en) * | 2015-11-10 | 2016-01-27 | 中国科学院电工研究所 | Insulated gate bipolar transistor (IGBT) model for electromagnetic interference simulation analysis |
| CN105279339B (en) * | 2015-11-10 | 2018-07-10 | 中国科学院电工研究所 | For the IGBT models of electromagnetic interference simulation analysis |
| CN112311379A (en) * | 2019-12-17 | 2021-02-02 | 成都华微电子科技有限公司 | CML level to CMOS logic level conversion circuit |
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Open date: 20080730 |