CN101212582A - Control signal generation method in digital satellite equipment control - Google Patents
Control signal generation method in digital satellite equipment control Download PDFInfo
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- CN101212582A CN101212582A CNA2006100636135A CN200610063613A CN101212582A CN 101212582 A CN101212582 A CN 101212582A CN A2006100636135 A CNA2006100636135 A CN A2006100636135A CN 200610063613 A CN200610063613 A CN 200610063613A CN 101212582 A CN101212582 A CN 101212582A
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Abstract
The invention discloses a method for generating a control signal in the digital satellite device control (DiSEqC), which comprises the following steps: the central processor, according to the potential flow sequence corresponding to a control instruction, controls a switching/non-switching of a carrier signal connected with an inputting/outputting pin of the central processor using an interruption of a timer. Then a logic high or a logic low in the outputted potential flow sequence is modulated into the carrier signal and formed into a pulse width keying signal of a subordination device controlled by the digital satellite device. Wherein, the potential flow sequence comprises data bits of a byte in each control instruction and parity bits of each byte; the central processor starts to output a potential flow from a highest bit of a byte in a control instruction, after shifting a bit to the left, then outputs the potential flow of the data bit of the byte. By applying the invention, the generated control instruction of the DiSEqC can be exactly controlled, thus increasing the stability of controlling the DiSEqC.
Description
Technical field
The present invention relates to television receiver, especially relate to the control signal generation method that has the digital satellite Equipment Control (DiSEqC) that is used for controlling external equipment in the television receiver.
Background technology
Digital satellite Equipment Control (Digital Satellite Equipment Control, DiSEqC) be to be used in the digital satellite television receiver (set-top box), control, send control command by television receiver and give counterpart external device, first-class as diverter switch, switch, antenna driving apparatus, LNB high frequency, come external equipment is controlled.The course of work of DiSEqC is that digital satellite television receiver inside is under synchronous clock pulse cooperates, by the coaxial wire that links to each other with the LNB tuner, through being modulated to the digital signal that alternately changes on the 22KHz frequency, with the relevant control command of form serial transfer of a modulated carrier.Usually, this modulated carrier is the form of a pulsewidth keying code signal (an asynchronous control bit stream).In order to generate this pulsewidth keying code signal, need be in the inside of television receiver by additional hardware and software to generate proper signal.
Wherein, digital satellite Equipment Control (DiSEqC) illustrates it is on March 22nd, 1996, propose among " the TechnicalRecommendations for Manufacturers of DTH and SMATV Receiving EquipmentDiSEqC Version 4.0Bus Functional Specification " that publishes by EUTELSAT European Telecommunication Satellite Organization (European Telecommunications Satellite Organization), at this enumeration no longer.
At present, the scheme that generates pulsewidth keying code signal is to realize by two registers in the control QPSK demodulation chip (as: QPSK demodulation chip STV0299B), it is respectively DiSEqC fifo register and DiSEqC Status register, and implementation method is as follows:
When transmitting control command data, read 1 (by the FF representative) in the DiSEqC Status register, judge that this FF is 0 or 1, if FF is 0, write the DiSEqC fifo register, under synchronous clock pulse cooperated, serial was shifted out from fifo register, and realizes the transmission of control command data byte by endless form.
In the such scheme, the task that television receiver need be carried out comprises: read FF, judge whether FF is 1, also will writes fifo register when FF is 0, and therefore, television receiver is multitask.Carrying out above-mentioned task needs the time, and when executive condition is immature, the high task of the television receiver first execution priority of meeting; Simultaneously, the length of a control command generally is 3 to 5 bytes, if the control command signal time length that generates and the time of calculating are unequal, television receiver is in the process that generates the control command signal, between the byte of control command data and byte, produce the gap probably, cause producing unsteadiness.Though the mode of control command signal of adopt retransmitting television receiver reduces the signal probability of makeing mistakes, makeing mistakes of control command signal is still inevitably.
Summary of the invention
The objective of the invention is to propose the control signal generation method in a kind of digital satellite Equipment Control,, improve the control stability of DiSEqC with the control command that control figure satellite equipment control (DiSEqC) produces.
For addressing the above problem, the present invention discloses the control signal generation method in a kind of digital satellite Equipment Control, may further comprise the steps:
Central processing unit is according to the bit stream sequence of control command correspondence, the data bit of controlling output by the generation interruption is logic high or logic low level, the bit stream sequence modulation of output is controlled the pulsewidth keying code signal of its slave in carrier signal formation digital satellite Equipment Control.
More preferably, described central processing unit is the interruption that utilizes a timer to produce, opening/turn-offing of the described carrier signal that control is connected with the I/O pin of described central processing unit is modulated to described carrier signal with logic high or logic low level in the bit stream sequence of output.
More preferably, described timer is 0.5 millisecond a timer.
More preferably, comprise the data bit of the byte of each control command in the described bit stream sequence, and the check digit of each byte.
More preferably, the control of described central processing unit is exported a bit stream since the highest order of a byte of a control command, the bit stream of the data bit that begins to export this byte after one of moving to left.
More preferably, wide during the signal of each data bit in the described pulsewidth keying code signal is 1.5 milliseconds.
More preferably, described data bit comprises logical zero position or logical one position, wherein, a logical zero position comprises 1 millisecond low level signal period and one 0.5 millisecond high level signal period, and a logical one position comprises 0.5 millisecond low level signal period and one 1 millisecond high level signal period.
More preferably, described data bit comprises logical zero position or logical one position, wherein, a logical one position comprises 1 millisecond low level signal period and one 0.5 millisecond high level signal period, and a logical zero position comprises 0.5 millisecond low level signal period and one 1 millisecond high level signal period.
More preferably, described carrier signal is the signal of 22kHz.
More preferably, the bit stream sequence of described central processing unit output is transferred in the described digital satellite Equipment Control by coaxial cable through after anti-phase.
Compared with prior art, the present invention has following beneficial effect:
1, the present invention is by the timer of one 0.5 millisecond of definition in central processing unit (CPU), according to data bit in the control command is 0 or 1, produce to interrupt controlling will output the bit stream sequence modulation on carrier signal, because CPU has high the having a few of control precision as timer, therefore, the present invention can accurately produce corresponding pulsewidth keying code signal according to control command, has improved the control stability of DiSEqC;
2, the present invention is directly by an I/O (I/O) pin of central processing unit, the connection carrier signal that can connect/turn-off, connection/the shutoff between I/O pin and the carrier signal is controlled in the interruption that utilizes timer to produce, directly the bit stream sequence modulation that central processing unit is produced is in carrier signal, therefore, the present invention has the advantage of implementing simply, being easy to control.
Description of drawings
Fig. 1 is for describing 0 and 1 the signal structure schematic diagram that is used to modulate DiSEqC;
Fig. 2 is for describing the sequential signal that DiSEqC generates a typical control command signal;
Fig. 3 is the circuit diagram in the preferable specific embodiment of the present invention;
Fig. 4 is the schematic flow sheet in Fig. 3 specific embodiment.
Embodiment
For ease of understanding the present invention, before further describing specific embodiments of the invention, earlier the modulation principle of digital satellite equipment control (DiSEqC) and the signal sequence of modulating a control command are done simple introduction.
See also shown in Figure 1ly, it has described 0 and 1 the signal structure that is used to modulate DiSEqC.(carrier wave is 22kHz to the pulsewidth keying of DiSEqC employing 1/3 (bit) for Pulse Width Keying, PWK) modulator approach; 33 signal periods are a data bit, and wherein, 22 cycles have 22kHz signal, 11 cycles not to have 22kHz and represent a data bit " 0 "; 11 cycles have 22kHz signal, 22 cycles not to have 22kHz and represent a data bit " 0 ".
No matter that is: be 0 or 1, each is 1.5 milliseconds of length, wherein, one 0 0.5 millisecond of comprising that carrier frequency exists, one 1 comprises 1 millisecond that carrier frequency exists.Each no matter be 0 or 1, all continues 0.5 millisecond since a high level; Depending on that this position is 0 or 1, is that signal level transforms to a high level, and promptly there is second 0.5 millisecond that continues in carrier frequency, or rests on this low level second 0.5 millisecond; Then, concerning any one, this signal level finishes with 0.5 millisecond low level at last.
In general, the length of a control command is 3 to 5 bytes.Typically, be example with the control command of 4 bytes, after each byte, add a parity check bit, thereby the data byte of each control command need transmit 9; Therefore, the time of the control command signal demand of 4 bytes of transmission is: the 4*9*1.5=54 millisecond.Its sequential schematic diagram sees also Fig. 2.In addition, after sending a complete control command signal, delay time at least 15 milliseconds, just begin to send next control command signal.
Based on this, the signal creating method of the present invention in DiSEqC, has instable defective for overcoming prior art, be that promptly the I/O interface of base stage of triode 320 (being the 22K signal of tuner) and CPU 310 electrically connects among Fig. 3 by the 22K signal pins of an I/O interface control tuner using central processing unit (CPU) 310.In this circuit, triode 320 plays the effect with the bit stream sequence inversion of CPU 310 outputs.
Because tuner can produce continuous 22K signal, only needing control I/O interface switch is the Guan Yukai of may command 22K signal, modulation characteristics according to the control command data of DiSEqC, Guan Yukai with 0.5 millisecond timer control I/O interface realizes among the DiSEqC generating the control of control command signal.
Wherein, in the hardware configuration of a television receiver (figure does not illustrate), at least comprise: central processing unit (CPU), memory and digital satellite Equipment Control (DiSEqC), these hardware configurations and function, operation etc. are known to those skilled in the art.
See also shown in Figure 4ly,, specifically comprise the steps: for preferable specific embodiment of the present invention
Before DiSEqC generates a control command signal, need and open one 0.5 millisecond timer for the central processing unit setting, purpose is to realize by the interrupt function of timer the transmission of control command data; The I/O interface of central processing unit is changed to high level, and preserves the state of I/O interface; And open tuner 22K signal, and preserve 15 milliseconds of former 22K signal condition time-delays, so that be ready for sending control command data.
The present invention is from the highest order of control command data, each send data, move to left one and continue to send the next bit data, that is: send highest order after, abandon the highest order that has sent by moving to left one, former the high highest order that is displaced to begun to send.
The concrete implementation step of the present invention comprises:
Step s401: for the central processing unit setting and open one 0.5 millisecond timer;
Step s402: judge that by central processing unit one digit number according to whether being 0, if this bit data is 0, changes step s403 over to, otherwise shows that this bit data is 1, changes step s404 over to;
Step s403: interrupt function control is dragged down the I/O interface at preceding 1 millisecond, drawn high for back 0.5 millisecond;
Step s404: interrupt function control is dragged down the I/O interface for preceding 0.5 millisecond, is drawn high for back 1 millisecond;
Step s405: judge whether to send a byte,, then change step s406 over to if send a byte, otherwise, change step s407 over to;
Step s406: calculate the even parity bit of this byte, and send even parity bit;
Step s407: move to left one, change step s402 and continue to send;
Step s408: after step s406, judge whether to send a control command, if, change step s409 over to, continue to send otherwise change step s402;
Step s401: close 0.5 millisecond of timer, and delay time 15 milliseconds, prepare for sending next control command.
Among this embodiment, define data " 1 " or " 0 " bit-type, two bit-types all are from logic low, succeeded by 0.5 second logic high or logic low, again succeeded by 0.5 second logic high.Therefore, one 0 or 1 potential energy enough are expressed as: 0X1.Wherein, each symbol continues 0.5 second, if X=0 when generating 0, if X=1 when generating 1.For example, for producing the control command of one 18 DiSEqC, such as, 110011001010000111, in this enforcement, the following bit stream sequence of CPU control output:
(0)11011001，(0)01011011，(0)01001011，(0)01011001，
0x6c，0x2d，0x27，0x2c，
(0)01001001，(0)11011011
0x24，0x6d
Wherein, the highest order of each byte is a check digit; Certainly, correspondingly, after DiSEqC sent a control command, the receiving terminal of control command abandoned the check digit of each byte after data are carried out effect.
The burst of Cpu input is anti-phase by triode, and the carrier signal that is used to modulate a 22kHz is used to control the slave that DiSEqC links to each other to produce suitable pulsewidth keying (QSPK) code signal.
Certainly, in concrete enforcement, can not need the triode of Fig. 3 on the hardware, by the interrupt function control of CPU, when logical bit is " 1 ", be drawn high for preceding 0.5 millisecond, back 1 millisecond is dragged down; When logical bit is " 0 ", drawn high for preceding 1 millisecond, back 0.5 millisecond is dragged down.
In sum, the present invention has following useful technique effect:
1, the present invention is by the timer of 0.5 millisecond of definition in central processing unit (CPU), according to data bit in the control command is 0 or 1, produce to interrupt controlling will output the bit stream sequence modulation on carrier signal, because CPU has the high advantage of control precision as timer, therefore, the present invention can accurately produce corresponding pulsewidth keying code signal according to control command, has improved the control stability of DiSEqC;
2, the present invention is directly by I/O (I/O) pin of central processing unit, the connection carrier signal that can connect/turn-off, connection/the shutoff between I/O pin and the carrier signal is controlled in the interruption that utilizes timer to produce, directly the bit stream sequence modulation that central processing unit is produced is in carrier signal, therefore, the present invention has the advantage of implementing simply, being easy to control.
Above embodiment only in order to the explanation the present invention and and unrestricted technical scheme described in the invention; Therefore, although this specification has been described in detail the present invention with reference to each above-mentioned embodiment,, those of ordinary skill in the art should be appreciated that still and can make amendment or be equal to replacement the present invention; And all do not break away from the technical scheme and the improvement thereof of the spirit and scope of the present invention, and it all should be encompassed in the middle of the claim scope of the present invention.
Claims (10)
1. the control signal generation method in the digital satellite Equipment Control is characterized in that, may further comprise the steps:
Central processing unit is according to the bit stream sequence of control command correspondence, the data bit of controlling output by the generation interruption is logic high or logic low level, the bit stream sequence modulation of output is controlled the pulsewidth keying code signal of its slave in carrier signal formation digital satellite Equipment Control.
2. the control signal generation method in the digital satellite Equipment Control according to claim 1, it is characterized in that, described central processing unit is the interruption that utilizes a timer to produce, opening/turn-offing of the described carrier signal that control is connected with the I/O pin of described central processing unit is modulated to described carrier signal with logic high or logic low level in the bit stream sequence of output.
3. the control signal generation method in the digital satellite Equipment Control according to claim 2 is characterized in that, described timer is 0.5 millisecond a timer.
4. the control signal generation method in the digital satellite Equipment Control according to claim 1 is characterized in that, comprises the data bit of the byte of each control command in the described bit stream sequence, and the check digit of each byte.
5. the control signal generation method in the digital satellite Equipment Control according to claim 4, it is characterized in that, the control of described central processing unit is exported a bit stream since the highest order of a byte of a control command, the bit stream of the data bit that begins to export this byte after one of moving to left.
6. the control signal generation method in the digital satellite Equipment Control according to claim 1 is characterized in that, wide during the signal of each data bit in the described pulsewidth keying code signal is 1.5 milliseconds.
7. the control signal generation method in the digital satellite Equipment Control according to claim 6, it is characterized in that, described data bit comprises logical zero position or logical one position, wherein, a logical zero position comprises 1 millisecond low level signal period and one 0.5 millisecond high level signal period, and a logical one position comprises 0.5 millisecond low level signal period and one 1 millisecond high level signal period.
8. the control signal generation method in the digital satellite Equipment Control according to claim 6, it is characterized in that, described data bit comprises logical zero position or logical one position, wherein, a logical one position comprises 1 millisecond low level signal period and one 0.5 millisecond high level signal period, and a logical zero position comprises 0.5 millisecond low level signal period and one 1 millisecond high level signal period.
9. the control signal generation method in the digital satellite Equipment Control according to claim 1 is characterized in that, described carrier signal is the signal of 22kHz.
10. according to the control signal generation method in any one described digital satellite Equipment Control of claim 1 to 9, it is characterized in that, the bit stream sequence of described central processing unit output is transferred in the described digital satellite Equipment Control by coaxial cable through after anti-phase.
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| CNA2006100636135A CN101212582A (en) | 2006-12-31 | 2006-12-31 | Control signal generation method in digital satellite equipment control |
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| CNA2006100636135A CN101212582A (en) | 2006-12-31 | 2006-12-31 | Control signal generation method in digital satellite equipment control |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105786753A (en) * | 2016-02-22 | 2016-07-20 | 上海斐讯数据通信技术有限公司 | Method and device for data transmission between master and slave devices on I2C bus |
| CN106714005A (en) * | 2016-12-27 | 2017-05-24 | 深圳市九洲电器有限公司 | Satellite set-top box data transmission method and system |
-
2006
- 2006-12-31 CN CNA2006100636135A patent/CN101212582A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105786753A (en) * | 2016-02-22 | 2016-07-20 | 上海斐讯数据通信技术有限公司 | Method and device for data transmission between master and slave devices on I2C bus |
| CN106714005A (en) * | 2016-12-27 | 2017-05-24 | 深圳市九洲电器有限公司 | Satellite set-top box data transmission method and system |
| WO2018121000A1 (en) * | 2016-12-27 | 2018-07-05 | 深圳市九洲电器有限公司 | Data transmission method and system of satellite set top box |
| CN106714005B (en) * | 2016-12-27 | 2019-08-13 | 深圳市九洲电器有限公司 | Satellite set top box data transmission method and system |
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Open date: 20080702 |