CN101201365A - Voltage frequency measurement analysis system and analysis method - Google Patents

Abstract

The invention provides a measurement and analysis system of the voltage and frequency and its analysis method. The invention can be applied in the fields of the detection, data acquisition and analysis, and the frequency conversion technology. The device can measure the voltage signal and the frequency signal, and the precision can reach as high as 10<-6>. The invention provides a calculation and analysis method of the linearity of the voltage-frequency curve Alpha out, the ratio of the voltage and frequency Kout and the base point of the voltage and frequency V50Hz, coordinates with the drawing and analysis method of the voltage-time, the frequency-time and the voltage-frequency curve, to provide the effective auxiliary analysis method for the operation condition of the variable frequency equipment, thereby realizing the function of low cost, high precise, wide-range measurement on the voltage and frequency and intelligent analysis function of the measurement results.

Description

Voltage frequency measurement analysis system and analysis method

technical field

The invention provides a voltage frequency measurement and analysis system and analysis method, which can be applied to the fields of detection, data acquisition and analysis, frequency conversion technology and the like.

Background technique

At present, the most common device for measuring voltage is a multimeter, which can measure signals such as voltage, current, and resistance, but lacks the measurement function for frequency signals; the most common device for measuring frequency is a frequency meter, which has high precision but lacks various The measurement of a voltage signal, especially the measurement of a strong electrical signal. The oscilloscope has both the functions of a multimeter and a frequency counter. It can measure voltage and frequency at the same time, and can draw the waveform at each moment. The frequency sequence is drawn as a voltage-time, frequency-time curve, and voltage-frequency curve with time as the horizontal axis, which is used for analysis by professionals, and a single oscilloscope is often too expensive and cumbersome to operate, and it is too large to be portable.

Contents of the invention

The two purposes of the present invention are to overcome the above-mentioned defects of the oscilloscope, and provide a voltage frequency measurement and analysis system and analysis method. This system can measure the voltage and frequency of various waveforms, and can draw the voltage-time, frequency-time and voltage-frequency curves, and calculate the characteristic value of the curves, so that the voltage-frequency curves can be applied to practical projects, especially for frequency conversion In the field of technical application, it provides auxiliary analysis to provide effective help to better meet the needs of practical applications.

In order to achieve the above object, the present invention adopts the following technical solutions. This system mainly includes signal processing circuit 1, frequency measurement circuit 2, A/D conversion circuit 3, CPU control circuit 4, keyboard display circuit 5, and power supply circuit 8; among them:

The signal processing circuit 1 includes a weak current access circuit 1.1, a strong current access circuit 1.2, a step-down circuit 1.3, a voltage stabilization follower circuit 1.4, a TTL standardization circuit 1.5, and a peak hold circuit 1.6;

The input terminal of the weak current access circuit 1.1 is an analog signal interface for connecting with the 0-5V signal to be tested IN _low , and the output terminal of the weak current access circuit 1.1 is connected with the voltage regulation follower circuit 1.4;

The input terminal of the strong current access circuit 1.2 is an analog signal interface used to connect with the 5-300V signal to be tested IN _high , and the output of the strong current access circuit 1.2 is connected to the step-down circuit 1.3; the step-down circuit 1.3 The 5-300V test signal IN _high sent by the strong current access circuit is linearly reduced to a 0-5V weak current test signal according to the step-down ratio, and then output to the voltage stabilization follower circuit 1.4;

The output signal IN _std of the voltage-stabilizing follower circuit 1.4 is connected to the TTL standardization circuit 1.5 and the peak hold circuit 1.6 respectively; the TTL standardization circuit 1.5 converts the output signal of the voltage follower circuit 1.4 into an AC square wave, and then removes it through the hysteresis comparison circuit. Jitter, after passing through the voltage regulator tube, the standard TTL frequency signal to be tested IN _TTL is obtained, which is output to the frequency measurement circuit 2; the peak hold circuit 1.6 follows the maximum value of the output signal voltage of the circuit 1.6 to a DC constant voltage signal IN _peak is output to the A/D conversion circuit 3;

The output end of the frequency measurement circuit 2 is connected to the CPU control circuit 4 through the data bus, address bus and control bus, the frequency measurement circuit 2 measures the frequency value of the TTL standard waveform, and outputs the measured frequency value in the form of digital quantities to the CPU control circuit 4, and sent to the keyboard display circuit 5 for display;

The input of the A/D conversion circuit 3 is connected with the output terminal of the signal processing circuit 1 voltage peak circuit 1.6, and the output terminal is connected with the CPU control circuit 4 through the data bus, address bus and control bus; the A/D conversion circuit 3 converts the voltage peak value The voltage value output by the circuit 1.6 is converted into a digital quantity and output to the CPU control circuit 4, and sent to the keyboard display circuit 5 for display;

The CPU control circuit 4 is connected with the output end of the frequency measurement circuit 2, and receives the frequency value measured by the frequency measurement circuit; the CPU control circuit 4 is connected with the A/D conversion circuit 3, and receives the converted digital voltage value; if It is a strong electric signal, and the CPU control circuit 4 calculates the actual voltage value according to the voltage value and the step-down ratio of the step-down circuit 1.3, and stores it in the RAM of the CPU control circuit 4, and sends it to the keyboard display circuit 5 The display section in shows;

The keyboard display circuit 5 is connected with the CPU control circuit 4 through the data bus, the address bus and the control bus, and the display part in the keyboard display circuit 5 is used to display the result of the real-time conversion of the frequency measurement circuit 2 and the A/D conversion circuit 3; the keyboard display The keyboard in the circuit 5 is connected with the CPU control circuit 4 through the keyboard display control chip;

The power circuit 8 provides power for the above circuits.

A communication circuit 6 for communicating with the upper computer is also provided, and the communication circuit 6 is connected with the CPU control circuit 4 . The communication circuit 6 is connected to the computer through a data line, and its sending end, receiving end, data end, address end and control end are respectively connected to the sending end, receiving end, data bus, address bus and control bus of the programmable CPU control circuit 4 On, the communication circuit.

Also be provided with self-test correction circuit 7, the data terminal, address end and control end of self-test correction circuit 7 are respectively received on the data bus, address bus and control bus of CPU control circuit 4, self-test correction circuit 7 output terminals and signal The processing circuit 3 is connected to the interface of the weak current access circuit 1.1. The CPU control circuit 4 generates voltage and frequency signals and inputs them to the self-inspection correction circuit and generates a self-inspection waveform through the self-inspection correction circuit 7, and the self-inspection waveform is input to the weak current access circuit 1.1, and the CPU controller collects the weak current access circuit 1.1 The voltage and frequency measurement values are compared with the self-test voltage and frequency generated to judge whether the system is normal.

Described frequency measurement circuit 2 comprises two relays, a counter group connected in series formed by four 74F161 counters, one 74F161 counter as a logic controller and two 74LS245 bus transceivers, and each of the four counters counts The register has 4 output, and the 8 output of every two registers is connected on the input of bus transceiver 74LS245, and the output of bus transceiver 74LS245 is connected with CPU control circuit 4 through data bus, address bus and control bus;

The normally open and normally closed terminals of the first relay are respectively connected to the high-frequency frequency standby signal IN _TTL and the output pin IN _cry of the known standard crystal oscillator, and the common output terminal is connected to the counting of the first counter in the counter chipset Input terminal; the normally open and normally closed terminals of the second relay are respectively connected to the CPU pin IN _timer that generates the timing pulse and the low-frequency frequency standby signal IN _TTL , and the common output is connected to the enabling terminals of the four counting chips , the normally open and normally closed switching control ends of the first relay and the second relay are connected to the CPU control circuit 4 control bus to control the normally open and normally closed switching of the two relays;

As a logic controller, the CLK terminal of the 74F161 counter is always connected to the low-frequency signal IN _TTL , and its CLR terminal is connected to the second count output P1 through an inverted gate to realize a self-locking circuit that only allows one cycle of waveform to pass through, and the reset signal CLR passes through the control The bus is connected to the control terminal of the CPU;

As a logic controller, the CLK of the 74F161 counter is always connected to the low-frequency signal IN _TTL , and its CLR terminal is connected to the second count output P1 through an inverted gate to realize a self-locking circuit that only allows one cycle of waveform to pass through. The reset signal CLR passes through the control bus It is connected to the control terminal of the CPU.

Each of the four counters has a 4-bit output, and the 8-bit output of each two counters is connected to the input of the bus transceiver, and the output of the bus transceiver is connected to the CPU through the data bus, address bus and control bus;

2. Device workflow:

See attached drawing 15 for the signal flow diagram when the device is working. The weak current signal IN _low of 0-5V passes through the weak current of signal processing circuit 1 and connects to circuit 1.1, or the strong current signal of 5-380V IN _high passes through the strong current of signal processing circuit 1. After stepping down with circuit 1.2 and step-down circuit 1.3, the standard signal to be tested IN _std is obtained after the impedance matching of the voltage follower circuit 1.4, and the peak voltage IN _peak of IN _std is obtained through the peak hold circuit 1.6, and obtained through the A/D conversion circuit The frequency measurement value OUT _U of the signal to be tested. For the case where the input is a weak signal, OUT _U is the true value U(t) of the voltage of the signal to be tested. For the case where the input is a strong signal, OUT _U needs to be multiplied by the step-down ratio to get The true value of the measured signal voltage U(t); IN _std obtains the standard TTL form of the frequency test signal IN _TTL through the TTL standardization circuit 1.5, the high-frequency test signal IN _TTL and the known duration of the high-voltage signal sent by the CPU control circuit 4 The flat pulse IN _timer passes through the frequency measurement circuit to obtain the output OUT _F ; while the low-frequency signal to be tested IN _TTL and the output waveform IN _cry of the known frequency crystal oscillator pass through the frequency measurement circuit to obtain the frequency measurement value OUT _F of the signal to be tested, the frequency measurement value and The measured voltage value is input to the CPU control circuit, and simultaneously sent to the keyboard display circuit 5 for display.

Using the above-mentioned voltage-frequency measurement and analysis system to collect time-series voltage, frequency and analysis method thereof, it is characterized in that it mainly includes the following steps: data collection, data preprocessing, three-line analysis and voltage-frequency characteristic value calculation and analysis:

1) data collection: by the system collection described in claim 1 time-series voltage, time-series frequency, concrete collection method is as follows:

Step 1: set the acquisition time interval T _sample and the continuous acquisition times t _sample to voltage and frequency by the keyboard in the keyboard display circuit (5), put the current acquisition times t _once =1, and store the above parameters into the CPU control circuit ( 4) in the RAM, the CPU control circuit (4) executes the continuous acquisition subroutine;

Step 2: The CPU control circuit (4) obtains the collected value OUT _V of the current access signal voltage through the A/D conversion circuit (3), multiplies it by the step-down ratio to obtain the actual value U(t _once ) of the current voltage and stores it in it in RAM;

Step 3: the CPU control circuit (4) obtains the collected value OUT _F of the current access signal frequency through the frequency measurement circuit (2), calculates the true value F(t _once ) of the current voltage and stores it in its RAM;

Step 4: The current collection times t _once is incremented by 1, if t _once ≤ t _sample , repeat steps 2, 3, and 4;

Step 5: The collection is completed;

Then a time-series voltage value (U(t), t) and a time-series frequency value (F(t), t) are generated, where t is the sampling time, t=1, 2,..., t _sample , t _sample is positive Integer, representing the final value of the sampling time, U(t), F(t) respectively representing the voltage value and frequency value at time t;

2) Data preprocessing:

Step 1: read out the continuous acquisition times _tsample from the RAM of the CPU control circuit 4, put the current calculation times _tprc =n+1, calculate the comparison end times _tprcend = _tsample -n, wherein n is the same as U( t _sample ) and the number of voltage values compared with F(t _sample ), the value range of n is generally 3≤n≤10;

Correct the (U(t), t) and (F(t), t) collected in the previous step, that is, delete the values that obviously deviate from the adjacent data. The correction principle is: if the voltage value U at time t The absolute value of the difference between (t) and the average value of voltage values at n moments before or after time t is greater than the average value of the absolute value of the difference between voltage values at n moments before or after time t, and needs to be corrected, that is

$<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\frac{\underset{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; no</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; |</span><span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; ></span>\frac{\underset{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; |</span>}{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>$

or

$<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\frac{\underset{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; no</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; |</span><span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; ></span>\frac{\underset{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; |</span>}{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; )</span>$

In formula (1), t-i represents i time before time t, then U(t-i) represents the voltage value at sampling time t-i, U(t) is the voltage value at time t, and U(t-i-1) represents t-i-1 The voltage value at the moment; α is the defined intensity, and the value range is 0% to 100%;

In formula (2), U(t) is the voltage value at time t, then U(t+i) represents the voltage value at sampling time t+i, and U(t+i+1) represents time t+i+1 The voltage value of , α is the defined intensity, and the value range is 0% to 100%;

If the voltage value U(t) at time t satisfies formula (1) or formula (2), the correction is:

$u\left(t\right)=\frac{u(t-1)+u(t+1)}{2};$ Among them, U(t-1) is the voltage value at time t-1, and U(t+1) is the voltage value at time t+1;

The correction principle of the frequency value F(t) is the same as that of U(t): if the absolute value of the difference between the frequency value F(t) at time t and the average value of the voltage value at n moments before or after is greater than t The average value of the absolute value of the difference between the voltage values at n moments before or after the moment needs to be corrected, that is

$<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\frac{\underset{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; no</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; |</span><span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; ></span>\frac{\underset{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; |</span>}{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; )</span>$

or

$<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\frac{\underset{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; no</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; |</span><span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; ></span>\frac{\underset{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; |</span>}{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 4</span>}<span\; class="notranslate">\; )</span>$

In formula (3), t-i represents the i time before time t, then F(t-i) represents the voltage value at sampling time t-i, F(t) is the voltage value at time t, and F(t-i-1) represents t-i-1 The voltage value at the moment; α is the defined intensity, and the value range is 0% to 100%;

In formula (2), F(t) is the voltage value at time t, then F(t+i) represents the voltage value at sampling time t+i, and F(t+i+1) represents time t+i+1 The voltage value of , α is the defined intensity, and the value range is 0% to 100%;

If the voltage value F(t) at time t satisfies formula (3) or formula (4), the correction is:

$f\left(t\right)=\frac{f(t-1)+f(t+1)}{2};$ Among them, F(t-1) is the voltage value at the time t-1, and F(t+1) is the voltage value at the time t+1;

Step 2: The number of previous calculations t _PRC is incremented by 1, and if t _PRC ≤ t _prcend , repeat step 1;

Step 3: Data preprocessing is completed;

3) Three-line analysis method and eigenvalue calculation:

Step 1, voltage-frequency curve fitting:

1) Apply the least squares method to fit the points in the UF curve into a straight line, and calculate the fitting parameters a, b and voltage-frequency characteristic values: voltage-frequency curve linearity α _out , voltage-frequency ratio K _out and voltage-frequency base point V _50Hz ;

For convenience, U(t) is denoted as u _t , F(t) is denoted as f _t , and t _sample is denoted as n. The specific steps are as follows:

Let the voltage-frequency linear function be f=au+b, where a and b are undetermined constants;

来度量总偏差；Note ε _t = f _t -(au _t + b), which reflects the deviation between the calculated value f and the actual value f _t when the straight line f = au+b is used to describe u = u _t and f = f _t ;

to measure the total deviation;

Determine the constants a and b in f=au+b such that $f(a,b)=\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{\mathrm{\&epsiv;}}_{\mathrm{<figure-callout\; id="2"\; label="t"\; filenames="A20071011875200323.png,A20071011875200324.png"\; state="\{\{state\}\}">t</figure-callout>}}^2=\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{(f_t-{\mathrm{au}}_t-b)}^2$ is the smallest;

From the extreme value principle $\frac{\&PartialD;f}{\&PartialD;a}=\frac{\&PartialD;f}{\&PartialD;b}=0,$ Right now $\left\{\begin{array}{c}\frac{\&PartialD;f}{\&PartialD;a}=-2\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{u}_t(f_t-{\mathrm{au}}_t-b)=0\\ \frac{\&PartialD;f}{\&PartialD;b}=-2\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}(f_t-{\mathrm{au}}_t-b)=0\end{array}\right.$

Solving this simultaneous equation gives: $\left\{\begin{array}{c}a=\frac{\mathrm{no}\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{u}_t{f}_t-\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{u}_t\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{f}_t}{\mathrm{no}\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{u_t}^2-{\left(\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{u}_t\right)}^2}\\ b=\frac{1}{\mathrm{no}}\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{f}_t-\frac{a}{\mathrm{no}}\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{u}_t\end{array}\right.$

Step 2, calculation of voltage and frequency eigenvalues:

Voltage-frequency ratio K _out = a: The voltage-frequency ratio is used to represent the linear relationship between voltage and frequency values;

Linearity of voltage-frequency curve $L_{\mathrm{out}}=\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{\mathrm{\&epsiv;}}_t^2:$ The linearity of the voltage-frequency curve is used to measure the degree to which the points on the voltage-frequency curve deviate from the fitted straight line;

Voltage-frequency base point V _50Hz = 50a+b: The voltage-frequency base point is used to measure the working voltage when the working frequency is 50Hz;

Step 3, draw three curves:

Draw the voltage-time U-t curve: Draw the corrected time series (U(t), t) at each moment t and the corresponding voltage value U(t) into the U-t coordinate system to obtain the voltage-time U-t curve;

Draw the frequency-time F-t curve: Draw the corrected time series (F(t), t) at each moment t and the corresponding frequency value F(t) into the F-t coordinate system to obtain the frequency-time F-t curve;

Draw the voltage-frequency U-F curve: the corrected time series variables (U(t), t) and (F(t), t) are formed into a triplet (U(t), F(t), t), and the The two values of U(t) and F(t) corresponding to each time t are used as the (U, F) coordinates of a point, and drawn into the U-F coordinate system to obtain the U-F curve;

Step 4, performance index analysis:

According to the three curves drawn above and the three eigenvalues, the engineer can obtain whether the measured voltage frequency value meets the requirements of the actual project index of the project, and the degree of satisfaction.

Beneficial effects of the present invention:

1) The equipment of the present invention is small in size and easy to carry, low in cost, high in voltage and frequency signal measurement accuracy, and wide in measurement range; especially the system formed by the present invention has the characteristics of continuous collection of time series, data processing, and visual analysis functions ;

2) The time-series voltage-frequency analysis method proposed by the present invention can analyze the equipment under test for engineers by calculating and drawing three kinds of curves and the curve fitting analysis method to the voltage-frequency scatter diagram proposed in the present invention The performance index provides fast, convenient and intuitive reference. The present invention directly provides some evaluation indexes. These evaluation indexes come from the actual engineering practice of experienced engineers, but have not been officially proposed by the academic circle.

3) The present invention has given great help to the application of frequency conversion technology, which has developed rapidly in recent years. For the PWM waveform output by the frequency conversion controller, the device can not only measure, but also analyze, making up for the frequency converter output PWM waveform measurement technology on the blank.

Description of drawings

Accompanying drawing 1 voltage frequency test analyzer circuit module connection diagram

Attached Figure 1.1 Connection Diagram of Signal Processing Circuit Module

Accompanying drawing 2CPU control circuit diagram

Accompanying drawing 3 LEM module circuit diagram

Accompanying drawing 4 analog signal processing channel circuit

Accompanying drawing 5 voltage peak sampling and holding circuit

Accompanying drawing 6A/D conversion circuit diagram

Accompanying drawing 7 low-frequency cycle capture timing diagram

Accompanying drawing 8 High-frequency frequency measurement sequence diagram

Accompanying drawing 9 low-frequency cycle capture circuit

Figure 10 frequency meter module

Accompanying drawing 11 High frequency/low frequency measurement multiplexing circuit diagram

Attached picture 12 CH451 and CPU, LED display connection circuit diagram

Accompanying drawing 13 connection diagram of chip and USB bus

Accompanying drawing 14 AD7008 and microcomputer interface circuit diagram

Accompanying drawing 15 The signal flow diagram of the multiplexing voltage frequency measurement and analysis method

Accompanying drawing 16 acquisition program software flowchart

Detailed ways

This embodiment firstly describes in detail the hardware circuit, connection relationship and specific working principle of the voltage frequency measurement and analysis device, and the process of transmitting, converting and processing the signal to be tested in the device (see accompanying drawings 1-14), and then the main program In the description, the detailed steps of drawing the above-mentioned collected data characteristic curve and calculating and analyzing the characteristic value by the time-series voltage-frequency analysis method are given at the end (see Figures 14-15).

1. Hardware circuit connection relationship, working principle and signal processing:

The hardware circuit of this embodiment is shown in Figures 1 to 14, mainly including signal processing circuit 1, frequency measurement circuit 2, A/D conversion circuit 3, CPU control circuit 4, keyboard display circuit 5, communication circuit 6, self-test The correction circuit 7 and the power supply circuit 8 are composed of eight core parts, see accompanying drawing 1.

The signal processing circuit 1, see Figure 1.1, is used to connect the input signal and process it into a signal form that can be processed by the frequency measurement circuit 2 and the A/D conversion circuit 3. The signal processing circuit 1 has a multiplexed analog signal input interface, which can be used as the input of the weak current access circuit 1.1 (connecting to the 0-5V signal to be tested), and can also be used as the input of the strong current access circuit 1.2 (connecting to the 5V ~300V signal to be tested). The signal processing circuit 1 has two output interfaces, one is the output of the TTL standardization circuit 1.5 to the frequency measurement circuit 2, and the other is the output of the voltage peak circuit 1.6 to the A/D conversion circuit 3.

The weak current access circuit 1.1 has an analog signal interface, which is connected to the 0-5V signal to be tested IN _low , and the output is connected to the input of the voltage stabilization follower circuit 1.4, which is the input pin of the operational amplifier of the subsequent voltage follower.

The strong current access circuit 1.2 has an analog signal interface, which is connected to the 5-300V signal to be tested IN _high , and the output is connected to the input of the step-down circuit 1.3, which is about to press the input high voltage pin (+HT) of the chip;

Step-down circuit 1.3 Connect the 5-300V signal to be tested IN _high from the strong current to the circuit, keep the waveform shape of the input signal unchanged, and amplify or reduce its amplitude in proportion to the circuit to obtain the signal, the range of which is At 0~5V. Since the amplitude of the IN _high voltage is up to about ±300V, we need to reduce the tested line voltage to a weak current signal with an amplitude of less than 10V. It should be noted that what we need to measure is the waveform, which requires During the process, the waveform must not be distorted. The transformer we usually use is designed for 50Hz cycle, which is not suitable for our test. Therefore, we have selected the latest technology of the Swiss LEM company - the original magnetic compensation - the LEM current and voltage sensor module.

For the circuit connection of the LEM module, see Figure 3.

Among them, +HT, -HT are strong current input terminals, +, - are power supply, M is output terminal

The maximum peak value of the PWM pulse width modulation wave voltage needs to be measured: usually at ±300V

Available power supply: ±15V (±5%)

The step-down ratio can make the PWM pulse width modulation wave with an amplitude of 300V step down to a PWM pulse width modulated wave with an amplitude of 6.25V, that is to say, when the LV28 transformer module is used, the transformation ratio is 300:6.25 That is 48:1. During the calculation process of the CPU control circuit 4, the stepped-down signal is multiplied by the above step-down ratio to obtain the true value of the voltage of the strong current signal to be measured.

The output IN _LEM of the step-down circuit 1.3 is connected to the input of the voltage regulation follower circuit 1.4.

The voltage-stabilizing follower circuit 1.4 passes the input signal IN _low and IN _LEM through the 5V voltage stabilizing circuit, limits the voltage between 0 and 5V, and outputs the signal IN _std after performing impedance matching through voltage following, which is respectively connected to the TTL standardization circuit 1.5 and on the input of the peak hold circuit 1.6.

The TTL standardization circuit 1.5 processes the input signal IN _std waveform level by level, that is, processes the analog signal in the test system until it becomes a form acceptable to the voltage and frequency measurement circuit of the test system, see Figure 4. First, the input signal undergoes a voltage stabilization, the purpose is to prevent the input signal from being too large to burn the subsequent stage circuit, and then it is followed by voltage to isolate the impedance of the front and rear stages, and the output is sent to the voltage peak holding circuit while being sent to the next stage for processing. . Then through an open-loop integrated operational amplifier, (the 1M resistor and 10K resistor on the positive potential input are for when the input signal is TTL, after voltage stabilization, there is no negative potential and it can be infinitely amplified into an AC square wave). Then it goes through the hysteresis comparator to remove the flip jitter, and the voltage is stabilized to TTL level. Finally, through the non-inverting gate (74LS07), it becomes a standard TTL signal IN _TTL . IN _TTL is connected to the input terminal of the frequency measurement circuit 2 .

The peak hold circuit 1.6 feeds the input signal IN _std into the input terminal of the peak hold circuit 1.6, and the reset terminal of the peak hold circuit 1.6 is connected to the control bus of the CPU control circuit 4. See accompanying drawing 5 for the specific circuit diagram. The peak voltage sample-and-hold circuit is composed of a sample-and-hold chip LF398 and a voltage comparator LM311. The output voltage of LF398 is compared with the input voltage by LM311. When Vi>V0, LM311 outputs high level, which is sent to the logic control terminal 8 pin of LF398, so that LF398 is in the sampling state; when Vi reaches the peak value and falls, Vi< V0, the voltage comparator LM311 outputs a low level, and the logic control terminal of the LF398 is set to a low level, so that the LF398 is in a holding state. Since the LM311 uses an open-collector output, it needs to be connected with a pull-up resistor. The pulse sent from the output terminal of the overvoltage detection circuit controls the conduction of the circuit switch, and the sampling capacitor discharges when there is no overvoltage, otherwise the sampling circuit keeps tracking the change of the peak value.

That is, the output voltage of the peak hold circuit is zero after reset IN _peak = 0, after IN _std is input to the peak hold circuit, compare IN _std and IN _peak : if IN _std > IN _peak , then IN _peak = IN _std and lock the IN _peak voltage value ; If IN _std < IN _peak , then the IN _peak output voltage value remains unchanged; obtain the analog output of IN _peak = IN _std peak value IN _peak ; the output IN _peak of the peak holding circuit is connected to the input of the A/D conversion circuit (3) superior.

The input of the frequency measurement circuit 2 is connected with the output IN _TTL of the signal processing circuit 1TTL standardization circuit 1.5, as the input of the frequency signal to be measured; the measurement result output OUT _F (t) passes through the data bus, the address bus and the control bus and the CPU control circuit 3 connections.

Low frequency measurement principle:

The measurement of the frequency signal IN _TTL adopts the method of pure hardware implementation, and four fast 74F161s are connected in series to form a 74F161 counter group, and the measurement resolution is as high as 2 ¹⁶ . For low-frequency signals below 1KHz and medium-high frequency signals above 1KHz, a completely different method is adopted: when measuring low-frequency signals, capture the length of a cycle, and use a standard 1MHz active crystal oscillator as the serial counting chipset CLK input signal, that is Within one period of the input signal to be tested, measure the number of 1MHz high-frequency signals that are passed into the 74F161 counter group.

Accompanying drawing 7 is the timing diagram that is the low frequency measurement circuit assumption:

The capture circuit only captures two adjacent rising edges of the signal to be tested when the trigger pulse comes, and outputs a high level during this period, so that the 74F161 counter group passes through a 1MHz high-frequency signal, and keeps the low level at other times, unless Then there is a trigger level input, and then capture two adjacent rising edges of the signal to be tested...

Use 74F161 skillfully to realize the above logic, see Figure 9. 74F161 always inputs CLK as the signal source. When the CLR low level is cleared, the counter’s sub-low bit P1 is 0, and the counter can work, so the next rising edge of the signal source , change the low bit P0 of the counter from low to high. At this time, since the sub-low bit P1 of the counter is still 0, the counter can continue to work; so the next rising edge of the signal source changes the low bit P0 of the counter from high to low. At this time, the counter The low bit P1 is 1, the counter is self-locking, P0 remains low, and the capture of one cycle length of the signal source is completed, and the above capture process is not repeated until the next CLR signal arrives.

Compared with the input signal below 1KHz, the measurement with high frequency signal of 1MHz has high accuracy and precision. Assuming that within one cycle of the input signal, the number of cycles of the known frequency signal passing through the counter is N, the frequency value of the low-frequency signal to be tested is: $f=\frac{{10}^6\mathrm{\&mu;s}}{1\mathrm{\&mu;s}\&times;N}.$

Attached Figure 10 is a circuit diagram of 74F161 group and its connection with the data bus. The counting unit consists of four 74F161 fast counters connected in series. Each 74F161 can count 4 bits, so a total of 16 bits can be counted, 8 low bits and 8 high bits. One 75LS245 is respectively connected to the data bus, and each 74LS245 has its own independent chip selection address, so as to realize data exchange with the CPU.

High-frequency measurement principle:

For the medium and high frequency signals above 1KHz, a completely different measurement method is adopted - measuring the number of signal source pulses during the timing period: the method of connecting four fast counters 74F161 to the carry terminal TC of the previous counter according to the clock CLK terminal of the latter counter Connected end to end, a pin of 89C51 MCU generates a fixed timing signal (divided into several gears), which is connected to the enable terminal of the counter 74F161, and the high frequency signal is connected to the clock terminal of the first counter. The counting output of the counter is sent to the data bus through the bus transceiver 74F245 and uploaded back to the microcontroller. In this way, during the high-level period of the timing signal of the single-chip microcomputer, the counter will count the number of high-frequency signal pulses, and summarize the data of the four counters, so that it can be known how many high-frequency signal cycles pass through the counter during the high-level period of the timing signal.

Figure 8 is a timing diagram of the high-frequency measurement circuit:

Assuming that the period of the timing pulse is T, and the number of cycles of the high-frequency signal passing through the counter during the high level of the pulse is N, the frequency of the high-frequency signal can be obtained as: $\frac{\mathrm{<figure-callout\; id="10"\; label="f"\; filenames="A20071011875200313.png,A20071011875200324.png"\; state="\{\{state\}\}">f</figure-callout>}}{{10}^6\mathrm{\&mu;s}}=\frac{N}{T}$ $f=\frac{{10}^6\&times;N}{T}\left(\mathrm{Hz}\right)$

Since the operating frequency band of the circuit is only determined by the operating frequency of the four counters participating in the counting, it has nothing to do with the microcontroller and the bus buffer, so as long as the counter with a wide frequency band is selected, the counting of high-frequency signals can be fully realized. The nominal operating frequency of the 74F161 we selected is 143MHz, so theoretically our circuit can measure high-frequency signals above 100M, but due to the limitation of experimental conditions, our measured value can only reach a frequency of 50MHz (signal The upper limit frequency generated by the source is only 15MHz, and we use a 50MHz active crystal oscillator as the signal source), and the measurement of high-frequency signals below this frequency is completely normal. The following table shows the optimal timing length of the timer when measuring different frequencies:

Frequency Range Timing length MCU timer initial value The peak value of this band counter 10K-1MHz 50ms 3CB0H 50000＜65535 1MHz-10MHz 5ms 0EC78H 50000＜65535

10MHz-100MHz 0.5ms 0FE0CH 50000＜65535

High frequency/low frequency measurement multiplexing circuit:

In order to make the frequency measurement more accurate and the frequency band wider, different measurement methods are adopted for the input signals of the high and low frequency bands, and an overlapping area is set between the frequency ranges that can be measured by the two methods to ensure the system Integrity, so that there is no gap area in the frequency measurement.

For the high-frequency signal measurement circuit and the low-frequency signal measurement circuit, the counter groups connected in series are the same, and the only difference is that the clock signal and the enable signal connected to the counters in the two schemes are different. During high-frequency measurement, the clock signal is the input signal to be tested, while during low-frequency measurement, it is the output waveform of a known frequency crystal oscillator; during high-frequency measurement, the enable signal is the timing pulse of the single-chip microcomputer, and during low-frequency measurement, it is the input signal after waveform conversion and frequency conversion. waveform.

In order to ensure that the signal path switching does not affect the signal quality, instead of using an analog switch (such as CD4051), two relays are used. The normally open and normally closed ends of the first relay are respectively connected to the high-frequency input signal IN _TTL and the output pin of the crystal oscillator. IN _cry , the common output terminal is connected to the counting input terminal of the counting chipset, and the level of a digital signal controls the magnet pull-in terminal, so as to realize the switching of two signals; the normally open and normally closed terminals of the other relay are respectively Connect to the microcontroller pin IN _timer that generates the timing pulse and the waveform of the low-frequency input IN _TTL signal after signal processing, and the common output is connected to the enable terminals of the four counting chips. Its switching is controlled by the same one-bit digital signal. In this way, through digital signal control (the control signal can come from a certain pin of the single-chip microcomputer), the switching between the high-frequency channel and the low-frequency channel in the frequency measurement can be realized, and the design cost is greatly saved. After our practice, it has good stability. However, it should be noted that the reliable pull-in magnetic sheet of the relay needs enough pull-in current (use 74LS07 to add a small resistor to pull it up), and at the same time ensure the pull-in time (guaranteed with a delay in the program). Figure 11 is the circuit diagram of the frequency channel.

The MAX153 analog signal input pin of the A/D conversion circuit 3 is connected with the LF398 sampling and holding output pin of the voltage peak circuit 1.6 of the signal processing circuit 1, as the input of the voltage signal to be measured; the measurement result OUT _U (t) is output through the data The bus, address bus and control bus are connected to the CPU control circuit 3 .

Since the AT89C51 single-chip microcomputer is used for control and the 12M crystal oscillator is used, each instruction of the single-chip microcomputer takes 1μs, so the read-write mode (MODE=1) can be used, the conversion is started by the WR signal, and the conversion result is read by the RD signal. The interval between two instructions is 1μs, which meets the control requirements.

Select the high-speed A/D MAX153 chip of Maxim Company for use. Replace the output resistance RM200Ω of the LEM module with two precision resistors 100Ω to form a voltage divider. Therefore, resistors need to be selected to ensure accurate voltage division of the device. Refer to accompanying drawing 6 for the circuit diagram.

The function of the CPU control circuit 4 is to control the work of all circuits, data processing, movement and storage; the CPU external bus is composed of a data bus and an address bus; through the data bus, address bus and control bus, the control of other circuits is realized. Flash and RAM are connected to CPU through data bus and address bus to expand program and address space.

In the device, the CPU uses AT89C51 single-chip microcomputer, and the address allocation scheme is as follows: the P0 port is connected to the data bus, which is specially used for data transmission between chips; the P2 port is connected to the address bus, which is specially used to allocate addresses. This connection greatly simplifies The classic P0 port is connected to 74LS373 through ALE latch, the circuit stability is improved, but the addressing range is reduced, but the address range provided by P2 port has fully met our needs;

Addresses are allocated according to the following three principles:

(1) Use P2.7 to select the CH371 chip, and connect the GA enable terminal of 74LS138 at the same time: when P2.7=0, CH371 is selected, and 74LS138 is closed (that is, CH371 performs USB communication, and other devices are not selected); When P2.7=1, CH371 is idle, and 74LS138 can select other devices; in other words, P2.7 determines that the test system can only select one of CH371 and 74LS138 (ie other chips). This design realizes the control strategy that the priority of USB communication (the command of the upper computer) is higher than that of all functional modules (the lower computer);

(2) Y5~Y7 of the first 74LS138 is used as the interface for communicating with the keyboard display chip, and through the cooperation of the three data lines LOAD, DIN, and DCLK, the communication between the keyboard display chip and the CPU is realized;

(3) The P2 port works in two ways, one is the common P2 port with RD, WR read and write operations; the other is to use the characteristics of the P2 port’s own input and output ports with latches to realize long-term selection How the chip operates.

The address allocation is as follows:

address 8000H 8100-8105H 8200H 8300H ＜8000H

chip AD reserved The high eight bits of the frequency module The lower eight bits of the frequency module USB(CH371)

See attached drawing 2 for decoding circuit wiring.

In the test system, the 8 pins of the P1 port are also used for important purposes, as shown in the following table:

The keyboard interface in the keyboard display circuit 5 is connected with the 4X4 keyboard, and the real interface is connected with the real device through the real data line. Its data terminal, address terminal and control terminal are connected to the data bus, address bus and control bus of the CPU control circuit 4 respectively.

Choose CH451 keyboard display driver chip, which is a multifunctional peripheral chip that integrates digital tube display driver, keyboard scanning control and μP monitoring. CH451 has a built-in RC oscillator circuit, which can dynamically drive 8-digit digital tubes or 64-digit LEDs, and has functions such as BCD decoding, blinking, and shifting; at the same time, it can also perform 64-key keyboard scanning; CH451 can connect with SCM, etc. exchange data; and provide monitoring functions such as power-on reset and watchdog. Figure 3-14 is a block diagram of the circuit connection, there are 3 bit data lines and 1 interrupt line connecting the MCU and CH451:

The connection diagram between CH451 and keyboard LED electrical appliances is shown in Figure 12:

The communication circuit 6 is connected with the computer through a data line, and its data sending end, address end and control end are respectively connected to the data bus, address bus and control bus of the programmable CPU control circuit 4, and the communication circuit.

USB communication uses CH371 intelligent USB communication chip. CH371 is a general interface chip for USB bus. At the local end, CH371 has an 8-bit data bus, read, write, chip select control lines and interrupt output, and can be easily connected to the system bus of microcontrollers, DSP, MCU and other controllers; in computer systems, CH371 matching The software provides a simple and easy-to-use operation interface, and communicating with the local microcontroller is like reading and writing files in the hard disk. CH371 shields all protocols in USB communication, and provides end-to-end connection between the computer application layer and the local controller. Based on CH371, USB communication can be realized without knowing any USB protocol or firmware program or even driver program. The relationship among MCU, CH371 interface chip and computer is shown in Figure 3-19. The connection between CH371 and CPU is through the data bus, through the address decoding strobe, cooperate with RD#, WR# to read and write data to CH371, the connection between CPU, CH371 and USB bus is shown in Figure 13.

The data terminal, address terminal and control terminal of the self-checking correction circuit 7 are respectively connected to the data bus, address bus and control bus of the programmable CPU control circuit 4 . The self-test waveform output pin generated by AD7008 is connected to the output interface of signal processing circuit 3 weak current access circuit 1.1, that is, it is directly connected to the input pin of the regulated follower operational amplifier. See Figure 14.

In equipment self-test, a signal source whose frequency and amplitude can be automatically adjusted by the test system is often required. The controllable signal source composed of direct digital synthesis chip AD7008 and additional D/A conversion chip AD7520 can produce sine wave, frequency modulation wave, amplitude modulation wave and square wave, etc., and the frequency and amplitude of the signal can be precisely controlled by a microcomputer, and the adjustment is very convenient.

The function of the power supply circuit 8 is to provide 5V and ±12V power supply for each module; the input of the power supply circuit 8 is connected to the 220V power supply, and the standard voltage is obtained through the rectification, filtering, amplitude limiting, voltage stabilization and overload protection circuits, and through the voltage bus, Connect with the other 7 parts.

3. The realization of the analysis method of this embodiment:

1) Data collection: collect time-series voltage and time-series frequency by the system described in claim 1, the specific collection method is as follows, see accompanying drawing 17:

Step 1: set the acquisition time interval T _sample and the continuous acquisition times t _sample to voltage and frequency by the keyboard in the keyboard display circuit (5), put the current acquisition times t _once =1, and store the above parameters into the CPU control circuit ( 4) in the RAM, the CPU control circuit (4) executes the continuous acquisition subroutine;

Step 2: The CPU control circuit (4) obtains the collected value OUT _V of the current access signal voltage through the A/D conversion circuit (3), multiplies it by the step-down ratio to obtain the actual value U(t _once ) of the current voltage and stores it in it in RAM;

Step 3: the CPU control circuit (4) obtains the collected value OUT _F of the current access signal frequency through the frequency measurement circuit (2), calculates the true value F(t _once ) of the current voltage and stores it in its RAM;

Step 4: The current collection times t _once is incremented by 1, if t _once ≤ t _sample , repeat steps 2, 3, and 4;

Step 5: The collection is complete;

Then a time-series voltage value (U(t), t) and a time-series frequency value (F(t), t) are generated, where t is the sampling time, t=1, 2,..., t _sample , t _sample is positive The integer represents the final value of the sampling time, U(t) and F(t) respectively represent the voltage value and frequency value at time t;

2) Data preprocessing:

Step 1: read out the continuous acquisition times t _sample from the RAM of the CPU control circuit 4, set the current calculation times t _PRC =6, calculate the comparison end times t _prcend =t _sample -5, wherein it is related to U(t _sample ) and The number of voltage values compared with F(t _sample ) is 5;

Correct the (U(t), t) and (F(t), t) collected in the previous step, that is, delete the values that obviously deviate from the adjacent data. The correction principle is: if the voltage value U at time t The absolute value of the difference between (t) and the average value of voltage values at five moments before or after time t is greater than the average value of the absolute value of the difference between voltage values at five moments before or after time t, and needs to be corrected, that is

$<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\frac{\underset{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; 5</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; 5</span>}}<span\; class="notranslate">\; |</span><span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; ></span>\frac{\underset{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; 4</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; |</span>}{\mathrm{<span\; class="notranslate">\; 4</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>$

or

$<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\frac{\underset{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; 5</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; 5</span>}}<span\; class="notranslate">\; |</span><span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; ></span>\frac{\underset{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; 4</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; u</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; |</span>}{\mathrm{<span\; class="notranslate">\; 4</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; )</span>$

In formula (1), t-i represents i time before time t, then U(t-i) represents the voltage value at sampling time t-i, U(t) is the voltage value at time t, and U(t-i-1) represents t-i-1 The voltage value at the moment; α is the defined intensity, and the value range is 0% to 100%;

In formula (2), U(t) is the voltage value at time t, then U(t+i) represents the voltage value at sampling time t+i, and U(t+i+1) represents time t+i+1 The voltage value of , α is the defined intensity, and the value range is 0% to 100%;

If the voltage value U(t) at time t satisfies formula (1) or formula (2), the correction is:

$u\left(t\right)=\frac{u(t-1)+u(t+1)}{2};$ Among them, U(t-1) is the voltage value at time t-1, and U(t+1) is the voltage value at time t+1;

The correction principle of the frequency value F(t) is the same as that of U(t): if the absolute value of the difference between the frequency value F(t) at time t and the average value of the voltage value at n moments before or after is greater than t The average value of the absolute value of the difference between the voltage values at n moments before or after the moment needs to be corrected, that is

$<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\frac{\underset{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; 5</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; 5</span>}}<span\; class="notranslate">\; |</span><span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; ></span>\frac{\underset{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; 4</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; |</span>}{\mathrm{<span\; class="notranslate">\; 4</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; )</span>$

or

$<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\frac{\underset{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; 5</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; 5</span>}}<span\; class="notranslate">\; |</span><span\; class="notranslate">\; \&times;</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; ></span>\frac{\underset{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; 4</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; |</span>}{\mathrm{<span\; class="notranslate">\; 4</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 4</span>}<span\; class="notranslate">\; )</span>$

In formula (3), t-i represents the i time before time t, then F(t-i) represents the voltage value at sampling time t-i, F(t) is the voltage value at time t, and F(t-i-1) represents t-i-1 The voltage value at the moment; α is the defined intensity, and the value range is 0% to 100%;

In formula (2), F(t) is the voltage value at time t, then F(t+i) represents the voltage value at sampling time t+i, and F(t+i+1) represents time t+i+1 The voltage value of , α is the defined intensity, and the value range is 0% to 100%;

If the voltage value F(t) at time t satisfies formula (3) or formula (4), the correction is:

$f\left(t\right)=\frac{f(t-1)+f(t+1)}{2};$ Among them, F(t-1) is the voltage value at the time t-1, and F(t+1) is the voltage value at the time t+1;

Step 2: The number of previous calculations t _PRC is incremented by 1, and if t _PRC ≤ t _prcend , repeat step 1;

Step 3: Data preprocessing is completed;

3) Three-line analysis method and eigenvalue calculation:

Step 1, voltage-frequency curve fitting:

1) Apply the least squares method to fit the points in the UF curve into a straight line, and calculate the fitting parameters a, b and voltage-frequency characteristic values: voltage-frequency curve linearity α _out , voltage-frequency ratio K _out and voltage-frequency base point V _50Hz ;

For convenience, U(t) is denoted as u _t , F(t) is denoted as f _t , and t _sample is denoted as n. The specific steps are as follows:

Let the voltage-frequency linear function be f=au+b, where a and b are undetermined constants;

Note ε _t = f _t -(au _t + b), which reflects the deviation between the calculated value f and the actual value f _t when the straight line f = au+b is used to describe u = u _t and f = f _t ; to measure the total deviation;

Determine the constants a and b in f=au+b such that $f(a,b)=\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{\mathrm{\&epsiv;}}_{\mathrm{<figure-callout\; id="2"\; label="t"\; filenames="A20071011875200323.png,A20071011875200324.png"\; state="\{\{state\}\}">t</figure-callout>}}^2=\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{(f_t-{\mathrm{au}}_t-b)}^2$ is the smallest;

From the extreme value principle $\frac{\&PartialD;f}{\&PartialD;a}=\frac{\&PartialD;f}{\&PartialD;b}=0,$ Right now $\left\{\begin{array}{c}\frac{\&PartialD;f}{\&PartialD;a}=-2\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{u}_t(f_t-{\mathrm{au}}_t-b)=0\\ \frac{\&PartialD;f}{\&PartialD;b}=-2\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}(f_t-{\mathrm{au}}_t-b)=0\end{array}\right.$

Solving this simultaneous equation gives $\left\{\begin{array}{c}a=\frac{\mathrm{no}\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{u}_t{f}_t-\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{u}_t\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{f}_t}{\mathrm{no}\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{u_t}^2-{\left(\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{u}_t\right)}^2}\\ b=\frac{1}{\mathrm{no}}\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{f}_t-\frac{a}{\mathrm{no}}\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{u}_t\end{array}\right.$

Step 2, calculation of voltage and frequency eigenvalues:

Voltage-frequency ratio K _out = a: The voltage-frequency ratio is used to represent the linear relationship between voltage and frequency values;

Linearity of voltage-frequency curve $L_{\mathrm{out}}=\underset{t=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{\mathrm{\&epsiv;}}_t^2:$ The linearity of the voltage-frequency curve is used to measure the degree to which the points on the voltage-frequency curve deviate from the fitted straight line;

Voltage-frequency base point V _50Hz = 50a+b: The voltage-frequency base point is used to measure the working voltage when the working frequency is 50Hz;

Step 3, draw three curves:

Draw the voltage-time U-t curve: Draw the corrected time series (U(t), t) at each moment t and the corresponding voltage value U(t) into the U-t coordinate system to obtain the voltage-time U-t curve;

Draw the frequency-time F-t curve: Draw the corrected time series (F(t), t) at each moment t and the corresponding frequency value F(t) into the F-t coordinate system to obtain the frequency-time F-t curve;

Draw the voltage-frequency U-F curve: the corrected time series variables (U(t), t) and (F(t), t) are formed into a triplet (U(t), F(t), t), and the The two values of U(t) and F(t) corresponding to each time t are used as the (U, F) coordinates of a point, and drawn into the U-F coordinate system to obtain the U-F curve;

Step 4, performance index analysis:

According to the three curves drawn above and the three eigenvalues, the engineer can obtain whether the measured voltage frequency value meets the requirements of the actual project index of the project, and the degree of satisfaction.

Claims (5)

1. the electric voltage frequency measuring and analysis system is characterized in that: mainly include signal processing circuit (1), frequency measurement circuit (2), A/D change-over circuit (3), cpu control circuit (4), keyboard-display circuit (5) and power circuit (8); Wherein:

Signal processing circuit 1 includes light current place in circuit (1.1), forceful electric power place in circuit (1.2), reduction voltage circuit (1.3), voltage stabilizing follow circuit (1.4), TTL normalization circuit (1.5), peak holding circuit (1.6);

The input end of light current place in circuit (1.1) is one and is used for and 0～5V measured signal IN _LowThe analog signal interface that is connected, the output terminal of light current place in circuit (1.1) is connected with voltage stabilizing follow circuit 1.4;

The input end of forceful electric power place in circuit (1.2) is one and is used for and 5～300V measured signal IN _HighThe analog signal interface that is connected, the output of forceful electric power place in circuit (1.2) are connected on reduction voltage circuit (1.3) and are connected; 5～300V measured signal IN that reduction voltage circuit (1.3) is sent the forceful electric power place in circuit here _HighExport to voltage stabilizing follow circuit (1.4) after reducing to 0～5V light current measured signal according to the linear geometric ratio of step-down multiplying power;

The output signal IN of voltage stabilizing follow circuit (1.4) _StdEnd is connected with peak holding circuit (1.6) with TTL normalization circuit (1.5) respectively; TTL normalization circuit (1.5) becomes ac square wave with the output signal of voltage follower circuit (1.4), removes shake by the hysteresis comparator circuit again, by having obtained the TTL frequency measured signal IN of standard behind the stabilivolt _TTL, export to frequency measurement circuit (2); The maximal value that the output signal voltage of voltage follower circuit (1.6) appearred in peak holding circuit (1.6) is with the signal IN of dc constant voltage _PeakExport to A/D change-over circuit (3);

The output terminal of frequency measurement circuit (2) is connected with cpu control circuit (4) by data bus, address bus and control bus, frequency measurement circuit (2) is measured the frequency values of TTL reference waveform, and the frequency values that records outputed to cpu control circuit (4) with the form of digital quantity, deliver to display circuit (5) simultaneously and show;

The input of A/D change-over circuit (3) is connected with the output terminal of signal processing circuit (1) voltage peak circuit (1.6), and output terminal is connected with cpu control circuit (4) with control bus by data bus, address bus; The magnitude of voltage that A/D change-over circuit (3) is exported voltage peak circuit (1.6) converts digital quantity to and outputs to cpu control circuit (4), delivers to display circuit (5) simultaneously and shows;

Cpu control circuit (4) is connected the frequency values that the receive frequency metering circuit records with the output terminal of frequency measurement circuit (2); Cpu control circuit (4) is connected with A/D change-over circuit (3), receives the magnitude of voltage of the digital quantity after changing; If forceful electric power signal, magnitude of voltage and the step-down multiplying power of cpu control circuit (4) after according to the step-down of reduction voltage circuit (1.3), calculate actual magnitude of voltage, and among the RAM of storage cpu control circuit (4), and the display part of delivering in the keyboard-display circuit (5) shows;

Keyboard-display circuit (5) is connected with cpu control circuit (4) by data bus, address bus and control bus, and the display part in the keyboard-display circuit (5) is used for the result of display frequency metering circuit (2) and the real-time conversion of A/D change-over circuit (3); Keyboard in the keyboard-display circuit (5) is connected with cpu control circuit (4) by the keyboard display control chip;

Power circuit (8) provides power supply for above each circuit.

2. according to the electric voltage frequency measuring and analysis system described in the claim 1, it is characterized in that: also be provided with the communicating circuit (6) that is used for upper machine communication, communicating circuit (6) is connected with cpu control circuit (4).

3. according to the electric voltage frequency measuring and analysis system described in the claim 1, it is characterized in that: also be provided with self calibration positive circuit (7), the data terminal of self calibration positive circuit (7), address end and control end are received respectively on data bus, address bus and the control bus of cpu control circuit (4), and self calibration positive circuit (7) output terminal is connected with signal processing circuit (3) light current place in circuit (1.1) interface; Cpu control circuit (4) formation voltage, frequency signal input to self calibration positive circuit (7) and produce the self check waveform by self calibration positive circuit (7), the self check waveform inputs to light current place in circuit (1.1), and cpu controller compares to judge self check voltage, the frequency of voltage, frequency measurement and its generation that light current place in circuit (1.1) collects whether system is normal.

4. according to the electric voltage frequency measuring and analysis system described in the claim 1, it is characterized in that: described frequency measurement circuit (2) comprises that the counter group of the series connection of two relays, 4 74F161 register formations, 1 74F161 register are as logic controller and 2 74LS245 bus transceivers, four each registers of counter have 4 outputs, 8 outputs of per two registers are connected in the input of bus transceiver 74LS245, and the output of bus transceiver 74LS245 is connected with cpu control circuit (4) by data bus, address bus and control bus;

Often the opening of first relay, the frequency that normal-closed end connects high frequency are respectively treated side signal IN _TTLOutput pin IN with the known standard crystal oscillator _Cry, public output terminal is connected on the counting input end of first counter in the counter chip group; Often the opening of second relay, the CPU pin IN that normal-closed end is practiced midwifery living timing pip respectively _TimerTreat side signal IN with the frequency of low frequency _TTLBe connected, the Enable Pin of four counting chips is received in public output, and often the opening of first relay and second relay, normally closed switching controls end link to each other with cpu control circuit (4) control bus and fetch two relay normally opens of control, normally closed switching;

CLK end as the 74F161 counter of logic controller meets low frequency signal IN all the time _TTL, its CLR end links to each other by an anti-door with its 2nd counting output P1, the latching circuit that realization only allows the one-period waveform to pass through, and reset signal CLR links to each other for control end by control bus and CPU's.

5. utilize the described electric voltage frequency measuring and analysis system of claim 1, acquisition time sequence voltage, time series frequency and analytical approach thereof is characterized in that: mainly include data acquisition, data pre-service, three line analysises and the analysis of voltage-frequency eigenvalue calculation;

1) data acquisition: by system acquisition time series voltage, the time series frequency described in the claim 1, concrete acquisition method is as follows:

The 1st step: the acquisition time interval T is set by the keyboard in the keyboard-display circuit (5) _SampleWith continuous acquisition number of times t to voltage, frequency _Sample, put current times of collection t _Once=1, above-mentioned parameter is deposited among the RAM of cpu control circuit (4), cpu control circuit (4) is carried out the continuous acquisition subroutine;

The 2nd step: cpu control circuit (4) obtains the collection value OUT of current access signal voltage by A/D change-over circuit (3) _VLeave among the RAM of cpu controller;

The 3rd step: cpu control circuit (4) obtains the collection value OUT of current access signal frequency by frequency measurement circuit (2) _FLeave among the RAM of cpu controller;

The 4th step: current times of collection t _OnceFrom increasing 1, if t _Once≤ t _SampleThen repeated execution of steps 2,3, and 4;

The 5th step: gather and finish;

So produced the time series magnitude of voltage (U (t), t) and the time series frequency values (F (t), t), wherein t is the sampling time, t=1,2 ..., t _Sample, t _SampleBe positive integer, the final value in expression sampling time, U (t), F (t) represent t magnitude of voltage and frequency values constantly respectively;

2) data pre-service:

The 1st step: from the RAM of cpu control circuit (4), read continuous acquisition number of times t _Sample, put current calculation times t _Prc=n+1 calculates comparison and finishes number of times t _Prcend=t _Sample-n, wherein n is and U (t _Sample) and F (t _Sample) number of magnitude of voltage of contrast, the span of n is generally 3≤n≤10;

To (the U (t) that collected in the last step, t), (F (t), t) carry out correcting process, promptly the value deletion that obviously departs from adjacent data, the correction principle is: if t magnitude of voltage U (t) constantly with before or after the absolute value of difference of n moment magnitude of voltage mean value, greater than t constantly before or after n the mean value of absolute difference between the magnitude of voltage constantly, need correction, promptly

$|U\left(t\right)-\frac{\underset{i=1}{\overset{n}{\mathrm{\&Sigma;}}}U(t-i)}{n}|\&times;\mathrm{\&alpha;}>\frac{\underset{i=1}{\overset{n-1}{\mathrm{\&Sigma;}}}|U(t-i)-U(t-i-1)|}{n-1}---\left(1\right)$

Or

$|U\left(t\right)-\frac{\underset{i=1}{\overset{n}{\mathrm{\&Sigma;}}}U(t+i)}{n}|\&times;\mathrm{\&alpha;}>\frac{\underset{i=1}{\overset{n-1}{\mathrm{\&Sigma;}}}|U(t+i)-U(t+i+1)|}{n-1}---\left(2\right)$

In the formula (1), t-i represents constantly before the t i constantly, the magnitude of voltage during U (t-i) expression sampling instant t-i then, and U (t) is a t magnitude of voltage constantly, the magnitude of voltage in U (t-i-1) the expression t-i-1 moment; α defines intensity, and span is 0%～100%;

In the formula (2), U (t) is a t magnitude of voltage constantly, the magnitude of voltage when then U (t+i) represents sampling instant t+i, and U (t+i+1) expression t+i+1 magnitude of voltage constantly, α defines intensity, and span is 0%～100%;

If t magnitude of voltage U (t) constantly satisfies (1) formula or (2) formula, then be modified to:

$U\left(t\right)=\frac{U(t-1)+U(t+1)}{2};$ Wherein, U (t-1) is a t-1 magnitude of voltage constantly, and U (t+1) is a t+1 magnitude of voltage constantly;

The correction principle of frequency value F (t) is identical with the correction principle of U (t): if t frequency value F (t) constantly with before or after the absolute value of difference of n moment magnitude of voltage mean value, greater than t constantly before or after the mean value of absolute difference between n moment magnitude of voltage, need to revise, promptly

$|F\left(t\right)-\frac{\underset{i=1}{\overset{n}{\mathrm{\&Sigma;}}}F(t-i)}{n}|\&times;\mathrm{\&alpha;}>\frac{\underset{i=1}{\overset{n-1}{\mathrm{\&Sigma;}}}|F(t-i)-F(t-i-1)|}{n-1}---\left(3\right)$

Or

$|F\left(t\right)-\frac{\underset{i=1}{\overset{n}{\mathrm{\&Sigma;}}}F(t+i)}{n}|\&times;\mathrm{\&alpha;}>\frac{\underset{i=1}{\overset{n-1}{\mathrm{\&Sigma;}}}|F(t+i)-F(t+i+1)|}{n-1}---\left(4\right)$

In the formula (3), t-i represents constantly before the t i constantly, the magnitude of voltage during F (t-i) expression sampling instant t-i then, and F (t) is a t magnitude of voltage constantly, the magnitude of voltage in F (t-i-1) the expression t-i-1 moment; α defines intensity, and span is 0%～100%;

In the formula (2), F (t) is a t magnitude of voltage constantly, the magnitude of voltage when then F (t+i) represents sampling instant t+i, and F (t+i+1) expression t+i+1 magnitude of voltage constantly, α defines intensity, and span is 0%～100%;

If t magnitude of voltage F (t) constantly satisfies (3) formula or (4) formula, then be modified to:

$F\left(t\right)=\frac{F(t-1)+F(t+1)}{2};$ Wherein, F (t-1) is a t-1 magnitude of voltage constantly, and F (t+1) is a t+1 magnitude of voltage constantly;

The 2nd step: preceding calculation times t _PrcFrom increasing 1, if t _Prc≤ t _PrcendThen repeated execution of steps 1;

The 3rd step: the data pre-service is finished;

3) three line analysis and eigenvalue calculation:

The 1st step, the voltage-frequency curve match:

1) uses least square method the point in the U-F curve is fitted to a straight line, and calculate fitting parameter a, b and voltage-frequency eigenwert: voltage-frequency curve linearity α _Out, voltage-frequency compares K _OutWith voltage-frequency basic point V _50Hz

In order to represent conveniently U (t) to be designated as u _t, F (t) is designated as f _t, with t _SampleBe designated as n, concrete steps are as follows:

If the voltage-frequency linear function is f=au+b, wherein a, b are undetermined constants;

Note ε _t=f _t-(au _t+ b), it has reflected with straight line f=au+b and has described u=u _t, f=f _tThe time, calculated value f and actual value f _tThe deviation that produces; With Measure total departure;

Determine the constant among the f=au+b

With

Make $F(a,b)=\underset{t=1}{\overset{n}{\mathrm{\&Sigma;}}}{\mathrm{\&epsiv;}}_t^2=\underset{t=1}{\overset{n}{\mathrm{\&Sigma;}}}(f_t-{\mathrm{au}}_t-b{)}^2$ Be minimum;

Get by extremum principle $\frac{\&PartialD;F}{\&PartialD;a}=\frac{\&PartialD;F}{\&PartialD;b}=0,$ Promptly

$\left\{\begin{array}{c}\frac{\&PartialD;F}{\&PartialD;a}=-2\underset{t=1}{\overset{n}{\mathrm{\&Sigma;}}}{u}_t(f_t-{\mathrm{au}}_t-b)=0\\ \frac{\&PartialD;F}{\&PartialD;b}=-2\underset{t=1}{\overset{n}{\mathrm{\&Sigma;}}}(f_t-{\mathrm{au}}_t-b)=0\end{array}\right.$

Separating these simultaneous equations gets

$\left\{\begin{array}{c}a=\frac{n\underset{t=1}{\overset{n}{\mathrm{\&Sigma;}}}{u}_t{f}_t-\underset{t=1}{\overset{n}{\mathrm{\&Sigma;}}}{u}_t\underset{t=1}{\overset{n}{\mathrm{\&Sigma;}}}{f}_t}{n\underset{t=1}{\overset{n}{\mathrm{\&Sigma;}}}{u}_t^2-{\left(\underset{t=1}{\overset{n}{\mathrm{\&Sigma;}}}{u}_t\right)}^2}\\ b=\frac{1}{n}\underset{t=1}{\overset{n}{\mathrm{\&Sigma;}}}{f}_t-\frac{a}{n}\underset{t=1}{\overset{n}{\mathrm{\&Sigma;}}}{u}_t\end{array}\right.$

In the 2nd step, voltage, frequecy characteristic value are calculated:

Voltage-frequency compares K _Out=a: voltage-frequency is than the linear relationship that is used for representing voltage and frequency values;

The voltage-frequency curve linearity $L_{\mathrm{out}}=\underset{t=1}{\overset{n}{\mathrm{\&Sigma;}}}{\mathrm{\&epsiv;}}_t^2:$ The voltage-frequency curve linearity is used for weighing point on the voltage-frequency curve and departs from the come out degree of straight line of match;

Voltage-frequency basic point V _50Hz=50a+b: the operating voltage when the voltage-frequency basic point is used for weighing frequency of operation 50Hz;

In the 3rd step, draw three curves:

Drawing voltage time is the U-t curve: with revised time series (U (t), t) each t and corresponding voltage value U (t) are plotted in the U-t coordinate system voltage time U-t curve that obtains constantly;

Draw frequency time F-t curve: with revised time series (F (t), t) each t and frequency value corresponding F (t) are plotted in the F-t coordinate system frequency time F-t curve that obtains constantly;

Draw electric voltage frequency U-F curve: with revised time series variable (U (t), t) and (F (t), t), the formation tlv triple (U (t), F (t), t), each constantly the U (t), two values of F (t) of t correspondence as the (U of a point, F) coordinate is plotted in the U-F coordinate system, obtains the U-F curve.

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