CN101197272A - Method for forming metal front medium layer and its structure - Google Patents
Method for forming metal front medium layer and its structure Download PDFInfo
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- CN101197272A CN101197272A CNA2006101191641A CN200610119164A CN101197272A CN 101197272 A CN101197272 A CN 101197272A CN A2006101191641 A CNA2006101191641 A CN A2006101191641A CN 200610119164 A CN200610119164 A CN 200610119164A CN 101197272 A CN101197272 A CN 101197272A
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Abstract
The invention relates to a forming method for metal front dielectric layer, which comprises the following steps of: forming a metal front dielectric layer depositing substrate on a semi-conductor substrate; depositing a first metal front dielectric layer on the depositing substrate by using a first CVD method; and depositing a second metal front dielectric layer on the first metal front dielectric layer by using a second CVD method. The metal front dielectric layer without depositing cave can be formed to improve the performance of device by changing the internal stress state of device. The first dielectric layer is deposited by HARP SACVD technics, thus reducing the depth width ratio in subsequent manufacture process. Then, the second dielectric layer is deposited by using HDPCVD, SACVD, PECVD or other traditional technics to complete the depositing of the dielectric layer, thereby ensuring that the subsequent work is identical with the prior technics, reducing the change to the prior technics to the lowest for the purpose of technics optimization, and reducing development cost.
Description
Technical field
The present invention relates to the ic manufacturing technology field, particularly a kind of before-metal medium layer formation method and structure thereof.
Background technology
(Pre-Metal Dielectric, PMD) as the separator of device and interconnecting metal interlayer and make device avoid the protective layer that foreign particle pollutes, the quality of its film deposition effect directly influences the performance of device to before-metal medium layer.
Along with reducing gradually of dimensions of semiconductor devices, the linear slit width that will fill during the pmd layer deposition is also more and more littler, and depth-to-width ratio is increasing, and porefilling capability becomes the optimization aim of pmd layer depositing operation.Usually select for use high density plasma CVD (HDPCVD) and subatmospheric chemical vapour deposition (CVD) (SACVD) technology to form pmd layer in the existing technology, used pmd layer material includes but not limited to phosphorosilicate glass (PSG) and boron-phosphorosilicate glass (BPSG).Practice shows, the HDP-PMD film has that deposition velocity is fast, film is fine and close and series of advantages such as good uniformity.But for guaranteeing HDP-PMD depositing of thin film effect, essential strict control its deposition-etch rate ratio.
Consider, HDPCVD technological reaction room pressure is below 10mTorr (millitorr, one thousandth millimetres of mercury), and traditional SACVD technological reaction room pressure is between 200-600Torr, Comparatively speaking, the mean free path of molecule is littler, and porefilling capability is stronger, causes the SA-PMD film to show more superior porefilling capability, in addition, traditional SACVD adopts the technology of thermal degradation, the plasma that does not use radio frequency to produce, the also device damage that can avoid plasma to cause.But along with after integrated circuit critical dimension enters 65 nanometers even smaller szie, to the depositing operation of pmd layer, traditional SA-PMD is also powerless.
Recently, be accompanied by the continuous increase of device dense degree and complex process degree, the impaired ratio of device performance that is caused by stress in thin film increases gradually, causes the stress in thin film problem day by day to cause the attention of industry.How to provide a kind of and can guarantee pmd layer filling perforation quality, can improve the PMD deposition process of the device performance condition in damaged that causes by stress in thin film again, become those skilled in the art's problem demanding prompt solution.
The high density plasma CVD method of a kind of many deposition steps of providing in 03151024.8 the Chinese patent application is provided application number, this method is passed through secondary high density plasma CVD step at least, and the deposition-etch rate that guarantees each deposition step is than (D/S value) difference, its D/S value scope is 7-20, the 2nd D/S value scope is 2.5-8, there is no hole ground and fill this linear slit having deposit film at the semiconductor-based end of linear slit.
Yet, in the actual production process, can solve linear slit filling problem though use this method, can't solve the stress in thin film problem.
A kind of method that reduces shallow trench isolating side wall oxide layer stress and erosion is provided in the Chinese patent of the patent No. for CN1242466C, this method comprises the following steps: to provide a ground at least, and described ground has one first dielectric layer in second dielectric layer that reaches described first dielectric layer of a covering; Form a groove and enter described ground; Form sidewall and the bottom of a sidewall oxide in described groove; Fill up described groove with a dielectric material; And carry out an on-site steam generation processing procedure to reoxidize described sidewall oxide, described on-site steam generation processing procedure comprises at least introduces oxygen and hydroxyl.
Obviously, though this method provides the technical clarification that can reduce stress in thin film, can't solve linear slit and fill problem.Simultaneously, described technical clarification and the above-mentioned simple combination that solves the technical scheme of filling clearance issues, promptly behind the high density plasma CVD of many deposition steps, carry out an on-site steam generation processing procedure again, can provide in theory and can guarantee the linear slit filling quality, can reduce the film deposition method of stress in thin film again, but be not suitable for the PMD depositing operation, because described on-site steam generation processing procedure is temperature required to be 700-1200 degree centigrade, so high temperature can cause harmful effect to the performance of established device.
Summary of the invention
The invention provides a kind of before-metal medium layer formation method, in order to the no deposition hole generation of formation and by changing the device interior state to improve the pmd layer of device performance; The present invention also provides a kind of before-metal medium layer structure, and its inner no hole produces.
A kind of before-metal medium layer formation method provided by the invention comprises:
On Semiconductor substrate, form the before-metal medium layer deposition substrate;
On described deposition substrate, utilize a CVD method to deposit first before-metal medium layer;
On described first before-metal medium layer, utilize the 2nd CVD method to deposit second before-metal medium layer.
A described CVD method is HARP SACVD; Described HARP SACVD unit type is AMATProducer SE; The described first before-metal medium layer material is a non-impurity-doped glass; The described first before-metal medium layer thickness range is 10～100 nanometers; Described the 2nd CVD method includes but not limited to a kind of in traditional SACVD, PECVD and the HDPCVD technology; The described second before-metal medium layer material includes but not limited to silicon dioxide, phosphorosilicate glass, Pyrex, boron-phosphorosilicate glass, fluorine silex glass or has a kind of or its combination in the advanced low-k materials.Described have advanced low-k materials and include but not limited to black diamond or coral.
No deposition hole produces in a kind of before-metal medium layer structure provided by the invention, described before-metal medium layer, and described before-metal medium layer comprises first before-metal medium layer and second before-metal medium layer along this deposition.
The described first before-metal medium layer material is a non-impurity-doped glass; The described first before-metal medium layer thickness range is 10～100 nanometers; The described second before-metal medium layer material includes but not limited to silicon dioxide, phosphorosilicate glass, Pyrex, boron-phosphorosilicate glass, fluorine silex glass or has a kind of or its combination in the advanced low-k materials.
A kind of rete formation method provided by the invention comprises:
On Semiconductor substrate, form the film deposition substrate;
On described deposition substrate, utilize a CVD method to deposit first rete;
On described first rete, utilize the 2nd CVD method to deposit second rete.
A described CVD method is HARP SACVD; Described HARP SACVD unit type is AMATProducer SE; Described first film material is a non-impurity-doped glass; The described first thicknesses of layers scope is 10～100 nanometers; Described the 2nd CVD method includes but not limited to a kind of in traditional SACVD, PECVD and the HDPCVD technology; Described second film material includes but not limited to silicon dioxide, phosphorosilicate glass, Pyrex, boron-phosphorosilicate glass, fluorine silex glass or has a kind of or its combination in the advanced low-k materials.
No deposition hole produces in a kind of film layer structure provided by the invention, described rete, and described rete comprises first rete and second rete along this deposition.
Described first film material is a non-impurity-doped glass; The described first thicknesses of layers scope is 10～100 nanometers; Described second film material includes but not limited to silicon dioxide, phosphorosilicate glass, Pyrex, boron-phosphorosilicate glass, fluorine silex glass or has a kind of or its combination in the advanced low-k materials.
Compared with prior art, the present invention has the following advantages:
1. utilize HARP SACVD and the method that traditional handicrafts such as HDPCVD, SACVD or PECVD combine, can form imperforate pmd layer, and then the reliability of enhance device;
2. utilize HARP SACVD to combine and replace HARPSACVD, can when forming imperforate pmd layer, production capacity be higher than one times with traditional handicrafts such as HDPCVD, SACVD or PECVD;
3. substitute the existing single layer structure that constitutes by the complex media material by the double-decker that adopts USG and complex media material to form, can realize imperforate pmd layer deposition; Substitute the single layer structure that constitutes by USG by the double-decker that adopts USG and complex media material to form, can effectively prevent the diffusion of Na in the processing procedure (sodium) ion;
4. at first utilize HARP SACVD to form the USG layer, then utilize traditional handicrafts such as HDPCVD or PECVD to form the complex media material layer, when forming the double-decker of USG and complex media material composition, the USG layer that the described HARP of utilization SACVD forms can be used as the barrier layer of plasma depositing operations such as follow-up HDPCVD or PECVD, helps reducing the device damage that follow-up plasma deposition process causes;
5. the stress of using the rete of HARP SACVD formation is tension stress, and the stress of using the rete of traditional handicrafts formation such as HDPCVD, SACVD or PECVD is compression, two kinds of stress types are opposite, aggregate performance helps the improvement of device performance for the overall stress that the double-decker that adopts USG layer and complex media material to form combines device influences;
6. the ratio of the thickness of using the rete that HARP SACVD forms by control and the thickness of using the rete that traditional handicrafts such as HDPCVD, SACVD or PECVD form can be adjusted the stress in thin film value in the pmd layer of deposition back flexibly;
7. utilize HARP SACVD process deposits first dielectric layer, to reduce the linear slit depth-to-width ratio of successive process, then use traditional handicrafts such as HDPCVD, SACVD or PECVD and deposit second dielectric layer, to finish the deposition of dielectric layer, can guarantee that subsequent technique is identical with existing technology, make and to reduce R﹠D costs with for realizing that change that process optimization carries out existing technology reduce to minimumly.
Description of drawings
Figure 1A～1C is the schematic flow sheet of the deposition pmd layer of explanation first embodiment of the invention;
Fig. 2 A～2C is the schematic flow sheet of the deposition STI layer of explanation second embodiment of the invention;
Fig. 3 A～3C is the schematic flow sheet of metallization medium layer in single damascene process of explanation third embodiment of the invention.
Embodiment
Although below with reference to accompanying drawings the present invention is described in more detail, wherein represented the preferred embodiments of the present invention, be to be understood that those skilled in the art can revise the present invention described here and still realize advantageous effects of the present invention.Therefore, following description is appreciated that extensive instruction for those skilled in the art, and not as limitation of the present invention.
For clear, whole features of practical embodiments are not described.In the following description, be not described in detail known function and structure, because they can make the present invention because unnecessary details and confusion.Will be understood that in the exploitation of any practical embodiments, must make a large amount of implementation details, for example, change into another embodiment by an embodiment according to relevant system or relevant commercial restriction to realize developer's specific objective.In addition, will be understood that this development may be complicated and time-consuming, but only be routine work for those skilled in the art with advantage of the present invention.
In the following passage, with way of example the present invention is described more specifically with reference to accompanying drawing.Will be clearer according to following explanation and claims advantages and features of the invention.It should be noted that accompanying drawing all adopts very the form of simplifying and all uses non-ratio accurately, only in order to convenient, the purpose of the aid illustration embodiment of the invention lucidly.
In presents, term " linear slit " expression chip is interior with the area of isolation between the layer material figure, and can exchange with term " slit " or " gap "; Term " hole " expression linear slit is filled the interior area of isolation of material that the back forms, and can exchange with term " cavity " or " space ".
Use that method provided by the invention forms that no deposition hole produces and comprise with the step of the before-metal medium layer that improves device performance: formation before-metal medium layer deposition substrate on Semiconductor substrate by changing the device interior state; On described deposition substrate, utilize a CVD method to deposit first before-metal medium layer; On described first before-metal medium layer, utilize the 2nd CVD method to deposit second before-metal medium layer.
Figure 1A～1C is the schematic flow sheet of the deposition pmd layer of explanation first embodiment of the invention, and as shown in the figure, the concrete steps of using method filling before-metal medium layer provided by the invention comprise:
At first, shown in Figure 1A, on Semiconductor substrate 10, form before-metal medium layer deposition substrate 20.
Described deposition substrate comprises device region and non-device region, and grid structure 30 is formed at described device region surface, has linear slit 40 between described grid structure.The barrier layer 31 that described grid structure 30 comprises the side wall 32 of grid 33, all around gate and covers described grid and side wall.Described grid structure 30 also comprises gate oxide 13.
Described grid preferably is made of polysilicon, or is formed by combinations of materials such as polysilicon and metal silicides; Described metal silicide comprises tungsten silicide (WSi) or titanium silicide (TiSi
2) wait a kind of in the material; Described spacer material is preferably by silicon dioxide (SiO
2) constitute; Described side wall utilization deposits-anti-carves technology and forms; Described depositing operation is selected chemical vapor deposition for use; Described etching technics is elected plasma etching as.Described barrier material is preferably by silicon nitride (Si
3N
4) constitute; Described barrier layer utilizes chemical vapor deposition method to form.
The formation method of described grid structure can adopt any traditional method, and the technical scheme that relates under any circumstance all is not considered part of the present invention, does not repeat them here.
Secondly, on described deposition substrate 20, utilize a CVD method to deposit first before-metal medium layer 50.
A described CVD method is selected the CVD method with good linear slit filling capacity for use.For critical dimension is the CVD processing procedure of 65nm or littler process node, and a described CVD method is selected HARP SACVD (highaspect ratio process Sub-Atmospherical CVD) for use; The described first before-metal medium layer material be non-impurity-doped glass (Un-Doped Silicate Glass, USG); The described formation first before-metal medium layer material comprises first reacting gas and second reacting gas, and described first reacting gas comprises silane (SiH
4) or tetraethoxysilane (TEOS, Si (C
2H
5O
4)) in a kind of, described second reacting gas comprises oxygen (O
2) or ozone (O
3) in a kind of.
Usually, utilize the method for HARP SACVD deposition pmd layer to comprise two steps: to adopt higher gas pressure and higher described second reacting gas concentration and the first lower reaction gas flow in the described first step, to guarantee the filling effect of described substrate internal seams; Adopt existing film deposition technology in described second step, to improve production capacity.
As example, described first reacting gas is selected TEOS for use, and described second reacting gas is selected O for use
3The time, gas pressure can be 500～600Torr in the described first step, described O
3Concentration range be 10%～20%, described TEOS range of flow is: 100～1000mgm (milligram/minute) is preferably 400～600mgm; Gas pressure can be 100～200Torr in described second step, described O
3Concentration range be 5%～15%, described TEOS range of flow is: 1000～10000mgm (milligram/minute) is preferably 4000～6000mgm.
The deposition rate scope of HARP SACVD is 10～20nm/min in the described first step, and the deposition rate scope of HARP SACVD is 150～200nm/min in described second step.
Described HARP SACVD unit type is AMAT Producer SE.
Yet, though this HARP SACVD has superior porefilling capability, but its production capacity is lower, only be about half of traditional handicraft production capacities such as using HDPCVD, SACVD or PECVD, substitute existing HDPCVD, PECVD or traditional SACVD deposition pmd layer if use HARP SACVD fully, will have a strong impact on the output of production capacity.
The juche idea of the inventive method promptly is to utilize HARP SACVD to fill the zone that has high-aspect-ratio in the described linear slit, utilizes existing HDPCVD, PECVD or traditional SACVD technology to finish the filling of linear slit then.Utilize HARP SACVD and the method that traditional handicrafts such as HDPCVD, SACVD or PECVD combine, form imperforate pmd layer, and then the reliability of enhance device.
The described first before-metal medium layer thickness is determined according to technological requirement and working condition.After the described first before-metal medium layer thickness need guarantee to deposit described first before-metal medium layer at least, the linear slit that has certain depth-to-width ratio in the described pmd layer can utilize current technology not have hole and fill.
As embodiments of the invention, if described linear slit depth-to-width ratio is 7: 1, and when described current technology is HDPCVD, if HDPCVD can realize that linear slit does not have the depth-to-width ratio that hole fills and is less than or equal to 3: 1 in the prior art, the then described first before-metal medium layer thickness is at least 4/7ths of the described linear slit degree of depth, when the described linear slit degree of depth was 300nm, the described first before-metal medium layer thickness can be more than or equal to 180nm.
The method that technologies such as the described HDPCVD of utilization, SACVD or PECVD form rete can adopt any traditional method, and the technical scheme that relates under any circumstance all is not considered part of the present invention, does not repeat them here.
Obviously; in the above-mentioned example; the special selection that the linear slit depth-to-width ratio and the linear slit degree of depth are made for ease of explanation the specific embodiment of the present invention; should be as qualification to the inventive method execution mode; rational arbitrarily modification and equivalents that those skilled in the art make this do not influence the enforcement of the inventive method, and should be included in protection scope of the present invention.
In the production practices, the described first before-metal medium layer thickness range is 10～100nm, is preferably 80～100nm.
Utilize HARP SACVD to combine and replace HARPSACVD, can when forming imperforate pmd layer, production capacity be higher than one times with traditional handicrafts such as HDPCVD, SACVD or PECVD.
At last, on described first before-metal medium layer 50, utilize the 2nd CVD method to form second before-metal medium layer 60.
Described the 2nd CVD method includes but not limited to traditional SACVD, PECVD and HDPCVD.
The described second before-metal medium layer material includes but not limited to unadulterated silicon dioxide (SiO
2), phosphorosilicate glass (phosphosilicate glass, PSG), Pyrex (borosilicate, BSG), boron-phosphorosilicate glass (borophosphosilicate, BPSG), fluorine silex glass (FSG) or have a kind of or its combination in the advanced low-k materials.Described have advanced low-k materials include but not limited to black diamond (Black Diamond, BD) or coral etc.Described composite material comprises the material that material that USG mix is formed and the different USG that mixes combine.
Described second before-metal medium layer one-tenth-value thickness 1/10 and the described first before-metal medium layer one-tenth-value thickness 1/10 sum are the pmd layer one-tenth-value thickness 1/10 that meets product requirement.
Usually, USG utilizes the technology of SACVD, PECVD or HDPCVD to generate; BPSG and FSG then generate by the mode of SACVD, and PSG then utilizes the mode of PECVD or HDPCVD to generate; Described have advanced low-k materials and utilize the mode of PECVD to generate.
The generation of stress normally causes because of the shrinkage ratio difference of two kinds of materials after temperature change.HARP SACVD, traditional SACVD, HDP and PECVD deposit first before-metal medium layer and second before-metal medium layer in turn on deposition substrate under 400-500 degree centigrade condition, for convenience of description, former deposition substrate is called first deposition substrate, the deposition substrate behind deposition first before-metal medium layer is called second deposition substrate.
When depositing first before-metal medium layer, after the temperature of described first before-metal medium layer and described first deposition substrate drops to normal temperature, because the described first before-metal medium layer material is different with the shrinkage ratio of described first deposition substrate, all produces stress in the inside of described first before-metal medium layer and described first deposition substrate.
When the shrinkage ratio of the described first before-metal medium layer material during greater than the shrinkage ratio of described first deposition substrate, the described first deposition substrate inside will produce compression (compressive), in the opposite tension stress (tensile) of the inner generation of described first before-metal medium layer; Otherwise then can in described first deposition substrate, produce tension stress, and in the inner compression that produces of described first before-metal medium layer.
In like manner, when on described second deposition substrate, depositing second before-metal medium layer, after the temperature of described second before-metal medium layer and described second deposition substrate drops to normal temperature, because the described second before-metal medium layer material is different with the shrinkage ratio of described second deposition substrate, all produces stress in the inside of described second before-metal medium layer and described second deposition substrate.
When the shrinkage ratio of the described second before-metal medium layer material during greater than the shrinkage ratio of described second deposition substrate, the described second deposition substrate inside will produce compression (compressive), in the opposite tension stress (tensile) of the inner generation of described second before-metal medium layer; Otherwise then can in described second deposition substrate, produce tension stress, and in the inner compression that produces of described second before-metal medium layer.
Usually, the rete that utilizes PECVD and HDPCVD to generate is inner can produce compression (approximately-200MPa); And the rete that utilizes traditional SACVD to form, can produce lower compression (less than-100MPa); And the rete that utilizes HARP SACVD to generate then has tension stress (approximately+200MPa).
Why the rete of the described HARP of utilization SACVD deposition can have with utilizing current technology forms the opposite stress of membranous layer property of deposition, be because utilize the rete of HARP SACVD deposition to keep more hydrogen bond, then in the process of cooling, interaction generation hydrogen molecule takes place and separates out in the hydrogen bond of rete inside because of instability, this addition reaction can make rete produce certain volume contraction.This shrinks with rete interior because the contraction that the temperature difference produces is superimposed, make the described first before-metal medium layer Yin Wendu reduce the contraction of the contraction of generation greater than described first deposition substrate, so just can in described first before-metal medium layer, produce tension stress, in described first deposition substrate, produce compression; Produce compression and use in the follow-up technology in described second before-metal medium layer that traditional handicrafts such as HDPCVD, SACVD or PECVD form, in described second deposition substrate, produce tension stress; Aggregate performance helps the improvement of device performance for the overall stress that the combination process that adopts traditional handicrafts such as HARP SACVD and HDPCVD, SACVD or PECVD to form combines device influences.
The stress of using the rete of HARP SACVD formation is tension stress, and the stress of using the rete of traditional handicrafts formation such as HDPCVD, SACVD or PECVD is compression, two kinds of stress types are opposite, and aggregate performance has reduced the stress in thin film in the pmd layer after the deposition for the double-decker that adopts USG layer and complex media material to form.
Obviously, the stress value that has of described rete is relevant with described thicknesses of layers.And then, use the ratio of thickness and the thickness of described second before-metal medium layer of using traditional handicrafts depositions such as HDPCVD, SACVD or PECVD of described first before-metal medium layer of HARP SACVD deposition by control, can adjust the stress in thin film value in the pmd layer of deposition back flexibly.
In addition, utilize HARP SACVD process deposits first before-metal medium layer, to reduce the linear slit depth-to-width ratio of successive process in the substrate, then use traditional handicrafts such as HDPCVD, SACVD or PECVD and deposit second before-metal medium layer, to finish the deposition of before-metal medium layer, can guarantee that subsequent technique is identical with existing technology, make and to reduce R﹠D costs with for realizing that change that process optimization carries out existing technology reduce to minimumly.
Shown in Fig. 1 C, the described before-metal medium layer of using method formation provided by the invention has double-decker.Described before-metal medium layer comprises described first before-metal medium layer 50 and described second before-metal medium layer 60.The described first before-metal medium layer material is USG, and the described first before-metal medium layer thickness range is 10～100 nanometers; The described second before-metal medium layer material is PSG, BSG, BPSG, FSG and has a kind of or its combination in the interlevel dielectric material commonly used such as advanced low-k materials.
Substitute the existing single layer structure that constitutes by the complex media material by the double-decker that adopts USG and complex media material to form, can realize imperforate pmd layer deposition; Substitute the single layer structure that constitutes by USG by the double-decker that adopts USG and complex media material to form, can effectively prevent the diffusion of Na in the processing procedure (sodium) ion.
At first utilize HARP SACVD to form the USG layer, then utilize traditional handicrafts such as HDPCVD or PECVD to form the complex media material layer, when forming the double-decker of USG and complex media material composition, the USG layer that the described HARP of utilization SACVD forms can be used as the barrier layer of plasma depositing operations such as follow-up HDPCVD or PECVD, helps reducing the device damage that follow-up plasma deposition process causes.
Obviously, the inventive method is not limited only to above-mentioned execution mode, as the second embodiment of the present invention, use that method provided by the invention forms that no deposition hole produces and comprise: formation one groove on Semiconductor substrate by changing the step that the device interior state fills from (STI) thing with the shallow trench isolation that improves device performance; Form sidewall and the bottom of a sidewall oxide in described groove; In described groove, utilize a CVD method to deposit first dielectric layer; On described first dielectric layer, utilize the 2nd CVD method to deposit second dielectric layer.
Fig. 2 A～2C is the schematic flow sheet of deposition STI layer of explanation second embodiment of the invention, as shown in the figure, uses method provided by the invention and carries out the concrete steps that separator with shallow grooves fills and comprise:
At first, shown in Fig. 2 A, on Semiconductor substrate, form deposition substrate 20, promptly on Semiconductor substrate 10, form a groove 70, and form sidewall and the bottom of a sidewall oxide 71 in described groove 70.
On Semiconductor substrate, be included in the step that forms isolating oxide layer and barrier layer on the described Semiconductor substrate in turn in the step of the described groove of formation.Described isolation oxidation layer material is a silicon dioxide; Described barrier material is a silicon nitride.
The method of described formation groove and sidewall oxide can adopt any traditional method, and the technical scheme that relates under any circumstance all is not considered part of the present invention, does not repeat them here.
Secondly, shown in Fig. 2 B, in described groove 70, utilize a CVD method to deposit first dielectric layer 51.
A described CVD method is selected the CVD method with good trench fill ability for use.For critical dimension is the CVD processing procedure of 65nm or littler process node, and a described CVD method is selected HARP SACVD (highaspect ratio process Sub-Atmospherical CVD) for use; The described first dielectric layer material be non-impurity-doped glass (Un-Doped Silicate Glass, USG); The material of described formation first dielectric layer comprises first reacting gas and second reacting gas, and described first reacting gas comprises silane (SiH
4) or tetraethoxysilane (TEOS, Si (C
2H
5O
4)) in a kind of, described second reacting gas comprises oxygen (O
2) or ozone (O
3) in a kind of.
Usually, the method of utilizing HARP SACVD to fill STI comprises two steps: adopt higher gas pressure and higher described second reacting gas concentration and the first lower reaction gas flow in the described first step, to guarantee the filling effect of described substrate internal seams; Adopt existing film deposition technology in described second step, to improve production capacity.
As example, described first reacting gas is selected TEOS for use, and described second reacting gas is selected O for use
3The time, gas pressure can be 500～600Torr in the described first step, described O
3Concentration range be 10%～20%, described TEOS range of flow is: 100～1000mgm (milligram/minute) is preferably 200～500mgm; Gas pressure can be 100～200Torr in described second step, described O
3Concentration range be 5%～15%, described TEOS range of flow is: 1000～10000mgm (milligram/minute) is preferably 2000～5000mgm.
The deposition rate scope of HARP SACVD is 10～20nm/min in the described first step, and the deposition rate scope of HARP SACVD is 150～200nm/min in described second step.
Described HARP SACVD unit type is AMAT Producer SE.
Yet, though this HARP SACVD has superior porefilling capability, but its production capacity is lower, only be about half of traditional handicraft production capacities such as using HDPCVD, SACVD or PECVD, HARP SACVD substitutes existing HDPCVD, PECVD or traditional SACVD fills STI if use fully, will have a strong impact on the output of production capacity.
The juche idea of the inventive method promptly is to utilize HARP SACVD to fill the zone that has high-aspect-ratio in the described groove, utilizes existing HDPCVD, PECVD or traditional SACVD technology to finish the filling of groove then.Utilize HARP SACVD and the method that traditional handicrafts such as HDPCVD, SACVD or PECVD combine, form imperforate STI and fill, and then the reliability of enhance device.
Described first thickness of dielectric layers is determined according to technological requirement and working condition.After described first thickness of dielectric layers need guarantee to deposit described first dielectric layer at least, described STI with certain depth-to-width ratio can utilize current technology not have hole and fill.
As embodiments of the invention, if the depth-to-width ratio of described groove is 7: 1, and when described current technology is HDPCVD, if HDPCVD can realize that groove does not have the depth-to-width ratio that hole fills and is less than or equal to 3: 1 in the prior art, the then described first before-metal medium layer thickness is at least 4/7ths of described gap depth, when described gash depth was 300nm, the described first before-metal medium layer thickness can be more than or equal to 180nm.
The method that technologies such as the described HDPCVD of utilization, SACVD or PECVD form rete can adopt any traditional method, and the technical scheme that relates under any circumstance all is not considered part of the present invention, does not repeat them here.
Obviously; in the above-mentioned example; the special selection that groove depth-to-width ratio and gash depth are made for ease of explanation the specific embodiment of the present invention; should be as qualification to the inventive method execution mode; rational arbitrarily modification and equivalents that those skilled in the art make this do not influence the enforcement of the inventive method, and should be included in protection scope of the present invention.
In the production practices, the described first thickness of dielectric layers scope is 10～100nm, is preferably 80～100nm.
Utilize HARP SACVD to combine and replace HARPSACVD, can when filling imperforate STI, production capacity be higher than one times with traditional handicrafts such as HDPCVD, SACVD or PECVD.
At last, shown in Fig. 2 C, on described first dielectric layer 51, utilize the 2nd CVD method to form second dielectric layer 61.
Described the 2nd CVD method includes but not limited to traditional SACVD, PECVD and HDPCVD.
The described second dielectric layer material is unadulterated silicon dioxide (SiO
2).
Described second thickness of dielectric layers value and the described first thickness of dielectric layers value sum are the STI one-tenth-value thickness 1/10 that meets product requirement.
Usually, USG utilizes the technology of SACVD, PECVD or HDPCVD to generate.
The generation of stress normally causes because of the shrinkage ratio difference of two kinds of materials after temperature change.HARP SACVD, traditional SACVD, HDP and PECVD deposit first dielectric layer and second dielectric layer in turn on deposition substrate under 400-500 degree centigrade condition, for convenience of description, former deposition substrate is called first deposition substrate, the deposition substrate behind deposition first dielectric layer is called second deposition substrate.
When depositing first dielectric layer, after the temperature of described first dielectric layer and described first deposition substrate drops to normal temperature, because the described first dielectric layer material is different with the shrinkage ratio of described first deposition substrate, all produces stress in the inside of described first dielectric layer and described first deposition substrate.
When the shrinkage ratio of the described first dielectric layer material during greater than the shrinkage ratio of described first deposition substrate, the described first deposition substrate inside will produce compression (compressive), produces opposite tension stress (tensile) in that described first dielectric layer is inner; Otherwise then can in described first deposition substrate, produce tension stress, and in the inner compression that produces of described first dielectric layer.
In like manner, when on described second deposition substrate, depositing second dielectric layer, after the temperature of described second dielectric layer and described second deposition substrate drops to normal temperature, because the described second dielectric layer material is different with the shrinkage ratio of described second deposition substrate, all produces stress in the inside of described second dielectric layer and described second deposition substrate.
When the shrinkage ratio of the described second dielectric layer material during greater than the shrinkage ratio of described second deposition substrate, the described second deposition substrate inside will produce compression (compressive), produces opposite tension stress (tensile) in that described second dielectric layer is inner; Otherwise then can in described second deposition substrate, produce tension stress, and in the inner compression that produces of described second dielectric layer.
Usually, the rete that utilizes PECVD and HDPCVD to generate is inner can produce compression (approximately-200MPa); And the rete that utilizes traditional SACVD to form, can produce lower compression (less than-100MPa); And the rete that utilizes HARP SACVD to generate then has tension stress (approximately+200MPa).
Why the rete of the described HARP of utilization SACVD deposition can have with utilizing current technology forms the opposite stress of membranous layer property of deposition, be because utilize the rete of HARP SACVD deposition to keep more hydrogen bond, then in the process of cooling, interaction generation hydrogen molecule takes place and separates out in the hydrogen bond of rete inside because of instability, this addition reaction can make rete produce certain volume contraction.This shrinks with rete interior because the contraction that the temperature difference produces is superimposed, make the described first dielectric layer Yin Wendu reduce the contraction of the contraction of generation greater than described first deposition substrate, so just can in described first dielectric layer, produce tension stress, in described first deposition substrate, produce compression; Produce compression and use in the follow-up technology in described second dielectric layer that traditional handicrafts such as HDPCVD, SACVD or PECVD form, in described second deposition substrate, produce tension stress; Aggregate performance helps the improvement of device performance for the overall stress that the combination process that adopts traditional handicrafts such as HARP SACVD and HDPCVD, SACVD or PECVD to form combines device influences.
The stress of using the rete of HARP SACVD formation is tension stress, and the stress of using the rete of traditional handicrafts formation such as HDPCVD, SACVD or PECVD is compression, two kinds of stress types are opposite, and aggregate performance has reduced the stress in thin film in the pmd layer after the deposition for the double-decker that adopts USG layer and complex media material to form.
Obviously, the stress value that has of described rete is relevant with described thicknesses of layers.And then, use the ratio of thickness and the thickness of described second dielectric layer of using traditional handicrafts depositions such as HDPCVD, SACVD or PECVD of described first dielectric layer of HARP SACVD deposition by control, can adjust the stress in thin film value of filling in the STI of back flexibly.
In addition, utilize HARP SACVD process deposits first dielectric layer, to reduce the groove depth-to-width ratio of successive process, then use traditional handicrafts such as HDPCVD, SACVD or PECVD and deposit second dielectric layer, to finish the filling of STI, can guarantee that subsequent technique is identical with existing technology, make and to reduce R﹠D costs with for realizing that change that process optimization carries out existing technology reduce to minimumly.
As the 3rd embodiment of the inventive method, use that method provided by the invention forms that no deposition hole produces and comprise with the step of metallization medium layer in single damascene process of improving device performance: formation cvd dielectric layer substrate on Semiconductor substrate by changing the device interior state; On described deposition substrate, utilize a CVD method to deposit first dielectric layer; On described first dielectric layer, utilize the 2nd CVD method to deposit second dielectric layer.
Fig. 3 A～3C is the schematic flow sheet of metallization medium layer in single damascene process of explanation third embodiment of the invention, uses the concrete steps that method provided by the invention deposits single damascene process medium layer and comprises:
At first, as shown in Figure 3A, on Semiconductor substrate, form deposition substrate 20, promptly form the cvd dielectric layer substrate on anterior layer dielectric layer 80 surfaces.
Described substrate comprises fill area 81 and non-fill area 82, and described fill area is in order to the filled media layer; Be full of metal connecting line in the described non-fill area.
The method of described formation deposition substrate can adopt any traditional method, and the technical scheme that relates under any circumstance all is not considered part of the present invention, does not repeat them here.
Secondly, shown in Fig. 3 B, on described deposition substrate, utilize a CVD method to deposit first dielectric layer 52.
A described CVD method is selected the CVD method with good linear slit filling capacity for use.For critical dimension is the CVD processing procedure of 65nm or littler process node, and a described CVD method is selected HARP SACVD (highaspect ratio process Sub-Atmospherical CVD) for use; The described first dielectric layer material be non-impurity-doped glass (Un-Doped Silicate Glass, USG); The described formation first dielectric layer material comprises first reacting gas and second reacting gas, and described first reacting gas comprises silane (SiH
4) or tetraethoxysilane (TEOS, Si (C
2H
5O
4)) in a kind of, described second reacting gas comprises oxygen (O
2) or ozone (O
3) in a kind of.
Usually, the method of utilizing HARP SACVD to fill linear slit comprises two steps: adopt higher gas pressure and higher described second reacting gas concentration and the first lower reaction gas flow in the described first step, to guarantee the filling effect of described substrate internal seams; Adopt existing film deposition technology in described second step, to improve production capacity.
As example, described first reacting gas is selected TEOS for use, and described second reacting gas is selected O for use
3The time, gas pressure can be 500～600Torr in the described first step, described O
3Concentration range be 10%～20%, described TEOS range of flow is: 100～1000mgm (milligram/minute) is preferably 100～300mgm; Gas pressure can be 100～200Torr in described second step, described O
3Concentration range be 5%～15%, described TEOS range of flow is: 1000～10000mgm (milligram/minute) is preferably 1000～3000mgm.
The deposition rate scope of HARP SACVD is 10～20nm/min in the described first step, and the deposition rate scope of HARP SACVD is 150～200nm/min in described second step.
Described HARP SACVD unit type is AMAT Producer SE.
Yet, though this HARP SACVD has superior porefilling capability, but its production capacity is lower, only be about half of traditional handicraft production capacities such as using HDPCVD, SACVD or PECVD, HARP SACVD substitutes existing HDPCVD, PECVD or traditional SACVD fills linear slit if use fully, will have a strong impact on the output of production capacity.
The juche idea of the inventive method promptly is to utilize HARP SACVD to fill the zone that has high-aspect-ratio in the described linear slit, utilizes existing HDPCVD, PECVD or traditional SACVD technology to finish the filling of linear slit then.Utilize HARP SACVD and the method that traditional handicrafts such as HDPCVD, SACVD or PECVD combine, form imperforate linear slit and fill, and then the reliability of enhance device.
Described first thickness of dielectric layers is determined according to technological requirement and working condition.After described first thickness of dielectric layers need guarantee to deposit described first dielectric layer at least, described linear slit with certain depth-to-width ratio can utilize current technology not have hole and fill.
As embodiments of the invention, if described linear slit depth-to-width ratio is 7: 1, and when described current technology is HDPCVD, if HDPCVD can realize that linear slit does not have the depth-to-width ratio that hole fills and is less than or equal to 3: 1 in the prior art, then described first thickness of dielectric layers is at least 4/7ths of the described linear slit degree of depth, when the described linear slit degree of depth was 300nm, described first thickness of dielectric layers can be more than or equal to 180nm.
The method that technologies such as the described HDPCVD of utilization, SACVD or PECVD form rete can adopt any traditional method, and the technical scheme that relates under any circumstance all is not considered part of the present invention, does not repeat them here.
Obviously; in the above-mentioned example; the special selection that the linear slit depth-to-width ratio and the linear slit degree of depth are made for ease of explanation the specific embodiment of the present invention; should be as qualification to the inventive method execution mode; rational arbitrarily modification and equivalents that those skilled in the art make this do not influence the enforcement of the inventive method, and should be included in protection scope of the present invention.
In the production practices, the described first thickness of dielectric layers scope is 10～100nm, is preferably 80～100nm.
Utilize HARP SACVD to combine and replace HARPSACVD, can when forming imperforate linear slit filling, production capacity be higher than one times with traditional handicrafts such as HDPCVD, SACVD or PECVD.
At last, shown in Fig. 3 C, on described first dielectric layer 52, utilize the 2nd CVD method to form second dielectric layer 62.
Described the 2nd CVD method includes but not limited to traditional SACVD, PECVD and HDPCVD.
The described second dielectric layer material includes but not limited to unadulterated silicon dioxide (SiO
2), phosphorosilicate glass (phosphosilicate glass, PSG), Pyrex (borosilicate, BSG), boron-phosphorosilicate glass (borophosphosilicate, BPSG), fluorine silex glass (FSG) or have a kind of or its combination in the advanced low-k materials.Described have advanced low-k materials and include but not limited to black diamond or coral.Described composite material comprises the material that material that USG mix is formed and the different USG that mixes combine.
Described second thickness of dielectric layers value and the described first thickness of dielectric layers value sum are the thickness of dielectric layers value that meets product requirement.
Usually, USG utilizes the technology of SACVD, PECVD or HDPCVD to generate; BPSG and FSG then generate by the mode of SACVD, and PSG then utilizes the mode of PECVD or HDPCVD to generate; Described have advanced low-k materials and utilize the mode of PECVD to generate.
The generation of stress normally causes because of the shrinkage ratio difference of two kinds of materials after temperature change.HARP SACVD, traditional SACVD, HDP and PECVD deposit first dielectric layer and second dielectric layer in turn on deposition substrate under 400-500 degree centigrade condition, for convenience of description, former deposition substrate is called first deposition substrate, the deposition substrate behind deposition first dielectric layer is called second deposition substrate.
When depositing first dielectric layer, after the temperature of described first dielectric layer and described first deposition substrate drops to normal temperature, because the described first dielectric layer material is different with the shrinkage ratio of described first deposition substrate, all produces stress in the inside of described first dielectric layer and described first deposition substrate.
When the shrinkage ratio of the described first dielectric layer material during greater than the shrinkage ratio of described first deposition substrate, the described first deposition substrate inside will produce compression (compressive), produces opposite tension stress (tensile) in that described first dielectric layer is inner; Otherwise then can in described first deposition substrate, produce tension stress, and in the inner compression that produces of described first dielectric layer.
In like manner, when on described second deposition substrate, depositing second dielectric layer, after the temperature of described second dielectric layer and described second deposition substrate drops to normal temperature, because the described second dielectric layer material is different with the shrinkage ratio of described second deposition substrate, all produces stress in the inside of described second dielectric layer and described second deposition substrate.
When the shrinkage ratio of the described second dielectric layer material during greater than the shrinkage ratio of described second deposition substrate, the described second deposition substrate inside will produce compression (compressive), produces opposite tension stress (tensile) in that described second dielectric layer is inner; Otherwise then can in described second deposition substrate, produce tension stress, and in the inner compression that produces of described second dielectric layer.
Usually, the rete that utilizes PECVD and HDPCVD to generate is inner can produce compression (approximately-200MPa); And the rete that utilizes traditional SACVD to form, can produce lower compression (less than-100MPa); And the rete that utilizes HARP SACVD to generate then has tension stress (approximately+200MPa).
Why the rete of the described HARP of utilization SACVD deposition can have with utilizing current technology forms the opposite stress of membranous layer property of deposition, be because utilize the rete of HARP SACVD deposition to keep more hydrogen bond, then in the process of cooling, interaction generation hydrogen molecule takes place and separates out in the hydrogen bond of rete inside because of instability, this addition reaction can make rete produce certain volume contraction.This shrinks with rete interior because the contraction that the temperature difference produces is superimposed, make the described first dielectric layer Yin Wendu reduce the contraction of the contraction of generation greater than described first deposition substrate, so just can in described first dielectric layer, produce tension stress, in described first deposition substrate, produce compression; Produce compression and use in the follow-up technology in described second dielectric layer that traditional handicrafts such as HDPCVD, SACVD or PECVD form, in described second deposition substrate, produce tension stress; Aggregate performance helps the improvement of device performance for the overall stress that the combination process that adopts traditional handicrafts such as HARP SACVD and HDPCVD, SACVD or PECVD to form combines device influences.
The stress of using the rete of HARP SACVD formation is tension stress, and the stress of using the rete of traditional handicrafts formation such as HDPCVD, SACVD or PECVD is compression, two kinds of stress types are opposite, and aggregate performance has reduced the stress in thin film in the pmd layer after the deposition for the double-decker that adopts USG layer and complex media material to form.
Obviously, the stress value that has of described rete is relevant with described thicknesses of layers.And then, use the ratio of thickness and the thickness of described second dielectric layer of using traditional handicrafts depositions such as HDPCVD, SACVD or PECVD of described first dielectric layer of HARP SACVD deposition by control, can adjust the stress in thin film value in the filled media layer flexibly.
In addition, utilize HARP SACVD process deposits first dielectric layer, to reduce the linear slit depth-to-width ratio of successive process, then use traditional handicrafts such as HDPCVD, SACVD or PECVD and deposit second dielectric layer, to finish the filling of dielectric layer, can guarantee that subsequent technique is identical with existing technology, make, reduce R﹠D costs to realizing that change that process optimization carries out existing technology reduces to minimumly.
Shown in Fig. 3 C, the described dielectric layer of using method formation provided by the invention has double-decker.Described dielectric layer comprises described first dielectric layer and described second dielectric layer.The described first dielectric layer material is USG, and the described first dielectric layer scope is 10～100nm; The described second dielectric layer material is PSG, BSG, BPSG, FSG and has a kind of or its combination in the interlevel dielectric material commonly used such as advanced low-k materials.
Substitute the existing single layer structure that constitutes by the complex media material by the double-decker that adopts USG and complex media material to form, can realize imperforate linear slit filling.
At first utilize HAR PSACVD to form the USG layer, then utilize traditional handicrafts such as HDPCVD or PECVD to form the complex media material layer, when forming the double-decker of USG and complex media material composition, the USG layer that the described HARP of utilization SACVD forms can be used as the barrier layer of plasma depositing operations such as follow-up HDPCVD or PECVD, helps reducing the device damage that follow-up plasma deposition process causes.
Although the present invention has been described and has enough described embodiment in detail although describe by the embodiment at this, the applicant does not wish by any way the scope of claims is limited on this details.Other to those skilled in the art advantage and improvement are conspicuous.Therefore, relative broad range the invention is not restricted to represent and the specific detail of describing, equipment and the method and the illustrative example of expression.Therefore, can depart from these details and do not break away from the spirit and scope of the total inventive concept of applicant.
Claims (22)
1. before-metal medium layer formation method comprises:
On Semiconductor substrate, form the before-metal medium layer deposition substrate;
On described deposition substrate, utilize a CVD method to deposit first before-metal medium layer;
On described first before-metal medium layer, utilize the 2nd CVD method to deposit second before-metal medium layer.
2. before-metal medium layer formation method according to claim 1 is characterized in that: a described CVD method is HARP SACVD.
3. before-metal medium layer formation method according to claim 2 is characterized in that: described HARPSACVD unit type is AMAT Producer SE.
4. according to claim 1 or 2 or 3 described before-metal medium layer formation methods, it is characterized in that: the described first before-metal medium layer material is a non-impurity-doped glass.
5. before-metal medium layer formation method according to claim 4 is characterized in that: the described first before-metal medium layer thickness range is 10～100 nanometers.
6. before-metal medium layer formation method according to claim 1 is characterized in that: described the 2nd CVD method includes but not limited to a kind of in traditional SACVD, PECVD and the HDPCVD technology.
7. according to claim 1 or 6 described before-metal medium layer formation methods, it is characterized in that: the described second before-metal medium layer material includes but not limited to silicon dioxide, phosphorosilicate glass, Pyrex, boron-phosphorosilicate glass, fluorine silex glass or has a kind of or its combination in the advanced low-k materials.
8. no deposition hole produces in before-metal medium layer structure, described before-metal medium layer, and described before-metal medium layer comprises first before-metal medium layer and second before-metal medium layer of suitable this deposition.
9. before-metal medium layer structure according to claim 8 is characterized in that: the described first before-metal medium layer material is a non-impurity-doped glass.
10. according to Claim 8 or 9 described before-metal medium layer structures, it is characterized in that: the described first before-metal medium layer thickness range is 10～100 nanometers.
11. before-metal medium layer structure according to claim 8 is characterized in that: the described second before-metal medium layer material includes but not limited to silicon dioxide, phosphorosilicate glass, Pyrex, boron-phosphorosilicate glass, fluorine silex glass or has a kind of or its combination in the advanced low-k materials.
12. a rete formation method comprises:
On Semiconductor substrate, form the film deposition substrate;
On described deposition substrate, utilize a CVD method to deposit first rete;
On described first rete, utilize the 2nd CVD method to deposit second rete.
13. before-metal medium layer formation method according to claim 12 is characterized in that: a described CVD method is HARP SACVD.
14. before-metal medium layer formation method according to claim 13 is characterized in that: described HARP SACVD unit type is AMAT Producer SE.
15. according to claim 12 or 13 or 14 described before-metal medium layer formation methods, it is characterized in that: described first film material is a non-impurity-doped glass.
16. before-metal medium layer formation method according to claim 15 is characterized in that: the described first thicknesses of layers scope is 10～100 nanometers.
17. before-metal medium layer formation method according to claim 12 is characterized in that: described the 2nd CVD method includes but not limited to a kind of in traditional SACVD, PECVD and the HDPCVD technology.
18. according to claim 12 or 17 described before-metal medium layer formation methods, it is characterized in that: described second film material includes but not limited to silicon dioxide, phosphorosilicate glass, Pyrex, boron-phosphorosilicate glass, fluorine silex glass or has a kind of or its combination in the advanced low-k materials.
19. no deposition hole produces in a film layer structure, described rete, described rete comprises first rete and second rete along this deposition.
20. before-metal medium layer structure according to claim 19 is characterized in that: described first film material is a non-impurity-doped glass.
21. according to claim 19 or 20 described before-metal medium layer structures, it is characterized in that: the described first thicknesses of layers scope is 10～100 nanometers.
22. before-metal medium layer structure according to claim 19 is characterized in that: described second film material includes but not limited to silicon dioxide, phosphorosilicate glass, Pyrex, boron-phosphorosilicate glass, fluorine silex glass or has a kind of or its combination in the advanced low-k materials.
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