CN101192572B - Method of manufacturing image sensor - Google Patents
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- CN101192572B CN101192572B CN2007101965577A CN200710196557A CN101192572B CN 101192572 B CN101192572 B CN 101192572B CN 2007101965577 A CN2007101965577 A CN 2007101965577A CN 200710196557 A CN200710196557 A CN 200710196557A CN 101192572 B CN101192572 B CN 101192572B
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- 238000004519 manufacturing process Methods 0.000 title abstract description 13
- 238000000034 method Methods 0.000 claims abstract description 52
- 238000009792 diffusion process Methods 0.000 claims abstract description 51
- 230000008569 process Effects 0.000 claims abstract description 12
- 229920002120 photoresistant polymer Polymers 0.000 claims description 95
- 239000004065 semiconductor Substances 0.000 claims description 58
- 239000000758 substrate Substances 0.000 claims description 55
- 239000002019 doping agent Substances 0.000 claims description 33
- 238000002955 isolation Methods 0.000 claims description 22
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 20
- 229920005591 polysilicon Polymers 0.000 claims description 20
- 230000015572 biosynthetic process Effects 0.000 claims description 17
- 230000004888 barrier function Effects 0.000 claims description 16
- 230000003647 oxidation Effects 0.000 claims description 11
- 238000007254 oxidation reaction Methods 0.000 claims description 11
- 238000005516 engineering process Methods 0.000 claims description 8
- 239000000203 mixture Substances 0.000 claims description 5
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 4
- 229910052796 boron Inorganic materials 0.000 claims description 4
- 230000001105 regulatory effect Effects 0.000 claims description 3
- 238000000926 separation method Methods 0.000 claims description 3
- 238000011161 development Methods 0.000 claims description 2
- 238000005036 potential barrier Methods 0.000 claims 1
- 238000005468 ion implantation Methods 0.000 abstract 1
- 150000002500 ions Chemical class 0.000 abstract 1
- 238000002347 injection Methods 0.000 description 8
- 239000007924 injection Substances 0.000 description 8
- 206010034960 Photophobia Diseases 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 208000013469 light sensitivity Diseases 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000002800 charge carrier Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14689—MOS based technologies
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/1461—Pixel-elements with integrated switching, control, storage or amplification elements characterised by the photosensitive area
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- Condensed Matter Physics & Semiconductors (AREA)
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
A method of manufacturing a CMOS image sensor in which a photodiode region and a floating diffusion region can be formed without using a hard mask. Such a method can prevent misalignment between the photodiode region and a gate pattern region without using a hard maska and also prevent the passing of ions when performing an ion implantation process through a gate region.
Description
The application requires to enjoy in the No.10-2006-0118981 that submitted on November 29th, 2006 and the rights and interests of the korean patent application of the No.10-2006-0137340 that submits on December 29th, 2006, introduces all the elements here as a reference.
Technical field
The present invention relates to the manufacture method of imageing sensor such as vertical cmos image sensor, relating in particular to is not having can to form photodiode region and floating diffusion region under the situation of hard mask, photodiode region and grid region misalignment can be avoided, and the ion that injects method for making image sensor can be in ion injecting process, prevented through the grid region.
Background technology
Imageing sensor is the semiconductor device that the detected optical imagery of imageing sensor is converted to the signal of telecommunication, and imageing sensor can classify as charge-coupled device (CCD) or complementary metal oxide semiconductors (CMOS) (CMOS).
Ccd image sensor has locus a plurality of metal oxide siliciums (MOS) capacitor adjacent one another are, and this capacitor is stored and transferred to charge carrier.
Cmos image sensor can have a plurality of MOS transistor of the pixel of corresponding semiconductor device, and this MOS transistor has control circuit and signal processing circuit as peripheral circuit.Pixel region can have a plurality of photodiodes, and centers on the peripheral circuit region of pixel region, can provide detected signal in the pixel region is detected.Control circuit and signal processing unit can integrate and use a kind of conversion method that detects output by MOS transistor.In cmos image sensor, along with the increase of the luminous intensity of photodiode, the light sensitivity of imageing sensor can improve greatly.
Ccd image sensor is considered to be better than cmos image sensor aspect light sensitivity and the reduction noise, but is having any problem aspect realization high density of integration and the low-power consumption.And cmos image sensor is easier to make, and is more suitable for realizing high density of integration and low-power consumption.Therefore, because the manufacturing process of its improvement adds its character, cmos image sensor is given priority in the semiconductor fabrication process aspect.
As shown in Figure 1, can on the Semiconductor substrate 1 and/or above form gate oxidation films 5, wherein inject the dopant of P type such as boron at this substrate.Polysilicon layer 6 can form on the Semiconductor substrate 1 that contains gate oxidation films 5.Can on the polysilicon layer 6 and/or above form hard mask 7, can carry out grid composition operation and form grid.
After grid form, in order to form floating diffusion region, can form hard mask 7 and photoresist pattern 8, and utilize hard mask 7 and photoresist pattern 8 to carry out ion injecting process, and then form floating diffusion region 2,3.Then, in order to form blue photodiode 4, form another photoresist pattern of open blue colour photodiode 4.When using hard mask 7, may carry out etching work procedure and can have any problem and particulate may occur.
In the manufacture method of described cmos image sensor, the ion injecting process that forms blue colour photodiode 4 and floating diffusion region 2,3 may need high-energy.Yet, when under high-energy, carrying out ion injecting process, prevent that the zone of ion below the grid region from being very important.Therefore, blue colour photodiode 4 can form by twice execution photoresist operation.Yet, be difficult to usually owing to carry out the photoresist operation for twice, therefore can adopt this operation of using hard mask 7.In this case, can become difficulty and cause the generation of particulates emission of etching work procedure.
Summary of the invention
Embodiment of the present invention relates to a kind of manufacture method of vertical cmos image sensor, in the method, photodiode region and floating diffusion region can form under the situation of mask firmly, and such method can be avoided photodiode region and the misalignment of gate pattern district when not using hard mask.This method can also prevent the ion process when carrying out ion injecting process by the grid region.
Embodiment of the present invention relates to a kind of manufacture method that comprises the following step: form barrier layer on Semiconductor substrate; On Semiconductor substrate, form the first photoresist pattern; Utilize this first photoresist pattern on Semiconductor substrate, to form the gate pattern that comprises gate oxidation films pattern and polysilicon film pattern; On the first photoresist pattern, form the second photoresist pattern; In Semiconductor substrate, form first floating diffusion region and photodiode region; Remove the first photoresist pattern and the second photoresist pattern; On the Semiconductor substrate that comprises gate oxidation films pattern and polysilicon film pattern, form many oxide-films; Comprising formation the 3rd photoresist pattern on the Semiconductor substrate of many oxide-films; And on first floating diffusion region, form second floating diffusion region.
Execution mode relates to a kind of method for making image sensor that comprises following steps: form at least one device isolation film on the top of Semiconductor substrate; Form P type barrier layer in the Semiconductor substrate and under described device isolation film; Comprising formation oxide-film pad on the Semiconductor substrate top of device isolation film; On described oxide-film pad, form the first photoresist pattern; Utilize the described first photoresist pattern to make mask, utilize described at least one device isolation film to make alignment mark simultaneously and form the blue colour photodiode district on Semiconductor substrate top by injecting dopant; Remove the described first photoresist pattern; On described oxide-film pad, form the second photoresist pattern; Form first floating diffusion region on Semiconductor substrate top; Utilize the described second photoresist pattern to make mask and form second floating diffusion region by injecting P type dopant on described first floating region on Semiconductor substrate top, wherein the amount of P type dopant can be regulated by the thickness of oxide-film pad; Remove the described second photoresist pattern; And formation comprises the gate pattern of oxide film pattern pad and polysilicon film pattern.
Execution mode also relates to a kind of method for making image sensor that comprises following steps: form at least one device isolation film in Semiconductor substrate; Below the device isolation film, form barrier layer by in Semiconductor substrate, injecting dopant; Form the oxide-film pad on the Semiconductor substrate top and on the oxide-film pad, forming the first photoresist pattern of photodiode region opening; Utilize the first photoresist pattern as alignment mark dopant to be injected photodiode region as mask and device isolation film; Remove the first photoresist pattern and on the oxide-film pad, form the second photoresist pattern of floating diffusion region opening; Form a N type floating diffusion region and a P type floating diffusion region as mask at floating diffusion region with the second photoresist pattern; Remove the second photoresist pattern; On the oxide-film pad, form polysilicon film; On polysilicon film, form the 3rd photoresist pattern; And make mask with the 3rd photoresist pattern and form gate pattern.
Description of drawings
Embodiment Fig. 1 has illustrated the manufacture method of imageing sensor;
Embodiment Fig. 2 A has illustrated the manufacture method of imageing sensor according to execution mode to 2E;
Embodiment Fig. 3 A has illustrated the manufacture method of imageing sensor according to execution mode to 3D.
Embodiment
Shown in illustration 2A, can be included on the Semiconductor substrate 100 and/or the top forms barrier layer 110 according to the manufacture method of execution mode imageing sensor.Barrier layer 110 can be by forming toward Semiconductor substrate 100 li injections P type dopant such as boron.
After forming barrier layer 110, can form by sequential aggradation gate oxidation films on Semiconductor substrate 100 and polysilicon film at the formation first photoresist pattern 130, the first photoresist patterns on the Semiconductor substrate 100.
As implement shown in the illustration 2B, the gate pattern that comprises gate oxidation films pattern 120 and polysilicon film pattern 121 can comprise that the composition technology of etch process and cineration technics forms by utilizing the first photoresist pattern 130 to carry out.
As implement shown in the illustration 2C, can on the first photoresist pattern 130 and/or above form the second photoresist pattern 131, the second photoresist pattern can by under the situation that does not remove the first photoresist pattern 130 on the Semiconductor substrate 100 and/or above the coating photoresist form, and carry out development, exposure and etch process.Perhaps, can provide the structure that does not contain the second photoresist pattern 131 by the first photoresist pattern 130 that formation has with the first photoresist pattern 130 and the second photoresist pattern, 131 dual structure same thickness.
Secondly, N type floating diffusion region 140 and photodiode region 150 can form toward the part semiconductor substrate 100 injection N type dopants that are positioned at barrier layer 110 vertical direction by utilizing the first photoresist pattern 130 and the second photoresist pattern 131 to make mask.The layer structure in the red photodiode district, green photodiode district and the blue light electric diode district that provide on the highest face temperature of a barrier layer 110 that comprises Semiconductor substrate 100 can be provided photodiode region 150.
As implement shown in the illustration 2D, after N type floating diffusion region 140 and photodiode region 150 formation, the first photoresist pattern 130 and the second photoresist pattern 131 can be removed with cineration technics.Many oxide-films 160 can deposit on the Semiconductor substrate 100 that comprises gate oxidation films pattern 120 and polysilicon film pattern 121.In the technology of next injecting P type dopant, the amount of the P type dopant of injection can be adjusted by the thickness of many oxide-films 160.
As implement shown in the illustration 2E, after many oxide-films 160 form, only be that the 3rd photoresist pattern 170 of N type floating diffusion region 140 openings can form on many oxide-films 160.P type dopant injects by the 3rd photoresist pattern 170, thus on the N type floating diffusion region 140 and/or above form the P type floating diffusion region 141 that can be injected into P type dopant.
Therefore, can utilize the first photoresist pattern 130, the second photoresist pattern 131 and the 3rd photoresist pattern 170 to make the dopant injection technology of mask by execution, in Semiconductor substrate 100, form the imageing sensor that comprises N type floating diffusion region 140, P type floating diffusion region 141 and photodiode region 150.In addition, can prevent that such dopant is by comprising the gate pattern of gate oxidation films pattern 120 and polysilicon film pattern 121.
As implement shown in the illustration 3A, according to execution mode, the manufacture method of imageing sensor is included in the top 230 interior device isolation films 231 that form of Semiconductor substrate 200.Device isolation film 231 can utilize shallow ditch groove separation process (STI) to form and be used as alignment mark.
After device isolation film 231 forms, can in Semiconductor substrate 200, form P type barrier layer 210, P type barrier layer 210 can form by injection P type dopant such as boron in Semiconductor substrate 200.
As implement shown in the illustration 3B, in Semiconductor substrate 200, behind the formation P type barrier layer 210, can form oxide-film pad 240 on the top of the Semiconductor substrate 200 that comprises device isolation film 231.Oxide-film pad 240 can by on the top 230 of Semiconductor substrate 200 and/or above form with chemical vapor deposition (CVD) method deposited oxide film.Photoresist can be coated on the oxide-film pad and carry out composition to form the first photoresist pattern 250 then.
After the first photoresist pattern 250 forms, can utilize device isolation film 231 to make alignment mark simultaneously and inject dopant formation blue colour photodiode district toward the top 230 of Semiconductor substrate 200 by making mask with the first photoresist pattern 250.Thereby, can utilize device isolation film 231 to do the blue colour photodiode district that dopant that mask will be used for blue colour photodiode accurately injects Semiconductor substrate 200 tops 230.
Shown in illustration 3C, after the blue colour photodiode district forms, can carry out cineration technics and remove the first photoresist pattern 250.Photoresist can be coated on the oxide-film pad 240 and/or the top, and develop then, expose and be etched with on the oxide-film pad 240 and/or above form the second photoresist pattern 260.The second photoresist pattern 260 can be used as floating diffusion region 270,280 openings.
After the second photoresist pattern 260 forms, can form N type floating diffusion region 270 by using the second photoresist pattern 260 to make mask injection N type dopant, subsequently, can use the second photoresist pattern 260 do mask inject P type dopant with on the N type floating diffusion region 270 and/or above form P type floating diffusion region 280.The thickness of oxide-film pad 240 can be used for regulating the amount of the P type dopant that injects N type floating diffusion region 270.
Shown in illustration 3D, after P type floating diffusion region 280 forms, can carry out cineration technics and remove the second photoresist pattern 260.Deposit spathic silicon film on oxide-film pad 240 then.Can on the polysilicon film of deposition, be formed for forming the 3rd photoresist pattern of gate pattern, and execution composition technology forms the gate pattern that comprises oxide-film welding disk pattern 290 and polysilicon film pattern 300.
Thereby can in the top 230 of Semiconductor substrate 200, utilize the first photoresist pattern 250 and the second photoresist pattern 260 to make mask execution dopant injection technology and form the imageing sensor that comprises N type floating diffusion region 270, P type floating diffusion region 280 and blue colour photodiode district.And, can prevent that described dopant is by comprising the gate pattern of oxide-film welding disk pattern 290 and polysilicon film pattern 300.
According to execution mode, make alignment mark with device isolation film 231 and can avoid blue colour photodiode district and the misalignment of gate pattern district.Equally, adopt the high energy ion injection technology to inject floating diffusion region 270,280 simultaneously and the blue colour photodiode district can prevent that ion from passing through the grid region.Injecting the ionic weight of floating diffusion region 270,280 also can adjust so that the junction point degree of depth is simply controlled by the thickness of oxide-film pad.
Although described a lot of execution modes here, should be appreciated that in the spirit and scope of this principle of disclosure those skilled in the art can also design many other improvement and execution modes.Especially in the scope that does not break away from specification of the present invention, accompanying drawing and accompanying Claim book, each several part can have different variations and modification, and/or carries out the merging of theme.Except improving and modification, selecting for a person skilled in the art to use also is clearly.
Claims (19)
1. method for making image sensor comprises:
In Semiconductor substrate, form barrier layer;
On Semiconductor substrate, form the first photoresist pattern;
Utilize the described first photoresist pattern on Semiconductor substrate, to form the gate pattern that comprises gate oxidation films pattern and polysilicon film pattern;
On the described first photoresist pattern, form the second photoresist pattern;
In Semiconductor substrate, form first floating diffusion region and photodiode region;
Remove the first photoresist pattern and the second photoresist pattern;
On the Semiconductor substrate that comprises described gate oxidation films pattern and polysilicon film pattern, form many oxide-films;
Comprising formation the 3rd photoresist pattern on the Semiconductor substrate of many oxide-films; And
On described first floating diffusion region, form second floating diffusion region.
2. method for making image sensor according to claim 1 is characterized in that, the formation of described barrier layer comprises in Semiconductor substrate injects P type dopant.
3. method for making image sensor according to claim 2 is characterized in that, described P type dopant comprises boron.
4. method for making image sensor according to claim 1 is characterized in that, the formation of the described first photoresist pattern is included in sequential aggradation gate oxidation films and polysilicon film on the Semiconductor substrate.
5. method for making image sensor according to claim 1 is characterized in that, gate pattern forms and comprises that execution comprises the composition technology of making the etch process and the cineration technics of mask with the first photoresist pattern.
6. method for making image sensor according to claim 1 is characterized in that, the formation of the described second photoresist pattern comprises:
On the Semiconductor substrate that comprises the described first photoresist pattern, apply photoresist; Then
On described photoresist, carry out development, exposure and etch process.
7. method for making image sensor according to claim 1 is characterized in that, described first floating diffusion region comprises a N type floating diffusion region.
8. method for making image sensor according to claim 1 is characterized in that, provides photodiode region on the highest face temperature of barrier layer.
9. method for making image sensor according to claim 8, described photodiode region have the layer structure that comprises red photodiode regions, red photodiode region and blue diode district.
10. method for making image sensor according to claim 7, it is characterized in that the formation of described N type floating diffusion region and photodiode region comprises that using the first photoresist pattern and the second photoresist pattern to make mask partly injects N type dopant toward the Semiconductor substrate that is positioned at the barrier layer vertical direction.
11. method for making image sensor according to claim 1 is characterized in that, the described first photoresist pattern and the second photoresist pattern all remove with cineration technics.
12. method for making image sensor according to claim 1 is characterized in that, described second floating diffusion region comprises a P type floating diffusion region.
13. method for making image sensor according to claim 12 is characterized in that, the formation of described P type floating diffusion region comprises that making mask with the 3rd photoresist pattern injects P type dopant.
14. method for making image sensor according to claim 13 is characterized in that, for the amount that forms the dopant that second floating diffusion region injects utilizes many oxide-films adjustable.
15. a method for making image sensor comprises:
Form at least one device isolation film on the top of Semiconductor substrate;
In Semiconductor substrate and under described device isolation film, form P type barrier layer;
Comprising formation oxide-film pad on the Semiconductor substrate top of device isolation film;
On described oxide-film pad, form the first photoresist pattern;
Utilize the described first photoresist pattern to make mask, utilize described at least one device isolation film to make alignment mark simultaneously and form the blue colour photodiode district on Semiconductor substrate top by injecting dopant;
Remove the described first photoresist pattern;
On described oxide-film pad, form the second photoresist pattern;
Form first floating diffusion region on Semiconductor substrate top;
Utilize the described second photoresist pattern to make mask and form second floating diffusion region by injecting P type dopant on described first floating region on Semiconductor substrate top, wherein the amount of P type dopant can be regulated by the thickness of oxide-film pad;
Remove the described second photoresist pattern; And
Formation comprises the gate pattern of oxide film pattern pad and polysilicon film pattern.
16. method for making image sensor according to claim 15 is characterized in that, can form at least one device isolation film with shallow ditch groove separation process.
17. method for making image sensor according to claim 15 is characterized in that, described first floating diffusion region comprises a N type floating diffusion region.
18. method for making image sensor according to claim 17 is characterized in that, the formation of described first floating diffusion region comprises that making mask with the described second photoresist pattern injects N type dopant.
19. a method for making image sensor comprises:
In Semiconductor substrate, form at least one device isolation film;
Below described device isolation film, form potential barrier by in Semiconductor substrate, injecting dopant;
Form the oxide-film pad on the Semiconductor substrate top and on this oxide-film pad, forming the first photoresist pattern of photodiode region opening;
Making mask and device isolation film with the described first photoresist pattern makes alignment mark and injects dopant toward photodiode region;
Remove the described first photoresist pattern and on described oxide-film pad, form the second photoresist pattern of floating diffusion region opening;
Make mask with the described second photoresist pattern and form a N type floating diffusion region and a P type floating diffusion region at floating diffusion region;
Remove the described second photoresist pattern;
On described oxide-film pad, form polysilicon film;
On described polysilicon film, form the 3rd photoresist pattern; And
Make mask with the 3rd photoresist pattern and form gate pattern.
Applications Claiming Priority (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020060118981A KR100769143B1 (en) | 2006-11-29 | 2006-11-29 | Method of manufacturing image sensor |
| KR1020060118981 | 2006-11-29 | ||
| KR10-2006-0118981 | 2006-11-29 | ||
| KR10-2006-0137340 | 2006-12-29 | ||
| KR1020060137340 | 2006-12-29 | ||
| KR1020060137340A KR100840650B1 (en) | 2006-12-29 | 2006-12-29 | Method of manufacturing vertical-type cmos image sensor |
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| Publication Number | Publication Date |
|---|---|
| CN101192572A CN101192572A (en) | 2008-06-04 |
| CN101192572B true CN101192572B (en) | 2010-06-02 |
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| CN2007101965577A Expired - Fee Related CN101192572B (en) | 2006-11-29 | 2007-11-29 | Method of manufacturing image sensor |
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| KR (1) | KR100769143B1 (en) |
| CN (1) | CN101192572B (en) |
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| US10109498B2 (en) | 2016-08-09 | 2018-10-23 | Varian Semiconductor Equipment Associates, Inc. | Composite patterning mask using angled ion beam deposition |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1477715A (en) * | 2002-06-20 | 2004-02-25 | ���ǵ�����ʽ���� | Image sensor and its mfg. method |
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| KR100649009B1 (en) * | 2004-12-30 | 2006-11-27 | 동부일렉트로닉스 주식회사 | Photo diode and method of manufacturing the same in CMOS image sensor |
| KR100672679B1 (en) * | 2004-12-30 | 2007-01-22 | 동부일렉트로닉스 주식회사 | Photo diode in semiconductor CMOS image sensor and method for manufacturing the same |
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| KR100769143B1 (en) | 2007-10-22 |
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