CN108231814A - Imaging sensor and forming method thereof - Google Patents
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- CN108231814A CN108231814A CN201810094429.XA CN201810094429A CN108231814A CN 108231814 A CN108231814 A CN 108231814A CN 201810094429 A CN201810094429 A CN 201810094429A CN 108231814 A CN108231814 A CN 108231814A
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- 238000003384 imaging method Methods 0.000 title claims abstract description 39
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- 150000002500 ions Chemical class 0.000 claims description 85
- 238000000926 separation method Methods 0.000 claims description 44
- 239000000463 material Substances 0.000 claims description 32
- -1 boron ion Chemical class 0.000 claims description 14
- 238000000137 annealing Methods 0.000 claims description 13
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 8
- 229910052796 boron Inorganic materials 0.000 claims description 8
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 8
- 239000005385 borate glass Substances 0.000 claims description 4
- 239000005365 phosphate glass Substances 0.000 claims description 3
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 claims description 2
- 238000009792 diffusion process Methods 0.000 description 14
- 238000007667 floating Methods 0.000 description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 10
- 229910052710 silicon Inorganic materials 0.000 description 10
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- 230000003287 optical effect Effects 0.000 description 7
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- 238000005516 engineering process Methods 0.000 description 6
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- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1463—Pixel isolation structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1464—Back illuminated imager structures
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
The present invention provides a kind of imaging sensor and forming method thereof, wherein, the forming method of imaging sensor includes:Substrate is provided, the substrate includes opposite the first face and the second face, the substrate includes multiple discrete photosensitive areas and the isolated area between neighboring photosensitive area, is respectively provided with photosensitive element in each photosensitive area substrate, second face exposes the photosensitive element;Groove is formed in isolated area substrate, first face exposes the groove;Processing is doped to the channel bottom and side wall, doped region is formed in the substrate of the channel bottom and side wall;It is formed after the doped region, forms isolation structure in the trench.The dark current for the imaging sensor that the method is formed is smaller.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors more particularly to a kind of imaging sensor and forming method thereof.
Background technology
With the continuous improvement of semiconductor technology, imaging sensor (Image Sensor) as current acquisition of information one
Kind elemental device has been more and more widely used in modern society.
Imaging sensor can be divided into according to element difference by CCD (Charge Coupled Device, Charged Couple member
Part) imaging sensor and CMOS (Complementary Metal-OxideSemiconductor, metal-oxide semiconductor (MOS) member
Part) two major class of imaging sensor.With the development of semiconductor technology, the performance of CMOS transistor is gradually increased, and resolution ratio is gradual
Catch up with and surpass ccd image sensor.And cmos image sensor has the characteristics that integrated level height, small power consumption, speed are fast, at low cost.
Cmos image sensor is a kind of typical solid state image sensor.Cmos image sensor is usually by image-sensitive unit
Several portions such as array, line driver, row driver, time sequence control logic, AD converter, data/address bus output interface, control interface
It is grouped as.
Cmos image sensor can be divided into according to structure:Positive illuminated cmos image sensor, back-illuminated type cmos image pass
Sensor and stack cmos image sensor.In positive illuminated cmos image sensor, photodiode is located at circuit transistor
Rear, light-inletting quantity can be affected because blocking.Back-illuminated cmos image sensors are exactly by photodiode and circuit transistor
Location swap.Stack cmos image sensor is developed by back-illuminated cmos image sensors.Stack cmos image
Originally the circuit part that photosensory assembly need to be abutted is placed in the lower section of photosensory assembly by sensor so that is possessed inside equipment more
Space.While functional diversities are realized, miniaturization is also accomplished.Back-illuminated cmos image sensors and stack CMOS figures
As sensor allows light to initially enter photodiode so as to increase sensitive volume, the bat under low-light conditions can be significantly improved
Effect is taken the photograph, so as to be widely used in camera, electronic toy, video conference and the camera settings of security system.
However, there are the shortcomings that dark current is larger, picture quality is poor for existing cmos image sensor.
Invention content
It is of the invention to solve the problems, such as to be to provide a kind of imaging sensor and forming method thereof, imaging sensor can be reduced
Dark current.
To solve the above problems, technical solution of the present invention provides a kind of forming method of map sensor, including:Lining is provided
Bottom, the substrate include opposite the first face and the second face, and the substrate includes multiple discrete photosensitive areas and positioned at adjacent
Isolated area between photosensitive area is respectively provided with photosensitive element in each photosensitive area substrate, and second face exposes the photosensitive member
Part;Groove is formed in isolated area substrate, first face exposes the groove;The channel bottom and side wall are mixed
Reason is lived together, doped region is formed in the substrate of the channel bottom and side wall;It is formed after the doped region, in the trench
Form isolation structure.
Optionally, the method for the doping treatment includes:Doped layer is formed in the channel bottom and sidewall surfaces, it is described
There is isolation ion in doped layer;The doped layer is made annealing treatment, isolation ion is made to enter the channel bottom and side
Doped region is formed in the substrate of wall.
Optionally, there is the conductive-type of the first Doped ions, the isolation ion and the first Doped ions in the substrate
Type is identical;The isolation ion is p-type ion, and the material of the doped layer is borate glass or the nitridation containing boron ion
Silicon;Alternatively, the isolation ion is N-type ion, the material of the doped layer is phosphate glass or the nitridation containing phosphonium ion
Silicon.
Optionally, the thickness of the doped layer is 50 angstroms~200 angstroms, and the atomic percent of the luxuriant son of doped layer interval is dense
It is 5%~10% to spend, and the temperature of the annealing is 400 DEG C~500 DEG C.
Optionally, the isolation structure includes:Separation layer in the groove has hole in the separation layer.
Optionally, the technique for forming the separation layer includes aumospheric pressure cvd technique or sub-atmospheric pressure chemical gaseous phase
Depositing operation.
Optionally, the isolation structure further includes:Cover the dielectric layer of the channel bottom and side wall, the dielectric layer position
Between the separation layer and substrate, the material of the dielectric layer is high K medium material.
Correspondingly, technical solution of the present invention also provides a kind of imaging sensor, including:Substrate, the substrate include opposite
The first face and the second face, the substrate include multiple discrete photosensitive areas and the isolated area between neighboring photosensitive area,
Photosensitive element is respectively provided in each photosensitive area substrate, second face exposes the photosensitive element;In isolated area substrate
Groove, first face exposes the groove;Doped region in the substrate of the channel bottom and side wall;Positioned at institute
State the isolation structure in groove.
Optionally, the isolation structure includes the separation layer being located in the groove, has hole in the separation layer.
Optionally, the isolation structure further includes:Cover the dielectric layer of the channel bottom and side wall, the dielectric layer position
Between the separation layer and substrate, the material of the dielectric layer is high K medium material.
Compared with prior art, technical scheme of the present invention has the following advantages:
In the forming method for the imaging sensor that technical solution of the present invention provides, the doped region is located at the channel bottom
In side wall, in the complex centre capture substrate that the defects of doped region can inhibit the channel bottom and side wall generates
Photo-generated carrier so as to inhibit the charge recombination in photo-generated carrier and complex centre in substrate, and then can reduce dark electricity
Stream and white pixel.
Further, the isolation structure includes dielectric layer, and the dielectric layer is high K medium material, and the dielectric layer can
Reduce the dark current of described image sensor.
Further, the isolation structure includes separation layer, has hole in the separation layer.Due to the refraction of described hole
Rate is relatively low, occurs entirely so as to be conducive to the light for making to be incident on the substrate photosensitive area on the interface of described hole and doped layer
Reflection, and then the optical crosstalk between neighboring photosensitive area can be reduced.
In the imaging sensor that technical solution of the present invention provides, the doped region is located in the channel bottom and side wall,
The doped region can inhibit the photo-generated carrier in substrate and the charge recombination in the complex centre, and then can reduce dark electricity
Stream and white pixel.
Description of the drawings
Fig. 1 and Fig. 2 is a kind of structure diagram of each step of the forming method of cmos image sensor;
Fig. 3 to Fig. 9 is the structure diagram of each step of one embodiment of forming method of the imaging sensor of the present invention.
Specific embodiment
Imaging sensor there are problems, such as:The dark current of imaging sensor is larger.
In conjunction with a kind of cmos image sensor, analyze the cmos image sensor dark current it is larger the reason of:
Fig. 1 and Fig. 2 is a kind of structure diagram of each step of the forming method of cmos image sensor.
It please refers to Fig.1, the cmos image sensor includes:Substrate 100, the substrate 100 include the first opposite face
With the second face, the substrate includes the multiple discrete photosensitive area A and isolated area B between neighboring photosensitive area A, the lining
100 the first faces of photosensitive area A surface of bottom has gate structure;It is respectively provided in the photosensitive area A substrates 100 of the gate structure both sides
Photodiode 101 and diffusion region 102, first face surface have the dielectric layer 120 of covering gate structure.
With continued reference to 1, ion implanting is carried out to 100 second face of substrate, in the isolated area B and photosensitive area A substrates
Doped layer 111 is formed in 100;Groove 110 is formed in the isolated area B substrates 100 and doped layer 111.
It please refers to Fig.2, forms the dielectric layer 112 for covering 110 bottom and side wall of groove;It is formed after dielectric layer 112,
Separation layer 113 is formed in the groove 110;It is respectively formed the filter plate 140 for covering the photosensitive area A doped layers 111;Institute
It states 140 surface of filter plate and forms lenticule 150.
Wherein, the groove 110 is for accommodating dielectric layer 112 and separation layer 113, realize electricity between neighboring photosensitive area every
From so as to reduce interfering with each other for carrier in neighboring photosensitive area A substrates 100.During the groove 110 is formed, institute
State 110 side wall of groove and bottom easily generate defect, so as to form complex centre, carrier in the substrate 100 easily with
The charge recombination in the complex centre forms dark current, influences the quality of imaging sensor.The doped layer 111 can stop
Photo-generated carrier and complex centre in substrate is compound, so as to reduce dark current.However, the ion implanting do not allow it is easily-controllable
The depth of the doped layer 111 is made, the doped layer 111 is easy to cause and exposes 110 bottom of groove, and then is caused described
The dark current of imaging sensor is still larger.
To solve the technical problem, the present invention provides a kind of forming method of imaging sensor, including:Lining is provided
Bottom, the substrate include opposite the first face and the second face, and the substrate includes multiple discrete photosensitive areas and positioned at adjacent
Isolated area between photosensitive area;Groove is formed in isolated area substrate, first face exposes the groove;To the groove
Bottom and side wall is doped processing, and doped region is formed in the substrate of the channel bottom and side wall;Form the doped region
Later, isolation structure is formed in the trench.The dark current for the imaging sensor that the method is formed is smaller.
It is understandable for the above objects, features and advantages of the present invention is enable to become apparent, below in conjunction with the accompanying drawings to the present invention
Specific embodiment be described in detail.
Another structure sheaf of certain structure layer surface " be located at " in the embodiment of the present invention, " certain structure sheaf is located at another structure
" surface " in layer surface " and " forming another structure sheaf in certain structure layer surface " only represents the position between two structure sheafs
Relationship can have other structures layer between double-layer structure layer.
Fig. 3 to Fig. 8 is the structure diagram of each step of one embodiment of forming method of imaging sensor of the present invention.
It please refers to Fig.3, substrate 200 is provided, the substrate 200 includes opposite the first face and the second face, the substrate 200
Including multiple discrete photosensitive area II to be located at the isolated area I between neighboring photosensitive area II, distinguish in each photosensitive area II substrates 200
In have photosensitive element 201, second face exposes the photosensitive element.
The photosensitive area II of the substrate 200 is used to form the photosensitive element 201, and the isolated area I of the substrate 200 is used for
Adjacent photosensitive area II is isolated.
In the present embodiment, the number of the photosensitive area II is multiple, and second face of photosensitive area is rectangle, the isolated area
I surrounds the photosensitive area II.
In the present embodiment, the substrate 200 is silicon substrate.In other embodiments, the material of the substrate for germanium substrate,
The Semiconductor substrates such as silicon-Germanium substrate, silicon-on-insulator or germanium on insulator.
In the present embodiment, the photosensitive element 201 includes photodiode.
Specifically, in the present embodiment, in the substrate 200 there are the first Doped ions, have first in the substrate 200
Photosensitive doped region, has the second Doped ions in the first photosensitive doped region, second Doped ions and first adulterate from
The conduction type of son is opposite.PN junction is formed on the contact surface of the first photosensitive doped region and substrate 100.The photodiode
Including the PN junction.
In other embodiments, also there is the second photosensitive doped region, the second photosensitive doped region and institute in the substrate
State the first photosensitive doped region contact, there are the 4th Doped ions in the second photosensitive doped region, the 4th Doped ions with
The conduction type of first Doped ions is opposite.The photodiode includes the described second photosensitive doped region and described first
Photosensitive doped region.
In the present embodiment, the imaging sensor formed is passive images sensor.In other embodiments, it can be formed
Active image sensor.
200 the second faces of photosensitive area II surface of substrate also has gate structure, the lining in second faces of photosensitive area II
Also there is floating diffusion region 202, the floating diffusion region 202 and the photodiode are located at the grid respectively in bottom 200
In second face substrate 200 of structure both sides, there are third Doped ions in the floating diffusion region 202.
The substrate is for connecting the first current potential, and the floating diffusion region is for the second current potential of connection, first current potential
It is used to make the PN junction reverse bias in the photodiode with the second current potential.
In the present embodiment, the third Doped ions are identical with the conduction type of second Doped ions.
In the present embodiment, first Doped ions are p-type ion, such as boron ion or BF2 +Ion;Second doping
Ion is N-type ion, such as phosphonium ion or arsenic ion;The third Doped ions are N-type ion, for example, phosphonium ion or arsenic from
Son.
In other embodiments, first Doped ions are N-type ion;Second Doped ions are p-type ion;Institute
Third Doped ions are stated as p-type ion.
With continued reference to Fig. 3, dielectric layer 220 is formed on the 200 second face surface of substrate;Carrying wafer 230 is provided;Make institute
Carrying wafer 230 is stated to be bonded with the dielectric layer 220, the dielectric layer 220 be located at it is described carry wafer 230 and substrate 200 it
Between;After bonding, reduction processing is carried out to 200 first face of substrate.
The dielectric layer 220 is used to implement the electric isolution of photodiode and floating diffusion region 202 and external circuit.
The carrying wafer 230 is used for support substrate 200 during reduction processing, reduces the bending of substrate 200.It is described
Reduction processing is used to reduce the thickness of substrate 200, so as to reduce loss of the 200 second plane materiel material of substrate to light, improves image
The sensitivity of sensor.
The material of the dielectric layer 220 is silica or low k (k is less than 3.9) dielectric material.
The material of the carrying wafer 230 is silicon or SiGe.
Before the bonding, the forming method further includes:The first interconnection architecture (figure is formed in the dielectric layer 220
In do not mark), first interconnection architecture is electrically connected with the gate structure;Second is formed in the dielectric layer to be mutually coupled
Structure, second interconnection architecture are electrically connected with the floating diffusion region 202.
First interconnection architecture is used to implement being electrically connected for gate structure and external circuit, so as to be provided for gate structure
Grid current potential, control gate structure lower channels are switched on and off.Second interconnection architecture is used to implement floating diffusion region 202
With being electrically connected for external circuit, second current potential is provided for floating diffusion region 202.
In the present embodiment, further include:Form the third interconnection architecture being electrically connected with substrate 200.The third interconnection architecture
Being electrically connected for substrate 200 and external circuit is used to implement, first current potential is provided for substrate 200.
It please refers to Fig.4, groove 210 is formed in the isolated area I substrates 200 in the first face, first face exposes described
Groove 210.
The groove 210 for subsequently accommodating dielectric layer 212 and separation layer 213, realize between neighboring photosensitive area II every
From, and then reduce optical crosstalk and electrical cross talk between neighboring photosensitive area II.
The method for forming the groove 210 includes:Mask layer, the mask are formed on the 200 second face surface of substrate
Layer exposes isolated area I substrates 200;The substrate 200 is performed etching using the mask layer as mask, forms groove 210.
Dry plasma etch technique is included to the technique that the substrate 200 performs etching.Dry plasma etch technique
With good directionality, the larger groove 210 of depth-to-width ratio is advantageously formed, so as to improve institute's formation imaging sensor
While integrated level, the optical crosstalk between neighboring photosensitive area II is reduced.
If the depth of the groove 210 is too small, the isolation structure being subsequently formed is easy to cause along perpendicular to the second face side
Upward size is smaller, so as to be unfavorable for reducing the optical crosstalk between neighboring photosensitive area II;If the 210 depth mistake of groove
Greatly, easily increase technology difficulty.Specifically, in the present embodiment, the depth of the groove 210 is 0.5 μm~2 μm.
In the present embodiment, the width of the groove 210 is excessive, is easily reduced the integrated level of formed imaging sensor;Such as
The width of groove 210 is too small described in fruit, easily increases technology difficulty.Specifically, in the present embodiment, the width of the groove 210
For 1000nm~3000nm.
It should be noted that during etching the substrate 200 and forming groove 210, plasma easily damages ditch
210 side wall of slot and bottom make trenched side-wall and bottom form defect state, lead to 210 side wall of groove and bottom formed it is compound
Center.
Processing subsequently is doped to 210 bottom and side wall of groove, is formed in 210 bottom and side wall of groove
Doped region has isolation ion in the doped region.
The step of doping treatment, is as shown in Figure 5 and Figure 6.
Fig. 5 is please referred to, doped layer 211 is formed on the 210 bottom and side wall surface of groove, is had in the doped layer 211
There is isolation ion.
The doped layer 211 for being subsequently doped to the substrate 200 of 210 bottom and side wall of groove, mix by formation
Miscellaneous area.
The isolation ion is opposite with the conduction type of second Doped ions.
The isolation ion is with the conduction type of second Doped ions on the contrary, then described be isolated ion and the first doping
The conduction type of ion is identical, and since the substrate is for connecting the first current potential, the current potential of the doped region is the first current potential.Again
Since first current potential and the second current potential make the PN junction in the photodiode reversely bigoted, then doped region can stop multiple
Photo-generated carrier is captured at conjunction center, so as to reduce dark current.
In the present embodiment, second Doped ions are N-type ion, and the isolation ion is p-type ion, and the photoproduction carries
Stream is electronics.The doped region 211 can stop that electronics is spread to complex centre.In other embodiments, described second mixes
Heteroion is p-type ion, and the isolation ion is N-type ion, and the photo-generated carrier is hole.The doped region can stop
It is spread to complex centre in hole.
Specifically, in the present embodiment, second Doped ions are N-type ion, and the ion of being isolated is p-type ion, example
Such as boron ion.
In the present embodiment, the material of the doped layer 211 is borate glass (BSG).In other embodiments, it is described to mix
The material of diamicton can be boron doped silicon nitride or boron doped silicon oxynitride.
In other embodiments, second Doped ions are p-type ion, and the ion of being isolated is N-type ion, such as phosphorus
Ion or arsenic ion.The doped layer is phosphate glass, arsenate glass, the silicon nitride containing phosphonium ion, contains phosphonium ion
Silicon oxynitride, the silicon nitride containing arsenic ion or the silicon oxynitride containing arsenic ion.
In the present embodiment, the doped layer 211 is also located at the 200 second face surface of substrate.
The technique for forming the doped layer 211 includes:High-aspect-ratio depositing operation.In other embodiments, described in formation
The technique of doped layer includes atom layer deposition process.
High-aspect-ratio depositing operation or atom layer deposition process have excellent stepcoverage performance, the doped layer of formation
The covering performance of 211 pairs of 210 bottom and side walls of groove is preferable, after handling subsequent anneal, 210 bottom of groove
The concentration of the first Doped ions in portion and side wall is more uniform, and then improves barrier effect of the thickness doped region to carrier.
If the thickness of the doped layer 211 is excessive, it is easy to cause the width for the isolation structure being subsequently formed and depth mistake
It is small, so as to be easily reduced the isolation performance of isolation structure;If the thickness of the doped layer 211 is too small, it is easy to cause described mix
The concentration of the miscellaneous luxuriant son of 215 interval of area is relatively low, so as to the photo-generated carrier for being unfavorable for inhibiting in substrate 200 and the complex centre
It is compound.Specifically, the thickness of the doped layer 211 is 50 angstroms~200 angstroms.
If the concentration of the luxuriant son of 211 interval of doped layer is too low, it is easily reduced 215 interval of doped region being subsequently formed
The concentration of luxuriant son, so as to be unfavorable for reducing dark current;If the excessive concentration of the luxuriant son of 211 interval of doped layer, easily
Increase technology difficulty.Specifically, in the present embodiment, the atomic percent a concentration of 5% of the luxuriant son of 211 interval of doped layer~
10%.
In the present embodiment, the technological parameter for forming the doped layer 211 includes:Reaction gas includes (C2H5)4BO3;Reaction
Temperature is 300 DEG C~500 DEG C, and gas pressure intensity is 1torr~3torr.
Fig. 6 is please referred to, the doped layer 211 is made annealing treatment, spreads the isolation ion in the doped layer 211
Doped region 215 is formed into 210 bottom and side wall of groove.
The doped region 215 is used for the current-carrying in the complex centre capture substrate 200 for inhibiting 210 bottom and side wall of groove
Son so as to inhibit the charge recombination in carrier and complex centre in substrate 200, and then can reduce dark current, reduce white pixel.
Processing is doped to the substrate 200 and forms doped region 215, then the luxuriant son of 215 interval of doped region is dense
Degree is more than the concentration of the first Doped ions in the substrate 200.
In the present embodiment, the technological parameter of the annealing includes:Annealing temperature is 400 DEG C~500 DEG C, annealing time
For 3h~5h.
The meaning for choosing temperature annealed above is:If annealing temperature is excessively high, first is photosensitive in easy influence substrate 200
The performance of doped region and floating diffusion region 202;If annealing temperature is too low, it is unfavorable for being isolated ion to 210 side wall of groove and bottom
The diffusion of portion's substrate 200, so as to be unfavorable for reducing dark current.
In the present embodiment, before the annealing, further include:Remove the doped layer on the 200 second face surface of substrate
211.In other embodiments, the doped layer on second face of substrate surface can not also be removed;Alternatively, the annealing
Afterwards, the doped layer on second face of substrate surface is removed.
In other embodiments, it after the annealing, is subsequently formed before isolation structure, further includes:Described in removal
The doped layer of channel bottom and sidewall surfaces.It removes the doped layer of the channel bottom and sidewall surfaces and can increase and be subsequently formed
Isolation structure width and depth, so as to increase the isolation performance of isolation structure, reduce the optical crosstalk of imaging sensor.
In other embodiments, the method for forming the doped region includes:Formed after groove, to the channel bottom and
Side wall carries out ion implanting, and doped region is formed in the substrate of the channel bottom and side wall.
It is subsequently formed after the doped region 215, isolation structure is formed in the groove 210.
In the present embodiment, the isolation structure includes:Cover the dielectric layer on the 210 bottom and side wall surface of groove;Position
Separation layer in the groove 210, the dielectric layer is between the separation layer and substrate.
In the present embodiment, the step of forming the isolation structure, is as shown in Figure 7 and Figure 8.
Fig. 7 is please referred to, forms the dielectric layer 212 for covering the 210 bottom and side wall surface of groove, the dielectric layer 212
Material be high K medium material.
In the present embodiment, the dielectric layer 212 is located at 200 second face surface of the doped layer 211 and substrate.In other realities
It applies in example, is formed before isolation structure, remove the doped layer of the channel bottom and side wall, the dielectric layer is located at the groove
The substrate surface of bottom and side wall.
The dielectric constant of the dielectric layer 212 is more than 3.9, specifically, in the present embodiment, the material of the dielectric layer 212
For HfO2、La2O3、HfSiON、HfAlO2、ZrO2、Al2O3Or HfSiO4。
The dielectric layer is high K medium material, and the dielectric layer can reduce the dark current of described image sensor, and energy
Enough reduce the optical crosstalk between neighboring photosensitive area II.
In the present embodiment, the technique for forming the dielectric layer 212 includes chemical vapor deposition method.
In the present embodiment, the dielectric layer 212 also covers 200 second face of substrate.
In other embodiments, the isolation structure does not include the dielectric layer.The forming method does not include being formed being situated between
The step of electric layer.
Fig. 8 is please referred to, separation layer 213 is formed in the groove 210, there is hole 214 in the separation layer 213.
In the present embodiment, there is hole 214 in the separation layer 213, since the refractive index of described hole 214 is relatively low, from
And the light for being conducive to make to be incident on the 200 photosensitive area II of substrate occurs on interface of the described hole 214 with doped layer 211
Total reflection, and then the optical crosstalk between neighboring photosensitive area II can be reduced.It in other embodiments, can be in the separation layer
Without described hole.
In the present embodiment, the material of the separation layer 213 is silica.In other embodiments, the material of the separation layer
Expect for silicon nitride or silicon oxynitride.
In the present embodiment, the technique for forming the separation layer 213 includes:Aumospheric pressure cvd (APCVD) technique or
Sub-atmospheric pressure chemical vapor deposition (SACVD) technique.Aumospheric pressure cvd (APCVD) technique or sub-atmospheric pressure chemical gaseous phase
The clearance filling capability for depositing (SACVD) technique is poor, it is not easy to and 213 material of separation layer is made to be filled up completely the groove 210, from
And hole 214 can be formed in the separation layer 213, and aumospheric pressure cvd (APCVD) technique or sub-atmospheric pressure
It learns vapor deposition (SACVD) technique and does not need to plasma, so as to be not easy to generate damage to substrate.
If the thickness of the separation layer 213 is excessive, being easy to cause makes 213 material of separation layer be filled up completely the groove
210, so as to be unfavorable for being formed described hole 214;If the thickness of the separation layer 213 is too small, it is easy to cause described hole 214
It is penetrated through with external environment, so as to influence subsequent technique.Specifically, in the present embodiment, the thickness of the separation layer 213 is 1000 angstroms
~2000 angstroms.
In the present embodiment, the technological parameter for forming the separation layer 213 includes:SiH4(C2H5O)4Si (positive silicic acid second
Ester, TEOS);300 DEG C~500 DEG C of reaction temperature, gas pressure intensity are 1torr~3torr.
The meaning of more than gas pressure intensity is taken to be:If gas pressure intensity is too small, the gap filling energy of separation layer 213 is formed
Power is stronger, and 213 material of separation layer is easily made to be filled up completely the groove 210, so as to be unfavorable for being formed described hole 214;If
Gas pressure intensity is excessive, easily increases the collision probability between reaction gas atom or ion, separation layer is formed so as to be unfavorable for
213。
In the present embodiment, the separation layer 213 also covers 200 second face of photosensitive area II substrates.
Fig. 9 is please referred to, is formed after the isolation structure, forms the filter plate 240 for covering second faces of photosensitive area II;
Lenticule 250 is formed on 240 surface of filter plate.
The filter plate 240 penetrates the light of specific wavelength for being filtered to the light for being incident on its surface;It is described micro-
Lens 250 are used to light converging to 240 surface of filter plate.
In the present embodiment, there is dielectric layer 212 and separation layer between 200 second face of the filter plate 240 and the substrate
213。
With continued reference to Fig. 9, the embodiment of the present invention also provides a kind of imaging sensor, including:Substrate 200, the substrate 200
Including opposite the first face and the second face, the substrate 200 includes multiple discrete photosensitive area II and positioned at neighboring photosensitive area
Isolated area I between II has photosensitive element 201 in the photosensitive area II substrates 200, and second face exposes described photosensitive
Element;Groove 210 in the isolated area I substrates 200 in the first face, first face expose the groove 210;Positioned at institute
The doped region 215 in the substrate 200 of 210 bottom and side wall of groove is stated, there is isolation ion in the doped region 215;Positioned at institute
State the isolation structure in groove 210.
Described image sensor further includes:Doped layer 211 positioned at the 210 bottom and side wall surface of groove, it is described to mix
There is isolation ion in diamicton 211.
In the present embodiment, described image sensor further includes:Gate structure positioned at the 200 second face surface of substrate;
Floating diffusion region 202 in second face substrate 200, the floating diffusion region 202 and the photosensitive element 201 are distinguished
Positioned at the gate structure both sides.
There are the first Doped ions, the photosensitive element includes the first photosensitive doping being located in substrate in the substrate
Area has the conduction of the second Doped ions, first Doped ions and the second Doped ions in the first photosensitive doped region
Type is opposite.There is the conductive-type of third Doped ions, third Doped ions and the second Doped ions in the floating diffusion region
Type is identical.
The isolation ion is opposite with the conduction type of second Doped ions.
Second Doped ions are N-type ion, and the conduction type of the isolation ion is p-type.Specifically, the doping
211 material of layer are borate glass, the silicon nitride containing boron ion or the silicon oxynitride containing boron ion.
The isolation structure includes the separation layer 213 being located in the groove 210, has hole in the separation layer 213
214。
The isolation structure further includes:Cover the dielectric layer 212 of 210 bottom and side wall of groove, the dielectric layer 212
Between the separation layer 213 and doped region 215.
The material of the dielectric layer 212 is high K medium material.The material of the separation layer 213 is silica, silicon oxynitride
Or silicon nitride.
The forming method of imaging sensor in the present embodiment is formed by the method for Fig. 3 to Fig. 9.
Although present disclosure is as above, present invention is not limited to this.Any those skilled in the art are not departing from this
It in the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
Subject to the range of restriction.
Claims (10)
1. a kind of forming method of imaging sensor, which is characterized in that including:
There is provided substrate, the substrate include opposite the first face and the second face, the substrate include multiple discrete photosensitive areas with
And the isolated area between neighboring photosensitive area, photosensitive element is respectively provided in each photosensitive area substrate, and second face exposes
The photosensitive element;
Groove is formed in isolated area substrate, first face exposes the groove;
Processing is doped to the channel bottom and side wall, doped region is formed in the substrate of the channel bottom and side wall;
It is formed after the doped region, forms isolation structure in the trench.
2. the forming method of imaging sensor as described in claim 1, which is characterized in that the method packet of the doping treatment
It includes:Doped layer is formed in the channel bottom and sidewall surfaces, there is isolation ion in the doped layer;To the doped layer into
Row annealing makes isolation ion enter in the substrate of the channel bottom and side wall and forms doped region.
3. the forming method of imaging sensor as claimed in claim 2, which is characterized in that there is the first doping in the substrate
Ion, the isolation ion are identical with the conduction type of the first Doped ions;The ion of being isolated is p-type ion, the doping
The material of layer is borate glass or the silicon nitride containing boron ion;Alternatively, the isolation ion is N-type ion, the doping
The material of layer is phosphate glass or the silicon nitride containing phosphonium ion.
4. the forming method of imaging sensor as claimed in claim 2, which is characterized in that the thickness of the doped layer is 50 angstroms
~200 angstroms, the atomic percent a concentration of 5%~10% of the luxuriant son of doped layer interval, the temperature of the annealing is 400
DEG C~500 DEG C.
5. the forming method of imaging sensor as described in claim 1, which is characterized in that the isolation structure includes:It is located at
Separation layer in the groove has hole in the separation layer.
6. the forming method of imaging sensor as claimed in claim 5, which is characterized in that form the technique packet of the separation layer
Include aumospheric pressure cvd technique or sub-atmospheric pressure chemical vapor deposition method.
7. the forming method of imaging sensor as claimed in claim 5, which is characterized in that the isolation structure further includes:It covers
Cover the dielectric layer of the channel bottom and side wall, the dielectric layer between the separation layer and substrate, the dielectric layer
Material is high K medium material.
8. a kind of imaging sensor, which is characterized in that including:
Substrate, the substrate include opposite the first face and the second face, and the substrate includes multiple discrete photosensitive areas and position
Isolated area between neighboring photosensitive area, photosensitive element is respectively provided in each photosensitive area substrate, and second face exposes described
Photosensitive element;
Groove in isolated area substrate, first face expose the groove;
Doped region in the substrate of the channel bottom and side wall;
Isolation structure in the groove.
9. imaging sensor as claimed in claim 8, which is characterized in that the isolation structure includes being located in the groove
Separation layer has hole in the separation layer.
10. imaging sensor as claimed in claim 9, which is characterized in that the isolation structure further includes:Cover the groove
The dielectric layer of bottom and side wall, between the separation layer and substrate, the material of the dielectric layer is situated between the dielectric layer for high k
Material.
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