CN101192183B - Implementing method and device of digital one-board test tool equipment - Google Patents

Implementing method and device of digital one-board test tool equipment Download PDF

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Publication number
CN101192183B
CN101192183B CN2007100007301A CN200710000730A CN101192183B CN 101192183 B CN101192183 B CN 101192183B CN 2007100007301 A CN2007100007301 A CN 2007100007301A CN 200710000730 A CN200710000730 A CN 200710000730A CN 101192183 B CN101192183 B CN 101192183B
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test fixture
signal
interface
veneer
measured
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CN2007100007301A
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CN101192183A (en
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杜超
彭为国
周恒箴
孙涛
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ZTE Corp
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ZTE Corp
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Abstract

The invention discloses an assembly test implementation method and a device of a digital single board, wherein, the method includes the following steps: S302: face down bonding of the 244 driving chip of all external interface signals of a to-be-tested single board is completed, and the input and the output of a non-244 chip driving interface signal are respectively converted into an output and an input, therefore, the to-be-tested single board is formed into an assembly test board; S304: the assembly test board is connected with the corresponding external interface signal of the to-be-tested single board through a assembly test backboard; S306: the assembly test board and the to-be-tested single board are inserted into the assembly test backboard, and testing special logic and software are downloaded to complete single board testing. The invention can reduce the development cycle and development cost of single board assembly test, thereby increasing testing efficiency.

Description

The test fixture implementation method and the device of digital one-board
Technical field
The present invention relates to computer realm, more specifically, relate to a kind of test fixture implementation method and device of digital one-board.
Background technology
After the design of digital one-board realizes finishing, when digital one-board enters volume production during the stage, be the veneer reliable in quality of guaranteeing to produce, must test each piece veneer, for this reason must the corresponding single-board testing frock of exploitation.Single-board testing frock in the past mostly needs to build complicated system and comes the actual working environment of analog veneer that veneer is tested, the construction cycle of single-board testing frock is longer relatively, and cost is higher, uses simultaneously and relates to cooperatively interacting of polylith veneer, and testing efficiency is lower.
In existing digital one-board design, its external IO interface signal has adopted structure as shown in Figure 1 in the circuit network topology overwhelming majority of veneer inside.As shown in Figure 1, input signal enters cpu data bus or logic (FPGA or CPLD) through 244 chip for driving; Output signal generally by logic (FPGA or CPLD) or cpu data bus output, outputs to outside the veneer through 244 drivings then.
For 244 chip for driving, as shown in Figure 2, its pin definitions has centrosymmetric characteristic, and when its Rotate 180 degree was welded on its original position, its power supply was constant with the network that ground is connected, therefore chip can normally work on power, and the definition of its IO input and output just becomes instead, that is, original circuit signal flows to from A to B, when 244 chip for driving Rotate 180 degree were burn-on, the signal flow of circuit was to becoming from B to A.Can realize the conversion of veneer external interface signal input and output direction by the 244 chip for driving counter-rotating of external interface signals on the veneer is burn-on thus.The interface signal overwhelming majority external for digital one-board is the control of logic (FPGA or CPLD) or CPU, and be programmable, so the direction of its signal can easily realize the conversion of input and output.
Summary of the invention
In view of above-mentioned one or more problems, the invention provides a kind of test fixture implementation method and device of digital one-board, with the construction cycle and the cost of development of minimizing single-board testing frock, thereby improve testing efficiency.
A kind of test fixture implementation method of digital one-board has been proposed according to an aspect of the present invention.This method may further comprise the steps: S302, and with 244 chip for driving of all external interface signals on the veneer to be measured anti-weldering again, the input of non-244 chip drives interface signals is become output and output is become input, veneer to be measured is formed the test fixture plate; S304 is by the corresponding external interface signal of test fixture with a backboard connection test fixture plate and a veneer to be measured; And S306, test fixture plate and tested single board are inserted the test fixture backboard, download test special logic and software to carry out single-board testing.
Wherein, non-244 chip drives interface signals comprise following at least a: LVDS interface signal, RS232 interface signal, RS485 interface signal and MLVDS interface signal.
Wherein, the LVDS receiving device on the test fixture plate is replaced by the LVDS sending device, to change the input and output of LVDS interface signal.The RS232 interface signal or the RS485 interface signal of tested single board and test fixture plate is interconnected, to change the input and output of RS232 interface signal.It is opposite with original design to make the transmission of MLVDS interface signal and reception enable control, with the input and output of change MLVDS interface signal.
Wherein, the test fixture plate produces test and transfers to tested single board with pumping signal and with pumping signal, and tested single board is moved the logic of downloading and software detects input signal and test result is transferred to the test fixture plate via test with backboard.
Wherein, tested single board produces pumping signal and pumping signal is transferred to the test fixture plate, and the test fixture plate detects input signal and outputs test result.
Wherein, the test fixture plate produces pumping signal and pumping signal is transferred to tested single board, and tested single board is handled input signal and response is sent to the test fixture plate, and the test fixture plate detects response and outputs test result.
A kind of test fixture implement device of digital one-board has been proposed according to a further aspect in the invention.This device comprises: the test fixture plate by with 244 chip for driving of all external interface signals on the veneer to be measured anti-weldering again, becomes the input of non-244 chip drives interface signals output and output is become input and form the test fixture plate; Veneer to be measured; The test fixture backboard is used to connect the corresponding external interface signal of test fixture plate and veneer to be measured; Wherein, be loaded with test special logic and software under test fixture plate and the veneer to be measured.
Wherein, non-244 chip drives interface signals comprise following at least a: LVDS interface signal, RS232 interface signal, RS485 interface signal and MLVDS interface signal.
By the present invention, can significantly reduce the construction cycle and the cost of test fixture, can improve testing efficiency simultaneously.And the present invention can be used for the test fixture of various digital circuit veneers and design and develop.
Description of drawings
Accompanying drawing described herein is used to provide further understanding of the present invention, constitutes the application's a part, and illustrative examples of the present invention and explanation thereof are used to explain the present invention, do not constitute improper qualification of the present invention.In the accompanying drawings:
Fig. 1 is the synoptic diagram of the digital one-board input/output signal network topology structure in the correlation technique;
Fig. 2 is the key diagram of 244 chip pins definition symmetry characteristic according to an embodiment of the invention;
Fig. 3 is the process flow diagram of the test fixture implementation method of digital one-board according to an embodiment of the invention;
Fig. 4 is the design concept figure of the test fixture implementation method of digital one-board according to an embodiment of the invention; And
Fig. 5 is the block diagram of the test fixture implement device of digital one-board according to an embodiment of the invention.
Embodiment
Below with reference to accompanying drawing, describe the specific embodiment of the present invention in detail.
Fig. 3 shows the process flow diagram according to the test fixture implementation method of digital one-board of the present invention.As shown in Figure 3, this method may further comprise the steps: S302, with 244 chip for driving of all external interface signals on the veneer to be measured anti-weldering again, the input of non-244 chip drives interface signals is become output and output is become input, veneer to be measured is formed the test fixture plate; S304 is by the corresponding external interface signal of test fixture with a backboard connection test fixture plate and a veneer to be measured; And S306, test fixture plate and tested single board are inserted the test fixture backboard, download test special logic and software to carry out single-board testing.
Wherein, non-244 chip drives interface signals comprise following at least a: LVDS interface signal, RS232 interface signal, RS485 interface signal and MLVDS interface signal.
Wherein, the LVDS receiving device on the test fixture plate is replaced by the LVDS sending device, to change the input and output of LVDS interface signal.The RS232 interface signal or the RS485 interface signal of tested single board and test fixture plate is interconnected, to change the input and output of RS232 interface signal.It is opposite with original design to make the transmission of MLVDS interface signal and reception enable control, with the input and output of change MLVDS interface signal.
Wherein, the test fixture plate produces test and transfers to tested single board with pumping signal and with pumping signal, and tested single board is moved the logic of downloading and software detects input signal and test result is transferred to the test fixture plate via test with backboard.
Wherein, tested single board produces pumping signal and pumping signal is transferred to the test fixture plate, and the test fixture plate detects input signal and outputs test result.
Wherein, the test fixture plate produces pumping signal and pumping signal is transferred to tested single board, and tested single board is handled input signal and response is sent to the test fixture plate, and the test fixture plate detects response and outputs test result.
Particularly, with reference to figure 4, describe test fixture implementation method in detail according to digital one-board of the present invention.
At first, the interface signal for adopting 244 chip drives on the veneer takes off 244 chip for driving earlier, then chip Rotate 180 degree is burn-on again, and the corresponding relation of 244 chip pins as shown in Figure 2 before and after rewelding.
Then, handle accordingly for the interface signal of other a small amount of non-244 chip drives on the veneer, the interface signal of non-244 chip drives roughly has following several:
1.LVDS Deng the non-LVTTL interface signal of folk prescription to transmission.If on the tested single board be the LVDS acknowledge(ment) signal, then corresponding LVDS on the test fixture plate accepted device and be replaced by the LVDS sending device, and connect suitable transmission signal by processing such as fly lines.
2.RS232, the non-LVTTL interface signal that transmitting-receiving such as RS485 Ethernet is paired.For this type of communication interface signal, general transmitting-receiving occurs in pairs, can be directly carries out the receiving and transmitting signal of tested single board and frock veneer interconnected on backboard.
3.MLVDS Deng the non-LVTTL interface signal that on same circuit, transmits of transmitting-receiving.Revising its transmission accepts to enable to control to make it opposite with original design.
Then, the backboard of designing and developing so that two veneers of test fixture veneer and tested single board link to each other by back panel connector, the cabling annexation of backboard is decided by aforesaid processing, promptly, the cabling of backboard need carry out the receiving and transmitting signal of tested single board and frock veneer interconnected, other signal then only needs corresponding one by one the linking to each other of signal of tested single board and frock veneer got final product.
Then, by the test fixture backboard, the external interface of test fixture plate and Board Under Test is interconnected, the output of test fixture plate becomes the input signal of tested single board through backboard, and the output signal of tested single board becomes the input of test fixture plate through backboard.Can be achieved as follows test by on test fixture plate and tested single board, downloading test special-purpose logic and software like this:
1. the test fixture plate produces various tests and gives tested single board with pumping signal, tested single board is then handled detection by operation certain logic and software thereon to input signal, and output test result, and send out by external communication interface, arrive the test fixture plate through backboard then.
2. tested single board produces various tests and gives the test fixture plate with pumping signal, and the test fixture plate is handled detection to it, and outputs test result.
3. the test fixture plate produces various tests and gives tested single board with pumping signal, and tested single board is through handling the output response, and the test fixture plate detects the response of tested single board output, outputs test result.
That is to say, the method of the test fixture that chip symmetry characteristic design realizes digital one-board of utilizing provided by the invention is as follows, wherein, take a veneer to be measured and carry out the transformation of following steps: the 244 chip for driving anti-weldering again of all external interface signals on the veneer; Other a small amount of external interface signal driving circuits on the veneer are changed, made its input become output, output becomes input, and make these signals controlled or can survey for veneer; Design and develop the test fixture backboard, the corresponding external interface signal of test fixture plate and tested single board is directly linked to each other; Test fixture plate and tested single board are inserted into test fixture with in the backboard, download test special logic and software and can carry out single-board testing.
Fig. 5 shows the test fixture implement device according to digital one-board of the present invention.This device comprises: test fixture plate 502, be used for by with 244 chip for driving of all external interface signals on the veneer to be measured anti-weldering again, and the input of non-244 chip drives interface signals is become output and output is become input form the test fixture plate; Veneer 504 to be measured; Test fixture is used to connect the corresponding external interface signal of test fixture plate and veneer to be measured with backboard 506; Wherein, be loaded with test special logic and software under test fixture plate and the veneer to be measured.
Wherein, non-244 chip drives interface signals comprise following at least a: LVDS interface signal, RS232 interface signal, RS485 interface signal and MLVDS interface signal.
The present invention is on the basis of the circuit network topological structure characteristics of summing up existing digital one-board external interface signal, utilize the symmetry characteristic of 244 chip for driving pin definitions and the programmable features of software logic, proposed the method for designing and the device of new realization digital one-board test fixture.The present invention can directly utilize existing veneer to be measured simply to transform the test fixture that can obtain veneer, thereby can shorten the construction cycle of test fixture and the complexity of design greatly.In addition, owing to utilize the cost that existing volume production veneer need not be too many, and only need a test fixture plate can simulate the actual working environment of veneer to be measured, the veneer that need not take in too much territory, so control is simple relatively, testing efficiency improves greatly.
The above is the preferred embodiments of the present invention only, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.Within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (10)

1. the test fixture implementation method of a digital one-board is characterized in that, said method comprising the steps of:
Step S302, the 244 chip for driving anti-weldering again that being used on the veneer to be measured driven external interface signal becomes the input interface of non-244 chip for driving output interface and output interface is become input interface, will described veneer formation test fixture plate to be measured;
Step S304 connects the corresponding external interface signal of described test fixture plate and described veneer to be measured with backboard by test fixture; And
Step S306 inserts described test fixture backboard with described test fixture plate and described veneer to be measured, and described test fixture plate download test special logic and software are to carry out single-board testing.
2. the test fixture implementation method of digital one-board according to claim 1, it is characterized in that described non-244 chip drives interface signals comprise following at least a: LVDS interface signal, RS232 interface signal, RS485 interface signal and MLVDS interface signal.
3. the test fixture implementation method of digital one-board according to claim 2, it is characterized in that, on described test fixture plate, have under the situation of LVDS receiving device, LVDS receiving device on the described test fixture plate is replaced by the LVDS sending device, to change the input and output of described LVDS interface signal.
4. the test fixture implementation method of digital one-board according to claim 2 is characterized in that, the RS232 interface or the RS485 interface of described veneer to be measured and described test fixture plate is interconnected, to change the input and output of described RS232 interface signal.
5. the test fixture implementation method of digital one-board according to claim 2 is characterized in that, it is opposite with original design to make the transmission of described MLVDS interface signal and reception enable control, to change the input and output of described MLVDS interface signal.
6. the test fixture implementation method of digital one-board according to claim 1, it is characterized in that, described test fixture plate produces test and transfers to veneer to be measured with pumping signal and with described pumping signal, and described veneer to be measured moves the logic of downloading and software detects input signal and test result is transferred to the test fixture plate via test with backboard.
7. the test fixture implementation method of digital one-board according to claim 1, it is characterized in that, described veneer to be measured produces pumping signal and described pumping signal is transferred to the test fixture plate, and described test fixture plate detects input signal and outputs test result.
8. the test fixture implementation method of digital one-board according to claim 1, it is characterized in that, described test fixture plate produces pumping signal and described pumping signal is transferred to veneer to be measured, described veneer to be measured is handled input signal and response is sent to described test fixture plate, and described test fixture plate detects described response and outputs test result.
9. the test fixture implement device of a digital one-board is characterized in that comprising:
Test fixture plate, 244 chip for driving by being driven external interface signal being used on the veneer to be measured be anti-weldering again, the input interface of non-244 chip for driving is become output interface and output interface is become input interface form described test fixture plate;
Veneer to be measured;
The test fixture backboard is used to connect the corresponding external interface signal of described test fixture plate and described veneer to be measured;
Wherein, be loaded with test special logic and software under described test fixture plate and the described veneer to be measured.
10. the test fixture implement device of digital one-board according to claim 9, it is characterized in that described non-244 chip drives interface signals comprise following at least a: LVDS interface signal, RS232 interface signal, RS485 interface signal and MLVDS interface signal.
CN2007100007301A 2007-01-10 2007-01-10 Implementing method and device of digital one-board test tool equipment Expired - Fee Related CN101192183B (en)

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Publication number Priority date Publication date Assignee Title
CN102523138A (en) * 2011-12-31 2012-06-27 曙光信息产业股份有限公司 Computer test method and station
CN102879663A (en) * 2012-05-15 2013-01-16 许继集团有限公司 Relay protection device automatic testing system and testing tool special for same
CN105703750B (en) * 2014-11-28 2019-01-11 成都振芯科技股份有限公司 A kind of MLVDS driving circuit with conversion time control

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2169161Y (en) * 1993-07-03 1994-06-15 厦门大学 Programing and testing meter for universal integrated circuits
US5907507A (en) * 1997-07-16 1999-05-25 Mitsubishi Denki Kabushiki Kaisha Microcomputer and multi-chip module
US6449740B1 (en) * 1998-08-05 2002-09-10 Nec Corporation Conductive paths controllably coupling pad groups arranged along one edge to CPU and to EEPROM in test mode

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2169161Y (en) * 1993-07-03 1994-06-15 厦门大学 Programing and testing meter for universal integrated circuits
US5907507A (en) * 1997-07-16 1999-05-25 Mitsubishi Denki Kabushiki Kaisha Microcomputer and multi-chip module
US6449740B1 (en) * 1998-08-05 2002-09-10 Nec Corporation Conductive paths controllably coupling pad groups arranged along one edge to CPU and to EEPROM in test mode

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
宋庆华,黄光明,田原.微处理器在数字逻辑电路功能测试中的应用.华中师范大学学报20 2.1986,20(2),P1-4.
宋庆华,黄光明,田原.微处理器在数字逻辑电路功能测试中的应用.华中师范大学学报20 2.1986,20(2),P1-4. *
谢刚,黄智刚,刘亚斌,陈晓方.接口分组单板自动测试系统的硬件设计与实现.遥测遥控.2005,20(2),P1-4. *

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