CN101191802B - Electric energy metering chip creeping prevention method - Google Patents
Electric energy metering chip creeping prevention method Download PDFInfo
- Publication number
- CN101191802B CN101191802B CN2006101189783A CN200610118978A CN101191802B CN 101191802 B CN101191802 B CN 101191802B CN 2006101189783 A CN2006101189783 A CN 2006101189783A CN 200610118978 A CN200610118978 A CN 200610118978A CN 101191802 B CN101191802 B CN 101191802B
- Authority
- CN
- China
- Prior art keywords
- instruction
- value
- shunt running
- source
- threshold value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims abstract description 16
- 230000002265 prevention Effects 0.000 title description 3
- 238000000151 deposition Methods 0.000 claims description 10
- 238000011022 operating instruction Methods 0.000 claims description 2
- 230000006870 function Effects 0.000 description 8
- 238000010586 diagram Methods 0.000 description 4
- 238000009825 accumulation Methods 0.000 description 3
- 230000005611 electricity Effects 0.000 description 1
Images
Landscapes
- Power Sources (AREA)
Abstract
The invention aims to provide a method which achieves anti-shunt in an electric energy metering chip by a command. The method includes the following steps: a preset anti-shunt threshold value is stored in a source 2 address of the command; an instant power value is stored in a source 1 address of the command; the command is run, the absolute value of the instant power value and the anti-shunt threshold value which are stored in the source addresses are retrieved and compared; if the absolute value of the instant power value is great than or equal to the anti-shunt threshold value, the instant power value is stored in a destination address of the command; if the absolute value of the instant power value is less than the anti-shunt threshold value, data 'zero' is stored in the destination address. Because the technical proposal is adopted, compared with the prior art, the invention has simple structure without spending extra hardware sources, and is easy for achieving the anti-shunt function required by electric energy metering design in the electric energy metering chip provided with instruction architecture.
Description
Technical field
The present invention relates to electric energy gauging method, relate in particular to a kind of method of utilizing instruction in electric energy computation chip, to realize anti-shunt running function.
Background technology
In the electric energy computation chip field, need the anti-shunt running function of design chips.Electric energy computation chip is not output under the situation that does not have the input of electric current and voltage, but because chip itself all can produce inevitable noise with whole ammeter system, make ammeter when not having electricity consumption, can cause the useful power counting owing to the accumulation of circuit micro-signal resolution error, thereby cause damage to the user.So, must have the module of anti-shunt running function inner setting of electric energy computation chip, so that eliminate above-mentioned unnecessary loss.
Existing at present method by the anti-shunt running function of circuit realization computation chip, but use the method for the anti-shunt running of circuit comparatively loaded down with trivial details, and also circuit footprint is bigger, is not easy to realize the integrated of chip.
Summary of the invention
The object of the present invention is to provide a kind of method of utilizing instruction to realize anti-shunt running in electric energy computation chip, this method may further comprise the steps:
In 2 addresses, source of instruction, deposit default anti-shunt running threshold value in;
In 1 address, source of instruction, deposit the real-time power value in;
Operating instruction accesses the absolute value and the anti-shunt running threshold value of the real-time power value of depositing in the described source address, and compares;
If the absolute value of real-time power value then deposits the real-time power value in the destination address of instruction in more than or equal to anti-shunt running threshold value;
If the absolute value of real-time power value then deposits data " zero " in the destination address of instruction in less than anti-shunt running threshold value, so that prevent adding up to this real-time power value.
The length of described instruction is 27, the destination address that is 10 comprising length is 5 operational code, 1 address, source that length is 6, length is 62 addresses, source and length.
Described instruction is carried out by the computing path, and described computing path comprises instruction memory, register file, arithmetic element, the data-carrier store that connects in turn, and instruction memory connects data-carrier store.
Described instruction is left in the instruction memory in advance.
Owing to adopted above-mentioned technical scheme, make the present invention compared with prior art, have the following advantages and good effect: order structure is simple, need not to spend extra hardware resource, be easy in having the electric energy computation chip of instruction architecture, realize the anti-shunt running function of electric energy metrical designing requirement.
Description of drawings
To the description of embodiments of the invention, can further understand purpose of the present invention, specific structural features and advantage by following in conjunction with its accompanying drawing, in the accompanying drawing:
Fig. 1 is the structural representation of anti-shunt running instruction;
Fig. 2 is the implementation synoptic diagram of anti-shunt running instruction;
Fig. 3 is the computing path synoptic diagram of anti-shunt running instruction.
Embodiment
Below in conjunction with accompanying drawing to a preferred embodiment of the present invention will be described in detail.
Fig. 1 is the structural representation of anti-shunt running instruction.As shown in the figure, in order to realize anti-shunt running function in having the electric energy computation chip of instruction architecture, the length of anti-shunt running instruction is set to 27, and wherein operational code is 5, and 1 address, source is 6, and 2 addresses, source are 6, and destination address is 10.
Fig. 2 is the implementation synoptic diagram of anti-shunt running instruction.As shown in the figure, the data of 1 address, source are the real-time power value of depositing, and the data of 2 addresses, source are the shunt running threshold value of depositing of setting up defences in advance.The result data of instruction manipulation is stored in the destination address of anti-shunt running instruction.
To prevent that shunt running instruction programmes with the used instruction of other electric energy metricals, and set in advance anti-shunt running threshold value simultaneously, this threshold value leaves in 2 addresses, source of anti-shunt running instruction in advance.After the real-time power of depositing in 1 address, source taken absolute value, compare with the shunt running threshold value of depositing in 2 addresses, source of setting up defences in advance.In controlled step,, the numerical value of representing power is stored in the destination address when the real-time power absolute value of depositing in 1 address, source is greater than or equal to when setting up defences the shunt running threshold value in advance; And when setting up defences in advance during the shunt running threshold value that the real-time power absolute value of depositing in 1 address, source is deposited in less than 2 addresses, source, data " zero " are stored in the destination address, thereby avoided the accumulation of the micro-signal resolution error of circuit, in electric energy computation chip, realized the anti-shunt running function of electric energy metrical designing requirement.
Fig. 3 is the computing path synoptic diagram of anti-shunt running instruction.As shown in the figure, the computing path of anti-shunt running instruction comprises instruction memory, register file, arithmetic element and the data-carrier store that connects in turn, and instruction memory connects data-carrier store.
Anti-shunt running instruction is left in the instruction memory in advance.In the implementation of anti-shunt running instruction, at first 1 address, source according to anti-shunt running instruction obtains the data of depositing in 1 address, source to register file, real-time power value just, 2 addresses, source according to anti-shunt running instruction obtain the data of depositing in 2 addresses, source to register file simultaneously, Yu She anti-shunt running threshold value just, subsequently the real-time power value obtained and anti-shunt running threshold value are sent into arithmetic element simultaneously and carry out computing, promptly earlier ask absolute value to compare with anti-shunt running threshold value again the real-time power value.Then according to result relatively, deposit corresponding data in destination address, promptly, if the real-time power absolute value is more than or equal to anti-shunt running threshold value, to represent the numerical value of real-time power to deposit destination address in, if the real-time power absolute value deposits data " zero " in destination address less than anti-shunt running threshold value, at last the numerical value of destination address is stored in the destination address of anti-shunt running instruction.
Power absolute value when default anti-shunt running threshold value is far smaller than the chip operate as normal in the chip.When the chip operate as normal, the real-time power value is greater than the anti-shunt running threshold value that sets, after this anti-shunt running instruction manipulation finishes, and the numerical value of destination address performance number videlicet the time.And work as instant performance number less than the anti-shunt running threshold value that sets, represent the accumulation of the micro-signal resolution error that this real-time power value is a circuit, after this anti-shunt running instruction manipulation finished, the numerical value of destination address was numerical value " zero ", and the real-time power value during not as operate as normal adds up.
As mentioned above, method of the present invention is to add anti-shunt running instruction in the command memory of electric energy metrical, and the shunt running threshold value of in chip, setting up defences in advance, only use an instruction, the anti-shunt running threshold ratio that real-time power value and chip is default, be left in the basket less than the performance number of anti-shunt running threshold value and disregard, on threshold value, guaranteed the function of the anti-shunt running of electric energy computation chip.Creeping prevention method of the present invention is applied in the electric energy computation chip, and principle is simple, and is very practical.
The present invention is not limited to above-mentioned particular implementation example; do not deviating under spirit of the present invention and the real situation thereof; skilled personnel can make various corresponding changes and distortion according to the present invention, and these corresponding changes and distortion all should belong within the claims protection domain of the present invention.
Claims (4)
1. a method of utilizing instruction to realize anti-shunt running in electric energy computation chip is characterized in that, may further comprise the steps:
In 2 addresses, source of instruction, deposit default anti-shunt running threshold value in;
In 1 address, source of instruction, deposit the real-time power value in;
Operating instruction accesses the absolute value and the anti-shunt running threshold value of the real-time power value of depositing in the described source address, and compares;
If the absolute value of real-time power value then deposits the real-time power value in the destination address of instruction in more than or equal to anti-shunt running threshold value;
If the absolute value of real-time power value then deposits data " zero " in the destination address of instruction in less than anti-shunt running threshold value.
2. the method for claim 1 is characterized in that, the length of described instruction is 27, the destination address that is 10 comprising length is 5 operational code, 1 address, source that length is 6, length is 62 addresses, source and length.
3. the method for claim 1, it is characterized in that, described instruction is carried out by the ordering calculation path, and described ordering calculation path comprises instruction memory, register file, arithmetic element and the data-carrier store that connects in turn, and instruction memory connects data-carrier store.
4. the method for claim 1 is characterized in that, described instruction is left in the instruction memory in advance.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2006101189783A CN101191802B (en) | 2006-12-01 | 2006-12-01 | Electric energy metering chip creeping prevention method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2006101189783A CN101191802B (en) | 2006-12-01 | 2006-12-01 | Electric energy metering chip creeping prevention method |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101191802A CN101191802A (en) | 2008-06-04 |
CN101191802B true CN101191802B (en) | 2010-09-15 |
Family
ID=39486931
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2006101189783A Expired - Fee Related CN101191802B (en) | 2006-12-01 | 2006-12-01 | Electric energy metering chip creeping prevention method |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN101191802B (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109471058A (en) * | 2018-09-29 | 2019-03-15 | 国网浙江省电力有限公司金华供电公司 | A kind of field-checking measurement error system and method |
CN110988780B (en) * | 2019-11-05 | 2022-04-22 | 广西电网有限责任公司 | Method for realizing power frequency anti-shunt running and electric energy meter |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2280960A (en) * | 1993-08-12 | 1995-02-15 | Siemens Measurements Ltd | Commodity metering apparatus |
CN1226005A (en) * | 1998-10-10 | 1999-08-18 | 杭州华立股份有限公司 | Anticreep piece for electric energy meter |
CN2718904Y (en) * | 2004-06-16 | 2005-08-17 | 上海贝岭股份有限公司 | Anti-shunt running circuit with valve value in electric energy metering chip |
CN2718903Y (en) * | 2004-06-16 | 2005-08-17 | 上海贝岭股份有限公司 | Anti-shunt running circuit in electric energy metering chip |
-
2006
- 2006-12-01 CN CN2006101189783A patent/CN101191802B/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2280960A (en) * | 1993-08-12 | 1995-02-15 | Siemens Measurements Ltd | Commodity metering apparatus |
CN1226005A (en) * | 1998-10-10 | 1999-08-18 | 杭州华立股份有限公司 | Anticreep piece for electric energy meter |
CN2718904Y (en) * | 2004-06-16 | 2005-08-17 | 上海贝岭股份有限公司 | Anti-shunt running circuit with valve value in electric energy metering chip |
CN2718903Y (en) * | 2004-06-16 | 2005-08-17 | 上海贝岭股份有限公司 | Anti-shunt running circuit in electric energy metering chip |
Also Published As
Publication number | Publication date |
---|---|
CN101191802A (en) | 2008-06-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN104778203B (en) | Take the storage of load record block index and querying method in control intelligent electric energy meter | |
CN103247334B (en) | Storage and column decoding circuit thereof | |
CN104636240A (en) | Method for acquiring information report and terminal | |
Albers et al. | Optimal algorithms for right-sizing data centers | |
CN102591787B (en) | The data processing method of JAVA card and device | |
CN101191802B (en) | Electric energy metering chip creeping prevention method | |
CN106168959A (en) | Page layout method and device | |
CN103577161A (en) | Big data frequency parallel-processing method | |
CN114996638A (en) | Configurable fast Fourier transform circuit with sequential architecture | |
US10169527B2 (en) | Accurate statistical timing for boundary gates of hierarchical timing models | |
CN105205012A (en) | Method and device for reading data | |
WO2016041398A1 (en) | Method for storing battery level information of mobile terminal and mobile terminal | |
CN110649801B (en) | Bus voltage sampling method, PFC control circuit and power conversion circuit | |
CN102170290B (en) | Current mode analogue-to-digital converter capable of improving conversion accuracy | |
CN103176796A (en) | Method for achieving mapping from complex data to signal set in AUTOSAR | |
CN1592117B (en) | Mobile telephone, apparatus, method, and program for calculating an interleave parameter | |
CN101430346A (en) | Reverse indication method, apparatus for electric energy measuring chip and its order structure | |
CN201259512Y (en) | Reverse indication device for electric energy metering chip | |
CN116346128A (en) | Analog-to-digital converter calibration method, system, electronic device and medium | |
CN201378177Y (en) | Anti-creeping circuit in energy metering chip | |
CN102735923B (en) | Electric energy metering on-chip system and operation method thereof | |
CN106094507B (en) | A kind of digital power Fuzzy Self-adaptive PID for saving hardware resource | |
CN110209374A (en) | A kind of multiplier and its operating method based on racetrack memory | |
CN104331385A (en) | High-speed semi-hardware realization method for serial peripheral interface | |
Muller | Embedded processing at the heart of life and style |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100915 |