CN101183877A - DC offset calibration method and apparatus - Google Patents

DC offset calibration method and apparatus Download PDF

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Publication number
CN101183877A
CN101183877A CN 200710195380 CN200710195380A CN101183877A CN 101183877 A CN101183877 A CN 101183877A CN 200710195380 CN200710195380 CN 200710195380 CN 200710195380 A CN200710195380 A CN 200710195380A CN 101183877 A CN101183877 A CN 101183877A
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offset
digital signal
obtains
time
calibration
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CN101183877B (en
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淦星星
杭靠文
崔亦军
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State Grid Corp of China SGCC
Kaifeng Power Supply Co of State Grid Henan Electric Power Co Ltd
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ZTE Corp
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Abstract

The invention discloses a DC offset calibration method, comprising the following steps: selecting to acquire the offset value or take calibration according to the time point position of receiving the digital signal; the offset is processed - DC offset is obtained by returning the RF input signal to zero; calibration processing - calibrating the digital signal received according to the DC offset. Also, the invention discloses a DC offset calibration device. The invention has the advantages that with the method and the device, the DC offset variation caused by temperature variation, circuit parameter variation or other reasons can be traced and calibrated without adding any additional complicated analog circuit or affecting the normal operation of a base station, and also the invention is simple to be implemented.

Description

DC offset calibration method and device
Technical field
The present invention relates to the communications field, and especially, relate to a kind of DC offset calibration method and device.
Background technology
The zero intermediate frequency technology is that it has only adopted single-conversion for traditional double conversion technology.At radiating portion, digital inphase quadrature (IQ) signal after the mapping becomes orthogonal simulation IQ signal through DAC (Digital-to-Analog Conventer, digital to analog converter), directly is modulated to radio frequency then, not by the intermediate frequency filtering part; At receiving unit, use a frequency mixer, directly will change to the analog I signal, pass through ADC (Analog-to-Digital Conventer then with interior radiofrequency signal, analog to digital converter) becomes digital IQ signal, carry out digital baseband processing such as demodulating and decoding afterwards again.
The zero intermediate frequency technology mainly contains with following advantage with respect to traditional double conversion technology: (1) is with respect to traditional double conversion scheme, save intermediate frequency filtering circuit, intermediate frequency mixer and intermediate frequency local oscillator, simplify passage, reduced the cost of passage, dwindled area; (2) with respect to present popular high intermediate frequency scheme, can save digital frequency converter and high-speed AD, reduce requirement the numerical portion circuit; (3) because the zero intermediate frequency scheme does not need digital sample clock at a high speed, thus the influence of digital circuit can be reduced to radio frequency, and for radio circuit, both are more or less the same, all need be by local oscillator and frequency mixer (directly modulator); (4) because the zero intermediate frequency technology directly is converted to base band by radio frequency, so also just do not have the problem of image signal.
Be not difficult to find out that from cost and volume and realization difficulty, the zero intermediate frequency scheme all more has superiority.
But the zero intermediate frequency scheme also has the unavoidable problem of himself.At transmitting terminal mainly is to exist carrier leak and sideband to suppress problem; At receiving terminal mainly is DC offset problem.Wherein, in zero intermediate frequency reciver, the generation of direct current signal mainly contains following three reasons: (1) intrinsic DC component that modulation signal produced (for example, Manchester code), this component is useful direct current signal, does not belong to the direct current offset part, therefore needs protection; (2) because the frequency of the carrier signal of local oscillation signal and receiving terminal is identical, can cause local oscillation signal to leak into the input of receiver, thereby form mixing certainly of local oscillation signal, produce bigger direct current signal, this direct current signal is the main cause of zero intermediate frequency reciver direct current offset; (3) circuit itself is owing to the asymmetric common mode direct current offset that causes of mixer output, and this also is a reason of zero intermediate frequency reciver direct current offset.
The direct current offset of zero intermediate frequency reciver can produce bigger influence to whole receiver, particularly when receiving small-signal, so must calibrate this direct current offset.
Traditional method is to come every straight (filtering) with a big electric capacity, but this needs bigger electric capacity, be difficult to integrated, and this method can produce bigger distortion, approximately be the 100us level settling time, so settling time is very long, and a GSM base station conventional burst (Normal Burst) has only 577us, so this method more is not suitable for being used on the GSM base station.
Application number is 200510136595.4, title has proposed a kind of method and circuit that solves the zero intermediate frequency reciver direct current offset in the patent application of " a kind of method and circuit that solves the zero intermediate frequency reciver direct current offset ".Wherein, frequency mixer at receiver uses the inhibition of the principle realization of analog feedback to direct current offset, utilize a differential mode feedback network to eliminate the differential mode direct current offset, and utilize the common-mode feedback network to suppress the asymmetric common mode direct current offset that causes of mixer output, the process of the direct current offset calibration of this scheme realizes with analog circuit.The advantage of this method is that real-time performance is relatively good, can follow the tracks of because the variation of the direct-flow offset weight that variations in temperature causes, its shortcoming is the intrinsic DC component that does not mask modulation signal and produced, differ surely and to follow the tracks of owing to can direct current offset that circuit parameter variations causes (be followed the tracks of and the frequency of DC offset change has relation, just the frequency of circuit parameter variations has relation), and the extra analog circuit that increases can reduce the linearity, thereby influence the gain and the noise of receiver, and the circuit more complicated of this scheme.
In patent 99800691.2 (title is " DC-offset compensation of zero intermediate frequency demodulator "), provide a kind of DC-offset compensation circuit.This scheme is at first introduced a frequency shift (FS) in local oscillator, so that the intrinsic DC component that masks the bad student of institute from modulation signal (for example, Manchester code), only extract differential mode direct current offset and the asymmetric common mode direct current offset that causes of output device that the leakage owing to local oscillator causes.By the DC component of extracting is carried out certain processing, obtain a direct current offset value and store.After a period of time, control loop can be freezed, and the frequency shift (FS) of local oscillator can be canceled.Thereby in normal the reception, cut the compensating circuit that the direct current offset value that stores realizes direct current offset then.The process of direct current offset calibration realizes with digital circuit.The advantage of this mode is the intrinsic DC component that can protect modulation signal to produce; and do not increase extra analog circuit; its shortcoming is that real-time performance is poor, can not follow the tracks of the variation of the direct-flow offset weight that causes owing to variations in temperature and circuit parameter variations.
Yet, zero intermediate frequency direct current offset calibration program not only simple and easy to do but also that have good real time performance is proposed so far as yet.
Summary of the invention
Consider the problems referred to above and make the present invention, for this reason, main purpose of the present invention is to provide a kind of direct current offset calibration program, to solve the circuit complexity that exists in the middle of the direct current offset calibration in the correlation technique, the problem of real-time difference.
According to embodiments of the invention, provide a kind of DC offset calibration method.
This method comprises: carry out side-play amount according to the time point choice of location of digital signal reception and obtain processing or calibration process; Side-play amount obtains to handle, and is the zero dc offset that obtains by making radio-frequency input signals; Calibration process comes the digital signal that receives is calibrated according to the dc offset that obtains.
Wherein, be positioned in the position of the time of reception point of digital signal under the situation in the initial moment of the time period that does not receive valid data, begin to carry out deviant and obtain processing; Be positioned under the situation that receives the valid data time period in the position of the time of reception point of digital signal, carry out calibration process.Be under the situation of base station burst signals of global system for mobile communications in the digital signal that receives, begin to carry out side-play amount when being positioned at the section start of protection bit of burst signals in the position of time of reception point and obtain processing; Be positioned in the position of time of reception point under the situation of non-protection bit of burst signals, then carry out calibration process.
In addition, side-play amount to be handled and to be comprised: making radio-frequency input signals is zero, the output of FIR filter is sampled, added up and average, and the value that will average back obtains is as dc offset.
In addition, in calibration process, calibrate by deducting dc offset with the digital signal that receives.
This method can further include: upgrades and handles, and after executing side-play amount acquisition processing, the dc offset that obtains before the dc offset renewal with this acquisition, thereby realization real time calibration.
In addition, when receiving digital signal, at first digital signal is carried out the preliminary treatment of filtering quantization error and interchannel noise, determine the time point position that digital signal receives afterwards.
According to another embodiment of the present invention, provide a kind of direct current offset calibrating installation.
This device comprises: select module, be used for carrying out side-play amount according to the time point choice of location that digital signal receives and obtain processing or calibration process; Side-play amount obtains module, is used to carry out side-play amount and obtains to handle, and wherein, it is the zero dc offset that obtains by making radio-frequency input signals that side-play amount obtains module; And calibration module, be used to carry out calibration process, wherein, calibration module comes the digital signal that receives is calibrated according to the dc offset that obtains.
Wherein, be positioned in the position of the time of reception point of digital signal under the situation in the initial moment of the time period that does not receive valid data, select module to select to begin to carry out deviant and obtain processing; Be positioned in the position of the time of reception point of digital signal under the situation of the time period that receives valid data, select module to select to carry out calibration process.
In addition, this device can further comprise: update module is used for after executing side-play amount acquisition processing the dc offset that obtains before the dc offset renewal with this acquisition, thereby realization real time calibration.
By technique scheme of the present invention, can and not influence under the regular traffic situation of base station at the analog circuit that does not increase extra complexity, real-time tracking and the variation of calibrating the direct-flow offset weight that causes owing to variations such as variations in temperature and circuit parameters, and have the simple advantage of realization.
Description of drawings
Accompanying drawing described herein is used to provide further understanding of the present invention, constitutes the application's a part, and illustrative examples of the present invention and explanation thereof are used to explain the present invention, do not constitute improper qualification of the present invention.In the accompanying drawings:
Fig. 1 is the flow chart according to the DC offset calibration method of the inventive method embodiment;
Fig. 2 is the block diagram of realization according to the structure example of the zero intermediate frequency reciver of the DC offset calibration method of the inventive method embodiment;
Fig. 3 is the structural representation according to the adjustable normal burst pulse of the DC offset calibration method of the inventive method embodiment;
Fig. 4 is that zero intermediate frequency reciver is realized the schematic diagram according to the DC offset calibration method of the embodiment of the invention; And
Fig. 5 is the block diagram according to the direct current offset calibrating installation of apparatus of the present invention embodiment.
Embodiment
Method embodiment
In the present embodiment, provide a kind of DC offset calibration method.
As shown in Figure 1, comprise according to the DC offset calibration method of present embodiment: step S102, the time point choice of location that receives according to digital signal (for example, IQ digital signal) is carried out side-play amount and is obtained and handle or calibration process; Step S104, side-play amount obtains to handle, and is the zero dc offset that obtains by making radio-frequency input signals; Step S106, calibration process comes the digital signal that receives is calibrated according to the dc offset that obtains.
Wherein, be positioned in the position of the time of reception point of digital signal under the situation in the initial moment of the time period that does not receive valid data, begin to carry out deviant and obtain processing; Be positioned in the position of the time of reception point of digital signal under the situation of the time period that receives valid data, carry out calibration process.Be under the situation of burst signals of global system for mobile communications base station in the digital signal that receives, as shown in Figure 3, the begin column side-play amount obtains processing when being positioned at the section start of protection bit (8.25) of burst signals in the position of time of reception point; Be positioned in the position of time of reception point under the situation of non-protection bit of burst signals, then carry out calibration process.
In addition, side-play amount to be handled and to be comprised: making radio-frequency input signals is zero, the output of FIR filter is sampled, added up and average, and the value that will average back obtains is as dc offset.
In addition, in calibration process, calibrate by deducting dc offset with the digital signal that receives.
This method can further include: upgrades and handles, and after executing side-play amount acquisition processing, the dc offset that obtains before the dc offset renewal with this acquisition, thereby realization real time calibration.
In addition, when receiving digital signal, at first digital signal is carried out the preliminary treatment of filtering quantization error and interchannel noise, determine the time point position that digital signal receives afterwards.
The present invention is both upward realizations of programmable gate array (FPGA) at the scene specifically, also can go up at digital signal processor (DSP) and realize.Below just be that example is carried out specific description with FPGA.
Fig. 2 is the fundamental block diagram of zero intermediate frequency reciver, wherein, only shows the I passage among Fig. 2, and Q passage and I passage are just the same.The signal that antenna receives is at first through a radio-frequency filter, the noise that the filtering band is outer; Through a LNA, carry out radio frequency and amplify then; Pass through frequency mixer again, obtain the analog I signal; And then difference is that I+, I-and Q+, Q-are input to low pass filter, the noise that the filtering base band is outer; Carrying out difference through a baseband amplifier again amplifies; Be input to ADC by a frequency overlapped-resistable filter difference then, become digital IQ signal, be input to FPGA at last and handle accordingly, the processing that FPGA carries out can comprise calibration and some other base band signal process of the direct current offset shown in Fig. 1, for example, demodulating and decoding etc.Here the form with difference also is in order to reduce common mode direct current offset (null offset).
Fig. 3 is the data format of the normal burst pulse (NB) in the global system for mobile communications (GSM).For NB, its information is divided into two groups of each 58 symbols, and wherein 57 is data, and another one is for stealing flag of frame, and these data of expression are user data or signaling in the CS business.Between this two segment data, insert 26 training sequence, be used for estimating channel parameter and Timing Advance.The tail bit of 3 " 0 " is added on the both sides of message segment.The NB data time of 8.25 arranged at last; do not send out information any; protection section as adjacent time-slots; the calculating of dc offset of the present invention is carried out in this time period exactly; so can not influence regular traffic, and can realize a real time calibration that frequency ratio is higher, promptly; each NB time span (577us) can be done primary calibration, thereby can effectively follow the tracks of the variation of dc offset with temperature and circuit parameter.
Fig. 4 shows the schematic diagram of real time calibration of direct current offset that the present invention realizes the zero intermediate frequency reciver of GSM base station.
As shown in Figure 4, from the IQ data of ADC at first through a FIR filter, the quantizing noise of filtering ADC and interchannel noise; Judge then whether the current time is the beginning of 8.25 protection bits, if then carry out the calculation process of direct current offset, otherwise normally receive flow process; When carrying out the calculation process of direct current offset, at first making radio-frequency input signals is " zero ", thus the protection modulation signal intrinsic DC component; Then the output of FIR filter is sampled, added up, average then, mean value just can be thought the direct current offset value under the current circuit parameter, all is white noise because other non-direct current signals can be thought, average is zero; At last the direct current offset value is stored and upgrade the direct current offset value that the last time calculates, use when receiving flow process in order to normal; When the protection bit finishes, then enter normal reception flow process, the digital IQ signal from the output of FIR filter that samples is deducted corresponding direct current offset value, just finished the calibration of direct current offset.Signal after the calibration is proceeded other Base-Band Processing such as demodulating and decoding.
Should be noted that needs in whole calibration process to guarantee that the flow process of calculating direct current offset carries out in the time of protection bit, it is professional normally so just can not influence the base station.
Device embodiment
In the present embodiment, provide a kind of direct current offset calibrating installation.
As shown in Figure 5, the direct current offset calibrating installation according to present embodiment comprises: select module 502, be used for carrying out side-play amount according to the time point choice of location that digital signal receives and obtain processing or calibration process; Side-play amount obtains module 504, is used to carry out side-play amount and obtains to handle, and wherein, it is the zero dc offset that obtains by making radio-frequency input signals that side-play amount obtains module 504; And calibration module 506, be used to carry out calibration process, wherein, calibration module 506 comes the digital signal that receives is calibrated according to the dc offset that obtains.
Wherein, be positioned in the position of the time of reception point of digital signal under the situation in the initial moment of the time period that does not receive valid data, select module 502 to select to begin to carry out deviant and obtain processing; Be positioned in the position of the time of reception point of digital signal under the situation of the time period that receives valid data, select module 502 to select to carry out calibration process.
In addition, this device can further comprise: the update module (not shown) is used for after executing side-play amount acquisition processing the dc offset that obtains before the dc offset renewal with this acquisition, thereby realization real time calibration.
As can be seen, advantage of the present invention is as follows:
(1) real time calibration: because the dc-bias of receiver not only has relation with temperature, also the relating to parameters with circuit is, so circuit parameter changes each time, just must do the primary calibration operation, just must realize that for changing very frequent circuit parameter (for example each time slot all needs the circuit parameter that changes) in the GSM base station calibration frequency is than higher real time calibration, and the present invention can carry out primary calibration to each NB, therefore has good real-time;
(2) digital calibration: do not increase complicated analog circuit, can not reduce the receiver linearity, can not bring extra noise, implement fairly simple;
(3) do calibration at the protection bit in the time, can not influence the GSM BTS service;
(4) be " zero " by making input signal in the flow process in calibration, the intrinsic DC component that can effectively protect modulation signal and produced.
In sum; the present invention is directed to the DC offset problem of the zero intermediate frequency reciver that is applied to the GSM base station; a kind of calibration steps real-time, numeral has been proposed; promptly; during the protection bit of each NB of GSM base station, calculate the direct current offset value and store, realize real time calibration thereby deduct this direct current offset value at the normal time of reception of next NB.By means of technical scheme of the present invention, can and not influence under the regular traffic situation of base station at the analog circuit that does not increase extra complexity, real-time tracking and the variation of calibrating the direct-flow offset weight that causes owing to variations such as variations in temperature and circuit parameters, and have the simple advantage of realization.
The above is the preferred embodiments of the present invention only, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.Within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (10)

1. a DC offset calibration method is characterized in that, comprising:
Carry out side-play amount according to the time point choice of location of digital signal reception and obtain processing or calibration process;
Described side-play amount obtains to handle, and is the zero dc offset that obtains by making radio-frequency input signals;
Described calibration process comes the digital signal that receives is calibrated according to the dc offset that obtains.
2. method according to claim 1 is characterized in that, is positioned in the position of the time of reception point of digital signal under the situation in the initial moment of the time period that does not receive valid data, begins to carry out described deviant and obtains processing; Be positioned in the position of the time of reception point of described digital signal under the situation of the time period that receives valid data, carry out described calibration process.
3. method according to claim 2, it is characterized in that, be under the situation of burst signals of global system for mobile communications base station in the digital signal that receives, when being positioned at the section start of protection bit of described burst signals in the position of time of reception point, beginning to carry out described side-play amount and obtain to handle; Be positioned in the position of time of reception point under the situation of non-protection bit of described burst signals, then carry out described calibration process.
4. method according to claim 1 is characterized in that, described side-play amount obtains to handle and comprises: making radio-frequency input signals is zero, the output of FIR filter is sampled, added up and average, and the value that will average back obtains is as described dc offset.
5. method according to claim 1 is characterized in that, in described calibration process, calibrates by deducting dc offset with the digital signal that receives.
6. method according to claim 1 is characterized in that, further comprises: upgrade and handle, and after executing side-play amount acquisition processing, the dc offset that obtains before the dc offset renewal with this acquisition, thereby realization real time calibration.
7. according to each described method in the claim 1 to 6, it is characterized in that, when receiving described digital signal, at first described digital signal is carried out the preliminary treatment of filtering quantization error and interchannel noise, determine the time point position that described digital signal receives afterwards.
8. a direct current offset calibrating installation is characterized in that, comprising:
Select module, be used for carrying out side-play amount and obtain processing or calibration process according to the time point choice of location that digital signal receives;
Side-play amount obtains module, is used to carry out described side-play amount and obtains to handle, and wherein, it is the zero dc offset that obtains by making radio-frequency input signals that described side-play amount obtains module;
Calibration module is used to carry out described calibration process, and wherein, described calibration module comes the digital signal that receives is calibrated according to the dc offset that obtains.
9. device according to claim 8 is characterized in that, is positioned in the position of the time of reception point of digital signal under the situation in the initial moment of the time period that does not receive valid data, and described selection module is selected to begin to carry out described deviant and obtained processing; Be positioned under the time period situation that receives valid data in the position of the time of reception point of described digital signal, described selection module selects to carry out described calibration process.
10. device according to claim 8 is characterized in that, further comprises:
Update module is used for after executing side-play amount acquisition processing the dc offset that obtains before the dc offset renewal with this acquisition, thereby realization real time calibration.
CN 200710195380 2007-12-17 2007-12-17 DC offset calibration method and apparatus Expired - Fee Related CN101183877B (en)

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CN101299616B (en) * 2008-07-08 2011-08-17 北京天碁科技有限公司 Radio frequency receiver as well as electronic apparatus containing the same
CN102244523A (en) * 2011-06-23 2011-11-16 上海中科高等研究院 Zero intermediate frequency receiver and method for eliminating DC offset of same
CN101299615B (en) * 2008-07-08 2012-05-16 北京天碁科技有限公司 Method and device for eliminating direct current drift of radio frequency receiver
CN101616125B (en) * 2008-06-26 2012-06-27 大唐移动通信设备有限公司 Zero intermediate frequency transmitter and method for calibrating zero intermediate frequency transmitting signals
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CN102244523B (en) * 2011-06-23 2014-07-16 中国科学院上海高等研究院 Zero intermediate frequency receiver and method for eliminating DC offset of same
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CN102916659A (en) * 2011-08-04 2013-02-06 联芯科技有限公司 Automatic inductance-capacitance calibrating method and circuit
CN102916659B (en) * 2011-08-04 2015-11-25 联芯科技有限公司 Inductance capacitance automatic calibrating method and circuit
CN103095320A (en) * 2011-10-28 2013-05-08 京信通信系统(中国)有限公司 Zero intermediate frequency receiver and direct current leakage suppression method thereof
CN103532891A (en) * 2012-07-06 2014-01-22 展讯通信(上海)有限公司 Receiver, direct current estimation method and device, and direct current elimination method and device
CN103532891B (en) * 2012-07-06 2016-09-07 展讯通信(上海)有限公司 Receiver and direct current estimation method and device, direct current elimination method and device
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CN104253780B (en) * 2013-06-27 2017-07-28 鸿富锦精密工业(深圳)有限公司 Direct-current offset calibration circuit
CN104253780A (en) * 2013-06-27 2014-12-31 鸿富锦精密工业(深圳)有限公司 Direct-current offset calibration circuit
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