CN101183877A - DC offset calibration method and device - Google Patents

Abstract

The invention discloses a method for calibrating DC offset, which includes: selecting and performing offset acquisition processing or calibration processing according to the time point position of digital signal reception; the offset acquisition processing is obtained by making the radio frequency input signal zero DC offset; calibration processing, the received digital signal is calibrated according to the obtained DC offset. In addition, the invention also discloses a DC offset calibration device. By using the present invention, it is possible to track and calibrate changes in DC offset components caused by changes in temperature and circuit parameters in real time without adding additional complex analog circuits and without affecting the normal business of the base station, and also has The advantage of simplicity is achieved.

Description

DC offset calibration method and device

technical field

The present invention relates to the field of communications, and in particular, to a method and device for calibrating a DC offset.

Background technique

Compared with the traditional double frequency conversion technology, the zero intermediate frequency technology uses only one frequency conversion. In the transmitting part, the mapped digital in-phase quadrature (IQ) signal passes through a DAC (Digital-to-Analog Converter, digital-to-analog converter) to become a quadrature analog IQ signal, and then directly modulated to the radio frequency without passing through the intermediate frequency filtering part ; In the receiving part, a mixer is used to directly change the in-band RF signal into an analog IQ signal, and then through an ADC (Analog-to-Digital Converter, analog-to-digital converter) into a digital IQ signal, and then decompose Digital baseband processing such as modulation and decoding.

Compared with the traditional double frequency conversion technology, the zero-IF technology mainly has the following advantages: (1) Compared with the traditional double frequency conversion scheme, the IF filter circuit, IF mixer, and IF local oscillator are omitted, which simplifies the channel and reduces The cost of the channel reduces the area; (2) Compared with the current popular IF solution, it can save the digital converter and high-speed AD, and reduce the requirements for the digital part of the circuit; (3) Since the zero-IF solution does not require high-speed digital Sampling clock, so it can reduce the impact of digital circuits on radio frequency, and for radio frequency circuits, the difference between the two is not much, both need local oscillator and mixer (direct modulator); (4) because zero-IF technology is directly controlled by radio frequency The frequency is converted to baseband, so there is no problem with image signals.

It is not difficult to see that the zero-IF solution has more advantages in terms of cost, volume and implementation difficulty.

However, the zero-IF solution also has its own unavoidable problems. At the transmitting end, there are mainly carrier leakage and sideband suppression problems; at the receiving end, there are mainly DC offset problems. Among them, in the zero-IF receiver, the DC signal is mainly generated for the following three reasons: (1) The inherent DC component (for example, Manchester code) generated by the modulated signal, which is a useful DC signal and does not belong to the DC bias (2) Since the frequency of the local oscillator signal and the carrier signal at the receiving end are the same, it will cause the local oscillator signal to leak to the input end of the receiver, thereby forming a self-mixing of the local oscillator signal and generating a large DC signal, the DC signal is the main reason for the DC offset of the zero-IF receiver; (3) the common-mode DC offset of the circuit itself due to the asymmetry of the mixer output, which is also a reason for the DC offset of the zero-IF receiver .

The DC offset of the zero-IF receiver will have a relatively large impact on the entire receiver, especially when receiving small signals, so the DC offset must be calibrated.

The traditional method is to use a large capacitor for DC blocking (filtering), but this requires a relatively large capacitor, which is difficult to integrate, and this method will produce relatively large distortion, and the settling time is about 100us, so the settling time It is very long, and a normal burst (Normal Burst) of a GSM base station is only 577us, so this method is not suitable for use on a GSM base station.

The patent application with the application number 200510136595.4 and titled "A Method and Circuit for Solving the DC Offset of a Zero-IF Receiver" proposes a method and circuit for solving the DC offset of a zero-IF receiver. Among them, the mixer of the receiver uses the principle of analog feedback to suppress the DC offset, uses a differential mode feedback network to eliminate the differential mode DC offset, and uses a common mode feedback network to suppress the output of the mixer. The common-mode DC offset caused by symmetry, the DC offset calibration process of this scheme is realized with an analog circuit. The advantage of this method is that the real-time performance is relatively good, and it can track the change of the DC offset component caused by the temperature change. The DC offset (can be tracked is related to the frequency of the DC offset change, that is, the frequency of the circuit parameter change), and the additional analog circuit will reduce the linearity, thereby affecting the gain and noise of the receiver. And the circuit of this scheme is more complicated.

A DC offset compensation circuit is provided in patent 99800691.2 (titled "DC Offset Compensation for Zero-IF Demodulator"). This scheme first introduces a frequency offset in the local oscillator, so as to mask out the inherent DC component (for example, Manchester code) differentially generated from the modulated signal, and only extract the differential mode DC offset and Common-mode DC offset due to asymmetry of devices at the output. By performing certain processing on the extracted DC component, a DC offset value is obtained and stored. After a period of time, the control loop can be frozen and the frequency offset of the local oscillator can be canceled. Then, during normal reception, the stored DC offset value is subtracted to implement a DC offset compensation circuit. The process of DC offset calibration is realized with digital circuit. The advantage of this method is that it can protect the inherent DC component generated by the modulation signal, and no additional analog circuit is added. The disadvantage is that the real-time performance is poor, and the change of the DC offset component caused by temperature changes and circuit parameters cannot be tracked. .

However, a zero-IF DC offset calibration scheme that is both simple and easy to implement and has good real-time performance has not been proposed so far.

Contents of the invention

The present invention is made in consideration of the above problems. Therefore, the main purpose of the present invention is to provide a DC offset calibration solution to solve the problems of complex circuits and poor real-time performance in DC offset calibration in the related art.

According to an embodiment of the present invention, a DC offset calibration method is provided.

The method includes: selecting and performing offset acquisition processing or calibration processing according to the time point position of digital signal reception; offset acquisition processing, obtaining a DC offset by making the radio frequency input signal zero; calibration processing, according to the obtained DC Offset to calibrate the received digital signal.

Wherein, when the position of the receiving time point of the digital signal is located at the beginning moment of the time period of not receiving valid data, the offset value acquisition process is started; the position of the receiving time point of the digital signal is located in the time period of receiving valid data In the case of , perform calibration processing. Under the situation that the digital signal that receives is the base station burst pulse signal of Global System for Mobile Communications, when the position of receiving time point is positioned at the beginning of the protection bit position of burst pulse signal, begin to carry out offset and obtain processing; If the position of the time point is located in the non-protected bit of the burst signal, calibration processing is performed.

In addition, the process of obtaining the offset includes: making the radio frequency input signal zero, sampling, accumulating, and averaging the output of the FIR filter, and using the averaged value as the DC offset.

Also, in the calibration process, calibration is performed by subtracting the DC offset from the received digital signal.

The method may further include: updating processing, after executing the processing of obtaining the offset, using the obtained DC offset to update the previously obtained DC offset, so as to realize real-time calibration.

In addition, when a digital signal is received, the digital signal is first preprocessed to filter out quantization errors and channel noise, and then the time point at which the digital signal is received is determined.

According to another embodiment of the present invention, a DC offset calibration device is provided.

The device includes: a selection module, used to select and perform offset acquisition processing or calibration processing according to the time point position of digital signal reception; an offset acquisition module, used to perform offset acquisition processing, wherein the offset acquisition module The DC offset is obtained by making the radio frequency input signal zero; and a calibration module is used to perform a calibration process, wherein the calibration module calibrates the received digital signal according to the obtained DC offset.

Wherein, when the position of the receiving time point of the digital signal is at the start moment of the time period when valid data is not received, the selection module selects to start executing the offset value acquisition process; In the case of the time zone of the data, the selection module selects and performs calibration processing.

In addition, the device may further include: an updating module, configured to update the previously obtained DC offset with the currently obtained DC offset after the offset obtaining process is performed, so as to realize real-time calibration.

Through the above technical solution of the present invention, it is possible to track and calibrate changes in DC offset components caused by temperature changes and changes in circuit parameters in real time without adding additional complex analog circuits and without affecting the normal business of the base station, And it also has the advantage of simple implementation.

Description of drawings

The accompanying drawings described here are used to provide a further understanding of the present invention and constitute a part of the application. The schematic embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute improper limitations to the present invention. In the attached picture:

Fig. 1 is a flowchart of a DC offset calibration method according to a method embodiment of the present invention;

Fig. 2 is the block diagram that realizes the structural example of the zero-IF receiver of the DC offset calibration method according to the method embodiment of the present invention;

3 is a schematic structural diagram of a normal burst pulse that can be calibrated by a DC offset calibration method according to a method embodiment of the present invention;

4 is a schematic diagram of a zero-IF receiver implementing a DC offset calibration method according to an embodiment of the present invention; and

Fig. 5 is a block diagram of a DC offset calibration device according to an embodiment of the device of the present invention.

Detailed ways

method embodiment

In this embodiment, a DC offset calibration method is provided.

As shown in FIG. 1, the DC offset calibration method according to this embodiment includes: step S102, performing offset acquisition processing or calibration processing according to the time point position selection of digital signal (for example, IQ digital signal) reception; step S104, The offset obtaining process is to obtain the DC offset by making the radio frequency input signal zero; step S106 , the calibration process, to calibrate the received digital signal according to the obtained DC offset.

Wherein, when the position of the receiving time point of the digital signal is at the beginning moment of the time period when no valid data is received, the offset value acquisition process is started; the position of the receiving time point of the digital signal is at the time of receiving valid data In the case of a segment, calibration processing is performed. In the case where the received digital signal is the burst signal of the Global System for Mobile Communications base station, as shown in Figure 3, when the position of the receiving time point is at the beginning of the protection bit (8.25 bits) of the burst signal The process of obtaining the row offset is started; when the position of the receiving time point is located in the non-protected bit of the burst signal, the calibration process is performed.

In addition, the process of obtaining the offset includes: making the radio frequency input signal zero, sampling, accumulating, and averaging the output of the FIR filter, and using the averaged value as the DC offset.

Also, in the calibration process, calibration is performed by subtracting the DC offset from the received digital signal.

The method may further include: updating processing, after executing the processing of obtaining the offset, using the obtained DC offset to update the previously obtained DC offset, so as to realize real-time calibration.

In addition, when a digital signal is received, the digital signal is first preprocessed to filter out quantization errors and channel noise, and then the time point at which the digital signal is received is determined.

Specifically, the present invention can be realized not only on a field programmable gate array (FPGA), but also on a digital signal processor (DSP). The following will take FPGA as an example for specific description.

FIG. 2 is a basic block diagram of a zero-IF receiver, where only the I channel is shown in FIG. 2 , and the Q channel is exactly the same as the I channel. The signal received by the antenna first passes through a radio frequency filter to filter out the out-of-band noise; then passes through a low noise amplifier for radio frequency amplification; then passes through a mixer to obtain an analog IQ signal; then it is differentially divided into I+, I- and Q+ and Q- are input to the low-pass filter to filter out the noise outside the baseband; then a baseband amplifier is used for differential amplification; then an anti-aliasing filter is differentially input to the ADC to become a digital IQ signal, and finally input to the FPGA Corresponding processing is performed, and the processing performed by the FPGA may include the calibration of the DC offset shown in FIG. 1 and some other baseband signal processing, such as demodulation and decoding. The differential form is also used here to reduce the common-mode DC offset (zero drift).

FIG. 3 is a data format of a normal burst (NB) in the Global System for Mobile Communications (GSM). For NB, its information is divided into two groups of 58 symbols each, of which 57 bits are data, and the other is a frame stealing flag, which indicates whether the data is user data or signaling in the CS service. A 26-bit training sequence is inserted between these two pieces of data to estimate channel parameters and timing advances. 3 tail bits of "0" are added to both sides of the information segment. There is 8.25 bits of time at the end of NB data, no information is sent, as the protection segment of the adjacent time slot, the calculation of the DC offset of the present invention is carried out in this time segment, so it will not affect the normal business, and can realize A real-time calibration with a relatively high frequency, that is, a calibration can be done for each NB time length (577us), so that it can effectively track the change of the DC offset with temperature and circuit parameters.

Fig. 4 shows a schematic diagram of realizing the real-time calibration of the DC offset of the zero-IF receiver of the GSM base station according to the present invention.

As shown in Figure 4, the IQ data from the ADC first passes through a FIR filter to filter out the quantization noise and channel noise of the ADC; then it is judged whether the current time is the beginning of 8.25 guard bits, and if so, the DC offset is performed calculation process, otherwise the normal receiving process is performed; when the DC offset calculation process is performed, the RF input signal is first set to "zero" to protect the inherent DC component of the modulated signal; then the output of the FIR filter is sampled, Accumulate and then average, the average value can be considered as the DC offset value under the current circuit parameters, because other non-DC signals can be considered as white noise, and the average value is zero; finally, the DC offset value is stored and updated last time The calculated DC offset value is used for the normal receiving process; when the protection bit ends, it enters the normal receiving process, and subtracts the corresponding DC offset value from the sampled digital IQ signal output from the FIR filter , the DC offset calibration is completed. The calibrated signal continues to perform other baseband processing such as demodulation and decoding.

It should be noted that during the whole calibration process, it is necessary to ensure that the process of calculating the DC offset is performed within the protection bit time, so as not to affect the normal service of the base station.

Device embodiment

In this embodiment, a DC offset calibration device is provided.

As shown in FIG. 5, the DC offset calibration device according to this embodiment includes: a selection module 502, which is used to select and perform offset acquisition processing or calibration processing according to the time point position of digital signal reception; an offset acquisition module 504, For performing offset obtaining processing, wherein the offset obtaining module 504 obtains the DC offset by making the radio frequency input signal zero; and a calibration module 506, for performing calibration processing, wherein the calibration module 506 obtains the DC offset to calibrate the received digital signal.

Wherein, when the position of the receiving time point of the digital signal is at the start moment of the time period when valid data is not received, the selection module 502 selects to start executing the offset value acquisition process; the position of the receiving time point of the digital signal is at the receiving In the case of a period of valid data, the selection module 502 selects to perform calibration processing.

In addition, the device may further include: an update module (not shown), configured to update the previously obtained DC offset with the DC offset obtained this time after performing the offset acquisition process, thereby realizing real-time calibration .

As can be seen, the advantages of the present invention are as follows:

(1) Real-time calibration: Since the DC offset value of the receiver is not only related to the temperature, but also related to the parameters of the circuit, every time the circuit parameters change, a calibration operation must be done, which changes frequently in GSM base stations The circuit parameters (such as the circuit parameters that need to be changed in each time slot) must realize real-time calibration with relatively high calibration frequency, and the present invention can perform one calibration for each NB, so it has good real-time performance;

(2) Digital calibration: no complex analog circuits are added, the linearity of the receiver will not be reduced, and no additional noise will be brought, so it is relatively simple to implement;

(3) Calibration is done within the protection bit time, which will not affect the GSM base station business;

(4) By making the input signal "zero" during the calibration process, the inherent DC component generated by the modulation signal can be effectively protected.

In summary, the present invention proposes a real-time, digital calibration method for the DC offset problem of the zero-IF receiver applied to the GSM base station, that is, the DC offset is calculated during the protection bits of each NB of the GSM base station The offset value is stored, and the DC offset value is subtracted at the normal receiving time of the next NB to realize real-time calibration. With the help of the technical solution of the present invention, it is possible to track and calibrate changes in DC offset components caused by changes in temperature and circuit parameters in real time without adding additional complex analog circuits and without affecting the normal business of the base station, And it also has the advantage of simple implementation.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and changes. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims (10)

1. A DC offset calibration method, characterized in that, comprising: According to the time point position of digital signal reception, offset acquisition processing or calibration processing is selected; The offset is obtained and processed, and the DC offset is obtained by making the radio frequency input signal zero; The calibration process calibrates the received digital signal according to the obtained DC offset. 2. The method according to claim 1, characterized in that, when the position of the receiving time point of the digital signal is located at the initial moment of the time period when valid data is not received, the offset value acquisition process is started; The calibration process is performed in a case where the position of the receiving time point of the digital signal is within the time period of receiving valid data. 3. method according to claim 2, it is characterized in that, under the situation that the digital signal that receives is the burst pulse signal of Global System for Mobile Communications base station, be positioned at the guard of described burst pulse signal at the position of receiving time point When the position of the bit is at the beginning, the offset acquisition process is started; when the position of the receiving time point is located at the non-protected bit of the burst signal, the calibration process is performed. 4. The method according to claim 1, wherein the offset obtaining process comprises: making the radio frequency input signal zero, sampling, accumulating, and averaging the output of the FIR filter, and obtaining after averaging value as the DC offset. 5. The method according to claim 1, characterized in that, in the calibration process, the calibration is performed by subtracting the DC offset from the received digital signal. 6. The method according to claim 1, further comprising: updating processing, after executing the offset acquisition process, using the DC offset obtained this time to update the previously obtained DC offset, thereby Realize real-time calibration. 7. according to the method described in any one in claim 1 to 6, it is characterized in that, when receiving described digital signal, at first carry out the preprocessing of filtering quantization error and channel noise to described digital signal, determine afterwards The time point where the digital signal is received. 8. A DC offset calibration device, comprising: The selection module is used to select and perform offset acquisition processing or calibration processing according to the time point position of digital signal reception; An offset obtaining module, configured to perform the offset obtaining process, wherein the offset obtaining module obtains the DC offset by making the radio frequency input signal zero; A calibration module, configured to execute the calibration process, wherein the calibration module calibrates the received digital signal according to the obtained DC offset. 9. The device according to claim 8, characterized in that, when the position of the receiving time point of the digital signal is located at the beginning of the time period when valid data is not received, the selection module selects to start executing the offset Shift value acquisition processing: when the position of the receiving time point of the digital signal is within the time period for receiving valid data, the selection module selects to perform the calibration processing. 10. The device of claim 8, further comprising: The update module is configured to update the previously obtained DC offset with the DC offset obtained this time after the offset acquisition processing is performed, so as to realize real-time calibration.

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