CN101174852A - WCDMA subdistrict searching time slot synchronization method and system - Google Patents
WCDMA subdistrict searching time slot synchronization method and system Download PDFInfo
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- CN101174852A CN101174852A CNA200610150499XA CN200610150499A CN101174852A CN 101174852 A CN101174852 A CN 101174852A CN A200610150499X A CNA200610150499X A CN A200610150499XA CN 200610150499 A CN200610150499 A CN 200610150499A CN 101174852 A CN101174852 A CN 101174852A
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Abstract
The present invention provides a method and a system for synchronously searching time slot in the cells of the WCDMA system; the method comprises the following steps that the parameters are initialized; the input digitalized I-route and Q-route data are implemented with frequency deviation compensation; the relevant values of the I and Q data of the 256 chips with the main synchronous code, which are corresponding to every time slot from an assumed time slot boundary, are calculated; the relevant values are implemented with power calculation and the integer of the calculation result represents the power value which is converted into floating point number to indicate the power value; the floating point number represents the power value and the value is added with the anterior time slot accumulated value read from the memory; the steps are repeated until M time slots are added; N largest peak values and the corresponding chronological positions are found; the process of interruption is applied to the DSP to wait for the next treatment. The method and the system can accurately position the time slot boundary of small cell and confirm difference small cells of different diameters or scrambling codes in the same small cell, which is beneficial to searching cell.
Description
Technical field
The present invention relates to a kind of Wideband Code Division Multiple Access (WCDMA) (Wide-band Code DivisionMultiple Access of communication field, hereinafter to be referred as WCDMA) method and system of slot synchronization in the system, particularly a kind of method and system of WCDMA Cell searching slot synchronization.
Background technology
The difference of cell search process in asynchronous WCDMA system or synchronizing process and synchro system is very big, because the different sign indicating numbers of scratching is used in each sub-district of asynchronous UTRA WCDMA system, and just do not adopt different phase deviation, therefore, with regard to present terminal technology, can't under the situation that does not possess any prior information, in the time of 10ms, finish search to 512 code words; If finish search, will carry out repeatedly Cell searching relatively, thereby the user need wait for long time from the access network of starting shooting to 512 code words.
Therefore, (Cell Search CSR) can reduce search time, shortens the user from time that the access network of starting shooting need be waited for to use synchronizing channel to carry out Cell searching.This search procedure mainly was divided into for three steps:
The first step, slot synchronization is selected 1 as the slot synchronization point from the individual candidate's phase place of 10 * 256 * R (R is a sample rate);
In second step, 1 in 15 candidate's time slots is selected in frame synchronization and the identification of scrambler group, selects 1 in 64 scrambler groups;
In the 3rd step, main scrambler identification is selected 1 from 8 candidate master's scramblers.
In first step slot synchronization process, terminal searching has Primary Synchronisation Code (the Primary Synchronization Codes of 256 chips, hereinafter to be referred as PSC), all sub-districts have identical PSC, owing to have identical PSC at each time slot, therefore detect the position of peak value just corresponding to boundary of time slot; PSC is called total layering Gray sequence (Generalised Hierarchical GolaySequence), has good aperiodic of autocorrelation, and the sequence by the modulation of repeated using Gray complementary series obtains.Its length is 256 chips, described 16 * 16 hierarchies of following expression.Each time slot PSC of all sub-districts is identical.I signal uses identical PSC to add expansion with Q signal, adds extended code with (0,1) expression, uses (1 ,-1) expression in real system.
a＝<0，0，0，0，0，0，1，1，0，1，0，1，0，1，1，0>
x＝<0，0，0，1，1，0，1，1，0，0，0，1，0，1，0，0>
I signal and Q signal by PSC and receiving terminal input carry out the boundary of time slot that correlation computations can find the sub-district.In theory, as long as use performance matched filter preferably in terminal, just can find boundary of time slot, realization is synchronous with base station cell.
At present about the method for slot synchronization in the Cell searching, be to adopt the method for threshold value to determine the boundary of time slot of sub-district mostly, this method inaccuracy, and can only discern a sub-district and a maximum multipath.As application number is that CN01134460, name are called the slotted synchronous method that proposes in the Chinese patent of " adaptive threshold W-CDMA time interval synchronizing method and device " and are: in the main synchronizing sequence matching result that matched filter provides, record analysis is carried out in correlation peak and relevant position that this device is selected wherein to surpass certain thresholding, capture this synchronizing sequence if repeat to require the relevant peaks of number of times then to be judged to be at same position, otherwise, enter record analysis process next time according to the analysis result dynamic adjusted threshold; If in given time, do not capture this synchronizing sequence then withdraw from acquisition procedure, and provide and catching the failure indication.This method acquisition probability is not high, because in actual applications, because the environment of mobile communication is abominable, the signal that receives is very complicated, various declines are also relatively more serious, if judge the reception value with thresholding simply, may cause and catch failure or need the repetitive process that threshold value repeatedly is set.In addition, because all base stations are all at the basic synchronization channel of sending out identical, travelling carriage may receive several signal of base station; Because the influence of multipath also can cause the reception matched filter to export a plurality of peak values.Present method is not handled a plurality of peak values that surpass threshold value, can not satisfy the processing requirements of WCDMA terminal Cell searching to many cell conditions, and need a plurality of parameters such as configured threshold value, accumulative frequency, peak value occurrence number, cumbersome when judgement.
Summary of the invention
In view of this, the method and system that the purpose of this invention is to provide the slot synchronization of Cell searching in a kind of WCDMA system, the method and system not only can improve the acquisition probability of slot synchronization, make subscriber equipment (User Equipment, hereinafter to be referred as UE) the Cell searching process accurately finds the boundary of time slot of sub-district, and can determine many multipaths of same sub-district and the boundary of time slot of a plurality of neighbor cells simultaneously.
For reaching above-mentioned purpose, the invention provides the method for the slot synchronization of Cell searching in a kind of WCDMA system, may further comprise the steps:
Step 1 is at first carried out initialization to parameter;
Step 2 is made frequency deviation pre-compensation to the digitized I road and the Q circuit-switched data of input;
Step 3, for a time slot, arbitrary sampled point of setting any chip all is the boundary of time slot of a hypothesis, calculate the I data of 256 chips of each the time slot correspondence that begins from above-mentioned boundary of time slot and Q data respectively with the correlation of Primary Synchronisation Code;
Step 4 is carried out power calculation to above-mentioned correlation, and computing formula is
power＝max(|ci|，|cq|)+0.5×min(|ci|，|cq|)
Wherein, power is a power, | ci| and | cq| is respectively the mould of I data correlation value and the mould of Q data correlation value, and max represents bigger in above-mentioned two mould values one, and min represents less in above-mentioned two mould values one;
Step 5 converts the performance number of aforementioned calculation result's integer representation to performance number that floating number is represented;
Step 6, the performance number that above-mentioned floating number is represented and the previous time slot of reading from the memory performance number that adds up adds up;
Step 7, repeating step 2 are to step 6, and until the stack of finishing M time slot, wherein M is the number by the time slot that will add up of DSP configuration;
Step 8 is found out N peak-peak and corresponding sequential position thereof in all related power accumulated values of gained from step 7, N belongs to one of parameter in the step 1;
Step 9 is interrupted to the DSP application, waits for next time and handling.
Wherein, the initialization of in the step 1 parameter being carried out is provided by special DSP in the subscriber equipment or upper layer software (applications), it comprises following operation at least: preserve MRTR (Mobile Radio TimingReference, the mobile wireless clock reference) reference time value, the parameter of configuration slot synchronization process is removed the value in the last RS.Frequency deviation pre-compensation in step 2 adopts piecewise approximation phase place spinning solution.Utilize two efficient Gray code correlators of deletion to carry out the relevant treatment of I data and Q data in the step 3.Floating number in the step 5 is 16, and this floating number is made up of continuous 10 mantissa of continuous 6 exponential sums, and wherein index is a signed number, and mantissa is a unsigned number, and the highest order of mantissa is 1.
The present invention also provides the slot synchronization system of the Cell searching in a kind of WCDMA system, and it comprises at least:
The frequency deviation pre-compensation module is made frequency deviation pre-compensation to the digitized I road and the Q circuit-switched data that receive;
Related process module connects above-mentioned frequency deviation pre-compensation module, calculates the correlation of I data and Q data and Primary Synchronisation Code;
Power computation module connects above-mentioned related process module, and above-mentioned correlation is carried out power calculation;
The floating-point modular converter connects above-mentioned power computation module, converts the performance number of aforementioned calculation result's integer representation to performance number that floating number is represented;
The power accumulator module connects above-mentioned floating-point modular converter, and the performance number that above-mentioned floating number is represented and the previous time slot of reading from the memory performance number that adds up adds up;
Power memory connects above-mentioned power accumulator module, the performance number after storage adds up;
The peak value searching module connects above-mentioned power memory, finds out the sequential position of N peak-peak and correspondence thereof and it is outputed to DSP in the performance number that power memory is stored, and wherein N belongs to one of predefined parameter.
Wherein, above-mentioned related process module can be one or more and deletes efficient Gray code correlator.
The method and system of Cell searching slot synchronization in the WCDMA system that the present invention proposes, adopt the multi-slot judgement that adds up, the boundary of time slot of cell of origin accurately, improve the acquisition probability of slot synchronization, simultaneously, can make the Cell searching process determine the different multipaths of same sub-district or the different districts of different scrambling codes according to the scrambler of sub-district, the parallel pipelining process that helps Cell searching three steps search is handled.
Description of drawings
Fig. 1 is the flow chart of the method for Cell searching slot synchronization in the WCDMA system of a preferred embodiment of the present invention;
Fig. 2 is the structure chart of the system of Cell searching slot synchronization in the WCDMA system of a preferred embodiment of the present invention.
Embodiment
Be described in further detail below in conjunction with the method and system of the drawings and specific embodiments the slot synchronization of Cell searching in a kind of WCDMA of the present invention system.
The method of slot synchronization of the present invention, its core concept is: to the I of input, the related power of Q data and PSC carries out adding up of a plurality of time slots, find out N largest peaks in the sampled point related power value after all of a time slot add up then, wherein the position of largest peaks correspondence is the best boundary of time slot that inserts the sub-district, several second largest values of back may be the multipath of same sub-district or the boundary of time slot of different districts, and this second and the 3rd step according to aforementioned Cell searching is determined.
Fig. 1 is the flow chart of the slotted synchronous method of Cell searching in the WCDMA system of a preferred embodiment of the present invention, and as shown in Figure 1, this method may further comprise the steps:
Step 101, carry out initialization process, as preserving mobile radio emission and the time value that receives (Mobileradio transmit and receive is hereinafter to be referred as MRTR), required various parameters in the configuration slot synchronization process are removed value in the last RS or the like.Initialization operation enables and can be provided by special DSP among the UE or upper layer software (applications).
Step 102 is made frequency deviation pre-compensation to digitized two paths of data (I road and Q road).Wherein, 8 quantifications and 4 times of over-samplings are adopted in the digitlization of present embodiment, and frequency deviation pre-compensation adopts piecewise approximation phase place rotation compensation method.
Step 103, I, Q data after using two correlators to rotation compensation are carried out relevant treatment, and wherein, this correlator can be the efficient Gray code correlator of deletion or other correlator.
Step 104 calculates the related power value to the data after relevant by following power budget formula:
power＝max(|ci|，|cq|)+0.5×min(|ci|，|cq|)
Wherein, ci is respectively through the I after relevant with cq, the Q data, and max is a big value of asking this two paths of data mould, min is a little value of asking this two paths of data mould.
Step 105, the performance number of the integer representation that step 104 is drawn converts the performance number of floating point representation to.Floating data adopts form described below: a kind of 16 floating data, and wherein high 6 is index, low 10 is mantissa; Mantissa's highest order is 1, is a unsigned number, scope from 0 to (2
10-1); Direction that need be shifted when index has reflected normalization and figure place, scope from-32 to+31.
Step 106 is finished the performance number of current time slots and is read previous time slot the adding up of performance number of adding up from memory.The addition of above-mentioned floating-point format data is finished by following mode: first comparison index, then mantissa is adjusted to big index, the mantissa that just will have low index several bits that move to right, the bit number that moves equals the difference between the big and little index, at last with two mantissa's additions.If after the 11st bit addition is 0, so just the result of mantissa and big index are combined into the result of floating-point addition; If after the 11st bit addition is 1, just taken place after the addition to overflow, 10 bits are got in the displacement that so mantissa moved to right, but index just need add 1, equally mantissa after handling and index is made up the result who obtains the floating-point addition.
Step 107, the timeslot number of finishing appointment adds up.This is by realizing that to step 106 Repeated m time back wherein, m is the number of time slot that adds up, and is disposed by DSP to step 102.As described in step 102, the over-sampling rate of present embodiment is 4, the number that can obtain the related power value that floating-point format represents after then step 107 is finished as previously mentioned: 10 * 256 * 4 (sample rate)=10240, the result who adds up leaves in the memory.
Step 108 in 10240 related power values of storing, is found out N largest peaks and corresponding MRTR sequential position thereof from memory, then found N available boundary of time slot position, finishes the first step of many Cell searchings, and promptly time slot is synchronous.
Step 109 is interrupted to the DSP application, waits for next time and handling.
Fig. 2 is the structure chart of the system of Cell searching slot synchronization in the WCDMA system of a preferred embodiment.After the operation beginning, I, the Q data are with 4 times of spreading rate input phase rotation compensation modules 201, I data after the compensation and Q data enter the efficient Gray code correlator 202 of deletion respectively and carry out relevant treatment, I data and Q data input power computing module 203 after relevant, performance number input floating-point modular converter 204 from the integer representation of power computation module 203 output calculates the floating type performance number, and this performance number input power accumulator module 205 adds up and is stored in the power memory 206.After the power of finishing assigned timeslot adds up, utilize peak value searching module 207 to carry out peak value searching, find out maximum N peak value and corresponding MRTR sequential position thereof.At last, interrupt, wait for next time and handling to the DSP application.
The step of the slot synchronization of Cell searching has provided a kind of method of accurate cell of origin boundary of time slot in the WCDMA of the present invention system, this method simultaneously and second step and the 3rd of Cell searching go on foot and determine the different multipaths of same sub-district or the boundary of time slot of different districts.
Certainly; the present invention also can have other embodiment; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art are when making various corresponding changes and distortion according to the present invention; for example according to known technology and the understanding of the present invention; those of ordinary skill in the art can expect other replacement forms easily, but these corresponding changes and distortion all should belong to the protection range of the appended claim of the present invention.
Claims (7)
1. the method for Cell searching slot synchronization in the WCDMA system is characterized in that, may further comprise the steps:
Step 1 is at first carried out initialization to parameter;
Step 2 is made frequency deviation pre-compensation to the digitized I road and the Q circuit-switched data of input;
Step 3, for a time slot, arbitrary sampled point of setting any chip all is the boundary of time slot of a hypothesis, calculate the I data of 256 chips of each the time slot correspondence that begins from above-mentioned boundary of time slot and Q data respectively with the correlation of Primary Synchronisation Code;
Step 4 is carried out power calculation to above-mentioned correlation, and computing formula is
power＝max(|ci|，|cq|)+0.5×min(|ci|，|cq|)
Wherein, power is a power, | ci| and | cq| is respectively the mould of I data correlation value and the mould of Q data correlation value, and max represents bigger in above-mentioned two mould values one, and min represents less in above-mentioned two mould values one;
Step 5 converts the performance number of aforementioned calculation result's integer representation to performance number that floating number is represented;
Step 6, the performance number that above-mentioned floating number is represented and the previous time slot of reading from the memory performance number that adds up adds up;
Step 7, repeating step 2 are to step 6, and until the stack of finishing M time slot, wherein M is the number by the time slot that will add up of DSP configuration;
Step 8 is found out N peak-peak and corresponding sequential position thereof in all related power accumulated values of gained from step 7, N belongs to one of parameter in the step 1;
Step 9 is interrupted to the DSP application, waits for next time and handling.
2. method according to claim 1, it is characterized in that, the initialization of in the step 1 parameter being carried out is provided by special DSP in the subscriber equipment or upper layer software (applications), it comprises following operation at least: the time value of preserving the mobile wireless reference clock, the parameter of configuration slot synchronization process is removed the value in the last RS.
3. method according to claim 2 is characterized in that, the frequency deviation pre-compensation in step 2 adopts piecewise approximation phase place spinning solution.
4. method according to claim 3 is characterized in that, utilizes two efficient Gray code correlators of deletion to carry out the relevant treatment of I data and Q data in step 3.
5. method according to claim 4 is characterized in that, the floating number in the step 5 is 16, and this floating number is made up of continuous 10 mantissa of continuous 6 exponential sums, and wherein index is a signed number, and mantissa is a unsigned number, and the highest order of mantissa is 1.
6. the system of Cell searching slot synchronization in the WCDMA system is characterized in that, comprises at least:
The frequency deviation pre-compensation module is made frequency deviation pre-compensation to the digitized I road and the Q circuit-switched data that receive;
Related process module connects above-mentioned frequency deviation pre-compensation module, calculates the correlation of I data and Q data and Primary Synchronisation Code;
Power computation module connects above-mentioned related process module, and above-mentioned correlation is carried out power calculation;
The floating-point modular converter connects above-mentioned power computation module, converts the performance number of aforementioned calculation result's integer representation to performance number that floating number is represented;
The power accumulator module connects above-mentioned floating-point modular converter, and the performance number that above-mentioned floating number is represented and the previous time slot of reading from the memory performance number that adds up adds up;
Power memory connects above-mentioned power accumulator module, the performance number after storage adds up;
The peak value searching module connects above-mentioned power memory, finds out the sequential position of N peak-peak and correspondence thereof and it is outputed to DSP in the performance number that power memory is stored, and wherein N belongs to one of predefined parameter.
7. system according to claim 6 is characterized in that, above-mentioned related process module can be one or more and deletes efficient Gray code correlator.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2010009670A1 (en) * | 2008-07-21 | 2010-01-28 | 中兴通讯股份有限公司 | Method and device for determining the synchronization sequence code of the cell and the location of the code |
| CN101888258A (en) * | 2010-06-02 | 2010-11-17 | 航天恒星科技有限公司 | Time slot synchronous system and method of GEO satellite mobile communication based on 3G under high dynamic environment |
| CN104993844A (en) * | 2015-06-29 | 2015-10-21 | 和芯星通科技(北京)有限公司 | Method and device for searching frequency domain |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2367211B (en) * | 2000-09-20 | 2004-03-17 | Nec Technologies | Slot timing and frequency offset correction in a direct sequence spread spectrum communications receiver |
| CN1848704B (en) * | 2005-04-15 | 2010-10-13 | 展讯通信（上海）有限公司 | Cell searching method and apparatus in WCDMA system |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2010009670A1 (en) * | 2008-07-21 | 2010-01-28 | 中兴通讯股份有限公司 | Method and device for determining the synchronization sequence code of the cell and the location of the code |
| CN101888258A (en) * | 2010-06-02 | 2010-11-17 | 航天恒星科技有限公司 | Time slot synchronous system and method of GEO satellite mobile communication based on 3G under high dynamic environment |
| CN101888258B (en) * | 2010-06-02 | 2014-04-02 | 航天恒星科技有限公司 | Time slot synchronous system and method of GEO satellite mobile communication based on 3G under high dynamic environment |
| CN104993844A (en) * | 2015-06-29 | 2015-10-21 | 和芯星通科技(北京)有限公司 | Method and device for searching frequency domain |
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Effective date of registration: 20151027 Address after: Dameisha Yantian District of Shenzhen City, Guangdong province 518085 Building No. 1 Patentee after: SHENZHEN ZTE MICROELECTRONICS TECHNOLOGY CO., LTD. Address before: 518057 Nanshan District high tech Industrial Park, Guangdong, South Road, science and technology, ZTE building, legal department Patentee before: ZTE Corporation |
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Application publication date: 20080507 Assignee: Xi'an Chris Semiconductor Technology Co. Ltd. Assignor: SHENZHEN ZTE MICROELECTRONICS TECHNOLOGY CO., LTD. Contract record no.: 2019440020036 Denomination of invention: WCDMA subdistrict searching time slot synchronization method and system Granted publication date: 20120711 License type: Common License Record date: 20190619 |