CN101160723B - System and method for tri-level logic data shuffling for oversampling data conversion - Google Patents

System and method for tri-level logic data shuffling for oversampling data conversion Download PDF

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CN101160723B
CN101160723B CN200680012171XA CN200680012171A CN101160723B CN 101160723 B CN101160723 B CN 101160723B CN 200680012171X A CN200680012171X A CN 200680012171XA CN 200680012171 A CN200680012171 A CN 200680012171A CN 101160723 B CN101160723 B CN 101160723B
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data
thermometer
output
negative
shuffle device
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CN101160723A (en
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K·Q·纽耶恩
R·舒瑞尔
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Analog Devices Inc
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Analog Devices Inc
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0634—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale
    • H03M1/0656—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the time domain, e.g. using intended jitter as a dither signal
    • H03M1/066—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the time domain, e.g. using intended jitter as a dither signal by continuously permuting the elements used, i.e. dynamic element matching
    • H03M1/067—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the time domain, e.g. using intended jitter as a dither signal by continuously permuting the elements used, i.e. dynamic element matching using different permutation circuits for different parts of the digital signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0675—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
    • H03M1/0678—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components
    • H03M1/068—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS
    • H03M1/0682—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS using a differential network structure, i.e. symmetrical with respect to ground
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • H03M1/742—Simultaneous conversion using current sources as quantisation value generators
    • H03M1/747—Simultaneous conversion using current sources as quantisation value generators with equal currents which are switched by unary decoded digital signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/50—Digital/analogue converters using delta-sigma modulation as an intermediate step
    • H03M3/502—Details of the final digital/analogue conversion following the digital delta-sigma modulation

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Communication Control (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

A system is disclosed for processing digital signals in a data converter. The system includes a thermometer encoder (12) for receiving signed binary data and for providing signed thermometer data. The signed thermometer data includes positive thermometer data and negative thermometer data. The system also includes a shuffler (18) that receives positive input data responsive to the positive thermometer data and receives negative input data responsive to the negative thermometer data. The system also includes a decoder (20) for receiving output data from the shuffler and providing decoded data to an analog output stage.

Description

Be used for the system and method that the tri-level logic data of over-sampling data transaction are shuffled
Technical field
The present invention relates generally to the mixed signal transducer of ∑-Δ noise shaping type, relate in particular to the mixed signal digital to analog converter that uses even weighted elements.
Background of invention
It is a kind of to compare the means that relatively low one-tenth was realized high-resolution and low distortion originally with conventional Nyquist transducer that ∑-Δ digital to analog converter (DAC) provides.In typical multidigit noise-shaped oversampled DAC, at first input promotes sampling to numeral than (OSR) by over-sampling, and it is carried out filtering with the outer image of rejection band.Then, use sigma-delta modulator to be reduced to manageable size with word is wide, simultaneously with the noise shaping in the frequency band in higher frequency range.Use binary system to convert binary data to thermometer-code data to thermometer encoder.For example, United States Patent (USP) 5,404,142 have disclosed a kind of data-directed scramble technology, and the prefix through noise shaping that wherein quantizes is converted into thermometer code earlier.Then, use data-directed shuffle device (shuffler), dynamically to select a set of pieces of output stage.The number of selected element equals the number of efficient temperature meter code.Then, according to the decision of shuffle device, analog output stage is through connecting selected that set of pieces, converts the output of shuffle device to analog quantity.
The thermometer code DAC of prior art comprises current steering part and I-V transducer, and this I-V transducer comprises the DAC unit drive that is used to control BIT and BIT (or BITB) signal.Be designed to a V on common mode voltage through crosspoint with BIT and BITB signal Gs, it is minimum that the intersymbol interference (ISI) in the DAC unit output waveform will reach.V GsBe defined by the grid-source voltage of a half DAC switch that ought conduct output current separately.
Because the true total defectiveness of device will not be so current unit will can accurately mate.This mismatch problems makes has harmonic distortion and noise in the analog signal that constructs again.Thus, the performance of transducer is subject to the coupling of these elements.Commercially available silicon treatment process is merely able to provide 12 the coupling of calibrating or repairing of need not.
This component mismatch has been carried out studying fully and proposed many methods to convert this mismatch error to the frequency spectrum shaping noise.Through this mismatch error is shaped to out-of-band frequency range, the signal to noise ratio (snr) of transducer and dynamic range (DNR) all are greatly improved.In these methods, use shuffle device (sometimes also being called as scrambler), dynamically to select a set of pieces, make that As time goes on each element all obtains being equal to utilization to each digital input code.This means that each first integral to the difference between the element is zero, therefore, is equivalent to single order noise shaping ∑-Δ transducer.Unique difference is, in normal ∑-Δ transducer amplitude error through noise shaping, and in data shuffler the error in the use of this element through noise shaping.United States Patent (USP) 6,614,377 have disclosed an example of prior art butterfly shuffle device.Yet the shortcoming of conventional thermometer code current steering dac is a thermal noise performance.Particularly, when data are zero, be connected to a summing junction of I-V transducer in the half the switchable current source, second half then is connected to other summing junction.In addition, top current sources always is connected to summing junction.These current sources are the main noise sources in the DAC output and have indicated the SNR of this transducer.
Another kind does not have the conventional DAC architecture of above-mentioned noise problem to comprise tri-level logic thermometer current steering dac, and it comprises a pair of current source that is used for each of 0-15 (positive with negative).Because each can be connected to summing junction with three kinds of different modes to current source, so each is to contributing the positive quantity of electric charge, the negative quantity of electric charge or basic not contribution.When data were zero, all current sources all were connected to buffer amplifier to keep its appropriate drain voltage.Therefore, the main noise source of transducer is now just from the I-V amplifier, and is much smaller through designing this situation than above-mentioned current source.Therefore, SNR has obtained significant raising.Yet the difficulty of this architecture is that it can produce above-mentioned component mismatch equally.The element shuffle device of prior art is not suitable for this architecture, because they can only shuffle " 1 " and " 0 ".
Therefore, need a kind of modified model ∑-Δ noise shaping DAC that can further reduce component mismatch.
Summary of the invention
According to an execution mode, the invention provides a kind of system that is used in the data converter processing digital signal.This system comprises the thermometer encoder that is used to receive signed binary data and is used to provide signed thermometer data.Signed thermometer data comprises positive thermometer data and negative thermometer data.This system also comprises shuffle device, and this shuffle device receives in response to the positive input data of positive thermometer data and receives the negative input data in response to negative temperature counting certificate.This system also comprises decoder, is used to receive from the dateout of shuffle device and with decoded data offer analog output stage.This system also comprises positive data barrel shifter, inserts between said thermometer encoder and said shuffle device; And negative barrel shifter, insert between said thermometer encoder and said shuffle device.
According to another execution mode, the invention provides a kind of system that is used in the data converter processing digital signal, this system comprises thermometer encoder, shuffle device and decoder.This thermometer encoder is used to receive signed binary data, and is used to provide signed thermometer data.This shuffle device receives signed thermometer data and tri-level logic output is provided, and this output comprises positive status output, negative state output and nought state output.This decoder is used to receive from the dateout of shuffle device and with decoded data and is provided to analog output stage.This system also comprises positive data barrel shifter, inserts between said thermometer encoder and said shuffle device; And negative barrel shifter, insert between said thermometer encoder and said shift unit.
According to another execution mode, the invention provides a kind of in data converter the method for processing digital signal, this method comprises the steps: to receive signed binary data at the thermometer encoder place; Signed thermometer data is provided; Receive signed thermometer data at the shuffle device place; The tri-level logic output that comprises positive status output, negative state output and nought state output is provided; Reception is from the dateout of shuffle device at the decoder place; And decoded data are offered analog output stage.Wherein provide the step of tri-level logic output to comprise: when current source all is coupled to the output of reference voltage buffer, nought state output to be provided.
Description of drawings
Can do further to understand to following description with reference to accompanying drawing, wherein:
Fig. 1 shows the functional block diagram of system according to an embodiment of the present invention;
Fig. 2 A-2C shows the diagram function of 3 barrel shifters according to an embodiment of the present invention and describes;
Fig. 3 shows the diagram function view of the thermometer logic encoder of 3 signed according to an embodiment of the present invention;
Fig. 4 shows the diagrammatic view that according to an embodiment of the present invention tri-level logic shuffles the unit;
Fig. 5 shows the truth table that shuffles the unit according to an embodiment of the present invention;
Fig. 6 shows the diagrammatic view of 3 tri-level logic shuffler according to an embodiment of the present invention;
Fig. 7 shows the diagrammatic view of 4 tri-level logic shuffler of another execution mode according to the present invention;
Fig. 8 shows the sketch map of DAC unit according to an embodiment of the present invention;
Fig. 9 shows the sketch map based on the DAC unit drive of NOR gate according to an embodiment of the present invention;
Figure 10 shows the sketch map based on the DAC unit drive of NAND gate of according to the present invention another execution mode;
Figure 11 show and mismatch be the diagram that is used for the emulation of 4 second order DAC under 0.5% the situation; And
Figure 12 shows the diagram of the emulation of Figure 11 under the situation of-60dBFS input.
These accompanying drawings only are used for explanation.
Embodiment
The invention provides a kind of shuffle device that can handle "+1 ", " 0 " and " 1 " or tri-level logic data; A kind of DAC unit drive also is provided especially, and this driver can produce three kinds of signals that are used for driving BIT, BITB and ZERO makes the ISI of output waveform reach minimum simultaneously.
The invention provides tri-level logic thermometer (signed thermometer) encoder, shuffle device, control logic decoder and DAC unit drive.The function of tri-level logic thermometer encoder is that signed binary data coding is become signed thermometer code.The function of control logic decoder is to decode the output of the shuffler into the control signal that is used for output stage.The function of shuffle device is to shape the mismatch error in the outer frequency range of frequency band.Fig. 1 shows the block diagram of system 10 according to an embodiment of the present invention.
As shown in Figure 1; Signed binary data is received by signed binary system thermometer encoder 12, and this encoder 12 offers signed thermometer data random barrel shifter 14 that is used for correction data and the random barrel shifter 16 that is used for negative data. Random barrel shifter 14 and 16 output are provided for tri-level logic shuffler 18 respectively, and shuffle device 18 exported signedly be provided for control logic decoder 20 through the thermometer data of shuffling, this decoder 20 provides control signal to DAC.
Element u iMismatch error be defined by mean values poor of element actual value and all elements.Specifically, for N-component temperature meter DAC, element u iError be:
e i = u i - 1 N Σ k = 0 N - 1 u k
Working as data each time is "+1 " and element u iWhen selected, the error that contributes to this output is exactly+e iWorking as data each time is " 1 " and element u iWhen selected, the error that contributes to this output is exactly-e iWhen data are zero, in this specific clock cycle by element u iThe error of contribution is zero.
Shuffle device has two kinds of functions.At first, it selects these elements, makes that the average contribution of error of each element is zero.The second, other element of average operating position and all of each element is compared and is kept impartial.First function is to be realized by according to an embodiment of the present invention shuffler cell, and second function is to be connected by the butterfly in the whole shuffle device to realize.Through with the data-directed mode operating position of these elements being shuffled, mismatch error just is converted into noise and is shaped in the out-of-band frequency range.
The present invention also provides two kinds of barrel shifters being controlled by randomizer.These tubular shift units are used for the digital input signals of shuffle device is carried out the decorrelation processing, make shuffler cell not produce not busy sound (idle tone).Fig. 2 A, 2B and 2C show when data be 3 and the operating process of displacement 3 random barrel shifter when being 0,2 and 6 respectively.For example, in Fig. 2 A, data are code 3 (as among the figure shown in 22), and the displacement that pseudo-random generator produced control is 0, and these data will occupy 3 of bottoms.When displacement control greater than 0 the time, data will move up the position (such as 2 or 6 positions shown in 24 and 26 among Fig. 2 B and the 2C) of corresponding number and if necessary (such as that kind shown in Fig. 2 C) will unroll.
Fig. 3 shows the thermometer logic encoder 30 of 3 signed, and the description about code is provided simultaneously for purposes of illustration.The input data are signed binary data (comprising sign bit data [2] and amplitude bit data [1] and zero-bit data [0]), and dateout is signed thermometer data (comprising pos_out [0], pos_out [1], pos_out [2], neg_out [0], neg_ou [1], neg_out [2] and neg_out [3]).As in the code shown in 32, positive output and negative output all at first are initialized as 0, and then, according to the value data of input, to be established (assert) be 1 such positive output position or negative output position shown in 34 and 36 in the image pattern.Have the situation that positive output and negative output all are asserted never, because this has represented illegal condition.
Fig. 4 shows the sketch map of shuffler cell 40 according to an embodiment of the present invention.Shuffler cell 40 comprises d type flip flop 42 and 44, and they are respectively at input 46 and 48 place's receive clock input signals and current_state_a and current_state_b signal.Trigger 42 and 44 Q output are provided for NOR gate 50 and 52, and the Q that also has other each trigger as shown in the figure that provides together exports.The Q output of trigger 42 provides next_state_a, and the Q output of trigger 44 then provides next_state_b.The output of NOR gate 50 is provided for XOR (XOR) door 54, the a_in_pos data in addition that provide together, and the output of NOR gate 52 is provided for XOR gate 56, the a_in_neg data in addition that provide together.The output of XOR gate 54 is provided for XOR gate 58, the b_in_pos data in addition that provide together, and the output of XOR gate 56 is provided for XOR gate 60, the b_in_neg data in addition that provide together.The output of XOR gate 58 is provided for and door 62 and NAND gate 64.The output of XOR gate 60 is provided for and door 66, and is provided for NAND gate 64.The output of NAND gate 64 is provided for the input with door 62 and 66.Offered the D input 46 and 48 of trigger 42 and 44 respectively with the output of door 62 and 66.
The a/b equilibrium that is used for positive circuit and negative circuit is provided by adder 72,74,76 and 78.Particularly, the swap_pos signal is provided in the output of XOR gate 54 so that the signal Synchronization of adder 70 and 72, and the swap_neg signal is provided XOR gate 56 so that the signal Synchronization of adder 74 and 76.
The operation of shuffler cell 40 is following.At the rising edge of this clock, state variable state_a and state_b obtain upgrading.In 2 positive outputs which variable state_a write down and before once used, and in 2 negative outputs which state_b then write down and before once used.Specifically, if state_a is 1, then before once used a_out_pos.Equally, if state_b is 1, then before once used a_out_neg.When state_a and state_b were 1, their expression a_out_pos and a_out_neg before once used, and this means that the error that the element that is connected to a_out_pos and a_out_neg is contributed averages out and equals zero.
80 places among Fig. 5 show the truth table of effective numerical value of the logical circuit of the shuffler cell 40 that is used for Fig. 4.Although always have 64 kinds of input combinations, some combination is nonlicet, equals 1 simultaneously because they have positive and negative input (all being 1) or state_a and state_b simultaneously.82 places show effective input and possibly make up among the figure, and 84 places show effectively and possibly export combination among the figure.
Fig. 6 shows 3 tri-level logic shuffler, and it receives 8 row inputs and produces 8 line outputs.This unit uses butterfly to connect, and wherein paired data line image pattern shows such cross-couplings.Particularly, this circuit comprises crosspoint 90, and it receives input data n eg_in [3], pos_in [3], neg_in [2] and pos_in [2].Crosspoint 92 receives input data n eg_in [1], pos_in [1], neg_in [0] and pos_in [0].A_in_neg that is directly transferred to unit 94 from the a_out_neg data and the a_out_pos data of unit 90 and a_in_pos input, and import from a_in_neg and the a_in_pos that b_out_neg data and the b_out_pos data of unit 90 are crossed to unit 96.From b_in_neg and b_in_pos input that the a_out_neg data and the a_out_pos data of unit 90 are crossed to unit 94, the b_in_neg and the b_in_pos that are then directly transferred to unit 96 from b_out_neg data and the b_out_pos data of unit 90 import.
Fig. 7 shows 4 tri-level logic shuffler circuit, and it receives 8 pairs of inputs and produces 8 pairs of outputs.This circuit comprises crosspoint 100,102,108 and 110, and they work as the circuit of preceding text combination Fig. 6 is described.This circuit also comprises unit 104,106,112 and 114, and they also work as describing above with reference to Fig. 6.The second level also is provided in the circuit of Fig. 7, and wherein b_out_neg and b_out_pos data are directly offered unit 116,118,120 and 122, and a_out_neg and a_out_pos data are then intersected.Particularly, the a_out_neg of unit 108 and a_out_pos data are crossed to the a_in_neg and the input of a_in_pos data of unit 120; The a_out_neg of unit 110 and a_out_pos data are crossed to the a_in_neg and the input of a_in_pos data of unit 122; The a_out_neg of unit 112 and a_out_pos data are crossed to the a_in_neg and the input of a_in_pos data of unit 116; And the a_out_neg of unit 114 and a_out_pos data are crossed to the a_in_neg and the input of a_in_pos data of unit 118.Because each shuffle device has 4 outputs, so it will be connected to 2 pairs of push-pull current cells.
Fig. 8 shows DAC unit 130 according to an embodiment of the present invention; It comprises amplifier 132, positive current source 134, negative current source 136 and switch 138,140,142,144,146 and 148, and BIT_PMOS, BITB_PMOS, BITB_NMOS and BIT_MOS that they are used to provide as shown in the figure export.
Fig. 9 shows DAC unit 150 according to an embodiment of the present invention, and it has used the design based on NOR gate.Particularly, circuit 150 comprises NOR gate 152,160,162 and 164 and buffer 154,156,158,168,172 and 176 and inverter 166,170 and 174.Figure 10 shows DAC unit 180 according to an embodiment of the present invention, and it uses the design based on NAND gate.Particularly, this circuit 180 comprises NOR gate 182 and NAND gate 190,192 and 194, also comprises buffer 184,186,188,196,200,204 and inverter 198,202 and 206.
Figure 11 shows the output spectrum figure of 4 DAC of second order of tri-level logic data-directed shuffle device according to an embodiment of the present invention.This DAC has 16 unit elements, and they have the mismatch error of 0.5%rms.Figure 11 shows at the 40dB/dec of the second-order noise reshaper at 210 places and at the 20dB/dec of the component mismatch noise shaping at 212 places.Figure 12 shows same transducer-60dBFS output.Particularly, Figure 12 shows at-100 of 214 places and arrives-50dBFS, and its peak value is illustrated in 216 places, and 220 places show the simulation result that has component mismatch, and 218 places then show the desired result of not being with component mismatch.Figure 11 and the 12 noise shaping effects with shuffle device are shown as the 20dB/dec slope of spectrogram.
Therefore, in various execution modes, the invention provides a kind of method that from signed binary data input, produces signed thermometer data output, wherein this method comprises the step that produces two thermometer data outputs; One corresponding to the positive input data, and another is then corresponding to negative input data.In other embodiments, the invention provides a kind of that be used to align and negative thermometer data group and carry out the method for preparatory randomization, and may further include following steps: produce pseudo random number; And utilize this pseudo random number to control two barrel shifters so that in barrel shifter, move the position of thermometer data word.
According to another execution mode, the invention provides a kind of method of before signed thermometer data gets into shuffle device, these data being divided into groups earlier, this method comprises the steps: positive thermometer data is divided into two groups; And negative thermometer data is divided into two groups.
According to another execution mode, the invention provides a kind of method that signed thermometer data is shuffled, this method comprises the steps: to produce shuffler cell; Produce state variable, and in shuffler cell, produce the exchange control signal based on previous state variable and current input; The input of shuffler cell is directly connected to above-mentioned output; Perhaps the numerical value according to the exchange control signal exchanged these inputs earlier before input being connected to output.
According to another execution mode, the invention provides signed thermometer data shuffler cell, it comprises: the thermometer data input that aligns; A pair of negative thermometer data input; The one thermometer data output that aligns; A pair of negative thermometer data output; And digital signal and reset signal.
According to another execution mode, the present invention also provides: the positive output of previous shuffler cell is right to the positive input that can be connected to shuffler cell at the back; And the negative output of previous shuffler cell is right to the negative input that can be connected to shuffler cell at the back; Wherein above-mentioned butterfly connection is all followed in two kinds of connections.
According to another execution mode, the invention provides a kind of method that the output of shuffle device is decoded, this method comprises the steps: from positive and negative input, to produce new control signal, and wherein this control signal is established when two kinds of inputs are all low; Positive input is connected to pair of switches; And the input that will bear is connected to pair of switches.
According to another execution mode, the invention provides the method that a kind of drain voltage that is used to make current source remains on a known level place, this method comprises the steps: when input control signal all is zero, and current source is connected to the output of reference voltage buffer.
One skilled in the art will appreciate that under the situation that does not deviate from the spirit and scope of the present invention and can make various changes and modification above-mentioned each execution mode.

Claims (14)

1. system that is used in the data converter processing digital signal, said system comprises:
Thermometer encoder is used to receive signed binary data and signed thermometer data is provided, and said signed thermometer data comprises positive thermometer data and negative thermometer data;
Shuffle device receives the positive input data in response to positive thermometer data, and receives the negative input data in response to negative thermometer data;
Decoder is used to receive from the dateout of said shuffle device and with decoded data and offers analog output stage; And
Positive data barrel shifter inserts between said thermometer encoder and said shuffle device; And negative barrel shifter, insert between said thermometer encoder and said shuffle device.
2. the system of claim 1 is characterized in that, said thermometer encoder comprises: the first positive dateout node is used to the thermometer data that provides positive; And negative output node, be used to the thermometer data that provides negative.
3. the system of claim 1; It is characterized in that; Said shuffle device comprises a plurality of shuffler cell; Each shuffler cell all receives two pairs of inputs and two pairs of outputs is provided, and second shuffler cell is coupled in a pair of output in wherein said two pairs of outputs, and another then is coupled to the 3rd shuffler cell to output.
4. system as claimed in claim 3 is characterized in that, said shuffle device receives four pairs of data inputs and four pairs of data outputs are provided.
5. system as claimed in claim 3; It is characterized in that each described shuffler cell all comprises the thermometer data input, thermometer data output, a pair of negative thermometer data output, clock signal and the reset signal that a pair of negative thermometer data input, aligns that align.
6. the system of claim 1 is characterized in that, said analog output stage comprises the tri-level logic output driver, and it provides positive output, negative output and zero output.
7. system as claimed in claim 3 is characterized in that, each described shuffler cell all comprises trigger.
8. system that is used in the data converter processing digital signal, said system comprises:
Thermometer encoder is used to receive signed binary data and signed thermometer data is provided;
Shuffle device receives said signed thermometer data and the tri-level logic output that comprises positive state output, the state output of bearing and nought state output is provided;
Decoder is used to receive from the dateout of said shuffle device and with decoded data and is provided to analog output stage; And
Positive data barrel shifter inserts between said thermometer encoder and said shuffle device; And negative barrel shifter, insert between said thermometer encoder and said shuffle device.
9. system as claimed in claim 8 is characterized in that, said signed thermometer data comprises positive thermometer data and negative thermometer data.
10. system as claimed in claim 8; It is characterized in that; Said shuffle device comprises a plurality of shuffler cell; Each shuffler cell all receives two pairs of inputs and two pairs of outputs is provided, and second shuffler cell is coupled in a pair of output in wherein said two pairs of outputs, and another then is coupled to the 3rd shuffler cell to output.
11. system as claimed in claim 10 is characterized in that, said shuffle device receives four pairs of data inputs and four pairs of data outputs is provided.
12. system as claimed in claim 10; It is characterized in that each described shuffler cell all comprises the thermometer data input, thermometer data output, a pair of negative thermometer data output, clock signal and the reset signal that a pair of negative thermometer data input, aligns that align.
13. system as claimed in claim 8 is characterized in that, said shuffle device is used for: when said nought state output was provided by said shuffle device, current source all was coupled to the output of reference voltage buffer.
14. a method that is used in the data converter processing digital signal, said method comprises the steps:
Receive signed binary data at the thermometer encoder place;
Signed thermometer data is provided;
Receive said signed thermometer data at the shuffle device place;
Provide and comprise that positive state output, negative state are exported and the tri-level logic output of nought state output;
Reception is from the dateout of said shuffle device at the decoder place; And
Decoded data are provided to analog output stage,
The said step of tri-level logic output that provides comprises: when current source all is coupled to the output of reference voltage buffer, nought state output is provided.
CN200680012171XA 2005-04-18 2006-04-13 System and method for tri-level logic data shuffling for oversampling data conversion Expired - Fee Related CN101160723B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/108,443 2005-04-18
US11/108,443 US7079063B1 (en) 2005-04-18 2005-04-18 System and method for tri-level logic data shuffling for oversampling data conversion
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