CN101138049A - Method for operating a passive matrix-addressable ferroelectric or electret memory device - Google Patents

Method for operating a passive matrix-addressable ferroelectric or electret memory device Download PDF

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Publication number
CN101138049A
CN101138049A CNA200580048952XA CN200580048952A CN101138049A CN 101138049 A CN101138049 A CN 101138049A CN A200580048952X A CNA200580048952X A CN A200580048952XA CN 200580048952 A CN200580048952 A CN 200580048952A CN 101138049 A CN101138049 A CN 101138049A
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unit
voltage
refresh
pulse
word line
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C·卡尔森
G·古斯塔夫森
M·约翰逊
P·桑德斯特龙
P·-E·诺达尔
H·G·古德森
J·卡尔森
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FILM ELECTRONIC Co Ltd
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G11C11/221—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements using ferroelectric capacitors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G11C11/225—Auxiliary circuits
    • G11C11/2259—Cell access
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G11C11/225—Auxiliary circuits
    • G11C11/2273—Reading or sensing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G11C11/225—Auxiliary circuits
    • G11C11/2275—Writing or programming circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G11C11/225—Auxiliary circuits
    • G11C11/2293—Timing circuits or methods

Abstract

In a method for operating a passive matrix-addressable ferroelectric or electret memory device, a voltage pulse protocol based on a 1/3 voltage selection rule is used in order to keep disturb voltages at minimum, the voltage pulse protocol comprising cycles for read and write/erase bases on time sequence of voltage pulses with defined parameters. The method comprises a refresh procedure wherein cells for refresh are selected and refresh requests processed by a memory device controller, the refresh requests are monitored and processed in regard of ongoing or scheduled memory operations, and refresh voltage pulses with defined parameters are applied to the memory cells selected for refresh, while simultaneously ensuring that non-selected memory cells are subjected to zero voltage or voltages which do not affect the polarization state of these cells.

Description

Be used to operate the method for passive matrix-addressable ferroelectric or electret memory device
Technical field
The present invention relates to a kind of method that is used to operate passive matrix-addressable ferroelectric or electret memory device, wherein, described memory device comprises the one or more arrays or the matrix of the storage unit that demonstrates the ferroelectric of hysteresis or electret film polarizable material, particularly ferroelectric or electret polymer thin form membrane; With first and second groups of corresponding parallel poles, wherein, to provide first group the electrode that forms word line (WL) in the device with the vertical substantially relation of second group the electrode that forms device neutrality line (BL), wherein, described first and second groups electrode is configured to directly or indirectly contact the membraneous material of storage unit, thereby the polarized state in single storage unit can be by being read out on each electrode that suitable voltage is applied to described first and second groups of electrodes respectively, wipe or write, wherein this method is implemented voltage pulse protocol based on 1/3rd voltage selective rules, thereby the unit that is not addressed stands about 1/3 the interference voltage that does not surpass switching voltage Vs at its two ends, wherein, this voltage pulse protocol comprises readout interval and write/erase cycle, it has predetermined amplitude respectively, the sequential of the potential pulse of polarity and length, wherein, if data are read out from storage unit, then described readout interval comprises one group of voltage difference is applied to described first and second groups of electrode corresponding electrode, and the wherein said write/erase cycle comprises the step that is used for another group voltage difference is applied to described first and second groups of electrode corresponding electrode.
Background technology
Aforesaid related device structure is known in the art, and is commonly referred to as the passive matrix addressing storer.As shown in fig. 1, it is usually by making two groups of parallel pole m k(k=1 → x), n 1(1=1 → y) the common intersection mutually in the mode of quadrature implements, can be by coming electric separately crosspoint matrix of visiting from the suitable electrode of matrix edge selective excitation to produce.Function (for example storage) dielectric layer S ferroelectric or electret is provided between these electrode groups or the top, so that capacitor-like structure 2 K1(as storage unit) is formed between electrode m, n intersection point or in the material at intersection point place.This is shown specifically in Fig. 2, and wherein the unit 2 K1Be formed at electrode m respectively kAnd n 1Between overlapping region 3 and 4 in.The selection of independent unit is in shown in Fig. 3 in matrix.Secundum legem uses, and therefore each horizontal electrode is called as word line (WL), and each vertical electrode is known as bit line (BL).And, be used for electric separation and select the electrode of the unit group of individual unit or matrix and be known as active word line (AWL) and active bit line (ABL).When electric potential difference being applied between AWL and the ABL, the ferroelectric or electret in selected unit is subjected to electric field, and this electric field produces follows the tracks of B-H loop or its a part of polarization response (referring to following) usually.By handling the direction and the size of electric field, storage unit can be in required polarized state corresponding to certain logical value.Caused simplification to be made and high density of intersection points to the passive addressed of such configuration.
Use ferroelectric or electret as storage medium with the non-volatile memory device of being discussed of giving, this is because it is not applying the ability that voltage or electric current keep logic state to the situation of memory device.What ferroelectric this attribute was especially known has also attempted using it in the prior art memory device.It is based on the following fact, and promptly these electric polarizable material are at the balanced orientation that does not have to have under the situation of external electrical field at least two spontaneous polarization vectors.The spontaneous polarization vector can switch between these two orientations by electric field.Think that one in the polarized state is that logical one and another state are logical zeroes.With reference to figure 4, the material with as directed hysteresis loop changes its polarised direction when applying electric field, and this electric field has exceeded coercive field E C(for convenience's sake, show have the voltage of crossing over this unit but not along the hysteresis loop of the field of abscissa axis).No matter when storage unit stands nominal switched voltage V SCan both obtain saturated polarization P SWhen applying voltage drop being low to moderate zero, polarization will be followed B-H loop and at residual induction P RThe place finishes.According to the polarity of applying voltage, this null field point can be among the figure polarized state that is labeled as " 1 " or " 0 ", and it represents two addressable logic states of this unit.
The shape that should be noted that B-H loop can depend on ferroelectric or electret by this curve round-robin speed, and depend on the characteristic of electrode that is used to produce ferroelectric cell, and other factors (for example, temperature).Especially, in view of when demonstrate with a lot of materials of low speed circulation time to Fig. 4 in similar B-H loop, therefore along with the voltage switch speed increases, significantly coercive field can increase and significantly the remanent magnetism polarization can become still less.On the contrary, under low-down switch speed, significantly coercive field can reduce greatly or be approaching zero, especially under the situation of the pure electret that polarization is not had ferroelectric contribution.And existing on electrode or low-dielectric constant layer (for example, because with electret or ferroelectric material electrodes in contact chemical reaction at the interface) occurring to increase tangible coercive field.This is hinting, term " coercive field " or " coercive voltage " and " remanent magnetism polarization " be when being appreciated that in the presentation graphs 4 amount accordingly with hereinafter the time, occurs being adopting during the instruction of this document under the dominant concrete operations condition as them.
Existence is about some problems of polarizable material, and promptly tired (fatigue), impression (imprint) and interference must be studied described polarizable material to make commercial available device.
Tired because the switching that repeats of polarised direction in the given storage unit causes, thereby switchable polarization reduces gradually and finally becomes too little and can not allow the proper operation of storer.This phenomenon is known, and has the scope of remedying in the prior art.Yet, present remedy normally specific and be not enough to provide the material of the fatigue resistence in the commercial available device.
Impression influences storage unit, and described storage unit is allowed to remain on given logic state a period of time.It will itself show as the variation of switching characteristic, thereby B-H loop moves, so as to increase when polarised direction is switched to impressing with this material during the coercive field perceived in the opposite direction the time of place side.In other words, this polarization is tended to be stuck on the direction that allows its static certain hour.
Disturb be given polarized state under polarization loss in the ferroelectric or electret storage unit for preparing relevant, when having in opposite direction the disturb voltage pulses of polarity of (that is, in some sense with the polarize direction of this unit of opposite being easy to of its direction that has been produced) when this unit is exposed to.Even when this interference voltage is in coercive field correspondingly under those, repeated exposure also can cause storage medium to suffer local the switching, and this part is switched and caused polarization loss.The degree that switch this part depends on material behavior, but finally can make remanent magnetism polarized state P rWith-P rDegenerating to leads to errors reads result's degree.
In the middle of aspect above-mentioned three problems, tired be stamped in all types of ferroelectric and electret storage organizations in be relevant, promptly adopt in one or more transistorized devices (below be called active-matrix device) and in aforesaid passive matrix device in each storage unit.Remedying of instruction in the prior art comprises the strategy that is used to delay or reduces the generation of tired and impression, and is used for recovering in unit fatigue and impression storage medium at first or be subjected to the method and apparatus of the state of little effect.Latter's process is called " refreshing " usually jointly.
Before proceeding, should emphasize the present invention relates to the prior art volatile memory in different the refreshing of employed type, the DRAM different as type, wherein the general every 64msec of storage unit is refreshed.Carry out the type " " memory refress to be to compensate the loss that contains institute's stored charge in the dielectric capacitor of linear high ε usually, guarantees to keep the logical value of being stored in each storage unit thus for routine.Usually, once do not refresh whole storer, this is because this can cause stop (stall) of the great fluctuation process of power and request of data.In order to address this problem, this refresh cause at every turn 64msec for example the refresh cycle/be divided into delegation/block storage during line number.
In the ferroelectric memory of active array type, opposite with passive matrix type is main such as problem tired and impression, and need refreshes, the two all is used for the volatibility polarization is remained on proper level, but also is used to recover the characteristic of ferro-electric storage material.
In U.S. Patent No. 5550770 (Kuroda), in the active matrix piece addressing structure of 1T-NC type, memory device is made of ferroelectric memory cell array, and it is demonstrated specially to containing ceramic ferroelectrics such as BaTiO or PZT.In order to allow the Vs/2 selection scheme of simple Vs list, N is low number, for example N=8.Because it is to be considered to cause the write operation that need refresh, so each storage block all has counter, and it is used to remember the write operation number of finishing before implementing to force to refresh.This reads by the destructiveness of at first carrying out all unit of storage block and data storage is implemented elsewhere temporarily.Afterwards, all unit of storage block all are exposed to than writing under the high voltage of voltage, to realize refreshing by reduction (re-poling) again.At last, the data of interim storage are write back (write back) so that only switch polarization for these unit that also are not in required polarized state this moment.The explanation of reading except refresh voltage should be higher than in standard/using in the write-access, Kuroda for suitable selection refresh voltage pulse parameter for example pulse shape, cycle, superpotential degree, polarity moves (if any), number or latent period that example or instruction are not provided.
In U.S. Patent No. US 5777921 (Takata etc.), a kind of device that has double counters for each storage block or storage unit is disclosed, a counter is used to write/read one type logical data, and another is used to read/write the logical data of another kind of type, wherein refreshes startup when any counter reaches predetermined value.According to which counter startup refresh, the refresh voltage that is applied looks like different, so that ferroelectric material stands complete magnetic hysteresis cycles, its known method of being known as in order to recover the degeneration of spontaneous electric field, is promptly removed the impression effect.Owing to noted data content,, and during refreshing, do not need temporarily elsewhere data storage therefore in that refresh for one type logical data aspect the time can be more effective.Based on storage unit refresh or the situation of little storage block under, can avoid being the unnecessary redundancy that refreshes allocation units, but be cost with more counter.
In European patent No.0495572 (Moazzami etc.), the voltage that " is higher than nominal " is used for periodically implementing " ferroelectric parts " with " refresh or rebulid polarized state ", and further starts after the memory access cycle of predetermined number and/or after the predetermined time cycle and refresh.
In the prior art of finding, when energising, promptly after storer was not used for the time cycle energetically, the impression problem was not paid special attention to.Because this cycle can be long arbitrarily, therefore there is the danger of quite big impression, and do not have under the known situation in the duration of periods of inactivity, must take and therefore handle the situation of maximum impression.
In the passive matrix ferroelectric memory, and in active matrix base homologue, compare, in each unit, do not exist active component to help higher integration density, lower power consumption and lower complicacy.Yet, problem tired and impression must solve, as the additional unfavorable phenomenon that must solve above-mentioned " interference ": passive matrix memory lacks the transistor of active component as writing/reading/each storage unit and the remainder of matrixing network can being connected/disconnecting during the erase operation, and in the specific operation that comprises the individual unit visit, the storage unit that inevitably is not addressed stands interference voltage.The size of this interference voltage on the unit that is not addressed depends on the sequential and the size of the voltage that is applied to word line and bit line, described word line and bit line are connected to the unit that is addressed in the matrix He be not addressed, and the prior art document comprises for during operation passive matrix addressing storage array, how by working voltage pulse protocol, the instruction that promptly accurately this complicacy was avoided or reduced to time between the electromotive force and amplitude relation on all bit lines of qualification and the word line.Can be in U.S. Patent No. 3,002,182 (Andersson), U.S. Patent No. 4, find among 169,258 (TannasJr.) and the disclosed international patent application No.WO 02/05287 people such as () Thompson to comprise the coordinated manipulation order, for example force respectively organize potential pulse, be connected to sensor amplifier, the example of the pulse protocol of ground connection etc.
Unfortunately, even the pulse protocol of dexterous design also will stand basic restriction, and the basic problem of disturbing generally can not be eliminated by these means separately: as shown in above-cited WO02/05287, to individual unit with voltage V sCarry out and read or write relevant random access and always mean and make the unit that is not addressed stand interference voltage, described interference voltage comparability in or greater than about V s/ 3.Below, the unit that is not addressed is exposed to V s/ 2 or V sThe agreement of/3 maximum interference voltage should be called V respectively s/ 2 and V s/ 3 agreements.Although V s/ 3 usually just in time below the required voltage of the coercive field in the storage mediums in surpassing the unit, but repeated exposure can cause the loss gradually that polarizes and the corresponding loss of the information content.This interference problem is especially sharp-pointed in advanced memory device, wherein seeks to have the great advantage that several thousand large matrixs that intersect word line and bit line obtain the passive matrix addressing notion usually by using.This causes the unit that is not addressed in the matrix at every turn owing to writing, read or erase operation being visited them stands very a large amount of disturb voltage pulses therebetween.Its net result is that certain unit stands polarization loss to a certain degree, and wherein the size switched of the polarization during the read operation is fallen under the discrimination threshold between logical zero and the logical one.
The a kind of of interference who is used for minimizing based on the storer of big passive matrix may scheme be that each large matrix physics or electricity are divided into a plurality of sections, and wherein the passive matrix as it can be regarded as in each this section or " submatrix ".The suitable definition of passive submatrix is for example should only cause interference voltage on other storage unit in this same submatrix in storer and not cause interference voltage on other storage unit in other submatrix by the storage unit of reading or write operation is addressed in specific submatrix.Described section with limited degree in the prior art, and mainly concentrated on the influence that reduces stray capacitance and moving under water/relaxation current, it slows down and destroys the electroresponse of big passive-matrix structure.The example of section/division is disclosed in the applicant's unsettled patented claim NO 20035225.
The interference problem that increases the weight of in the passive matrix addressing device is the following fact, promptly for example be used for routine and write/read/monopulse sequence under the agreement of erase operation during, the unit is in after the polarized state that this impression begins development on very short hour range.Thus, in voltage pulse protocol, stood recently to comprise that the storage unit of the operation of the reversal of polarization keeps significantly impression in later phases with identical voltage pulse protocol on pre-inverse direction, and therefore tended to very much disturb at a some place.Because impression and disturb the two all to be subjected to tired influence usually, therefore clearly, the successful strategies of controlling these phenomenons must be considered the powerful mutual relationship between all these.
Summary of the invention
In view of above-mentioned consideration, fundamental purpose of the present invention provide based on electret in the passive matrix addressing structure or ferroelectricly be used for avoiding, the elementary tactics of reduction or switched memory, display or treating apparatus impression and the deleterious effect that disturbs.
Another fundamental purpose of the present invention is to describe concrete grammar and the process be used for extracting from the storage unit with the electret that printed by weight or ferroelectric material data.
Another fundamental purpose of the present invention is to describe concrete grammar and the process that is used for regulating or recovering electret or ferroelectric material after the development impression.
Another fundamental purpose of the present invention is to describe the unit electret be used for refreshing or recover to stand to disturb or the concrete grammar and the process of ferroelectric polarized state.
Another fundamental purpose of the present invention is to describe the device of implementing above-mentioned strategy, method and process.
According to the present invention, can drive agreement according to certain electric and control the method and structure of the polarization in electret in the individual unit or the ferroelectrics and realize above-mentioned purpose by providing, the latter has considered history that electricity and environment influence same unit and the operation requirement that wherein is provided with the device of unit.
This method is characterised in that and comprises the refresh process with following steps:
A) first step is used in the refresh requests that controller is handled, and be used to refresh according to the one or more unit of the Standard Selection of in the memory device controller, programming, and enter the address of these one or more unit of selecting thus,
B) second step is used for monitoring and handles refresh requests, and consider ongoing or predetermined storage operation and the priority of distributing to it, and start refresh process,
C) third step, be used for to limit simultaneously polarity and be applied to selected these one or more unit that are used to refresh corresponding to the potential pulse of coercive voltage or higher size, and all non-selected storage unit stand no-voltage or be starkly lower than coercive voltage voltage and
D) the 4th step, be used for simultaneously single potential pulse or a string potential pulse are applied to the unit of all selections, in the described potential pulse at least one have with step c) in the opposite polarity polarity of qualification, and have the size corresponding or higher with coercive voltage, and the voltage that all non-selected unit stand no-voltage or are starkly lower than coercive voltage.
By appended dependent claims, further feature and advantage of the present invention will become obvious.
Description of drawings
Pass through can understand the present invention better according to its general background and each preferred embodiment with reference to its accompanying drawing, in the drawings:
Fig. 1 shows above-mentioned basic passive matrix configuration, describes in detail as top, has the horizontal word line that intersects with vertical bit line, and described unit is positioned at word line and the cross one another overlapping volume of bit line,
Fig. 2 is the cross section of one of them unit of matrix among the aforesaid Fig. 1 of belonging to,
Fig. 3 is aforesaid by being controlled at cross one another word line (the active word line in place, selected unit; AWL) and a bit lines (active bit line; ABL) electric separation of given unit is selected in the electromotive force realization passive matrix on,
Fig. 4 is the aforesaid general B-H loop that does not have electret under the situation that impresses phenomenon or ferroelectric filling capacitor.Show key character, comprise coercive voltage Vc and remanent magnetism polarization intensity P r,
Fig. 5 a)-f) be+with-direction on the different phase of the impression relevant with the remanent magnetism polarization intensity, the general B-H loop of electret or ferroelectric filling capacitor,
Fig. 6 is the passive matrix memory that wherein reads out on the word line all unit in full row (full row) simultaneously,
Fig. 7 a) and b) be realize reading/refreshing/write the example of the voltage pulse protocol of sequence,
Fig. 8 a) and b) be the example of the sequence of voltage pulses used in the present invention,
The application example of the pulse protocol of the passive matrix memory of 1/3rd voltage selective rules that Fig. 9 a is to use as is known in the art and uses in the present invention,
Fig. 9 b puts on the example that the unit that is not addressed is not had the matrix store of interference with pulse protocol,
Figure 10 is the example that is applied to the segmentation matrix storer and uses the embodiments of the invention of word line mapping,
Figure 11 be can be used for wherein most of storer not accessed matrix store in long time period embodiments of the invention and
Figure 12 is the embodiments of the invention that are suitable for refreshing the storage unit of weight seal.
Embodiment
Before describing the present invention in more detail, the general background of notion of the present invention is discussed briefly.
As if the impression phenomenon exists in all ferroelectric materials of attempting in ferroelectric basic memory device so far everywhere, and this material is inorganic (pottery) and organic (polymkeric substance).Yet, the influence that the seriousness of impression changes in broadside circle and may be subjected to material modification (modification) and handle.Usually, when this material is polarized on assigned direction, impression fast-developing (the inferior millisecond of number is to the several seconds), and slower afterwards ground development gradually, under following certain situation, the logarithmic time correlativity in other cases, is rendered as in long-time and is flattened to fixing horizontal up to very long time (a few hours were to several years).
The model of explaining the impression phenomenon comprise in response to the internal electric field in the ferroelectric cell ferroelectrics with and border surface in charge migration.Yet, do not need the mechanical hook-up below the understood in detail, providing, and should further not continue this theme at this as described remedying in the present invention.Basic premise of the present invention is to impress and can alleviates by adopting electric field stress in electret in storage unit and the ferroelectric material advisably.This is based on the broad experience data that accumulated for the associated materials scope.
With reference to figure 5a-f, B-H loop move with at+P rOr-P rStorage medium polarized under the state is relevant.Suppose that this unit is in not impressing state at first, and remanent magnetism polarization intensity-P rAs shown in Fig. 5 a.This is how to realize optional for further discussion.In a certain preset time, it is switched to+P rState as shown in Fig. 5 b, and allows it to remain on this state.Moulding process is shifted to the left side with B-H loop gradually afterwards, and final the end moved, as shown in Fig. 5 c.In this point, people can notice that impression tends to lock the polarization that is in impressing state: apply voltage and only can cause along the saturated top section of B-H loop (promptly on+polar orientation, the dominant curved portion of not switching of dielectric response wherein) skew, and when removing voltage, polarization is got back to+P rState.Applying voltage on-polar orientation can not cause+P rAny appreciable cut-out of state just in time surpasses the not impression coercive voltage-V shown in Fig. 5 c up to voltage swing cTill.If the sufficiently high switched voltage of-polarity is applied in and gets back to afterwards zero, then this unit will switch and end at shown in Fig. 5 d-P rState.If this occurs in moulding process and compares on the short hour range, then this unit will be according to the B-H loop shown in Fig. 5 d initially in response to the voltage that is applied.Along with the time goes over, B-H loop will be shifted to the right gradually, by the instantaneous standard shown in Fig. 5 e not impressing state launch, and finally end at reflection-P as shown in Fig. 5 f rFinish under the new impressing state of polarization.In fact, the speed of this process and done state depend on the size and the duration of switch pulse, and various other factors, and it comprises material and the technology that is used to make this cellular construction.Observe impression and interference characteristic under many circumstances and influenced by the switching history (fatigue) of the unit discussed, and be subjected to environmental parameter such as humidity and temperature effect.
Above-mentioned important results is, if be allowed to be in a sufficiently long time of state in these states, then two remnant magnetism state+P rOr-P rOne of in the unit always be stamped in one direction or on another direction.Thus, the standard of being writes/reads/wipes under the agreement in the operated memory device, wherein polarization always be present in the unit and may experience direction oppositely but can not be reduced to zero, impressing state only met with for a part that causes the dynamic case that pulsion phase that local or complete polarization is switched combines.As a result, make and process that the unit is not stamped can be only occur in specific pressure to print and distribute under the situation on the short hour range of the typical case of exhibition be useful in operation.(be used for no matter the example of the inceptive direction of impression process of interim preparation unit under the state that does not impress basically will apply a series of pulses, break away from from its primary imprint state in the enough strong so that unit of described pulse, and its so apace back and forth switch polarity so that impression have no time on either direction, to develop).On the other hand, not too what can obtain by refresh process, described refresh process is removed impression from the unit when target will be operated those unit in the time after a while of non-appointment.
Go back to Fig. 5 a-f, see easily, impress and disturb closely related: if prepare the unit under given polarized state, and this unit is for+P rState is allowed to impress as shown in Fig. 5 c, and then it is locked in this state effectively and can bears tangible interference voltage stress and do not lose its polarization.On the other hand, if currently switch this unit and make it be in opposite polarized state from impressing state, then with switch the relative effective coercive field ratio-V of back pressure seal state CLittle a lot.This can be clear that in Fig. 5 d, wherein applies suitable voltage and can cause to+P on+direction rThe transition of state.Thus, even when interference voltage being restricted to writing of Vs/3 and operating under the agreement, also can cause obviously returning of remanent magnetism polarization intensity loss to switch (back-switching), unless allow this unit under new state, enough to keep interference-free for a long time for impression, to stablize this new state (referring to Fig. 5 e, 5f).
According to foregoing, the present invention is based on following scheme: the dynamic perfromance of moulding process makes it to realize the refreshing or recovery operation of storage unit by strobe pulse sequence advisably, and this refreshes in the time frame that allows to read with write operation is effective.
By adopting the multistep refresh process to realize described purpose, its fundamental is as described below:
In first step, selection will be to its unit that refreshes.This finishes according to the standard that is programmed in the controller in the memory device, and selected unit can comprise from single storage unit or word line and up to and comprise whole memory device.After selecting, the refresh requests state is set in controller.
In second step, handle the request be used to refresh, considers ongoing or predetermined storage operation and distribute to its priority, and startup refresh voltage pulse train.
In third step, the starting impulse in refresh sequence is applied to selected unit.Because this pulse destroys any data of storing before applying this pulse, therefore must be provided for interim preservation (writing back under the situation about refreshing for example utilizing) or transmit the instruction of these data (under the situation of reading).
In the 4th step, apply remaining potential pulse in the refresh sequence.
Alternatively, interim therein that preserve or new data will be written in the write step subsequently in the unit that is refreshed, apply and write pulse train, use full word or individual unit to write agreement.This step must be carried out when the useful influence that refreshes still exists.
First step in the refresh process is discussed now.Become significantly as describing, select the unit that is refreshed must be considered to carry out simultaneously and interdepend and also depend on the process of external parameter by above background.Thus, exist in the impression progressive development of locking polarization in the appropriate location, cause between destructive reading duration, slowing down and reducing handoff response.This mainly is the time integral effect, and is irrelevant with interference voltage stress basically, but depends on the temperature and the fatigue state of the unit of being discussed potentially.Disturbing effect is increased to those of impression, and the active development of impression becomes important on short and long-time range.At last, even in the stable unit of weight seal, repeat in a large number to disturb also to cause the erosion gradually that polarizes.Be used for the operation store device having under the situation of a large amount of interference and provide the certain pulses agreement, for example write agreement, control by the quantity of interference incident usually for the decision of when carrying out refresh operation in conjunction with Vs/3.
According to the present invention, can call three types decision pattern and be used to select unit being refreshed.These should be described under following category:
Default mode
Predictive mode
Feedback model
I) default mode: preferred embodiment
In this pattern, implement automatically promptly not depend on any assessment or impression of discovering and the interference level that are refreshed in the unit according to of the present invention refreshing/recovery operation.
According to a preferred embodiment of the present invention, no matter when receive the instruction of reading or write data, this all should be after the cycle when being in dormancy or dissengaged positions when matrix or as the memory device of the part of matrix.As the example, and first read or the enforcement of refresh process is carried out in write operation in combination automatically, described first reads or write operation takes place after guiding, has nothing to do with the use of matrix before the guiding incident is historical.
According to another preferred embodiment that comprises default mode, refresh/recovery operation in the startup of special time sign, as determined by inside or external clock, this clock shows the system operation time of absolute time or accumulative total.Example can be per hour or every day/weeks/months once.
In a subcategory of these preferred embodiments, only to using refresh process for one or more word line of reading or write-access is addressed.
In another subcategory of these preferred embodiments, complete matrix or its part by via comprise the refresh process that writes back step with step sequence one by one the running of word line ground be refreshed.Data content on every word line is temporarily stored in the other places in the memory device.
In another subcategory of these preferred embodiments, complete matrix or its part are by via comprising that the refresh process that writes back step moves the write-in block that contains two or more word lines concurrently and refreshes.Data content on every word line is temporarily stored in the other places in the memory device.
Ii) predictive mode: preferred embodiment.
In this pattern, suppose impression and disturb to develop in predictable mode, with can according to the use of matrix historical with numeral limit and definite measure relevant.
Comprise this preferred embodiment of measuring based on:
Pass the time, because the refresh process that comprises write step is carried out in given unit in the matrix or unit group.At this, the time of passing can be restricted to and comprise or do not comprise cycle that memory device wherein has been turned off etc.
The number that writes interference incident that given unit or unit group stand is because this unit or unit group are written into or refresh (rewriting).
Based on measuring of combinatorial input data, for example, by in given unit or unit group place increase the interference stress of the accumulation that interference incident determines, by since this given unit of the time weight that finally writes/refresh this unit or unit group or unit group.The vital classification of measuring of composite type be wherein environmental parameter, especially temperature as the type of input variable: on experience, electret or ferroelectric temperature are obviously depended in the interim development of observing impression, quicken under higher temperature usually.
In predictive mode, refresh/rejuvenation implements continually not as default mode usually, cause to system resource require less.
Iii) feedback model: preferred embodiment.
This is implying by measurement correlation unit response parameter, as the polarization handoff response (speed and size) of full sized pules agreement being determined the time of day of the incident in given unit or unit group.The latter can be in conjunction with the pulse of amplitude of variation, and it is separated by time delay.
In a classification of preferred embodiment, this unit or unit group to be measured, this unit or unit group are to write during the regular operation of memory device/target of read operation.In the third step of refresh process, combine with other predetermined reading or refresh, by deagnostic package being inserted in the detection of switching electric charge, this is possible.Because pulse protocol for routine, this has increased time and complicacy, therefore need all not implement if having time in institute, but can the memory device controller for example in response to as above the enforcement when deciding of the counting of the Access Events under ii) predictive mode, described.
In relevant preferred embodiment, junior three step makes up in refresh process, measures so that step 3 comprises deagnostic package such as switch speed when carrying out in response to sense order.Look step 1 and two and calibration note to the needs of flush condition, carry out after the following steps in the refresh process.
In a preferred embodiment again, another unit or unit group with similar operations history are used for for referencial use.In order to ensure operation history is similar really, selected one or more reference unit can be positioned at these one or more unit are monitored and be used for the possible identical word line or the word line group that refresh, thereby has reduced handover access quantity and therefore reduced disturbing effect.
In a preferred embodiment again, control module in memory device is remembered the operation history of related memory cell or cell group, for example form is foregoing submatrix form, and reference unit is measured, deliberately made described reference unit stand identical operations history by " the covering " or " driven (slave) " that exists in the part matrix for this purpose setting.
Second step in the refresh process is discussed now: refresh and the process spended time of writing back carries out and needs scope of resource in the memory device.This is implying, must pay special attention to minimize and the conflicting of memory device regular operation, for example, about temporary visit priority to matrix and ancillary hardware.And the ability of carrying out correcting measuring according to the present invention has the result to physical complexity and memory device cost.Therefore, above-mentioned decision pattern normally is suitable for the part priority level of the use profile of technical capability and in question desirable device.Towards this purpose, below be after in the strategy one or two:
Carry out the least possible refreshing/recovery operation, simultaneously consistent with the minimum essential requirement of institute's integrity of data stored and the error rate read.In this connects, it should be noted that above-mentioned decision pattern i), the invasion that ii), iii) can be configured to allow to tail off gradually enters in the standard operation of memory device.
When not carrying out the write/erase that comprises in question matrix or submatrix/sense command, use idle time.
The decision relevant with the priority level made by controller unit, and this controller unit is remembered instantaneous fatigue, interference and the impressing state of ongoing operation, matrix or its subelement in input instruction, the matrix, possible relevant environment parameter (temperature) etc.
A dominant factor of control controller function is that data can not lose.Each refresh/certain hour in the recovery operation during, before writing back (pending) can be in device temporary storaging data.In certain environment, if refresh/recovery operation is interrupted and stops prematurely then these data can be lost.Thus, have than predetermined refreshing/the higher priority of recovery operation although the write/erase/sense order of input can be restricted to, may running into wherein, the latter must be allowed to move its process to situation about finishing.On the other hand, if introduced by preferential memory access, then ongoing refreshing/rejuvenation can stop at some place nearest in this circulation, and wherein this does not damage data content, and remains on abort state afterwards till finishing memory access.The example for example is the interim interruption during the overall situation of complete matrix refreshes, and wherein word line ground this matrix is implemented refresh process one by one with step sequence, and comprises and write back step.In this case, refresh/rejuvenation should a word line refresh/recover and the next one between postponed temporarily.If refreshing/before rejuvenation finishes, a large amount of preferential memory accesses of interrupting take place, then this unscheduled event can be by the controller control of suitably programming.Back refer step 1, and refresh operation can begin so that for example allow refresh process to begin t after object element refreshes for the last time with periodic intervals RefreshSecond.If time t RefreshBe selected to when reaching this time, data still can read and write in controlled and reliable mode, and then its refresh process that can stop having begun reaches another limited time cycle, get involved and reference-to storage with the activity that allows other higher priority.Yet, always have the regular hour restriction when no longer being allowed to till finishing refresh process when reading and writing.At this time restriction t ForceAfterwards and finish arbitrary time before this refresh process, refresh process must be forced with limit priority.By selecting appropriate value t for certain memory application Refresh＜t Force, compare with the situation of the refresh process that always needs limit priority, in most of the cases, refresh process can be transparent for the standard memory visit.Very clear, on the one hand for the data content in the memory device realize level and smooth, fast and transparent access and avoid processing complicated and heavy in the controller on the other hand and controller in have compromise proposal between the memory function.In the no problem application of the generation of delay memory visit therein, simple solution will make standard access refresh/not obtain between convalescence priority.
Third step in refresh process is discussed now: as shown in the example of an embodiment among Fig. 6, all unit on selected word line (" active word line " is AWL among the figure) stand the potential pulse of predetermined polarity and sufficient intensity to switch those unit that polarized on the contrary by the direction with the field of being set up by potential pulse.This realizes by means of single source and the amplifier that is connected to shown selected word line.Simultaneously, with all other word line (invalid word lines, IWL among the figure) and all bit lines (active bit line, ABL among the figure) remain on such electromotive force, the voltage of promptly guaranteeing to cross over all other unit except that on selected word line those is zero or near zero (bit line potentials is by means of being remained on virtual earth effectively with the amplifying circuit of reading shown in the symbol among the figure).By this way, there is not interference voltage in the two ends, unit that are not addressed, and described unit i.e. any other place in matrix is not connected to the unit of AWL.If carry out this third step as the part read operation, then by apply switch current that potential pulse causes by means of the sensor amplifier that is connected to every bit lines by record concurrently, and determine the respective logical states of the switch unit on selected word line.This process makes the people remember " full row read " of the prior art, and wherein it is used to provide reading from noiseless, the highly-parallel of passive matrix addressing storage array.Yet, therein the possibility of weight impression unit before operation having been given under the present case of special concern, appointment can select to be applied to the potential pulse of the unit on the active word line, realizes not remanent magnetism polarized state+P in the imprinter unit to have to have surpassed rWith-P rBetween the size and/or duration of the required sizable nargin of transition, it is represented by the switched voltage Vs shown in Fig. 4.If only carry out this third step, then still need to write down switch current, and if will be refreshed or default unit comprises otherwise the information that will lose temporary storaging data before writing back then as partial refresh or predetermined registration operation.If do not need to preserve any data of storing, but then the clamp bit line to come true ground connection by the virtual earth that switches rather than remain on as shown in Figure 6.As readily understood by the skilled person, as shown in Figure 6 the accurate selection of electromotive force only because illustration.Can design the readout scheme of equivalence, wherein compare electromotive force is as one man moved or exchange with shown in Fig. 6 those, for example, by the voltage corresponding to switched voltage, cell voltages is set to earth potential and all other lines is arranged on the electromotive force different with earth potential.
In a word, this third step carries out the release with the unit that applies the opposite impression of pulse direction in this step, and in one direction with its polarization.This can implement in response to sense command or hope polarizes other situations of all unit that are addressed on equidirectional under or as the initial step in the release of weight impression unit.With later step, these these unit of step electric control are to demonstrate low impression in the certain hour interval after these operations.
The 4th step in refresh process is discussed now: a series of pulses are applied to selected word line according to predetermined protocol, wherein quantity, intensity, duration and the polarity of individual pulse in the strobe pulse string, reducing or to remove impression in the unit, and promote writing/read operation subsequently.Simultaneously, control the electromotive force on all other word lines and all bit lines so that cross over the voltage of all other unit on selected word line those or be approximately zero or at least under switching threshold, this is similar to top situation about describing under third step.
The impression phenomenon is complicated and various, but about electret or the ferroelectric influence existence quite a large amount of experimental knowledge of electric field to impression.Certain relevant herein is a sequence of voltage pulses, can apply it to reduce from those the storage unit shown in Fig. 1 and 2 or to remove impression.Before proceeding, with reference to figure 5e is useful, its show just after its impressing state from given polarization switches to the new state with opposite polarization particular moment individual unit situation: for special time, how soon depend on the impression development, this cell response obviously is not have impression in the electric pulse that further applies.
When removing impression from a lot of unit simultaneously, as parallel situation of regulating the full line unit on the word line, must consideration imprinter unit in different directions, and single unipolar pulse is inadequate.On experience, have been found that the bipolar pulse sequence is being effectively aspect the removal impression, with the primary imprint orientation independent.The example of this bipolar pulse sequence is schematically illustrated in Fig. 7.At this, only show the voltage of the unit appearance of crossing on the word line that is addressed: after the unipolar pulse in step 3 (" refreshing/read "), follow the bipolar pulse string in the step 4 (" refreshing "), usually the final pulse with predetermined polarity finishes, and it is provided with and is used for the stage of write step subsequently.Pulse number in the step 4 can change to several thousand from single one, needs hundreds of usually.Do not wish that therein high switched voltage maybe may obtain under the situation of high switched voltage, can by more by a small margin but obtain identical switching effect than the pulse of long duration.Usually, each pulse in the step 4 has enough amplitudes and duration, with polarity at+P rWith-P rBetween switch back and forth, although always situation and needn't be like this:
More complicated pulse train also can be correlated with, comprise wherein strong switch pulse and than weak pulse towards combined sequence.Figure 8 illustrates some other examples of pulse train.In Fig. 8 a, step 4 is by opposite in polarity and the step 3 and have the individual pulse of enough amplitudes and duration and constitute, and is unlocked and switches with the unit of guaranteeing to impress on the direction of step 3 (it will keep not disturbed by the pulse in the step 3).Thus, the unit that should release on either direction, impresses of the bipolar pulse group that forms by step 3 and step 4.Yet, sequential is important: if the pulse in the step 4 is followed after the pulse in step 3 soon, and in question unit switches from impressing state by the pulse in the step 3, then in the moving gradually in B-H loop the pulse in the intrinsic step 3 go that impression (de-imprinting) effect is also not free to be launched, and the pulse in the step 2 is switched the unit and is got back to impressing state.Thus, certain stand-by period τ WaitUsually be defined as between two pulses, wherein τ WaitNecessary long enough is with permission stable particular measurement of polarization in the unit, but the president is not to the operation of the device that slows down.Fig. 8 b shows the modification of the sequence among Fig. 8 a, wherein, also comprises bipolar switch pulse string now.In this example, last pulse has and the corresponding predetermined polarity of polarity that is used for default unit.The bipolar pulse string must be selected according to relevant material and operating conditions.This also is applicable to interpulse interval τ OffWith pulse width τ On
In Fig. 7 and 8, only show and cross over the voltage that the unit that is addressed occurs, and those of unit that leap is not addressed are not shown.The latter is depended on the selection of the pulse protocol that is used for whole matrix.Fig. 9 a be the example that voltage is applied to word line and bit line according to two kinds of different agreements shown in the 9b: among Fig. 9 a, the unit that is not addressed is exposed to V S/ 3 disturbing pulses.Among Fig. 9 b, the unit that will not be addressed is not exposed to disturbing pulse, even therein high power pulse is applied under the situation of the unit that is addressed.In each performance and cost explanation of depending on the interference characteristic of in question unit and being used in question device to any scheme of selection under the stable condition.
Optional write step is described now.It is provided for writing data in the unit that is conditioned by refresh process, or before operation after a while default unit to particular polarization state.In Fig. 7 a, this sequence comprises this unit is remained on logic state 0 (for example, with+P rPolarized state is corresponding) last write step, and in Fig. 7 b, show and be used to write logical one (for example, with-P rPolarized state is corresponding) the corresponding pulses sequence.The back one situation under, the negative polarity in the write step writes pulse and is dotted line shows because the final pulse in the step 4 shown here be bear and in required logic state 1 polarization this unit, wherein this unit will stay during write step.It should be noted that, write the interference voltage that always causes on the unit that is not addressed, and therefore benefit will owing to evenly and the write diagnostics that does not have a unit that is addressed of impression produce.Thus, can use the V of standard s/ 3 write agreement and do not need superpotential or extra widely write pulse, otherwise this can cause the excessive interference in the unit that is not addressed.Unit pre-if blank (blanking) in principle can by once directly the one or more full word lines of polarization carry out in glitch-free mode.But hope is preset some on the given word line but is not whole unit under specific circumstances.Under those situations, preferably give tacit consent to process moving by complete three step process according to the present invention because this minimized disturb and guarantee that any impression in the default unit all only limits to launch owing to predetermined registration operation that.In the middle of default unit this to be stamped in aspect the size and Orientation be uniform.
According to the present invention, be written in and finish after the refresh process and any obvious impression has rebulid himself in the unit before, carry out.Usually, this for example carries out immediately as the part of individual pulse sequence as shown in Figure 7.In other cases, impression development is enough slowly allowing other operation, idling cycle or the shutoff cycle in the memory device, be adjusted subsequently the unit write or default before intervention.
Within the scope of the invention, well-designed and expand described refresh process, to realize several specific purposes.Particular instance provides in a following part as certain preferred embodiment.
To provide the description of certain preferred embodiment now.
In a preferred embodiment, especially under the startup situation, read the data that are stored in the unit, seal can be suppressed in described unit, refreshes same unit afterwards:
In this case, setting up procedure 1) to 4).Can not cause any interference in other position in matrix because strong read pulse can be used in this third step, therefore can realize reading reliably, and regardless of the primary imprint state of each unit on selected word line.And the 4th step is guaranteed the remaining new impression of reading impression in advance or being caused by the strong read pulse the third step of all unit removals from the word line that is addressed.
In second preferred embodiment, avoided the reversing (flip-back) that in the imprinter unit that has just write, polarizes, itself or since the interference of other the local unit in the same matrix that spontaneous behaviour that weight seal causes or origin leisure stand switch pulse cause, for example combine and write or refresh.
In this case, start comprise write step institute in steps.Owing to caused the unit that will the be written into even and essentially no impression that becomes during the refresh step before the write step, therefore, new writing unit can be caused that no longer the impression of reversing setovers strongly.The unit that is not addressed in the matrix stands and the selected least interference stress that writes protocol-compliant (V for example usually s/ 3).
In the first category of preferred embodiment, avoided gradually polarization to corrode and because may the losing of data in the unit that causes from the interference of other local unit in the same matrix, described same matrix stands switch pulse, for example, with write or refresh operation combines: the given individual unit of referential expression word line or wordline block, the choice criteria under first refresh step are to outnumber some since this unit is written into or refreshes the interference incident that this unit experiences at last.After refreshing, comprise the step that writes back by following any execution:
Data can be write back to its initial physical location in the matrix.Under specific circumstances, wish that employing utilizes logic one and zero coding, described logic one and zero is assigned with and refreshes those opposite polarity that write before in this position.In view of this needs a certain amount of inner management operation (book-keeping) in the memory device, for speed advantage, it allows to revise or simplify step 3 and 4.
Replacedly, write back in other physical location in the matrix that is eliminated and refreshes.In this case, the memory device controller must be remembered since refreshing at last the time that passes in relevant position.
In second classification of preferred embodiment, it is shown among Figure 10, disposes partitioned file (N section) in the mode that has the every section n bar word line that does not carry data in time at any time.At the time interval of rule t Refresh(impression rate and interference characteristic by the particular memory film are determined) starts refresh operation on those word lines.Go coining manipulation by N Pulses, 1 (for example 500) bipolar pulse constitutes, and it is in that the duration is that τ 1 (for example 10us), quiescent interval are τ usually 2On the full word line of (for example 10us), and has the voltage of enough height with the unit that is used for to switch fully in the obtainable duration of pulse.Use specific time sequence figure with all UAWL-UABL to remaining on no-voltage, to avoid interference.After refresh process immediately in article one word line from the current n bar word line that is refreshed of the first word line sense data of section 1 and the section of being written into 2.Immediately will be after this operation from article one word line in the current word line that is refreshed of n bar of the data section of being written to 4 of first word line of section 3.Continue this process till the data from whole n bar word lines are sent to the word line that the n bar of another section is refreshed.In case finish this operation, the current n bar word line that is read out in then whole sections just is refreshed in the above described manner.Afterwards, the new data of the new word line of n bar of N section is sent in current word line that is refreshed etc., till all word lines of all sections are refreshed.
Identical method can be used for refreshing having remained static to reach is longer than t RefreshThe storer in cycle.Yet, under the sort of situation, will adopt more circulation.Also essential pulse length and/or the increase voltage of prolonging is so that still have complete switching.
A major advantage of this embodiment is, spends in to be held low T.T. on refreshing, even need a large amount of the switching remove impression.
Another major advantage is, this method can be handled unexpected power fail and obliterated data not, if situation also is like this when having stored mass data in memory buffer.
In the 3rd preferred embodiment, it is shown among Figure 11, is suitable for the application of wherein most of storer not accessed storer in long time period, is stored in the register about the information of the access status of all word lines.At the time interval of rule t Refresh, starting refresh operation, target is all word lines or the word line group of utilization with the addressing scheme of the notion compatibility of word line mapping.(word line is mapped among the Norwegian patent applications no.NO20035225 that is submitted to by the applicant and is described).Adopt two kinds of different method for refreshing.This is t at interval RefreshCan be selected to when reaching t RefreshThe time, for not having accessed unit in this interim, impression only is expanded to certain known limits, promptly must select t about the impression rate and the interference characteristic of particular memory film RefreshBe called below a kind of the method that refreshes firmly by the full word line read and cushion in the storer or the storage of the information in current another section that has been refreshed constitutes, be N afterwards Pulses, 2(for example 500) bipolar pulse, its on the full word line and the duration be τ 3(for example 10us), quiescent interval are τ 4(for example 10us), and have the voltage of enough height with the unit that is used for switching fully in the obtainable duration of pulse.With all UAWL-UABL to remaining on no-voltage to avoid interference.If the data of initial storage in this word line are stored in the impact damper, then write back this identical data.The another kind of method that is called impression counter-rotating is by being to constitute writing back (counter-rotating of data bit) with previous side in the opposite direction after reading.
For at last t RefreshInterim does not have accessed word line, adopts inner impression counter-rotating.For at last t RefreshThe word line that interim is accessed adopts and refreshes firmly.
The major advantage of this embodiment is to spend in and can be held low T.T. on refreshing, even need a large amount of switchings to be used for refreshing firmly.
In the 4th preferred enforcement, use long enough so that switching fully that can performance element duration of pulse of (acquisition 95% polarization), remained static to reach and be longer than t RefreshThe requested content of storer of time (for example under starting state) read (keep all word lines that are not addressed to be in no-voltage or near no-voltage) one by one with respect to bit line word line.Afterwards, writing back data (counter-rotating of data bit) with previous side in the opposite direction.After reading all requested data and being rewritten to it in storer, whole storer execution is refreshed firmly.This storage of reading and cushioning the information in storer or current another section that has been refreshed that refreshes firmly by the full word line constitutes, and is N afterwards Pulses, 2(for example 500) bipolar pulse, its on the full word line and the duration be τ 3(for example 10us), quiescent interval are τ 4(for example 10us), and have the voltage of enough height with the unit that is used for switching fully in the obtainable duration of pulse.With all UAWL-UABL to remaining on no-voltage to avoid interference.If the data of initial storage in this word line are stored in the impact damper, then write back this identical data.
Use the advantage of this method to be, for each bar word line or wordline block, can with than must be combination read/speed much higher when refreshing reads storer.Another advantage is, because polarization reversal, the storage unit that is read out and rewrites is reading out to the time durations that beginning refreshes firmly and self removed impression from finishing.
In the 5th embodiment, as shown in Figure 12, the 4th step contains a large amount of bipolar switch pulse, effectively refreshes realizing.Under specific circumstances, utilize weight impression unit, having been found that needs hundreds of and up to several thousand pulses, this has consumed a lot of times.Polarize cycle period at this, when step 4 pulse generation sequence began, the most difficult usually realization polarization was switched, because impression influences along with the switching number that has carried out becomes bigger and reduction gradually.Therefore, the preferred embodiment provides one or more broad pulses for the pulse train of beginning step 4, itself in addition can switch weight impression unit, and stepping ground or little by little reduce pulse width, simultaneously still switch described unit, as schematically illustrated among Figure 12.Utilize related a plurality of pulses, this will reduce the T.T. that step 4 consumes.

Claims (26)

1. method that is used to operate passive matrix-addressable ferroelectric or electret memory device, wherein, described memory device comprises the one or more arrays or the matrix of the storage unit that demonstrates the ferroelectric of hysteresis or electret film polarizable material, particularly ferroelectric or electret polymer thin form membrane; With first and second groups of corresponding parallel poles, wherein, to provide first group the electrode that forms word line (WL) in the device with the vertical substantially relation of second group the electrode that forms device neutrality line (BL), wherein, described first and second groups electrode is configured to directly or indirectly contact the membraneous material of storage unit, thereby the polarized state in single storage unit can be by being read out on each electrode that suitable voltage is applied to described first and second groups of electrodes respectively, wipe or write, wherein this method is implemented voltage pulse protocol based on 1/3rd voltage selective rules, thereby the unit that is not addressed stands about 1/3 the interference voltage that does not surpass switching voltage Vs at its two ends, wherein, this voltage pulse protocol comprises readout interval and write/erase cycle, it has predetermined amplitude respectively, the sequential of the potential pulse of polarity and length, wherein, if data are read out from storage unit, then described readout interval comprises one group of voltage difference is applied to described first and second groups of electrode corresponding electrode, and the wherein said write/erase cycle comprises and is used for another group voltage difference is applied to the step of described first and second groups of electrode corresponding electrode, and wherein this method is characterised in that and comprises the refresh process with following steps:
A) first step is used in the refresh requests that controller is handled, and be used to refresh according to the one or more unit of the Standard Selection of in the memory device controller, programming, and enter the address of these one or more unit of selecting thus,
B) second step is used for monitoring and handles refresh requests, and consider ongoing or predetermined storage operation and the priority of distributing to it, and start refresh process,
C) third step, be used for to limit simultaneously polarity and be applied to selected these one or more unit that are used to refresh corresponding to the potential pulse of coercive voltage or higher size, and all non-selected storage unit stand no-voltage or be starkly lower than coercive voltage voltage and
D) the 4th step, be used for simultaneously single potential pulse or a string potential pulse are applied to the unit of all selections, in the described potential pulse at least one have with step c) in the opposite polarity polarity of qualification, and have the size corresponding or higher with coercive voltage, and the voltage that all non-selected unit stand no-voltage or are starkly lower than coercive voltage.
2. method as claimed in claim 1,
It is characterized in that another step, be used for the write operation that circulation provides of writing of selected this one or more unit execution that is used to refresh by described voltage pulse protocol.
3. method as claimed in claim 1 is wherein selected more than one unit in step a),
It is characterized in that selected unit is corresponding to the full row in the memory device.
4. method as claimed in claim 1 is wherein selected more than one unit in step a),
It is characterized in that selected unit is corresponding to two row in the memory device or the cell block in the multirow more.
5. method as claimed in claim 1, wherein step d) comprises two or more pulses,
It is characterized in that adopting the pulse of identical or different time profile, wherein according to predetermined protocol selecting range, pulse length and interpulse delay.
6. or multinomial method in the claim as described above,
It is characterized in that, by predetermined potential being applied to a selected word line (WL) and simultaneously electromotive force different but that equate mutually basically being applied to all other word lines and all bit lines that belong to identical passive matrix or its section, in the step c) of claim 1, produce described potential pulse.
7. method as claimed in claim 1,
It is characterized in that, by with except selected that word line or one group of selected word line the mode that equates mutually basically of the electromotive force on wired, a series of time dependent potential levels are applied to all word lines and the bit line that belongs to identical passive matrix or its section, in the step d) of claim 1, produce described potential pulse.
8. as the method for claim 1 and 2,
It is characterized in that, in step c), from the selected unit at least one word line, extract the data of being stored, the data that the interim storage in other position in memory device is extracted during another write step subsequently, write back to described at least one word line with identical data thereafter.
9. method as claimed in claim 8,
It is characterized in that, described first read or erase step before, each is write back to the same, physical that it once was positioned at, but polarised direction is inverted.
10. method as claimed in claim 1, wherein step a) is characterised in that, and all unit in the selection memory spare are used to refresh, and described all unit stand it and first read or write operation after starting.
11. method as claimed in claim 1, wherein step a) is characterised in that, all unit in the selection memory spare are used to refresh, and described all unit are the idle cycle that reaches above the schedule time.
12. as the method for claim 10 or 11,
It is characterized in that selected unit constitutes the piece or the section of the matrix that contains at least two word lines.
13. method as claimed in claim 1,
It is characterized in that, by utilizing by at least one environment and/or using the algorithm of the input parameter that historical metric obtains to limit step c) and d) in pulse height and sequential.
14. as the method for claim 13,
It is characterized in that, near the memory device, on or among one or more somes place, select described environment to measure as real-time temperature or temperature history.
15. as the method for claim 13,
It is characterized in that, select described use historical metric as the number that writes and/or read incident that is experienced with cause wall scroll word line or matrix section since the described refresh pulse agreement of last application.
16. method as claimed in claim 1,
It is characterized in that select all unit on the word line to be used for refreshing of step a), wherein at least one unit demonstrates the polarization performance of handoffs that is complementary with one or more preassigneds.
17. method as claimed in claim 1,
It is characterized in that select to belong to piece in the matrix or all unit of section and be used for refreshing of step a), wherein at least one unit on a word line demonstrates the polarization performance of handoffs that is complementary with one or more preassigneds.
18. as the method for claim 16 or 17,
It is characterized in that, in described standard, comprise the polarization switch speed is reduced to below the predetermined threshold.
19. as the method for claim 16 or 17,
It is characterized in that, comprise that in described standard electric charge is switched in polarization to be reduced to below the predetermined threshold.
20. as the method for claim 16 or 17,
It is characterized in that, the described selected storage unit in memory device be the rule of memory device read, wipe or write operation during the storage unit that is addressed.
21. as the method for claim 16 or 17,
It is characterized in that the described selected storage unit in memory device is the special storage unit that is used in reference or control purpose of dividing.
22. method as claimed in claim 1,
The priority of appointment is based on the preset priority level in step b), and it is included in each matrix section the electricity visit to word line and bit line.
23. method as claimed in claim 1,
It is characterized in that, in case on given word line or word line group beginning with regard to completing steps c) and d), and and if only if the data of having read are kept in the memory device or when being sent to other position according to sense command, comprise that the data in the step c) are read.
24. method as claimed in claim 1,
It is characterized in that, carry out refresh process by the default value during the idling cycle in memory device or its subelement.
25. method as claimed in claim 1,
It is characterized in that, carry out described refresh process, to comprise predetermined matrices or matrix-block or the section in the memory device according to preset program.
26. method as claimed in claim 1,
It is characterized in that, select the bipolar pulse string during the 4th step, wherein pulse width is along with pulsing preceding and then little by little or steppingly reducing.
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