CN101137055A - Embedded type H.264 network video encoder - Google Patents
Embedded type H.264 network video encoder Download PDFInfo
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- CN101137055A CN101137055A CN 200610106946 CN200610106946A CN101137055A CN 101137055 A CN101137055 A CN 101137055A CN 200610106946 CN200610106946 CN 200610106946 CN 200610106946 A CN200610106946 A CN 200610106946A CN 101137055 A CN101137055 A CN 101137055A
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Abstract
This coder includes a CPU+DSP core processor, which connects the video-decoding module respectively, the audio module and the power supply module. There are respective bi-direction connections between CPU+DSP core processor and DDR, SDRAM and ether net transferring modules. This invention possesses advantages: (1) realize H.264 hard compressing with a high data compressing ratio; (2) realize video collecting/ transferring in a low quality net with low bandwidth, high error code rate and serious interfere; (3) realize real-time browsing the remote end D1 hi-quality images under a lower net speed; (4) auto-regulate the distinguishing rate/ frame rate to transfer video fluently during net bandwidth changing; (5) realize hi-quality video decoding (ADC) and video parameter control; (6) realize the extension of several kinds of ports via a main processor; (7) realize video mobile sense and can take photos or video recording.
Description
Technical field
The present invention relates to a kind of encoder, relate to a kind of embedded H.264 network video coder specifically.
Background technology
Should be used for from market, the application of network video coder mainly is divided into two big classes at present, i.e. environment guard monitor, the monitoring of bank cashier system.The superiority of digital hard disk recording technology is progressively approved by the system of domestic bank, each big bank in numerous provinces also progressively introduces hard disk recording system on teller's system, list is put more advanced network video coder system from this and should be had wide market application prospect, also will obtain bigger application in departments such as telecommunications, electric power, public security, customs, the administration of justice in the future.
In limited bandwidth or application scenario in short supply, H.264 can reduce network bandwidth requirements greatly, its Adaptive Transmission ability has improved system's anti-jitter performance greatly simultaneously, the Video service that can't satisfy client's needs before making is become a reality, significantly improve image quality, reduce back-end server construction cost.Application scenario in the storage cost sensitivity, H.264 high compression ratio technology will reduce system and end product memory capacity greatly, rely on the very abundant internet of present resource, can the very easy transmission of finishing data, save the spending of a large number of wiring for the client.
H.264 advantage is than H.263 having saved 50% code check with MPEG-4 Network Transmission to be had better support function.H.264 have simultaneously stronger anti-bit error performance, support the hierarchical coding transmission under the heterogeneous networks resource, thereby obtain picture quality stably, even also can finish video transmission in the network of packet loss height, serious interference, the network compatibility is good.
By network video coder, can solve network center's storage and Video service preferably, local and remote user can realize browsing, inquiring about video; In conjunction with adding dry contact input/output interface mode, can satisfy the needs of most safety monitorings.
Other the network video coder based on H.264 all is to move H.264 compressed software on the general dsp chip at present, belong to the software compress technique, and the software compress technique also is not very ripe at home now, do not reach real H.264 effect, have cost height, the high shortcoming of Network Transmission requirement bandwidth.
Summary of the invention
Purpose of the present invention just is to provide a kind of function admirable, collection sound, video acquisition, hardware realize that H.264 functions such as video compression, Network Transmission, interlink warning are one, have to be suitable for from a high speed to the Network Transmission of low speed various bandwidth, the embedded H.264 network video coder of low cost and other advantages.
Purpose of the present invention can realize by following measure:
The present invention includes the CPU+DSP core processor, described CPU+DSP core processor is connected with video decode module, audio-frequency module and power module respectively, simultaneously, the CPU+DSP core processor also is two-way the connection respectively with between DDR, SDRAM, the Ethernet transport module.
On the CPU+DSP core processor, also be connected with I/O interface and serial interface module among the present invention.
The present invention makes it to have following advantage owing to adopt said structure:
(1) realization hardware-compressed H.264, data compression ratio is higher;
(2) video acquisition, the transmission under the low-quality network of realization low bandwidth, error rate height, serious interference;
(3) the far-end D1 high quality image displaying live view under the low network speed of realization;
(4) can when changing, the network bandwidth adjust resolution, frame per second automatically to realize the smooth transmission of video;
(5) realize high-quality video decode (ADC), the 4 tunnel is synthetic, video parameter control;
(6) rely on a primary processor to realize extending out of multiple interfaces;
(7) realize that OSD (On Screen Display) figure layer adds function;
(8) realize video mobile detection and capable of taking pictures, video recording;
(9) stable performance, with low cost, volume is small and exquisite, installation is simple;
(10) interoperability and upgrading expansion are convenient;
Be widely used in occasions such as power monitoring, building monitoring, video intercom, remote teaching.
Description of drawings
Fig. 1 is a schematic block circuit diagram of the present invention;
Fig. 2 is circuit theory diagrams of the present invention;
Embodiment
The present invention does with detailed description below in conjunction with drawings and Examples:
As shown in the figure, the present invention includes the CPU+DSP core processor, described CPU+DSP core processor is connected with video decode module, audio-frequency module and power module respectively, and simultaneously, the CPU+DSP core processor also is two-way the connection respectively with between DDR, SDRAM, the Ethernet transport module.
Core of the present invention is to realize H.264 video coding by hardware.
As shown in the figure, the present invention includes the CPU+DSP core processor, described CPU+DSP core processor is connected with video decode module, audio-frequency module, clock and power module respectively, simultaneously, the CPU+DSP core processor also is two-way the connection respectively with between DDR, SDRAM, the Ethernet transport module.
On the CPU+DSP core processor, also be connected with the I/O interface.
As shown in the figure, the present invention includes the CPU+DSP core processor, described CPU+DSP core processor is connected with video decode module, audio-frequency module, clock and power module respectively, simultaneously, the CPU+DSP core processor also is two-way the connection respectively with between DDR, SDRAM, the Ethernet transport module.
On the CPU+DSP core processor, also be connected with serial interface module.
Embodiment 4
Core processor is a high integrated, able to programme, support high performance communication Media Processor H.264 based on ARM9, DSP dual processor kernel and hardware acceleration engine; The Comprehensive Control chip that video decode partly uses a slice can finish 4 road video decodes, close the road is finished 4 road video decodes and switching controls, form the network video coder that 4 road video, 4 road audio frequency are imported jointly with other interface device in addition, be applied to fields such as real-time video transmission, digital image monitor.Certainly, also can be applicable to various situations such as 1 tunnel-16 tunnel.
System has used FLASH, DDR, SDRAM, video coding (DAC), audio coding decoding, USB to change complex arts such as IDE simultaneously, and the designing technique of interfaces such as cmos digital video camera, SD card, RS232, RS485, infrared, USB.
Design content is described as follows:
1, the core processor module mainly is made up of processor and Peripheral storage chip thereof.Processor is finished the processing of whole protocol processes, various service applications, the coding of looking audio frequency or decoding, finishes management and driving to other modules of platform simultaneously, is the core of monoblock veneer.
The processor outside can connect SDRAM, DDR SDRAM and FLASH chip.Processor has signals such as VI, VO, SIO, MII, USB, UART, IIC, SSP, GPIO, JTAG, RESET to be connected with the outside.1.2V that processor is required and 2.5V voltage are changed by LDO.
2, the job description of video decode module is as follows.During record: the CVBS format-pattern signal of 4 road videos input, close the road and handle through A/D conversion, picture segmentation by video decoding chip, can close the road and become 1 road D1 or 2 road Half D1,4 road CIF, 4 road QCIF, form the ITU-BT656 image data stream of standard, give the communication medium processor; Wherein the clock of 54MHz provides the clock source, and SDRAM deposits initialization information.
3, the audio coding decoding module has adopted the audio coding decoding compression chip, and it is a kind of high-performance stereo audio codec, analog circuit function that this chip simultaneous altitude is integrated.2 road audio input interfaces of this chip connect the two-way simulated audio signal, and the signal after the conversion is connected on the processor by the I2S bus.
4, ethernet module
Ethernet module adopts a single port PHY chip to realize the network interface of veneer.This chip is the single-port ethernet physical layer transceiver, comprise PMA, PMD and PCS subfunction, support the MII interface, can realize management (downlink port PHY address default configuration is Ob00001, and uplink port PHY address default configuration is Ob00010) by MDC/MDIO; Support 10/100 Mbit/s, the full-duplex/half-duplex self adaptation, netting twine leads directly to/intersects and detects automatically.
Claims (3)
1. embedded H.264 network video coder, it is characterized in that: it comprises the CPU+DSP core processor, described CPU+DSP core processor is connected with video decode module, audio-frequency module and power module respectively, simultaneously, the CPU+DSP core processor also is two-way the connection respectively with between DDR, SDRAM, the Ethernet transport module.
2. embedded H.264 network video coder according to claim 1 is characterized in that: also be connected with the I/O interface on described CPU+DSP core processor.
3. embedded H.264 network video coder according to claim 1 and 2 is characterized in that: also be connected with serial interface module on described CPU+DSP core processor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200610106946 CN101137055A (en) | 2006-08-29 | 2006-08-29 | Embedded type H.264 network video encoder |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200610106946 CN101137055A (en) | 2006-08-29 | 2006-08-29 | Embedded type H.264 network video encoder |
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| CN101137055A true CN101137055A (en) | 2008-03-05 |
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| CN 200610106946 Pending CN101137055A (en) | 2006-08-29 | 2006-08-29 | Embedded type H.264 network video encoder |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102067597A (en) * | 2008-06-23 | 2011-05-18 | 三菱电机株式会社 | In-train monitor system |
| CN103974060A (en) * | 2013-01-31 | 2014-08-06 | 华为技术有限公司 | Method and device for adjusting video quality |
| CN104023200A (en) * | 2013-02-28 | 2014-09-03 | 北京国通创安报警网络技术有限公司 | Embedded alarm service integrated equipment and alarming method |
| CN104113729A (en) * | 2014-07-14 | 2014-10-22 | 苏州科威视数字技术有限公司 | A monitoring system and monitoring method for simultaneously supporting two paths of audio inputs |
-
2006
- 2006-08-29 CN CN 200610106946 patent/CN101137055A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102067597A (en) * | 2008-06-23 | 2011-05-18 | 三菱电机株式会社 | In-train monitor system |
| US8605944B2 (en) | 2008-06-23 | 2013-12-10 | Mitsubishi Electric Corporation | In-train monitor system |
| CN103974060A (en) * | 2013-01-31 | 2014-08-06 | 华为技术有限公司 | Method and device for adjusting video quality |
| CN103974060B (en) * | 2013-01-31 | 2016-01-27 | 华为技术有限公司 | Video quality method of adjustment and device |
| CN104023200A (en) * | 2013-02-28 | 2014-09-03 | 北京国通创安报警网络技术有限公司 | Embedded alarm service integrated equipment and alarming method |
| CN104113729A (en) * | 2014-07-14 | 2014-10-22 | 苏州科威视数字技术有限公司 | A monitoring system and monitoring method for simultaneously supporting two paths of audio inputs |
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