CN101131985A - 半导体封装结构和制造方法 - Google Patents

半导体封装结构和制造方法 Download PDF

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Publication number
CN101131985A
CN101131985A CNA2007101416936A CN200710141693A CN101131985A CN 101131985 A CN101131985 A CN 101131985A CN A2007101416936 A CNA2007101416936 A CN A2007101416936A CN 200710141693 A CN200710141693 A CN 200710141693A CN 101131985 A CN101131985 A CN 101131985A
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pin
pad portion
electronic unit
partly
pin part
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全关庆
谭侯宾
潘强华
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Leshan Feinikesi Semiconductor Co., Ltd.
Semiconductor Components Industries LLC
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Semiconductor Components Industries LLC
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Publication of CN101131985A publication Critical patent/CN101131985A/zh
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Abstract

在一个实施方案中,半导体封装包括具有引脚部分和焊盘部分的引脚框架,引脚部分和焊盘部分彼此偏离。引脚部分包括向下延伸形成的印迹。上弯部分将引脚部分连接到焊盘部分。

Description

半导体封装结构和制造方法
技术领域
本发明通常涉及电子器件,且更具体地说,涉及半导体封装和组装方法。
背景技术
在便携式电子产品的小型化方面,手持消费类产品市场蓬勃发展。主要由手机、MP3和数字相机市场推动,这些器件的制造商因日益缩小的数据储存格式而受到挑战。这种挑战对半导体部件制造商设计他们的产品以控制最可能小的面积和最薄的高度施加了压力。
在某些半导体封装设计中,引脚框架的一部分相对于其他部分偏离。例如,管芯接合标记(die bond flag)部分可以与引脚框架的引脚部分偏离。引脚框架结构的物理弯曲是一种用于提供偏离结构的已知技术。此方法的一个问题是当引脚框架材料减小厚度以满足最小封装高度的要求时,弯曲过程在引脚框架的弯曲处或弯颈处会造成明显的弱化。在组装过程中,这些部分经常会变脆弱,或在极端情况下完全断裂。这直接影响了最终部件的可靠性以及制造成本和周期。
掩膜蚀刻技术或选择蚀刻技术用于引脚框架的薄的部分以形成需要的偏离部分或嵌入部分。然而,由于更薄的封装要求需要更薄的起始引脚框架来开始,因而用于形成偏离或嵌入结构的附加的蚀刻步骤导致了一些部分太薄和太脆弱而不能支撑诸如半导体管芯和连接结构的部件。这还影响了最终部件的可靠性以及制造成本和周期。
因此,需要一种封装结构和组装方法,其提供更薄的、更可靠的和有成本效益的封装。
附图说明
图1阐述了封装结构第一实施方案的截面图;
图2阐述了封装结构第二实施方案的截面图;
图3阐述了封装结构第三实施方案的截面图;
图4和5阐述了制造过程中,支撑结构的部分截面图;
图6阐述了制造过程的可替代步骤中,支撑结构的部分截面图;
图7阐述了制造封装结构的流程图。
为了便于理解,附图中的元件并不必须按比例绘制,且同样的元件编号适合于所有不同附图中以指示相同的或相似的元件。另外,为了描述的简化,省略了众所周知的步骤和元件的描述和细节。虽然封装结构在这里被解释为各种SOD-923实施方案,但是本领域的技术人员将会理解根据本发明,其他封装结构也是可能的。
具体实施方式
图1根据第一实施方案显示了封装结构10的截面图。封装结构10显示为SOD-923封装,其具有特别源自于引脚框架结构12的特征的薄的外形或降低的高度11。在一个实施方案中,高度11小于约0.4mm。
引脚框架或支撑结构12显示为具有引脚或引脚部分14以及焊盘、焊盘部分或接合(bonding)部分17。在一个实施方案中,引脚框架12的厚度16是约0.10mm到0.12mm。引脚14的一个或更多个包括形成在一个或更多个表面上的成形的、精压的(coined)或深度精压的步骤、痕迹、形貌(feature)、印痕或印迹19。在所示的一个实施方案中,精压的印迹19形成在引脚14的暴露或接合表面21的附近或邻近处。正如这里使用的,术语“精压”指一种方法,其中引脚框架12设置在具有预定形状的管芯的密闭组之间或包含在其内,以及引脚框架12在受压条件下被冷加工或物理挤压以形成根据管芯预定形状的特征19。在一个实施方案中,精压的印迹19形成约0.025mm数量级的深度22。虽然印迹19显示在图1中具有锋利的角或直的边缘,但是应理解印迹19可以包括如渐薄的边缘和内圆的角等等。在可替代的实施方案中,要么单独采用掩模技术,要么与精压技术一起形成成形的印迹19。
引脚框架19进一步包括上弯的、弯颈部分或连接部分23,其在引脚14和焊盘部分17之间延伸,或连接引脚14和焊盘部分17。在此实施方案中,印迹19形成在引脚14的第一主要表面上,以及弯颈部分形成在引脚14的与第一主要表面相对的第二主要表面上。而且,焊盘部分17相对于引脚14偏离(即焊盘部分17处于相对于引脚14的不同的水平平面上)。在印迹19在引脚框架12内形成后,采用常规的弯曲接合技术形成上弯部分23。此方法顺序导致上弯部分23与现有技术中只采用弯曲技术的薄的引脚框架、或采用蚀刻技术形成偏离部分的结构相比,具有增大的强度。也就是说,形成印迹19和形成上弯部分23的结合提供了允许更薄封装的薄而牢固的引脚框架12。
作为例子,引脚框架12包括诸如铜、铜合金、铝、或铁/镍的导电材料。在另一个实施方案中,用额外的材料如铜、银、镍-钯、金等电镀引脚框架12。
封装结构还包括耦合或连接到其中一个焊盘17的电子部件或半导体器件26。作为例子,器件26包括功率MOSFET器件、双极晶体管、绝缘栅双极型晶体管、可控硅整流器、二极管、模拟或数字集成电路、传感器、无源元件或其组合或别的电子器件。采用常规的焊料管芯附着或环氧树脂管芯附着层29将器件26的一面连接到焊盘17。器件26进一步包括形成在另一表面上的金属化层或接触层31。接触层31包括如铝、铝/硅、钛/镍/银、钛/镍/金、铬/镍/金等。
如图1所示,导电连接结构或线接合(bond)33连接到接触层32且进一步连接到另一个焊盘17。通过实施例,线接合33具有约0.10mm数量级的回路高度36且采用常规的线接合技术形成。
封装结构10进一步包括模制封装层或保护层39,其覆盖器件26、线接合33以及引脚框架12的至少部分。作为例子,封装层39包括环氧树脂。在所示的实施方案中,封装层39从引脚14的端面18后置或嵌入,使得引脚14的多个表面被暴露。在一个实施方案中,封装层39在线接合33之上延伸约0.04mm数量级的距离41。即使用激光掩模技术来确认封装10,此距离提供了对封装部件足够的保护。在此实施方案中,封装层39的一部分在引脚14之间延伸且进一步覆盖或钝化印迹19。印迹19提供或界定了锋利和一致的接合表面21,当封装10连接到组件的下一级时,表面21提供更好的对准和接合。
图2根据第二实施方案显示了封装结构20的截面图。结构20类似于结构10,只是结构20引入了不同的导电连接结构。在此实施方案中,导电连接结构233包括导电芯片或导电带接合(ribbon bond)。导电连接结构233利用连接层290连接到焊盘17,其包括焊料或环氧树脂附着层。此外,结构20包括延伸出引脚14末端18或在其附近延伸的封装层239。在一个实施方案中,采用MAP过成型法形成结构20,以及通过单独穿过封装层239和引脚14来形成单独的结构20。
图3根据第三实施方案显示了封装结构30的截面图。结构30类似于结构10和20,只是结构30引入了具有末端334的导电连接结构333,所述末端包括对准到引脚框架12的焊盘117的装置。在所示的实施方案中,用于对准或对准结构的装置包括匹配或对准到焊盘117的类似杯形的凹陷,焊盘也是类似形状的。可替代地,末端334包括具有一个或更多个从其延伸的定位体、齿或突出物的扁平形,其匹配或有助于将末端334与焊盘17或117对准。
图4显示了制造初期阶段引脚框架12的部分截面图。引脚框架显示为闭合在第一管芯板44和第二管芯板46之间,这用于深度精压的印迹和痕迹19。第二管芯板46包括为精压的印迹19提供期望形状的冲孔部分或隆起部分48。当引脚框架12进一步被冲压以形成其他特征或去除不需要的材料时,印迹19被适宜地深度精压。在一个实施方案中,在精压后焊盘17具有约0.075mm的厚度53,这提供了供进一步组装的稳定的平台。在印迹19被精压在引脚框架12上后,引脚框架12任选地用选定的材料如铜、银等电镀。
图5显示了在制造的后续步骤后,引脚框架12的部分截面图。在此后续步骤中,部分引脚框架12向上弯曲到期望的高度以形成弯颈部分23,以及提供焊盘17的期望位置。
图6根据可替代的实施方案显示了在制造的初期阶段,引脚框架12的部分截面图。结合图4,描述了引脚框架12显示为闭合在第一管芯板44和第二管芯板46之间。在此实施方案中,第一管芯板44进一步包括突起461,其用于提供焊盘17内精压的对准印迹或结构61。精压的对准结构61是先前描述的图3的封装结构30中的对准装置或结构的另一个实施例。精压的对准结构61可以具有各种形状以便与导电连接结构333或其一部分的末端334的相应形状匹配。
图7显示了采用具有成形的印迹19和弯颈部分23的引脚框架12来形成封装结构的通常的方法流程图。在步骤1001,在或者通过封装部件制造商、或者通过供应商引脚框架零件来实现先前在图4和5中描述的步骤后,设置引脚框架12。
在步骤1002,利用焊料附着或环氧树脂附着层将电子部件26连接到引脚框架的期望焊盘17。在步骤2003,导电连接部分33、233和/或333连接到电子部件26和焊盘17和/或117以形成子组件。在步骤1004,接着将子组件设置在模制装置中以在部分子组件上形成封装层39,或在所有子组件上形成封装层339。此步骤形成了封装组件。在步骤1005,封装组件单独地或分开地进入单独的封装部件10、20和/或30。
总之,封装结构包括具有偏离的引脚部分和焊盘部分的引脚框架。引脚部分包括深陷形成的印迹。上弯部分将引脚部分连接到焊盘部分。深陷形成的形貌和上弯部分的结合提供了薄的但牢固的引脚框架结构以允许要求偏离部分的更薄的封装结构。
虽然参考其具体的实施方案已经描述和阐述了本发明,但是并不意味本发明仅限适用这些所阐述的实施方案。

Claims (10)

1.一种半导体封装,包括:
引脚框架结构,其包括第一引脚部分、第一焊盘部分以及第一弯颈部分,所述第一弯颈部分将所述第一引脚部分连接到所述第一焊盘部分,其中所述第一引脚部分具有形成在一个主要表面上的精压形貌;
电子部件,其耦合到所述焊盘部分;以及
封装层,其覆盖于所述电子部件和所述引脚框架结构的至少一部分而形成。
2.如权利要求1所述的结构,进一步包括第二引脚部分,所述第二引脚部分具有形成在一个主要表面上的另一个精压形貌,其中所述电子部件靠导电连接结构耦合到所述第二引脚部分。
3.如权利要求2所述的结构,其中所述导电连接结构包括线接合。
4.如权利要求2所述的结构,其中所述导电连接结构包括导电芯片。
5.如权利要求4所述的结构,其中所述第二引脚部分或所述导电芯片包括对准结构。
6.如权利要求2所述的结构,其中所述导电连接结构包括带接合。
7.如权利要求1所述的结构,其中所述半导体封装结构包括SOD-923构型。
8.一种封装结构,包括:
第一引脚部分,其具有主要表面和形成在所述第一引脚部分的所述主要表面附近的第一印迹;
第二引脚部分,其具有主要表面和形成在所述第二引脚部分的所述主要表面附近的第二印迹;
第一焊盘部分,其与所述第一引脚部分偏离,其中第一弯颈部分将所述第一引脚部分连接到所述第一焊盘部分;
第二焊盘部分,其与所述第二引脚部分偏离,其中第二弯颈部分将所述第二引脚部分连接到所述第二焊盘部分;
电子部件,其耦合到所述第一焊盘部分;
导电连接结构,其耦合到所述电子部件和所述第二焊盘部分;以及
封装层,其覆盖所述电子部件、所述导电连接结构以及部分所述第一引脚部分和部分所述第二引脚部分。
9.一种形成半导体封装结构的方法,包括步骤:
提供引脚框架结构,所述引脚框架结构包括第一引脚部分、第一焊盘部分、以及第一弯颈部分,所述第一弯颈部分将所述第一引脚部分连接到所述第一焊盘部分,其中所述第一引脚部分具有形成在一个主要表面上的精压形貌;
将电子部件连接到所述引脚框架;
将导电连接部分连接到所述电子部件和所述引脚框架;以及
封装所述电子部件和部分所述引脚框架。
10.如权利要求9所述的方法,其中提供所述引脚框架结构的所述步骤包括提供还包括第二引脚部分的所述引脚框架结构,所述第二引脚部分具有形成在一个主要表面上的精压形貌,以及其中连接所述导电连接部分的所述步骤包括将所述导电连接部分连接到所述电子部件和所述第二引脚部分。
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