CN101131398A - Integrated circuit tester - Google Patents
Integrated circuit tester Download PDFInfo
- Publication number
- CN101131398A CN101131398A CN 200610121431 CN200610121431A CN101131398A CN 101131398 A CN101131398 A CN 101131398A CN 200610121431 CN200610121431 CN 200610121431 CN 200610121431 A CN200610121431 A CN 200610121431A CN 101131398 A CN101131398 A CN 101131398A
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- CN
- China
- Prior art keywords
- integrated circuit
- connection point
- point substrate
- bendable connection
- support plate
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Abstract
The invention discloses an assembly circuit test device which includes a connecting module connected to the signal carrying board; the connecting module includes the flexible junction base plate which is between the detected assembly circuit and signal carrying board. The flexible junction base plate includes a conductive circuit which is set with many conductive junctions connected with the detected assembly circuit and signal carrying board. The base plate is made by the FR4 which can absorb the high-frequency noise and used in high frequency application and decreasing the noise to improve the correct ratio. The flexible junction base plate can instead the traditional flexible probe to avoid the circuit junction disable.
Description
Technical field
The present invention relates to a kind of arrangement for testing integrated circuit, particularly, be applicable in the arrangement for testing integrated circuit, in order to solve noise and the Problem of Failure of wearing and tearing and causing relevant for a kind of bendable connection point substrate.
Background technology
Integrated circuit need can guarantee that just structure and function can normal operations through test through after design, making.It is that whether elder generation is normal with the line construction of probe (Probe) test wafer before wafer cutting and encapsulation that finished product test after integrated circuit testing can be divided into the wafer detection and encapsulate, wafer detect; The finished product test then is every function of analyzing encapsulation back integrated circuit, guarantees that every character can both requirement up to specification.Present integrated circuit testing mostly uses Auto-Test System ATE (Automatic Test Equipment) to test, and measuring head wherein (Test Header) mainly is the various signals that are used for analyzing to-be-measured integrated circuit; Signal support plate (Load Board) is as the analog line of to-be-measured integrated circuit; Connector on the signal support plate (Socket) is used for carrying to-be-measured integrated circuit to test.Above-mentioned connector is played the part of the role of a bridge usually, and its efficient and correctness with test is closely bound up.
Fig. 1 shows connector 110 synoptic diagram of traditional test device.To-be-measured integrated circuit 100 places on the connector 110, and connector 110 then is connected in signal support plate 120.Integrated circuit 100 is done to electrically connect to test with signal support plate 120 by the pogo pin (Pogo Pin) 111 of connector 110; Wherein, an end of pogo pin 111 contacts with the contact 101 of integrated circuit 100, and the other end of pogo pin 111 then contacts with the line contacts 121 of signal support plate 120.Yet, through behind the substantive test, tend to cause the wearing and tearing of line contacts 121, and the undue wear meeting causes electrically connecting the bad erroneous judgement that causes when testing.In addition, after line contacts 121 experience wear on the signal support plate 120, reparation is difficult for and costs an arm and a leg.Moreover because the improvement of technology, the size of integrated circuit is more and more littler, makes contactor density also improve thereupon, and therefore, the size of pogo pin 111 also and then diminishes, and density also improves thereupon; Except the production cost that increases pogo pin 111, too high pogo pin 111 density will cause the resonance effects of some inductance, electric capacity or similar antenna, cause the problem that signal disturbs, the noise when making test improves, and causes the test erroneous judgement and improves fraction defective; In addition, when part pogo pin 111 is damaged,, change the precision that difficult then easy influence is aimed at because size is little.
Along with the variation of integrate circuit function, the integrated circuit of same type may have several different designs, has more increased the complicacy of integrated circuit in test.Traditional test device as shown in Figure 1, integrated circuit 100 electrically connects by connector 110 and signal support plate 120, and each integrated circuit all needs a kind of corresponding signal support plate 120, each other can't be shared; Moreover, signal support plate 120 cost an arm and a leg and the replacing program very complicated.
In view of the many shortcomings of above-mentioned existing in prior technology, be necessary to propose a kind ofly can solve contact wearing and tearing simultaneously and disturb with signal and cause the problem of erroneous judgement, and can be applicable to the universal test device of identical category integrated circuit, use the efficient that improves integrated circuit testing.
Summary of the invention
One of purpose of the present invention is to propose a kind of bendable connection point substrate, is applicable in the arrangement for testing integrated circuit, and the contact wearing and tearing cause when testing in order to solve inefficacy and signal disturb the erroneous judgement problem that causes, and use the raising testing efficiency.
Another object of the present invention is to propose a kind of arrangement for testing integrated circuit,, increase elasticity and versatility that proving installation uses by adding a support plate.
Another purpose of the present invention is to propose a kind of arrangement for testing integrated circuit, and it can prevent that pogo pin Pogo Pin from causing the damage problem of signal support plate upper contact.
According to above-mentioned purpose, the present invention discloses a kind of arrangement for testing integrated circuit, and it comprises a link block, is electrically connected at the signal support plate; And comprise bendable connection point substrate in the link block, it is between to-be-measured integrated circuit and signal support plate.Bendable connection point substrate comprises a conducting wire, and it is provided with a plurality of conductive junction points and electrically connects with to-be-measured integrated circuit and signal support plate respectively.
By above-mentioned technical characterictic, the beneficial effect that the present invention has shows as:
One. bendable connection point substrate of the present invention is applicable to the integrated circuit of the various different packing forms of test; When the conductive junction point of bendable connection point substrate lost efficacy because of excessive wear causes, only need to change bendable connection point substrate, and need not change whole link block or signal support plate, thereby make cost significantly reduce and promote efficient.
Two. bendable connection point substrate of the present invention uses a kind of epoxy resin fiberglass material FR4 of low combustible, and it has the ability of absorbing high-frequency noise, can be used in frequency applications especially, and the noise when reducing test is to improve accuracy.
Three. bendable connection point substrate of the present invention replaces traditional pogo pin, thereby the problem that can avoid the line contacts of signal support plate to lose efficacy because of excessive wear.
Description of drawings
Fig. 1 shows the synoptic diagram of the connector of traditional test device.
Fig. 2 shows the arrangement for testing integrated circuit of one of embodiment of the invention.
The stereographic map and the local amplification profile of the thin portion of the link block structure in Fig. 3 A and Fig. 3 B difference displayed map 2.
Fig. 4 A and Fig. 4 B respectively the bendable connection point substrate among displayed map 3A, Fig. 3 B and on the conducting wire.
Fig. 5 shows the arrangement for testing integrated circuit of another embodiment of the present invention.
Fig. 6 shows the arrangement for testing integrated circuit of further embodiment of this invention.
Symbol description among the figure
100 integrated circuit
101 contacts
110 connectors
111 pogo pin
120 signal support plates
121 line contacts
210 measuring heads
220 signal support plates
221 winding displacement joints
223 signal wires
230 link blocks
231 winding displacement joints
233 signal wires
235 boards
237 connectors
240 signal transmission lines
242 radio-frequency (RF) signal lines
244 signal winding displacements
310 guiding blocks
311 accommodation chambers
320 bendable connection point substrates
321 conductive junction points
323 ground connection packing rings
330 reference columns
341 line contacts
343 ground contacts
410 conducting wires
420 pilot holes
610 general connectors
613 pogo pin
Embodiment
Fig. 2 shows the arrangement for testing integrated circuit of one of embodiment of the invention, its mainly comprise signal support plate (load board) 220, link block 230, with signal transmission line 240.Link block 230 is connected with signal support plate 220 by signal transmission line 240, and signal support plate 220 then further is connected to measuring head (test head) 210.Wherein, measuring head 210 is mainly used to analyze the test signal of a to-be-measured integrated circuit (be not shown in graphic in); Signal support plate 220 is as the analog line of to-be-measured integrated circuit; 240 of signal transmission lines are used for transmitting various test signals.With radio frequency (RF) integrated circuit is example, and signal transmission line 240 includes signal winding displacement 244 and radio-frequency (RF) signal line 242, and it is connected with winding displacement joint 221, signal wire 223 on the signal support plate 220 respectively; The other end of signal winding displacement 244 and radio-frequency (RF) signal line 242 then is connected with winding displacement joint 231, signal wire 233 on the link block 230 respectively.Link block 230 consists predominantly of board 235, and the connector 237 that is used for accepting to-be-measured integrated circuit.The disclosed arrangement for testing integrated circuit of present embodiment adopts modular notion, it can use general signal support plate 220 to test similar but veriform to-be-measured integrated circuit, so not only can increase the versatility of signal support plate 220, also save the time of changing.Present embodiment can also cooperate link block 230 a divider handler (be not shown in graphic in) and be fixed on desired location, thereby increases the facility on using.
The stereographic map and the local amplification profile of the link block 230 thin portion structures in Fig. 3 A and Fig. 3 B difference displayed map 2.Except aforesaid winding displacement joint 231, signal wire 233, board 235, connector 237 include guiding block 310, bendable connection point substrate 320, with reference column 330.Guiding block 310 is positioned at bendable connection point substrate 320 tops, and 330 of reference columns run through four corners of guiding block 310, bendable connection point substrate 320.Wherein, guiding block 310 is by the madial wall of the accommodation chamber 311 that is positioned at central authorities, and auxiliary to-be-measured integrated circuit can accurately be inserted in the accommodation chamber 311 of connector 237; Bendable connection point substrate 320 conducting wire 410 (Fig. 4 A, Fig. 4 B) on it is provided with a plurality of conductive junction points 321, and the one end contacts with the pin of to-be-measured integrated circuit, and the other end then contacts with line contacts 341 on the board 235, to reach the purpose of transmission signal; 330 of reference columns be as guiding block 310, bendable connection point substrate 320, and board 235 between location and fixing.Use bendable connection point substrate 320 in the present embodiment, can replace the pogo pin Pogo Pin in traditional connector, not only reduce the wearing and tearing of circuit junction, also significantly reduced cost.
Fig. 4 A and Fig. 4 B respectively the bendable connection point substrate 320 among displayed map 3A, Fig. 3 B and on conducting wire 410.In the present embodiment, bendable connection point substrate 320 is a cross shape; Each end of this cross shape has pilot hole 420, and its position is corresponding to reference column 330 (Fig. 3 A); Be positioned at bendable connection point substrate 320 upper and lower surfaces pilot hole 420 around locate to be provided with ground connection packing ring 323; Conducting wire 410 is then contained in the central area of bendable connection point substrate 320.Bendable connection point substrate 320 is a kind of soft dielectric material, and the stress when it can absorb to-be-measured integrated circuit and contacts with conductive junction point 321 is with the interference that prevents signal.In the present embodiment, bendable connection point substrate 320 uses a kind of epoxy resin fiberglass material FR4 of low combustible, and it has the ability of absorbing high-frequency noise, can be used in frequency applications especially, and the noise when reducing test is to improve accuracy; In addition, the conductive junction point 321 on the bendable connection point substrate 320 can use the manufacture of semiconductor technology to make, and makes the precision of conductive junction point 231 higher and electric conductivity is good.
Bendable connection point substrate 320 of the present invention is applicable to the integrated circuit of the various different packing forms of test; When the conductive junction point 321 of bendable connection point substrate 320 lost efficacy because of excessive wear causes, only need to change bendable connection point substrate 320, and need not change whole link block 230 or signal support plate 220, thereby make cost significantly reduce and promote efficient.In addition, reach the effect of ground connection by the ground contact on ground connection packing ring around the pilot hole 420 323 and the board 235 343 electrically connects, can reduce signal and disturb.Though the bendable connection point substrate 320 of present embodiment be shaped as cruciform, so be not limited thereto pattern, the person all can so long as can reach the same function; The arrangement of conducting wire 410 then can be different according to actual to-be-measured integrated circuit.
Fig. 5 shows the arrangement for testing integrated circuit of another embodiment of the present invention.Different with Fig. 2 is that present embodiment is connected directly to signal support plate 220 by the bendable connection point substrate 320 of connector 237, has omitted board 235 and signal transmission line 240.Identical with last embodiment is, replaces traditional pogo pin with bendable connection point substrate 320, thereby the problem that can avoid the line contacts 341 of signal support plate 220 to lose efficacy because of excessive wear.
Fig. 6 shows the arrangement for testing integrated circuit of further embodiment of this invention.Different with the first two embodiment is that present embodiment also has been used the general connector 610 of tool pogo pin 613.Between connector 610 and signal support plate 220, add bendable connection point substrate 320, make pogo pin 613 can directly not contact, but contact with the conductive junction point 321 of bendable connection point substrate 320 with the line contacts 341 of signal support plate 220; Cause the wearing and tearing of conductive junction point 321 of bendable connection point substrate 320 when long-time use after, only need change bendable connection point substrate 320, and need not change whole signal support plate 220, thereby can significantly promote the serviceable life of signal support plate 220.
The above embodiments only are explanation technological thought of the present invention and characteristics, its purpose makes the personage who is familiar with this skill can understand content of the present invention and is implementing according to this, when can not with qualification claim of the present invention, be that all other do not break away from various equivalences that disclosed spirit finishes and change or modify and all be encompassed in the disclosed scope of the present invention, all should be included in the described claim scope.
Claims (10)
1. arrangement for testing integrated circuit, it is mainly constructed at least and includes:
One signal support plate; And
One link block, be electrically connected at this signal support plate, this link block comprises a bendable connection point substrate, it is between a to-be-measured integrated circuit and this signal support plate, this bendable connection point substrate comprises a conducting wire, and it is provided with a plurality of conductive junction points and electrically connects with this to-be-measured integrated circuit and this signal support plate respectively.
2. arrangement for testing integrated circuit as claimed in claim 1 more comprises at least one signal transmission line, is connected between this signal support plate and this link block.
3. arrangement for testing integrated circuit as claimed in claim 1, wherein above-mentioned link block more comprises a guiding block, has an accommodation chamber in it, in order to accept this to-be-measured integrated circuit.
4. arrangement for testing integrated circuit as claimed in claim 3, wherein above-mentioned link block more comprises at least one reference column, in order to should bendable connection point substrate and this guiding block fastened to each other.
5. arrangement for testing integrated circuit as claimed in claim 1, wherein above-mentioned link block comprises a connector, is provided with a plurality of pogo pin in it, between this to-be-measured integrated circuit and this bendable connection point substrate.
6. arrangement for testing integrated circuit as claimed in claim 4, wherein above-mentioned link block more comprises a board, in order to this bendable connection point substrate of carrying and this guiding block.
7. arrangement for testing integrated circuit as claimed in claim 6, wherein above-mentioned bendable connection point substrate has at least one pilot hole, its position is with respect to this reference column, make by this this guiding block, this bendable connection point substrate, and this board is located each other, fixing.
8. arrangement for testing integrated circuit as claimed in claim 7, wherein the pilot hole of above-mentioned bendable connection point substrate around be provided with the ground connection packing ring, in order to this board or this signal support plate on ground contact electrically connect.
9. bendable connection point substrate, be applicable in the arrangement for testing integrated circuit, this bendable connection point substrate is between a to-be-measured integrated circuit and a signal support plate, and this bendable connection point substrate comprises a conducting wire, and can electrically connect with this to-be-measured integrated circuit and this signal support plate respectively by being located at a plurality of conductive junction points on this conducting wire.
10. bendable connection point substrate as claimed in claim 9, wherein the material of above-mentioned bendable connection point substrate comprises the epoxy resin fiberglass material FR4 of low combustible at least.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200610121431 CN101131398B (en) | 2006-08-22 | 2006-08-22 | Integrated circuit tester |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200610121431 CN101131398B (en) | 2006-08-22 | 2006-08-22 | Integrated circuit tester |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101131398A true CN101131398A (en) | 2008-02-27 |
| CN101131398B CN101131398B (en) | 2011-06-15 |
Family
ID=39128742
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200610121431 Expired - Fee Related CN101131398B (en) | 2006-08-22 | 2006-08-22 | Integrated circuit tester |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101131398B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101676731A (en) * | 2008-09-17 | 2010-03-24 | 汉民测试系统科技股份有限公司 | Circuit board structure of circuit test device |
| CN109313150A (en) * | 2016-04-19 | 2019-02-05 | 亚德诺半导体无限责任公司 | Wear monitoring device |
| US11079429B2 (en) | 2017-03-07 | 2021-08-03 | Nxp B.V. | ATE testing system and method for millimetre wave packaged integrated circuits |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW437037B (en) * | 1998-09-23 | 2001-05-28 | Wells Cti Inc | Vertically actuated bag socket |
| US6911835B2 (en) * | 2002-05-08 | 2005-06-28 | Formfactor, Inc. | High performance probe system |
| CN2600824Y (en) * | 2002-12-26 | 2004-01-21 | 富士康(昆山)电脑接插件有限公司 | Testing device connector |
| CN2804876Y (en) * | 2005-04-30 | 2006-08-09 | 董玟昌 | Micro-electromechanical prob circuit film |
-
2006
- 2006-08-22 CN CN 200610121431 patent/CN101131398B/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101676731A (en) * | 2008-09-17 | 2010-03-24 | 汉民测试系统科技股份有限公司 | Circuit board structure of circuit test device |
| CN109313150A (en) * | 2016-04-19 | 2019-02-05 | 亚德诺半导体无限责任公司 | Wear monitoring device |
| CN109313150B (en) * | 2016-04-19 | 2022-10-28 | 亚德诺半导体国际无限责任公司 | Wear monitoring device |
| US11079429B2 (en) | 2017-03-07 | 2021-08-03 | Nxp B.V. | ATE testing system and method for millimetre wave packaged integrated circuits |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101131398B (en) | 2011-06-15 |
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| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110615 Termination date: 20120822 |