CN101117208A - Method for preparation of one-dimensional silicon nanostructure - Google Patents
Method for preparation of one-dimensional silicon nanostructure Download PDFInfo
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- CN101117208A CN101117208A CNA2007100302162A CN200710030216A CN101117208A CN 101117208 A CN101117208 A CN 101117208A CN A2007100302162 A CNA2007100302162 A CN A2007100302162A CN 200710030216 A CN200710030216 A CN 200710030216A CN 101117208 A CN101117208 A CN 101117208A
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Abstract
The invention discloses a method for preparing one-dimensional silicon nanostructure. The order of the processing steps adopted by the invention is as follows: (A) nanometer particle mould is prepared on the surface of backing material; (B) etching of the backing material is completed by use of plasma etching technology. The step (A) includes the following procedures: (i) the surface of backing material is coated with one layer of photoresist through spin coating at first, and then micropores are formed at the surface of backing material through adopting electronic photoetching technique; (ii) one layer of mask film is deposited on the surface of backing material; (iii) photoresist peeling-off of the surface of backing material deposited with the mask film is completed so as to form the nanometer particle mask at the micropores of procedure (i). In addition, step (A) can also be as follows: one layer of metallic film is firstly deposited on the surface of backing material and then heat treatment of the metallic film is completed to obtain metallic nanometer particle mask on the surface of backing material. The silicon nano wire/tip prepared by the invention is characterized in erection, order and controllable position and diameter etc., thereby being particularly favorable to manufacture and assembly of device.
Description
Technical field
The present invention relates to nano material design and fabrication technology field, relate in particular to a kind of preparation method of one-dimensional silicon nanostructure.
Background technology
Quasi-one-dimensional nanometer material, as CNT, silicon nanowires/point, silicon carbide nanometer line etc., owing to have nanoscale effects such as quantum confinement, coulomb blockade, quantum tunneling, the emission enhancing of tip end surface field, make it on photoelectric properties, embody the characteristic different with the body material.In these materials, silicon nanowires/point is because its unique electron transport and electronic emission performance, and characteristics such as convenient and conventional semiconductors ic process compatibility and receiving much concern.Mainly contain following several method for preparing silicon nanowires/point at present: (1) laser ablation method (laser ablation), (2) thermal evaporation (thermal evaporation), (3) overcritical liquid phase method (supercritical fluid solution-phase), (4) catalyst-free oxidation auxiliary law (catalyst free of oxide-assisted growth).
In actual applications, a lot of occasions require all that monodimension nanometer material has uprightly, characteristics such as orderly, position and controllable diameter.And existing these several preparation methods, formed nano material all is difficult to satisfy the demand of aforementioned applications occasion.
Summary of the invention
For solving the deficiencies in the prior art, the object of the present invention is to provide a kind of preparation and plasma etch process of combining nano mask, prepare the method for one-dimensional silicon nanostructure.
The present invention is achieved in that a kind of method for preparing one-dimensional silicon nanostructure, it is characterized in that sequence of process steps is as follows:
(A) prepare the nano particle mask at substrate material surface;
(B) with plasma etching technology base material is carried out etching.
As a preferred embodiment of the present invention, described steps A may further comprise the steps:
(i) at first at substrate material surface spin coating one deck photoresist, then adopt the electric lithography technology to form micropore at substrate material surface;
(ii) at substrate material surface deposition one deck mask film;
(iii) the base material that has deposited mask film is carried out photoresist stripping process, thereby form the nano particle mask at the micropore place of step I.
The mask material of above-mentioned steps ii is a metal, or metal oxide, or silica.
As another preferred embodiment of the present invention, in the described steps A, at first at substrate material surface deposition layer of metal film; Then metallic film is heat-treated, obtain the metal nanoparticle mask at substrate material surface.
Base material among the above-mentioned steps A is monocrystalline silicon or non-crystalline silicon, or is deposited on monocrystalline silicon or amorphous silicon membrane on the substrate.
The described plasma etching technology of above-mentioned steps B can be realized anisotropy or isotropic etching by the modulation process parameter, thereby obtain silicon nanowires/point.
The size of mask particle of the present invention, density and position can be controlled by regulating technological parameter in preparation process; And the height of silicon nanowires/point can be controlled by the length of regulating etch period.Compared with prior art, the present invention adopts nanometer mask plasma etching method (plasma etching with nano-masks), silicon nanowires/the point for preparing has uprightly, in order, characteristics such as position and controllable diameter, be very beneficial for element manufacturing and assembling.And advantages such as technology is simple, good reproducibility that this method has, and its technology and standard semiconductor integrated circuit processing technology compatibility are to promoting making and the great significance based on the one-dimensional silicon nanostructure device.
Description of drawings
Fig. 1 is the preparation principle figure of monocrystalline silicon nano line/point;
Fig. 2 is SEM (SEM) figure of the crome metal point nanometer mask of even solid matter;
Fig. 3 (a) and (b) are respectively that the SEM of upright orderly monocrystalline silicon nano line/point schemes;
Fig. 4 is the preparation principle figure of non-crystalline silicon nano wire;
Fig. 5 is SEM (SEM) figure of non-crystalline silicon nano wire.
The specific embodiment
Disclosed by the invention is a kind of method for preparing one-dimensional silicon nanostructure, and its base material can be a monocrystalline silicon, or is deposited on the monocrystalline silicon thin film on the substrate; Can be non-crystalline silicon also, or be deposited on the amorphous silicon membrane on the substrate; The nano particle mask can obtain by electron beam lithography, also can obtain by the preparation and the dispersion of nano particle.
When adopting electron beam lithography to form the nano particle mask, its sequence of process steps is as follows:
(a) at first at substrate material surface spin coating one deck photoresist, then adopt the electric lithography technology to form micropore at substrate material surface;
(b) substrate material surface deposition one deck mask film on remaining photoresist and the formed micropore; Wherein mask material can be metal, or metal oxide, or silica.
(c) base material that has deposited mask film is carried out photoresist stripping process, thereby form the nano particle mask at the micropore place of step a;
(d) with plasma etching technology base material is carried out etching.Wherein adopt isotropic etching technology to obtain the nanometer point; Adopt anisotropic etch process to obtain nano wire.
When the preparation of adopting nano particle and process for dispersing obtained the nano particle mask, its sequence of process steps was as follows: at first at substrate material surface deposition layer of metal film; Then metallic film is heat-treated, obtain the metal nanoparticle mask at substrate material surface; With plasma etching technology base material is carried out etching at last.
With different nano particle mask formation methods, the present invention is done further detailed description below in conjunction with Figure of description:
Embodiment one:
Present embodiment adopts electron beam lithography to form the nano particle mask, and adopts monocrystalline silicon as base material, and concrete processing step is as follows:
1. adopt the crystal orientation to be＜100〉n type height lead monocrystalline silicon (resistivity be 2.4～3.7 * 10
-3Ω cm) 11 as substrate.
2. utilize KW-4AH type hot plate silicon substrate to be carried out toasting before the gluing 30 minutes time under 180 ℃ temperature.
3. utilize Karl Suss RC8 type glue spreader, at the even spin coating last layer of the surface of silicon electron beam resist PMMA (950K C4) 12 that baking finishes, the gluing rotating speed is 3000rpm, and acceleration is 10000rpm/s, and the time is 30 seconds, and glue is thick to be 380nm.
4. utilize KW-4AH type hot plate that gluing sample is carried out preceding baking, baking temperature is 180 ℃, and the time is 90s.
5. utilize Raith E-line electron-beam exposure system, on the sample that coats PMMA, it is 650nm that exposure forms evenly distributed spacing, and diameter is the micropore of 150nm.Exposure parameter is: accelerating potential: 10KV; Exposure dose: 140 μ C/cm
2Operating distance: 10mm.
6. adopting MIBK: IPA is that 1: 3 developer solution develops to exposed sample, and developing time is 30 seconds; Adopt IPA to carry out photographic fixing then, the time is 10 seconds.Obtain the micropore of the even solid matter shown in Fig. 1 (a).
7. shown in Fig. 1 (b), utilize SP-3 type magnetic control platform finishing thick crome metal (Cr) film 13 of the sample surfaces deposition about 50nm of one deck of beamwriter lithography.The preparation condition of film is as follows: base vacuum: 5.0 * 10
-3Pa; Process gas: high-purity argon (Ar) gas (flow: 60sccm); Sputtering power: d.c. sputtering 300W; Time: 5 minutes; Operating temperature: room temperature.
8. adopt the PMMA special use liquid Remover PG that removes photoresist that the sample of finishing plated film is peeled off (liftoff) technology.The stripping technology step is as follows: at first utilize KW-4AH type hot plate that Remover PG is heated to 70 ℃, sample is immersed wherein left standstill 5 minutes, treat that PMMA fully dissolves; Then sample is taken out, ultrasonic cleaning is after 5 minutes in acetone, and the acetone that more renews continues ultrasonic cleaning 5 minutes; Then placed the ethanol ultrasonic cleaning 5 minutes, and used deionized water rinsing then, dry up with drying nitrogen at last.
9. after finishing stripping technology, will be at the micropore place of surface of silicon, form even solid matter, diameter is about 150nm, the chromium of spacing 650nm (Cr) some mask 15 is shown in Fig. 1 (c).
10. above-mentioned silicon chip sample being put in the inductively coupled plasma etching machine (Oxford, system 180), is mask with the Metal Cr round dot, and silicon is carried out dry anisotropic/same sex etching, to obtain silicon nanowires/point 14, shown in Fig. 1 (d).
Typical anisotropic etch process parameter is: process gas C
4F
8(65sccm) and SF
6(15sccm), air pressure 8mTorr, RF power 38W, ICP power 800W, 20 ℃ of underlayer temperatures, etch period 7 minutes.
Typical isotropic etching technological parameter is: process gas C
4F
8(50sccm) and SF
6(25sccm), air pressure 10mTorr, RF power 40W, ICP power 750W, 20 ℃ of underlayer temperatures, etch period 7 minutes.
In the upright one-dimensional silicon nanostructure technical process in order of above-mentioned preparation, the sample after committed step finished, we utilize SEM (SEM) that it has been carried out the pattern sign.Shown in Figure 2 is the crome metal point mask 15 of finishing the even solid matter that forms behind the stripping technology on silicon substrate, and dot center's spacing is 650nm, and diameter is 150nm.Shown in Fig. 3 (a) is to finish the upright orderly monocrystalline silicon nano line 14 that obtains behind the anisotropic plasma etch.As can be seen from the figure, the about 50 ~ 150nm of its diameter highly is ~ 1.0 μ m.Shown in Fig. 3 (b) for to finish the upright orderly monocrystalline silicon nanometer point 14 that obtains after the isotropic plasma etching, highly be ~ 1.2 μ m.
Embodiment two:
Present embodiment adopts the preparation and the process for dispersing of nano particle to obtain the nano particle mask, and adopts the substrate that deposits amorphous silicon membrane as base material, and concrete processing step is as follows:
1. shown in Fig. 4 (a), deposit the silica (SiO of one deck 0.5 μ m successively on monocrystalline silicon piece 42 surfaces of polishing
2) crome metal (Cr) layer 44 of layer 43 and 0.2 μ m is as substrate, wherein crome metal (Cr) layer 44 is on silicon dioxide layer 43.
2. substrate is positioned over the deposition of carrying out amorphous silicon membrane 41 in the plasma reinforced chemical vapor deposition system (PECVD), shown in Fig. 4 (a).Wherein reacting gas is the SiH of 400sccm
4(5%)/and Ar (95%), radio frequency source (RF) power is 40W, and reaction pressure 60Pa, sedimentation time are 60 minutes, and pairing film thickness is about 1.2 μ m.
3. at the golden film of several nanometer thickness of sample surfaces d.c. sputtering deposition one deck of deposition of amorphous silicon films, with heat-treating methods in the sample surfaces preparation and disperse to form gold nano grain 45 as the nanometer mask, shown in Fig. 4 (b).Technology for Heating Processing is: be warmed up to 600 ℃ under the protection of Ar gas (200sccm); Keeping temperature then is 600 ℃, stops to feed Ar gas and change logical hydrogen (200sccm) gold thin film is handled, and the processing time is 30 minutes; After handling, stop logical hydrogen, feed Ar gas (200sccm) again, cool to room temperature, can obtain equally distributed gold nano grain at silicon chip surface, as nano particle mask 45 as protection.
4. the sample that will prepare the nanometer mask is put into inductively coupled plasma etching system (ICP) and is carried out etching and can obtain upright orderly amorphous silicon nanowire 46, shown in Fig. 4 (c).Wherein etching gas is C
4F
8(65sccm)/SF
6(15sccm), the RF source power is 38W, and the ICP source power is 800W, and air pressure is 8mTorr, and etch period is 5 minutes.
The amorphous silicon nanowire 46 for preparing is carried out SEM (SEM) analysis.As shown in Figure 5, can see at substrate surface having formed upright orderly amorphous silicon nanowire that the diameter of amorphous silicon nanowire is about 50 ~ 100nm, the about 500nm of length.
Base material in the embodiment of the invention one can adopt non-crystalline silicon or be deposited on amorphous silicon membrane on the substrate; The base material of embodiment two can adopt monocrystalline silicon or be deposited on monocrystalline silicon thin film on the substrate, when the base material that has formed the nano particle mask is carried out plasma etching, can adopt embodiment one described isotropic etching technology to obtain the nanometer point, also can adopt embodiment one described anisotropic etch process to obtain nano wire.
That more than disclose only is two embodiment of the present invention, can not limit interest field of the present invention with this, and the equivalent variations according to claim of the present invention is done still belongs to the scope that the present invention is contained.
Claims (8)
1. method for preparing one-dimensional silicon nanostructure is characterized in that sequence of process steps is as follows:
(A) prepare the nano particle mask at substrate material surface;
(B) with plasma etching technology base material is carried out etching.
2. a kind of method for preparing one-dimensional silicon nanostructure according to claim 1, it is characterized in that: described steps A may further comprise the steps:
(i) at first at substrate material surface spin coating one deck photoresist, then adopt the electric lithography technology to form micropore at substrate material surface;
(ii) at substrate material surface deposition one deck mask film;
(iii) the base material that has deposited mask film is carried out photoresist stripping process, thereby form the nano particle mask at the micropore place of step I.
3. a kind of method for preparing one-dimensional silicon nanostructure according to claim 1 is characterized in that: in steps A, at first at substrate material surface deposition layer of metal film; Then metallic film is heat-treated, obtain the metal nanoparticle mask at substrate material surface.
4. according to claim 2 or 3 described a kind of methods that prepare one-dimensional silicon nanostructure, it is characterized in that: the base material described in the steps A is a monocrystalline silicon, or is deposited on the monocrystalline silicon thin film on the substrate.
5. according to claim 2 or 3 described a kind of methods that prepare one-dimensional silicon nanostructure, it is characterized in that: the base material described in the steps A is a non-crystalline silicon, or is deposited on the amorphous silicon membrane on the substrate.
6. a kind of method for preparing one-dimensional silicon nanostructure according to claim 2 is characterized in that: the described mask material of step I i is a metal, or metal oxide, or silica.
7. according to claim 2 or 3 described a kind of methods that prepare one-dimensional silicon nanostructure, it is characterized in that: step B adopts isotropic etching technology, and technological parameter is: process gas C
4F
8(50sccm) and SF
6(25sccm), air pressure 10mTorr, RF power 40W, ICP power 750W.
8. according to claim 2 or 3 described a kind of methods that prepare one-dimensional silicon nanostructure, it is characterized in that: step B adopts anisotropic etch process, and technological parameter is: process gas C
4F
8(65sccm) and SF
6(15sccm), air pressure 8mTorr, RF power 38W, ICP power 800W.
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