CN101114655A - Film transistor array substrates and its producing method, repairing method - Google Patents
Film transistor array substrates and its producing method, repairing method Download PDFInfo
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- CN101114655A CN101114655A CNA2007100446366A CN200710044636A CN101114655A CN 101114655 A CN101114655 A CN 101114655A CN A2007100446366 A CNA2007100446366 A CN A2007100446366A CN 200710044636 A CN200710044636 A CN 200710044636A CN 101114655 A CN101114655 A CN 101114655A
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Abstract
The invention discloses a thin film transistor array substrate and manufacturing and repairing methods of the thin film transistor array substrate which comprises a plurality of grid scanning lines extending along a first direction and a plurality of data lines extending along a second direction. The grid scanning lines and the data lines intersect with each other and form a pixel region, in which a thin film transistor and a pixel electrode are arranged. Metal pattern formed above the grid scanning lines or below the data lines are separated from the data lines metal layer pattern and the grid scanning lines metal layer pattern. The invention can repair the broken-circuit of the data lines and the grid scanning lines in the pixel section without additional fabrication procedure of the existing array substrate and with simple and convenient repairing.
Description
Technical field
The present invention relates to a kind of array base palte and manufacture method thereof, restorative procedure, but particularly relate to thin-film transistor array base-plate that a kind of liquid crystal display of rehabilitating line defect uses and manufacture method thereof, restorative procedure.
Background technology
Tft liquid crystal show (TFT-LCD) panel be utilize thin-film transistor (TFT) thus the power of the orientation control printing opacity of control liquid crystal molecule is come display image.A complete TFTLCD panel generally includes module backlight, polaroid, tft array substrate, CF (color film) substrate, is clipped in layer of liquid crystal molecule and drive circuit between the upper and lower base plate.Viewing area on the tft array substrate comprises a plurality of subpixel area, each subpixel area is generally two controlling grid scan lines and two data wires and intersects formed rectangle or other shape area, be provided with thin-film transistor and pixel electrode in it, thin-film transistor serves as switch element.
Usually, the gate insulator of grid level scan line, covering grid electrode and the controlling grid scan line that is formed with grid on the thin-film transistor array base-plate successively and is electrically connected with this grid, semiconductor layer, source/drain electrode and and the source electrode data wire, passivation layer, pixel electrode, the alignment films that are electrically connected, its manufacturing process is as shown in Figure 1.
Controlling grid scan line and data wire are mainly used to provide signal of video signal to drive pixel electrode, but the influence of manufacturing process such as film forming, little shadow, etching in the time of owing to making, controlling grid scan line and data wire open circuit easily, cause line defect, therefore, in the manufacture process of array base palte, the demonstration that can not avoid the broken string of gate line or data wire to cause fully is bad.For avoiding the production of LCD panel owing to the yield that line defect causes descends, need repair line defect, broken string at controlling grid scan line or data wire is bad, common processing method is to detect the bad position of broken string in back to back inspection operation, is repaired with the method for laser film forming (Laser CVD).There are some problems in this method: 1, and the bad position that takes place to break is undetected, i.e. omission; 2, broken string occurs in checks that this broken string can't be repaired by said method in the later operation.Disclose a kind of among the U.S. Pat 7019805B2 to data wire the open circuit structure and the restorative procedure thereof of the liquid crystal display substrate repaired, the method of this patent utilization grid layer shading line repair data line, promptly after LCDs shows that broken data wire is found in inspection, use laser to weld (Laser Welding) will break data wire and conducting of shading line of both sides, make signal can walk around the broken string position, pass to from grid layer shading line on the data wire of broken string opposite side.But this structure can only be repaired and be occurred in opening circuit on the data wire, then can't repair for the broken string that occurs on the gate line.
Summary of the invention
But the technical problem to be solved in the present invention provides the thin-film transistor array base-plate that a kind of repair data line or controlling grid scan line open circuit.
But another technical problem that the present invention will solve provides does not a kind ofly increase existing operation, do not influence the manufacture method that realizes the thin-film transistor array base-plate that repair data line or controlling grid scan line open circuit under the aperture opening ratio.
The technical problem again that the present invention will solve provides a kind of method that can convenient and simple reparation thin-film transistor array base-plate.
For achieving the above object, the invention provides a kind of thin-film transistor array base-plate, comprise many controlling grid scan lines that extend along first direction; Many the data wires that extend along second direction, controlling grid scan line and data wire intersect to form pixel region; Be arranged on thin-film transistor and pixel electrode in the pixel region; Be formed with metal pattern on the wherein said controlling grid scan line or under the data wire, described metal pattern and data wire metal layer pattern, controlling grid scan line metal layer pattern are spaced from each other.
Be formed with contact hole on described controlling grid scan line and the top metal pattern thereof, also be formed with the pixel electrode layer metal pattern on the controlling grid scan line.
The invention provides a kind of manufacture method of thin-film transistor array base-plate, comprise the steps: to form a first metal layer on a transparency carrier; The described the first metal layer of patterning, the controlling grid scan line that forms a grid and be electrically connected with grid; Form one second metal level on described substrate; Described second metal level of patterning, the data wire that forms one source pole, a drain electrode and be electrically connected with source electrode, and on controlling grid scan line, form metal pattern, and other metal pattern that forms on this metal pattern and second metal level is spaced from each other; Above drain electrode, form passivation insulation, and on passivation insulation, etch contact hole; Form transparency conducting layer on the transparency carrier surface, form pixel electrode pattern after the photoetching.
The invention provides the manufacture method of another kind of thin-film transistor array base-plate, comprise the steps: to form a first metal layer on a transparency carrier; The described the first metal layer of patterning, the controlling grid scan line that forms a grid and be electrically connected with grid; Form one second metal level on described substrate; Described second metal level of patterning, the data wire that forms one source pole, a drain electrode and be electrically connected with one source pole; Wherein when the patterning the first metal layer, the metal pattern of retention data line correspondence position, and this metal pattern is spaced from each other with other metal pattern with layer.
The present invention also provides a kind of method of repairing thin-film transistor array base-plate, and this thin-film transistor array base-plate comprises many controlling grid scan lines that extend along first direction; Many the data wires that extend along second direction, controlling grid scan line and data wire intersect to form pixel region; Be arranged on thin-film transistor and pixel electrode in the pixel region; Be formed with metal pattern on the wherein said controlling grid scan line or under the data wire, described metal pattern and data wire metal layer pattern grid or scan line metal layer pattern are spaced from each other; When controlling grid scan line or data wire open circuit, shine connection in the both sides of broken string position with laser, controlling grid scan line or data wire are connected by metal pattern, form the path that gets around the part that opens circuit.
Based on above-mentioned design, thin-film transistor array base-plate of the present invention and manufacture method thereof, restorative procedure, owing to be formed with metal pattern on the controlling grid scan line or under the data wire, overcome in the prior art shortcoming that can only repairing pixel interval censored data line opens circuit, the open circuit conditions of data wire that not only can the repairing pixel interval can also be repaired opening circuit of controlling grid scan line; In the process of manufacturing array substrate, by under data wire directly the reserve part the first metal layer or on controlling grid scan line reserve part second metal level realize having the thin-film transistor array base-plate of repair function, do not increase existing operation, do not influence aperture opening ratio, as long as carry out the purpose that the laser radiation welding can reach reparation in the both sides at broken string place, repair convenient and simple.When described controlling grid scan line and above metal pattern on form contact hole, when being formed with the pixel electrode layer metal pattern on the controlling grid scan line, the pixel electrode layer metal pattern connects controlling grid scan line and top metal pattern thereof by contact hole, can reduce the delay (RC Delay) of signal transmission on the controlling grid scan line.
In order further to understand feature of the present invention and technology contents, see also following about detailed description of the present invention and accompanying drawing.Yet accompanying drawing is only for reference and aid illustration usefulness, is not construed as limiting the invention.
Description of drawings
Fig. 1 is the manufacturing flow chart of thin-film transistor array base-plate in the prior art;
Fig. 2 is the structural representation of the thin-film transistor array base-plate of the embodiment of the invention one;
Fig. 3 is the structural representation of the thin-film transistor array base-plate of the embodiment of the invention one;
Fig. 4 is the structural representation of the thin-film transistor array base-plate of the embodiment of the invention two;
Fig. 5 is the schematic diagram that adopts the embodiment of the invention one structure that controlling grid scan line is opened circuit and repairs.
The drawing reference numeral explanation:
10: controlling grid scan line 11: metal pattern 12, contact hole
13: pixel electrode layer pattern 14,15: the welding point
20: data wire 21: metal pattern
30: pixel electrode
40: thin-film transistor 41: grid 42: source electrode 43: drain electrode
431: contact hole
Embodiment
The invention will be further described below in conjunction with accompanying drawing and exemplary embodiments.
Embodiment one
Fig. 2, Fig. 3 are the structural representations of the thin-film transistor array base-plate of the embodiment of the invention one.
With reference to Fig. 2, thin-film transistor array base-plate comprises many controlling grid scan lines 10 that extend along first direction; Many the data wires 20 that extend along second direction, controlling grid scan line 10 and data wire 20 intersect to form pixel region; Thin-film transistor 40 and pixel electrode 30 are set in the pixel region, be formed with metal pattern 11 on the controlling grid scan line 10, thin-film transistor 40 is by grid 41, source electrode 42 and drain electrode 43 constitute, grid 41 is electrically connected with controlling grid scan line 10, drain electrode 43 is electrically connected with data wire 20, source electrode 42 is connected with pixel electrode 30 by contact hole 41, grid 41, controlling grid scan line 10 is formed on the first metal layer (M1), source electrode 42, drain electrode 43, data wire 20 is formed on second metal level (M2), M1, M2 can be the good Al of electric conductivity, Ta or Cr metal level, there is the SiNx insulating barrier to separate between two-layer, source electrode 42 and overlapping grid 41 both sides that are deposited on of drain electrode 43 symmetries, amorphous Si layer is positioned at grid 41 and source, drain electrode 42, between 43; ITO (tin indium oxide) pixel electrode is deposited upon the superiors, and insulate by the SiNx protective layer between source/drain metal layer.Pixel electrode 30 is electrically connected by contact hole 431 and drain electrode 43.
With reference to Fig. 3, be formed with contact hole 13 on described controlling grid scan line 10 and the top metal pattern 11 thereof, also be formed with pixel electrode layer pattern 13 on the controlling grid scan line 10.Pattern 13 connects controlling grid scan line 10 and top metal pattern 11 thereof by contact hole 12, can reduce the delay of signal transmission on the controlling grid scan line 10.
Realize the manufacturing process of the array base palte of the foregoing description structure shown in Figure 2, identical with common tft array substrate manufacturing process, illustrate with five road photomask board (5mask) technologies below, at first, on a transparency carrier, form the first metal layer (M1), as the good Al of electric conductivity, Ta or Cr metal level, utilize photoetching process to form grid 41 and controlling grid scan line 10 patterns; Form gate insulator, amorphous silicon and doped amorphous silicon layer then successively, utilize photoetching process to form semiconductor pattern; Next, on substrate, form second metal level, the Al good as electric conductivity, Ta or Cr metal level, utilize photoetching process to form source/drain electrode 42,43, data wire 20 metal patterns, in formation source/drain electrode 42, in the time of 43 metal patterns, keep source, controlling grid scan line 10 tops/leakage metal level metal pattern 11, for example this part metals pattern 11 is a rectangle, described metal pattern 11 is with source electrode 42, drain electrode 43 and data wire 20 are separated from each other, and described metal pattern 11 is with the distance of other source/leakages metal level metal pattern enough (more than 10um) and be unlikely to follow other source/leakage metal level metal pattern to be short-circuited greatly; Next, form passivation layer, utilize photoetching process to form passivation layer pattern, promptly contact hole 431; At last, form transparent conductor layer,, utilize photoetching process to form pixel electrode pattern as tin indium oxide (ITO) or indium zinc oxide (IZO).
Tft array substrate for four road photomask (4mask) technologies, the manufacturing process of its manufacturing process and common four road photomask boards is just the same, catch up with that to state five road photomask board manufacture methods similar, in the formation source/during the leakage metal layer pattern, reserve part source/leakage metal level on controlling grid scan line 10, promptly metal pattern 11.
The manufacturing process of realizing structure shown in Figure 3 is on the basis of above-mentioned basic manufacturing process, forming transparent conductor layer, when utilizing photoetching process to form pixel electrode pattern, also reserve part or whole transparent conductor layer patterns 13 on controlling grid scan line 10, this pattern 13 can be with the source/leakage metal level metal pattern 11 and controlling grid scan line 10 conductings of reserve part, can play the effect that reduces controlling grid scan line 10 resistance, thereby reach the purpose that reduces signal transmission delay on the controlling grid scan line 10.
Fig. 5 is the schematic diagram that adopts the embodiment of the invention one structure that controlling grid scan line is opened circuit and repairs.
With reference to Fig. 5, when controlling grid scan line 10 is short-circuited at the A-B place, can carry out laser in two positions of welding point C, D from the back side (outside of liquid crystal cell) of array base palte welds, by will break controlling grid scan line 10 metal conductions of both sides of metal pattern 11, thereby can repair the controlling grid scan line broken string.
Embodiment two
Fig. 4 is the structural representation of the thin-film transistor array base-plate of the embodiment of the invention two.
With reference to Fig. 4, what the structure of the thin-film transistor array base-plate that provides with embodiment one was different is, the data wire in the present embodiment is formed with metal pattern 21 20 times, and metal pattern 21 is formed on the layer identical with controlling grid scan line 10.The material of metal pattern 21 is identical with the material of controlling grid scan line 10.In the flow process of manufacturing array substrate, when the patterning the first metal layer, the metal pattern 21 of retention data line 20 correspondence positions, and this metal pattern 21 be spaced from each other with other metal pattern of layer such as grid 41, controlling grid scan line 10.
When opening circuit on the data wire 20, can carry out laser in the both sides of broken string from the back side (outside of liquid crystal cell) of array base palte welds, by metal pattern 21 controlling grid scan line 10 metal conductions of both sides that will break, thereby can repair broken data wire.
In sum, because tft array substrate structure of the present invention is formed with metal pattern on data wire 20 times and controlling grid scan line 10, can overcome the shortcoming in the conventional art, but both open circuit conditions of the data wire 20 in repairing pixel interval, also can repair the open circuit conditions of controlling grid scan line 10, under the situation that does not increase existing manufacturing process, just can realize this structure, and repair convenient and simple.
Claims (10)
1. a thin-film transistor array base-plate comprises
Many the controlling grid scan lines that extend along first direction;
Many the data wires that extend along second direction, controlling grid scan line and data wire intersect to form pixel region;
Be arranged on thin-film transistor and pixel electrode in the pixel region;
It is characterized in that being formed with metal pattern on the described controlling grid scan line or under the data wire, described metal pattern and data wire metal layer pattern, controlling grid scan line metal layer pattern are spaced from each other.
2. array base palte according to claim 1 is characterized in that being formed with contact hole on described controlling grid scan line and the top metal pattern thereof, also is formed with the pixel electrode layer pattern on the controlling grid scan line.
3. array base palte according to claim 1 and 2 is characterized in that the metal pattern on the described controlling grid scan line is formed on the layer identical with data wire.
4. array base palte according to claim 3 is characterized in that the material of described metal pattern is identical with the material of data wire.
5. array base palte according to claim 1 is characterized in that the metal pattern under the described data wire is formed on the layer identical with controlling grid scan line.
6. array base palte according to claim 5 is characterized in that the material of described metal pattern is identical with the material of controlling grid scan line.
7. the manufacture method of a thin-film transistor array base-plate comprises the steps:
Form a first metal layer on a transparency carrier;
The described the first metal layer of patterning, the controlling grid scan line that forms a grid and be electrically connected with grid;
Form one second metal level on described substrate;
Described second metal level of patterning, the data wire that forms one source pole, a drain electrode and be electrically connected with source electrode, and on controlling grid scan line, form metal pattern, and other metal pattern that forms on this metal pattern and second metal level is spaced from each other;
Above drain electrode, form passivation insulation, and on passivation insulation, etch contact hole;
Form transparency conducting layer on the transparency carrier surface, form pixel electrode pattern after the photoetching.
8. manufacture method according to claim 7, it is characterized in that also comprising the steps: described controlling grid scan line and above metal pattern on etch contact hole, when forming pixel electrode pattern, keep the transparency electrode layer pattern above the controlling grid scan line simultaneously, and be spaced from each other with described pixel electrode.
9. the manufacture method of a thin-film transistor array base-plate comprises the steps:
Form a first metal layer on a transparency carrier;
The described the first metal layer of patterning, the controlling grid scan line that forms a grid and be electrically connected with grid;
Form one second metal level on described substrate;
Described second metal level of patterning, the data wire that forms one source pole, a drain electrode and be electrically connected with one source pole;
It is characterized in that when the patterning the first metal layer, the metal pattern of retention data line correspondence position, and other metal pattern of this metal pattern and same layer is spaced from each other.
10. method of repairing thin-film transistor array base-plate, this thin-film transistor array base-plate comprises
Many the controlling grid scan lines that extend along first direction;
Many the data wires that extend along second direction, controlling grid scan line and data wire intersect to form pixel region;
Be arranged on thin-film transistor and pixel electrode in the pixel region;
Be formed with metal pattern on the wherein said controlling grid scan line or under the data wire, described metal pattern and data wire metal layer pattern, controlling grid scan line metal layer pattern are spaced from each other;
When controlling grid scan line or data wire open circuit, shine connection in the both sides of broken string position with laser, controlling grid scan line or data wire are connected by metal pattern, form the path that gets around the part that opens circuit.
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| CNB2007100446366A CN100454561C (en) | 2007-08-07 | 2007-08-07 | Film transistor array substrates and its producing method, repairing method |
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| CNB2007100446366A CN100454561C (en) | 2007-08-07 | 2007-08-07 | Film transistor array substrates and its producing method, repairing method |
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