CN101114589B - Method and apparatus for manufacturing semiconductor device - Google Patents
Method and apparatus for manufacturing semiconductor device Download PDFInfo
- Publication number
- CN101114589B CN101114589B CN2007101397032A CN200710139703A CN101114589B CN 101114589 B CN101114589 B CN 101114589B CN 2007101397032 A CN2007101397032 A CN 2007101397032A CN 200710139703 A CN200710139703 A CN 200710139703A CN 101114589 B CN101114589 B CN 101114589B
- Authority
- CN
- China
- Prior art keywords
- etching
- dry
- metal film
- ashing
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 62
- 239000004065 semiconductor Substances 0.000 title claims abstract description 56
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 55
- 238000001312 dry etching Methods 0.000 claims abstract description 87
- 229910052751 metal Inorganic materials 0.000 claims abstract description 77
- 239000002184 metal Substances 0.000 claims abstract description 77
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 35
- 239000012528 membrane Substances 0.000 claims abstract description 13
- 238000005530 etching Methods 0.000 claims description 128
- 239000000758 substrate Substances 0.000 claims description 47
- 238000004380 ashing Methods 0.000 claims description 45
- 229910045601 alloy Inorganic materials 0.000 claims description 22
- 239000000956 alloy Substances 0.000 claims description 22
- 239000003595 mist Substances 0.000 claims description 17
- 238000009434 installation Methods 0.000 claims description 10
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 4
- 239000004411 aluminium Substances 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 239000011733 molybdenum Substances 0.000 claims description 4
- 229910052750 molybdenum Inorganic materials 0.000 claims description 4
- 238000001039 wet etching Methods 0.000 abstract 4
- 230000006866 deterioration Effects 0.000 abstract 3
- 208000015181 infectious disease Diseases 0.000 abstract 2
- 239000010408 film Substances 0.000 description 102
- 239000007789 gas Substances 0.000 description 30
- 238000001020 plasma etching Methods 0.000 description 17
- 238000003860 storage Methods 0.000 description 12
- 230000000505 pernicious effect Effects 0.000 description 10
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 7
- 239000004973 liquid crystal related substance Substances 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 238000009832 plasma treatment Methods 0.000 description 4
- 235000014347 soups Nutrition 0.000 description 4
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 3
- 229910021419 crystalline silicon Inorganic materials 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000000994 depressogenic effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000008676 import Effects 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000004886 process control Methods 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 238000012800 visualization Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
Abstract
The invention provides a manufacturing method for semiconductor device, which can reduce the bad infection to subsequent setp reduced by residue of a deterioration layer formed on the metallic membrane in wet etching, after step of wet etching the metallic membrane and subsequent step of wet etching the metallic membrane, and bad infection to the device characteristics, therefore the said method can stably manufacture superior semiconductor device. After wet etching the metal membrane (106), the n+a-Si membrane (105) and a-Si membrane (104)is performed by dry etching. Next, the sidestep shaped resist mask (107) is ashed to underway, and then a deterioration layer removal process which removes a deterioration layer (108) is performed. Hereafter, the metal membrane is performed by dry etching.
Description
Technical field
The present invention relates to for example be applicable to manufacture method, manufacturing installation, the computer-readable storage medium of semiconductor device and the storage medium that stores processing scheme of the semiconductor device of making semiconductor devices such as liquid crystal indicator.
Background technology
All the time, in the manufacturing process of semiconductor device, when etching is carried out at the regulation position, adopt the Wet-type etching of use soup and the dry-etching of using gases mostly.As the known plasma that for example produces etching gas of dry-etching, utilize the effect of this plasma to carry out etched plasma etching etc.
For example, in the manufacturing process of the non-crystalline silicon tft in liquid crystal indicator (thin-film transistor) etc., in the operation of metal film being carried out etching formation gate electrode, source electrode and drain electrode, amorphous silicon film is carried out the operation that etching forms the island structure, form in the operations such as operation of groove (channel), use suitable Wet-type etching and dry-etching.Wherein, Wet-type etching is mainly used in the etching work procedure of metal film mostly.And in above-mentioned etching work procedure, the mist that known utilization contains oxygen and fluoro-gas carries out ashing, removes the protuberance layer of semiconductor layer edge part, improves the technology (for example with reference to patent documentation 1) of the characteristic of electric current.
And, in the manufacturing process of the non-crystalline silicon tft in above-mentioned liquid crystal indicator, form step-like Etching mask by use, the mask number is reduced, advance to saving mask process.Save in the mask process at this,, change its shape, use, form operation thereby can reduce by a mask as two kinds of masks by carrying out ashing on the way to forming step-like Etching mask.
And, state in the use in the operation that forms step-like Etching mask, the method of twice Wet-type etching operation and twice dry-etching operation is carried out in employing, the Wet-type etching operation replaces with the dry-etching operation by inciting somebody to action for the second time, raising is controlled to distribution width, trench length etc., reduce the carrying cost of wet type soup, shorten operation etc., thereby can increase productivity and rate of finished products.
But, for example, if utilize dry-etching to carry out etching subsequently again to having carried out the metal film behind the Wet-type etching, owing to when carrying out Wet-type etching, contact with etching solution at the edge of metal film (exposed division) formation metamorphic layer, this metamorphic layer can be not etched when dry-etching and left behind with fence (fence) shape as residue, exists later operation is brought pernicious influence, device characteristics brought the problem of pernicious influence.For example, if between source electrode, drain electrode, have above-mentioned residue, produce the electrical short between source electrode, the drain electrode sometimes.
Patent documentation 1: TOHKEMY 2005-72443 communique
As mentioned above, in the prior art, under the situation that comprises the etching work procedure that metal film is carried out the operation of Wet-type etching and subsequently this metal film is carried out dry type, side at the metal film that is exposed to soup during Wet-type etching forms metamorphic layer, this metamorphic layer can be not etched when dry-etching and left behind with paliform as residue, exists later operation is brought pernicious influence, device characteristics brought the problem of pernicious influence.
Summary of the invention
The present invention finishes in order to solve above-mentioned problem, its purpose is to provide a kind of manufacture method of semiconductor device, the manufacturing installation of semiconductor device, computer-readable storage medium and the storage medium that stores processing scheme, the manufacture method of this semiconductor device is carried out the operation of Wet-type etching and subsequently this metal film is carried out under the situation of dry-etching operation metal film comprising, pernicious influence that subsequent handling is brought that can alleviate that residue because of the metamorphic layer that forms causes in the Wet-type etching operation on metal film and the pernicious influence that device characteristics are brought, thereby the good semiconductor device of workmanship stably.
The manufacture method of inventive aspect 1 described semiconductor device is characterized in that: carry out having the dry-etching operation of above-mentioned metal film being carried out dry-etching after the etching to being formed at metal film on the substrate in the Wet-type etching operation.Before above-mentioned dry-etching operation, remove the metamorphic layer of the metamorphic layer that in above-mentioned Wet-type etching operation, on above-mentioned metal film, forms and remove operation.
The manufacture method of inventive aspect 2 described semiconductor devices is the manufacture method of inventive aspect 1 described semiconductor device, it is characterized in that: aforesaid substrate is housed in the treatment chamber, aforesaid substrate is not taken out of in above-mentioned treatment chamber, carry out above-mentioned metamorphic layer continuously and remove operation and above-mentioned dry-etching operation.
The manufacture method of inventive aspect 3 described semiconductor devices is characterized in that: in the Wet-type etching operation across Etching mask to being formed at after metal film on the substrate carries out etching, have the dry-etching operation of above-mentioned metal film being carried out dry-etching.Comprise: the ashing operation, the part of above-mentioned Etching mask is carried out ashing, and change the shape of above-mentioned Etching mask; Metamorphic layer is removed operation, removes the metamorphic layer that forms on above-mentioned metal film in above-mentioned Wet-type etching operation; With the dry-etching operation, the above-mentioned Etching mask across change shape in above-mentioned ashing operation after carries out dry-etching to above-mentioned metal film.
The manufacture method of inventive aspect 4 described semiconductor devices is the manufacture method of inventive aspect 3 described semiconductor devices, it is characterized in that: aforesaid substrate is housed in the treatment chamber, aforesaid substrate is not taken out of in above-mentioned treatment chamber, carry out above-mentioned ashing operation continuously, above-mentioned metamorphic layer is removed operation and above-mentioned dry-etching operation.
The manufacture method of inventive aspect 5 described semiconductor devices is characterized in that: in the Wet-type etching operation across Etching mask to being formed at after metal film on the substrate carries out etching, have the dry-etching operation of above-mentioned metal film being carried out dry-etching.Comprise: the first dry-etching operation, across above-mentioned Etching mask the amorphous silicon film of above-mentioned metal film lower layer is carried out dry-etching; The ashing operation is carried out ashing to the part of above-mentioned Etching mask, and changes the shape of above-mentioned Etching mask; Metamorphic layer is removed operation, removes the metamorphic layer that forms on above-mentioned metal film in above-mentioned Wet-type etching operation; The second dry-etching operation, the above-mentioned Etching mask across change shape in above-mentioned ashing operation after carries out dry-etching to above-mentioned metal film; With the 3rd dry-etching operation, the above-mentioned Etching mask across change shape in above-mentioned ashing operation after carries out dry-etching to above-mentioned amorphous silicon film.
The manufacture method of inventive aspect 6 described semiconductor devices is the manufacture method of inventive aspect 5 described semiconductor devices, it is characterized in that: aforesaid substrate is housed in the treatment chamber, aforesaid substrate is not taken out of in above-mentioned treatment chamber, carry out the above-mentioned first dry-etching operation, above-mentioned ashing operation, above-mentioned metamorphic layer continuously and remove operation, the above-mentioned second dry-etching operation and above-mentioned the 3rd dry-etching operation.
The manufacture method of inventive aspect 7 described semiconductor devices is characterized in that: in the Wet-type etching operation across Etching mask to being formed at after metal film on the substrate carries out etching, have the dry-etching operation of above-mentioned metal film being carried out dry-etching.Comprise: the ashing operation, the part of above-mentioned Etching mask is carried out ashing, and change the shape of above-mentioned Etching mask; Metamorphic layer is removed operation, removes the metamorphic layer that forms on above-mentioned metal film in above-mentioned Wet-type etching operation; The first dry-etching operation, the above-mentioned Etching mask across change shape in above-mentioned ashing operation after carries out dry-etching to the amorphous silicon film of above-mentioned metal film lower layer; The second dry-etching operation, the above-mentioned Etching mask across change shape in above-mentioned ashing operation after carries out dry-etching to above-mentioned metal film; With the 3rd dry-etching operation, the above-mentioned Etching mask across change shape in above-mentioned ashing operation after carries out dry-etching to above-mentioned amorphous silicon film.
The manufacture method of inventive aspect 8 described semiconductor devices is the manufacture method of inventive aspect 7 described semiconductor devices, it is characterized in that: in the above-mentioned first dry-etching operation, the part of above-mentioned metal film is carried out dry-etching.
The manufacture method of inventive aspect 9 described semiconductor devices is the manufacture method of inventive aspect 7 or 8 described semiconductor devices, it is characterized in that: aforesaid substrate is housed in the treatment chamber, aforesaid substrate is not taken out of in above-mentioned treatment chamber, carry out above-mentioned ashing operation continuously, above-mentioned metamorphic layer is removed operation, the above-mentioned first dry-etching operation, the above-mentioned second dry-etching operation and above-mentioned the 3rd dry-etching operation.
The manufacture method of inventive aspect 10 described semiconductor devices is the manufacture method of each described semiconductor device in the inventive aspect 1～9, it is characterized in that: use and contain SF
6And Cl
2Mist plasma or contain SF
6And O
2The plasma of mist, carry out above-mentioned metamorphic layer and remove operation.
The manufacture method of inventive aspect 11 described semiconductor devices is the manufacture method of each described semiconductor device in the inventive aspect 1～10, it is characterized in that: above-mentioned metal film is any one in the stack membrane of aluminium or its alloy film, molybdenum or its alloy film, aluminium or its alloy film and molybdenum or its alloy film.
The manufacture method of inventive aspect 12 described semiconductor devices is characterized in that, comprising: the treatment chamber of accommodating substrate; In above-mentioned treatment chamber, supply with the processing gas feed unit of handling gas; Make the above-mentioned processing gaseous plasmaization of supplying with from above-mentioned processing gas feed unit, and the plasma generation unit that aforesaid substrate is handled; And control part, control make in above-mentioned treatment chamber, carry out an invention aspect the manufacture method of each above-mentioned semiconductor device in 1～11.
The inventive aspect 14 described storage mediums that store processing scheme, it stores the processing scheme of the manufacturing installation that is used to control semiconductor device, the manufacturing installation of this semiconductor device carries out after the etching being formed at metal film on the substrate in the Wet-type etching operation, carry out above-mentioned metal film is carried out the dry-etching operation of dry-etching, it is characterized in that: above-mentioned processing scheme, before above-mentioned dry-etching operation, have the metamorphic layer of removing the metamorphic layer that in above-mentioned Wet-type etching operation, on above-mentioned metal film, forms and remove operation.
The invention effect
According to the present invention, a kind of manufacture method of semiconductor device can be provided, the manufacturing installation of semiconductor device, computer-readable storage medium and the storage medium that stores processing scheme, the manufacture method of this semiconductor device is carried out the operation of Wet-type etching and subsequently this metal film is carried out under the situation of dry-etching operation metal film comprising, pernicious influence that subsequent handling is brought that can alleviate that residue because of the metamorphic layer that forms causes in the Wet-type etching operation on metal film and the pernicious influence that device characteristics are brought, thereby the good semiconductor device of workmanship stably.
Description of drawings
Fig. 1 is the figure that schematically shows the cross section structure of the substrate in the embodiment of the present invention.
Fig. 2 is the structural representation of the manufacturing installation of the semiconductor device in the expression embodiment of the present invention.
Fig. 3 is the figure that schematically shows the cross section structure of the substrate in other execution modes of the present invention.
Fig. 4 is the figure that schematically shows the formation in the top and cross section of substrate in the prior art.
Symbol description
100: substrate; 101: mask; 102: gate electrode; 103: dielectric film; The 104:a-Si film; The 105:n+a-Si film; 106: metal film; 107: form step-like Etching mask; 108: metamorphic layer; 109: groove.
Embodiment
Below, with reference to accompanying drawing, embodiments of the present invention are described.Fig. 1 is the enlarged drawing of the cross section structure of substrate 100 in the manufacture method of semiconductor device of expression present embodiment, and Fig. 2 is the structure chart of expression as the plasma-etching apparatus of the manufacturing installation of present embodiment semiconductor device.At first, with reference to Fig. 2, the structure of plasma-etching apparatus is described.
Plasma-etching apparatus 1 constitutes reactive ion etching (RIE) device, this reactive ion etching device produces the plasma of handling gas in treatment chamber 2, on the substrate 100 in being disposed at this treatment chamber 2, draw ion in the plasma and it is had an effect carry out etching.And, in this treatment chamber 2, be not limited in plasma etching, metamorphic layer described later be can also carry out and operation and ashing operation etc. removed.
The treatment chamber 2 that inside can be sealed airtightly forms square, is provided with pedestal 3 in this treatment chamber 2, and this pedestal 3 is supported by two kinds of insulating properties support component 3a, 3b of configuration up and down.And, on this pedestal 3, the substrates such as glass substrate 100 that mounting has liquid crystal indicator to use.On this pedestal 3, be connected with high frequency electric source 4, supply with the High frequency power of assigned frequency (for example 13.56MHz) from this high frequency electric source 4 to pedestal 3.
Courtyard portion in treatment chamber 2 is provided with opposite electrode 5, and this opposite electrode 5 is in earthing potential.Opposite electrode 5 has a plurality of open-work 5a, the processing gas that is supplied to gas access 6 is the spray shape from these open-works 5a supplies with to substrate 100.On gas access 6, be connected with gas supply pipe 7.And on gas supply pipe 7, be connected with processing gas supply source 10 by valve 8, mass flow controller 9.Supply with predetermined process gas from handling gas supply source 10.
Bottom 2 in treatment chamber is connected with blast pipe 11, is connected with exhaust apparatus 12 on this blast pipe 11.Exhaust apparatus 12 possesses turbomolecular pump equal vacuum pump, can will be evacuated to the depressed gas atmosphere of regulation in the treatment chamber 2.And, be provided with gate valve 13 at the side wall portion of treatment chamber 2, under the state of opening this gate valve 13, move into or take out of substrate 100 from the load locking room (not shown) of adjacency.
The action of plasma-etching apparatus 1 integral body of said structure is by control part 60 unified controls.In this control part 60, be provided with the process controller 61, user interface 62 and the storage part 63 that possess CPU and control plasma-etching apparatus 1 each one.
Store scheme in the storage part 63, this scheme records the control program (software) that is used for being implemented in the various processing that plasma-etching apparatus 1 carries out under the control of process controller 61 and the data of treatment conditions etc.And, as required,, access any scheme from storage part 63 according to from the indication of user interface 62 etc., carry out by process controller 61, under the control of process control portion 61, in plasma-etching apparatus 1, carry out treatment desired.And, schemes such as control program and treatment conditions data, can under the state in being stored in computer-readable storage medium (for example hard disk, CD, floppy disk, semiconductor memory etc.) that computer can read etc., use, perhaps, also online use can for example be transmitted at any time by the device of special circuit from other.
When utilizing the plasma-etching apparatus 1 of said structure to carry out the plasma treatment of plasma etching etc. of substrate 100, at first, open gate valve 13, the never illustrated load locking room of substrate 100 is moved into handled in the chamber 2 then, mounting is on pedestal 3.Then, closing gate valve 13 utilizes exhaust apparatus 12 to be evacuated to the specified vacuum degree in the treatment chamber 2.
Then, open gate valve 8,, import in the treatment chamber 2 by processing gas supply pipe 7, gas access 6 on one side on one side by the flow of mass flow controller 9 adjustment from the predetermined processing gas of handling gas supply source 10.
Then, the pressure in the treatment chamber 2 is maintained the pressure of regulation, and apply the High frequency power of assigned frequency from high frequency electric source 4 to pedestal 3.Thus, handle gas and dissociate, generation plasma treatment chamber 2 in, the ion in this plasma is drawn simultaneously, arrives processed substrate 100, carries out the plasma treatment of plasma etching etc.
Then, when the plasma treatment of regulation is finished, stop the supply of High frequency power and the supply of processing gas,, substrate 100 is taken out of in treatment chamber 2 according to the order opposite with said sequence.
Below, with reference to Fig. 1, the manufacture method as non-crystalline silicon tft in the liquid crystal indicator of the manufacture method of semiconductor device in the present embodiment is described.Fig. 1 is the figure that schematically shows the cross section structure of substrate 100 in the present embodiment.Shown in Fig. 1 (a), on the substrate 100 that constitutes by transparent glass substrate, at first,, form the gate electrode 102 that constitutes by the metal film that forms the regulation shape by using the etching (Wet-type etching) of the mask 101 that photoresist constitutes.
Then, shown in Fig. 1 (b), after removing mask 101, form dielectric film 103, a-Si film (amorphous silicon film) 104, n+a-Si film 105 and metal film 106 successively from downside, and on metal film 106, forming Etching mask 107, this Etching mask 107 forms step-like.As metal film, can use for example Al or stack membrane, Mo or its alloy/Al of its alloy film, Mo or its alloy film, Mo or its alloy/Al or its alloy or the stack membrane of its alloy/Mo or its alloy etc.
Then, shown in Fig. 1 (c), will form step-like Etching mask 107 as mask, utilize the carry out etching of Wet-type etching to metal film 106, then, n+a-Si film 105, a-Si film 104 are carried out dry-etching, and form island (island) etching work procedure of island part.In above-mentioned Wet-type etching operation,, formed metamorphic layer (inferring it mainly is oxide) 108 at the edge part (exposed division) of the metal film 106 that contacts with soup that Wet-type etching is used.
Below, shown in Fig. 1 (d), carry out half ashing operation, carry out ashing to the way to forming step-like Etching mask 107.
Then, shown in Fig. 1 (e), remove the metamorphic layer of metamorphic layer 108 and remove operation.This metamorphic layer is removed in the operation, contains SF as handling gas, using
6And Cl
2Mist or contain SF
6And O
2Mist, utilize its plasma to carry out.Using SF
6And Cl
2Mist as under the situation of handling gas, Cl
2Flow be 100～150sccm for example, Cl
2And SF
6Flow proportional as being 5/1～15/1, pressure for example is 6.65～13.3Pa, high-frequency electric power is 0.58～0.86W/cm
2About.In addition, using SF
6And O
2Mist as under the situation of handling gas, as an example of treatment conditions, SF
6/ O
2=50/50sccm, pressure=2.66Pa, High frequency power=0.58～W/cm
2
Then, shown in Fig. 1 (f), form step-like Etching mask 107 as mask after half ashing, utilize dry-etching successively the part of metal film 106, n+a-Si film 105, a-Si film 104 to be carried out etching, form groove 109 implementing.
And, after above-mentioned operation, form passivating film and form the etching work procedure of the contact hole (contact hole) that uses the 3rd Etching mask, the etching work procedure that forms the ITO film and form the pixel electrode that uses the 4th Etching mask, make liquid crystal indicator.
As mentioned above, in the present embodiment, remove the metamorphic layer 108 that operation is removed the metal film that is produced by Wet-type etching by metamorphic layer, pernicious influence that subsequent handling is brought that can alleviate that residue by metamorphic layer 108 causes and the pernicious influence that device characteristics are brought.
Otherwise, remove under the situation of operation not carrying out metamorphic layer, as shown in Figure 4, by Wet-type etching under the state that is formed with metamorphic layer 108 on the metal film 106 (a), if then carry out half ashing operation, will shrink (shrink) because of forming step-like Etching mask 107, and cause the part of metal film 106 to be exposed (b).And owing under this state metal film 106 is carried out the dry-etching operation, exposed portions serve forms nail (spike) shape, and the metamorphic layer 108 (residue) outside having only is paliform and left behind (c).The residue of this paliform forms the frame shape shown in the top (top diagram) of Fig. 4 (c), therefore between source electrode, drain electrode electrical short etc. takes place sometimes.
In the above-described embodiment, under the following condition, carry out and to form step-like Etching mask 107 as mask, utilize Wet-type etching (etching solution=phosphoric acid+acetic acid+nitric acid) that metal film 106 is carried out series of processes after the etching.
That is, use SF
6And Cl
2Mist carry out the island etching work procedure, this island etching work procedure carries out dry-etching and forms the island part n+a-Si film 105, a-Si film 104.Use O
2Gas carries out half ashing operation, and this half ashing operation is carried out ashing to the way to forming step-like Etching mask 107.Then, handling gas Cl
2/ SF
6=150/10SCCM, pressure 10.64Pa, High frequency power 0.58～0.86W/cm
2Condition under remove metamorphic layer 108 metamorphic layer remove operation.Then, will carry out forming step-like Etching mask 107 as mask after half ashing, use Cl
2And O
2Mist the Mo film in the metal film 106 is carried out dry-etching, use BCl
3And Cl
2Mist the Al film is carried out dry-etching, use Cl
2And SF
6Mist the part of n+a-Si film 105, a-Si film 104 is carried out dry-etching, form groove 109.
As a result, can produce the thin-film transistor in good condition that does not have spike that the residue because of metamorphic layer 108 causes or paliform works etc.And, forming in the operation of step-like Etching mask in above-mentioned a series of use, the operation after the initial Wet-type etching is implemented by plasma-etching apparatus shown in Figure 21.At this moment, in case with substrate 100 accommodate handle in the chamber 2 after, by changing the treatment conditions of handling gas etc. successively, can not take out substrate 100 and handle.Therefore, compare, can handle at short notice effectively with the situation of carrying out Wet-type etching in the way.
Below, other execution mode is described with reference to Fig. 3.Shown in Fig. 3 (a), on the substrate 100 that constitutes by transparent glass substrate, at first pass through the etching (Wet-type etching) of the mask 101 of use photoresist formation, form the gate electrode 102 that constitutes by the metal film that forms the regulation shape.
Then, shown in Fig. 3 (b), after removing mask 101, form dielectric film 103, a-Si film (amorphous silicon film) 104, n+a-Si film 105, metal film 106 successively from downside, and on metal film 106, forming Etching mask 107, this Etching mask 107 forms step-like.As metal film, can use for example Al or stack membrane, Mo or its alloy/Al of its alloy film, Mo or its alloy film, Mo or its alloy/Al or its alloy or the stack membrane of its alloy/Mo or its alloy etc.
Then, shown in Fig. 3 (c), will form step-like Etching mask 107, utilize Wet-type etching that metal film 106 is carried out etching as mask.In this operation, the edge part (exposed division) of the metal film 106 behind Wet-type etching is formed with metamorphic layer 108.
Below, shown in Fig. 3 (d), carry out half ashing operation, carry out ashing to the way to forming step-like Etching mask 107.
Then, the same metamorphic layer of removing metamorphic layer 108 with above-mentioned execution mode is removed operation, after this, n+a-Si film 105, a-Si film 104 are carried out dry-etching, form the island part, and, utilize dry-etching that the part of metal film 106, n+a-Si film 105, a-Si film 104 is carried out etching, form groove 109.Wherein, when n+a-Si film 105, a-Si film 104 are carried out dry-etching and form the island part,, also can carry out etching to the part of the metal film of trench portions according to the kind of metal film.
In the present embodiment, half ashing operation and island etching work procedure and above-mentioned execution mode exchange, and remove operation by carry out metamorphic layer after half ashing operation, can access the effect same with above-mentioned execution mode.And, in the present embodiment, if layer is removed and is used Cl in the operation on the turn
2/ SF
6As handling gas, then use this gas system to carry out etching to n+a-Si film 105, a-Si film 104, therefore can directly proceed the island etching work procedure, can substantially reduce process number.
Claims (9)
1. the manufacture method of a semiconductor device is characterized in that:
In the Wet-type etching operation across Etching mask to being formed at after metal film on the substrate carries out etching, have the dry-etching operation of described metal film being carried out dry-etching,
Comprise: the ashing operation, the part of described Etching mask is carried out ashing, and change the shape of described Etching mask, the part of described metal film is exposed;
Metamorphic layer is removed operation, by containing SF
6And Cl
2Mist plasma or contain SF
6And O
2The plasma of mist, remove the metamorphic layer that in described Wet-type etching operation, on described metal film, forms; With
The dry-etching operation, the described Etching mask across change shape in described ashing operation after carries out dry-etching to described metal film.
2. the manufacture method of semiconductor device as claimed in claim 1 is characterized in that:
Described substrate is housed in the treatment chamber, described substrate is not taken out of in described treatment chamber, carry out described ashing operation continuously, described metamorphic layer is removed operation and described dry-etching operation.
3. the manufacture method of a semiconductor device is characterized in that:
In the Wet-type etching operation across Etching mask to being formed at after metal film on the substrate carries out etching, have the dry-etching operation of described metal film being carried out dry-etching,
Comprise: the first dry-etching operation, across described Etching mask the amorphous silicon film of described metal film lower layer is carried out dry-etching;
The ashing operation is carried out ashing to the part of described Etching mask, and changes the shape of described Etching mask;
Metamorphic layer is removed operation, by containing SF
6And Cl
2Mist plasma or contain SF
6And O
2The plasma of mist, remove the metamorphic layer that in described Wet-type etching operation, on described metal film, forms;
The second dry-etching operation, the described Etching mask across change shape in described ashing operation after carries out dry-etching to described metal film; With
The 3rd dry-etching operation, the described Etching mask across change shape in described ashing operation after carries out dry-etching to described amorphous silicon film.
4. the manufacture method of semiconductor device as claimed in claim 3 is characterized in that:
Described substrate is housed in the treatment chamber, described substrate is not taken out of in described treatment chamber, carry out the described first dry-etching operation, described ashing operation, described metamorphic layer continuously and remove operation, the described second dry-etching operation and described the 3rd dry-etching operation.
5. the manufacture method of a semiconductor device is characterized in that:
In the Wet-type etching operation across Etching mask to being formed at after metal film on the substrate carries out etching, have the dry-etching operation of described metal film being carried out dry-etching,
Comprise: the ashing operation, the part of described Etching mask is carried out ashing, and change the shape of described Etching mask;
Metamorphic layer is removed operation, by containing SF
6And Cl
2Mist plasma or contain SF
6And O
2The plasma of mist, remove the metamorphic layer that in described Wet-type etching operation, on described metal film, forms;
The first dry-etching operation, the described Etching mask across change shape in described ashing operation after carries out dry-etching to the amorphous silicon film of described metal film lower layer;
The second dry-etching operation, the described Etching mask across change shape in described ashing operation after carries out dry-etching to described metal film; With
The 3rd dry-etching operation, the described Etching mask across change shape in described ashing operation after carries out dry-etching to described amorphous silicon film.
6. the manufacture method of semiconductor device as claimed in claim 5 is characterized in that:
In the described first dry-etching operation, the part of described metal film is carried out dry-etching.
7. the manufacture method of semiconductor device as claimed in claim 5 is characterized in that:
Described substrate is housed in the treatment chamber, described substrate is not taken out of in described treatment chamber, carry out described ashing operation continuously, described metamorphic layer is removed operation, the described first dry-etching operation, the described second dry-etching operation and described the 3rd dry-etching operation.
8. as the manufacture method of each described semiconductor device in the claim 1～7, it is characterized in that:
Described metal film is any one in the stack membrane of aluminium or its alloy film, molybdenum or its alloy film, aluminium or its alloy film and molybdenum or its alloy film.
9. the manufacturing installation of a semiconductor device is characterized in that, comprising:
Accommodate the treatment chamber of substrate;
In described treatment chamber, supply with the processing gas feed unit of handling gas;
Make the described processing gaseous plasmaization of supplying with from described processing gas feed unit, and the plasma generation unit that described substrate is handled; With
Control part is controlled and is made in described treatment chamber the manufacture method of implementing each described semiconductor device in the claim 1～7.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006-206449 | 2006-07-28 | ||
| JP2006206449 | 2006-07-28 | ||
| JP2006206449A JP5101059B2 (en) | 2006-07-28 | 2006-07-28 | Semiconductor device manufacturing method, semiconductor device manufacturing apparatus, computer storage medium, and storage medium storing processing recipe |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201010165751A Division CN101847580A (en) | 2006-07-28 | 2007-07-27 | The manufacture method of semiconductor device and manufacturing installation |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101114589A CN101114589A (en) | 2008-01-30 |
| CN101114589B true CN101114589B (en) | 2010-06-16 |
Family
ID=39022830
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2007101397032A Active CN101114589B (en) | 2006-07-28 | 2007-07-27 | Method and apparatus for manufacturing semiconductor device |
| CN201010165751A Pending CN101847580A (en) | 2006-07-28 | 2007-07-27 | The manufacture method of semiconductor device and manufacturing installation |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201010165751A Pending CN101847580A (en) | 2006-07-28 | 2007-07-27 | The manufacture method of semiconductor device and manufacturing installation |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP5101059B2 (en) |
| KR (1) | KR100890072B1 (en) |
| CN (2) | CN101114589B (en) |
| TW (1) | TWI428976B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101630640B (en) * | 2008-07-18 | 2012-09-26 | 北京京东方光电科技有限公司 | Photoresist burr edge-forming method and TFT-LCD array substrate-manufacturing method |
| JP5856543B2 (en) | 2012-06-27 | 2016-02-09 | 東京エレクトロン株式会社 | Etching method |
| CN103137815A (en) * | 2013-02-28 | 2013-06-05 | 合肥彩虹蓝光科技有限公司 | Novel pattern sapphire substrate (PSS) structure and manufacturing method |
| JP6606476B2 (en) * | 2016-08-02 | 2019-11-13 | 株式会社Ｋｏｋｕｓａｉ Ｅｌｅｃｔｒｉｃ | Semiconductor device manufacturing method, substrate processing apparatus, and program |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6241739B1 (en) * | 1999-11-12 | 2001-06-05 | Altair Instruments, Inc. | Microdermabrasion device and method of treating the skin surface |
| CN1596462A (en) * | 2001-11-30 | 2005-03-16 | 东京毅力科创株式会社 | Processing apparatus and gas discharge suppressing member |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04157723A (en) * | 1990-10-22 | 1992-05-29 | Kawasaki Steel Corp | Dry etching method of aluminum film |
| JP3425925B2 (en) * | 2000-03-28 | 2003-07-14 | 鹿児島日本電気株式会社 | Method for manufacturing thin film transistor |
| JP2002064101A (en) * | 2000-08-21 | 2002-02-28 | Casio Comput Co Ltd | Method of forming wiring having chromium layer |
| JP2002151381A (en) * | 2000-11-09 | 2002-05-24 | Nec Kagoshima Ltd | Method for forming pattern |
| JP4410951B2 (en) * | 2001-02-27 | 2010-02-10 | Ｎｅｃ液晶テクノロジー株式会社 | Pattern forming method and manufacturing method of liquid crystal display device |
| JP2005072443A (en) * | 2003-08-27 | 2005-03-17 | Advanced Display Inc | Method for manufacturing thin film transistor and for display device |
-
2006
- 2006-07-28 JP JP2006206449A patent/JP5101059B2/en active Active
-
2007
- 2007-07-26 KR KR1020070075292A patent/KR100890072B1/en active IP Right Grant
- 2007-07-27 CN CN2007101397032A patent/CN101114589B/en active Active
- 2007-07-27 TW TW096127562A patent/TWI428976B/en not_active IP Right Cessation
- 2007-07-27 CN CN201010165751A patent/CN101847580A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6241739B1 (en) * | 1999-11-12 | 2001-06-05 | Altair Instruments, Inc. | Microdermabrasion device and method of treating the skin surface |
| CN1596462A (en) * | 2001-11-30 | 2005-03-16 | 东京毅力科创株式会社 | Processing apparatus and gas discharge suppressing member |
Non-Patent Citations (5)
| Title |
|---|
| JP特开2002-111004A 2002.04.12 |
| JP特开2004-79582A 2004.03.11 |
| JP特开平11-274161A 1999.10.08 |
| JP特开平9-213703A 1997.08.15 |
| 同上. |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2008034635A (en) | 2008-02-14 |
| TWI428976B (en) | 2014-03-01 |
| CN101114589A (en) | 2008-01-30 |
| KR100890072B1 (en) | 2009-03-24 |
| JP5101059B2 (en) | 2012-12-19 |
| KR20080011096A (en) | 2008-01-31 |
| TW200822208A (en) | 2008-05-16 |
| CN101847580A (en) | 2010-09-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102655086B (en) | Semiconductor device manufacturing method | |
| TWI514475B (en) | Methods for forming a hydrogen free silicon containing dielectric film | |
| CN110867458B (en) | Metal oxide semiconductor thin film transistor array substrate and manufacturing method thereof | |
| CN208507683U (en) | Electrostatic discharge protective circuit, array substrate and display device | |
| CN101521158B (en) | Plasma etching method and plasma etching apparatus | |
| US20070056925A1 (en) | Selective etch of films with high dielectric constant with H2 addition | |
| US7629255B2 (en) | Method for reducing microloading in etching high aspect ratio structures | |
| US20040007561A1 (en) | Method for plasma etching of high-K dielectric materials | |
| CN102194686B (en) | Plasma etching method, plasma etching apparatus, and computer-readable storage medium | |
| TWI647762B (en) | Plasma processing device, method for manufacturing thin film transistor, and memory medium | |
| CN108700788A (en) | The interface engineering of high capacitance capacitors for liquid crystal display | |
| CN101114589B (en) | Method and apparatus for manufacturing semiconductor device | |
| JP2012175105A (en) | Wiggling control for pseudo-hardmask | |
| CN104916568A (en) | Plasma processing apparatus, substrate processing system, fabrication method of thin film transistor, and storage medium | |
| CN101621000B (en) | Plasma etching method | |
| CN102315095B (en) | Plasma processing method and manufacturing method of semiconductor device | |
| CN104576355B (en) | Method of plasma processing | |
| CN101471257A (en) | Plasma etching method, plasma etching apparatus, control program and computer-readable storage medium | |
| CN101237742B (en) | Plasma processing device, plasma processing method and storing medium | |
| CN101609799A (en) | Plasma-etching method and plasma-etching apparatus | |
| CN100492603C (en) | Plasma etching method | |
| JP2012174850A (en) | Substrate processing method, and storage medium | |
| CN101692422B (en) | Display panel and reworking method of gate insulation layer of thin film transistor | |
| JP2920848B2 (en) | Silicon layer etching method | |
| JPH11274143A (en) | Dry etching method and manufacture of thin film transistor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |