CN101097904A - Packaging structure for reducing warping - Google Patents
Packaging structure for reducing warping Download PDFInfo
- Publication number
- CN101097904A CN101097904A CN 200610094158 CN200610094158A CN101097904A CN 101097904 A CN101097904 A CN 101097904A CN 200610094158 CN200610094158 CN 200610094158 CN 200610094158 A CN200610094158 A CN 200610094158A CN 101097904 A CN101097904 A CN 101097904A
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- substrate
- encapsulating structure
- chip
- window shape
- auxiliary part
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
The invention relates to a package structure, comprising a baseboard with a chip bearing area, a window auxiliary element arranged on the baseboard and surrounded around the edges of the chip bearing area, a plurality of chips in the chip bearing area, and a package rubber covering the chips in the chip bearing area. The invention can reduce the warping deformation of package, to prevent relative problem and damage, and improve the property and stability of package structure.
Description
Technical field
The present invention relates to a kind of encapsulating structure, more especially about a kind of encapsulating structure that reduces warpage.
Background technology
IC structure dress belongs to the back segment procedure for processing of semiconductor industry, can be divided into wafer cutting, glutinous crystalline substance, bonding wire, sealing, lettering, plant ball, cut list, mainly be that IC is divided into chip on the wafer that preceding processing procedure is machined, glutinous brilliant, bonding wire, sealing also adds external pin and cuts list.And its packaging body mainly provides one and draws the interface that connects, and inner electrical signals can see through encapsulating material be connected to system with it, and destruction that chip avoids being subjected to external force, water, moisture, chemicals and corrosion etc. are provided, and increases its mechanical strength.
In the sealing process, mould places on the substrate with semiconductor chip or electronic component, adhesive material is injected the die cavity of mould again, makes adhesive material seal up chip or electronic component on the substrate, carries out the demoulding again and finishes manufacture procedure of adhesive.
Yet, along with the thin type Development of Packaging Technology, big and the thin thickness of thin type substrate area, because base plate for packaging is different with the thermal coefficient of expansion between encapsulating material, in sealing (molding) or baking (post molding cure) processing procedure, vary with temperature and produce different swell incremenies or amount of contraction and cause encapsulating structure to produce thermal stress easily and warpage (warpage) influence successive process, warpage is excessive then can to make chip rupture (crack) or electronic component damage in it.In view of this, it is very important how overcoming the warpage issues that the problems referred to above solve substrate in the manufacture procedure of adhesive.
Summary of the invention
In order to address the above problem, one of the object of the invention is to propose a kind of encapsulating structure that reduces buckling deformation.
One of the object of the invention is to propose a kind of encapsulating structure, in order to problem and the damage that prevents to be caused because of the encapsulating structure warpage, and improves the production capacity and stability of encapsulating structure simultaneously.
One of the object of the invention is to propose a kind of encapsulating structure, can reduce manufacture procedure of adhesive (molding) and back baking processing procedure (post mold cure, the warping phenomenon of encapsulating structure in the time of PMC).
In order to achieve the above object, the invention provides the encapsulating structure of an embodiment, comprising: a substrate has a chip bearing district and is provided with thereon; One window shape auxiliary part is arranged on the substrate around chip bearing district periphery; A plurality of chips are arranged in the chip bearing district; And a packing colloid, the chip of coating chip supporting region.
The invention provides the encapsulating structure of another embodiment, comprising: a substrate has a plurality of chip bearings district; A plurality of window shape auxiliary parts are arranged on the substrate respectively around each chip bearing district periphery; A plurality of chips are arranged in each chip bearing district; And the chip of a packing colloid coating chip supporting region.
The present invention is for reducing the encapsulating structure of buckling deformation, in order to problem and the damage that prevents to be caused because of the packaging body warpage, and improves the production capacity and stability of encapsulating structure simultaneously, the warping phenomenon of encapsulating structure in the time of can reducing manufacture procedure of adhesive with stable baking processing procedure.
Description of drawings
Figure 1 shows that the elevational perspective view of the encapsulating structure of one embodiment of the invention;
Figure 2 shows that the cutaway view of the A-A hatching line of Fig. 1;
Figure 3 shows that the elevational perspective view of encapsulating structure according to another embodiment of the present invention;
Figure 4 shows that the cutaway view of the B-B hatching line of Fig. 3;
Figure 5 shows that phantom according to the encapsulating structure of further embodiment of this invention;
Figure 6 shows that part elevational perspective view according to the encapsulating structure of further embodiment of this invention.
Symbol description among the figure
10 plates
12 chip bearing districts
14 flutings
20 window shape auxiliary parts
20 ' strip component
30 chips
40 packing colloids
Embodiment
Figure 1 shows that the elevational perspective view according to one embodiment of the invention encapsulating structure, as shown in Figure 1, in present embodiment, a substrate 10 has a plurality of chip bearings district 12 thereon.The periphery in each chip bearing district 12 is respectively around a window shape auxiliary part 20 (window typeassistant element) is set, again, each chip bearing district 12 is provided with a plurality of chips 30 and these chips 30 are arranged in the chip bearing district 12 with array way.Chip 30 on one packing colloid, the 40 coating chip supporting regions 12.
The above-mentioned explanation that continues Figure 2 shows that the cutaway view of the A-A hatching line of Fig. 1 in present embodiment, the chip 30 of packing colloid 40 in coating chip supporting region 12, more to coat window shape auxiliary part 20.The method for making of general encapsulating structure is to utilize the following step made, and substrate 10 at first is provided; Chip 30 is sticked together in the chip bearing district 12 that is arranged on the substrate 10; Carrying out bonding wire (wire bonding) processing procedure electrically connects by chip 30 and substrate 10; And carry out moulded section (molding) processing procedure, make the chip 30 of packing colloid 40 coating chip supporting regions.The material of substrate 10 is constituted by wherein arbitrary at least of pi, glass, aluminium oxide, epoxy resin, beryllium oxide and elastic.(epoxy moldingcompound EMC) is main material to the material of packing colloid 40 by epoxy resin.It is elargol, glutinous brilliant film (film) or other non-conductive epoxy resin (not showing on the figure) that chip 30 sticks together main materials used, needs 0～4 hour back baking processing procedure fully to solidify by packing colloid 40 after the moulded section usually.In present embodiment, the material of window shape auxiliary part 20 must by can resistant to elevated temperatures plastics, pottery or metal be made, the melt temperature that its heat resisting temperature wants to tolerate packing colloid 40 at least and back baking process temperatures just are enough to prevent the warpage of encapsulating structure.In addition, window shape auxiliary part 20 still requires high strength, not yielding, characteristics such as thermal coefficient of expansion is low.
In the foregoing description, as shown in Figure 1, have more the usefulness of a plurality of flutings 14 (opening trench) on the substrate 10 as substrate 10 rising-heat contracting-cold Stress Release (stress-release) under temperature inversion.As shown in Figure 2, window shape auxiliary part 20 utilizes adhesive agent (not showing on the figure) to be fixed on the substrate 10, and packing colloid 40 coats window shape auxiliary part 20 and can make on its surface that is engaged in substrate 10 more firmly.In the present invention, window shape auxiliary part 20 can be before chip 30 be attached to substrate 10, chip 30 is attached to after the substrate 10, or is arranged on the substrate 10 after chip 30 bonding wires again.So, can need at different processing procedures, the distortion of packing colloid 40 under melt temperature when no matter being chip 30 glutinous back baking, moulded section when brilliant, or the distortion that caused of the back baking processing procedure after the moulded section all can be by using window shape auxiliary part 20 to reduce the encapsulating structure warpages.
Figure 3 shows that the elevational perspective view of encapsulating structure according to another embodiment of the present invention, as shown in Figure 3, in present embodiment, a substrate 10 has a chip bearing district 12 thereon.A window shape auxiliary part 20 is put in the periphery ring winding in chip bearing district 12 and chip bearing district 12 is provided with a plurality of chips 30 thereon.Chip 30 on one packing colloid, the 40 coating chip supporting regions 12.The method for making of this encapsulating structure repeats no more in this as previously mentioned.Figure 4 shows that the cutaway view of the B-B hatching line of Fig. 3, as shown in Figure 4, in the present embodiment be surrounded on window shape auxiliary part 20 outside the chip bearing district can effectively prevent encapsulating structure in successive process because of distortion or warpage that variations in temperature produced.This encapsulating structure can provide the maximum utilization benefit of base plate for packaging 10, and chip 30 is arranged in the chip bearing district with array way, can reduce the waste in space on the substrate 10, improves output and reduces cost.
Please refer to Fig. 5, in this embodiment, packing colloid 40 is the chip 30 on the coating chip supporting region 12 only, can prevent the warpage of encapsulating structure equally.As shown in Figure 6, the material of window shape auxiliary part must by can resistant to elevated temperatures plastics or pottery or metal made, in addition, the window shape auxiliary part is made of a plurality of strip component 20 ', as bonding jumper, plastic strip or ceramic bar.
According to above-mentioned, one of feature of the present invention is to utilize the window shape auxiliary part to be arranged at the periphery in chip bearing zone on the base plate for packaging, in order to the intensity of increase packaging body substrate, and prevents that substrate from damaging encapsulating structure because of the variations in temperature buckling deformation.This window shape auxiliary part is applicable to using a BGA Package (BGA, Ball Grid Array), a thin space BGA Package (FBGA, Fine pitch Ball Grid Array) technology, a ultra fine-pitch BGA Package (VFBGA, Very Fine pitch Ball Grid Array) technology, micro ball grid array encapsulation (μ BGA, micro Ball Grid Array) the arbitrary of a technology and window-type ball grid array encapsulation (wBGA, windowBall Grid Array) technology is arranged at encapsulating structure on the substrate with chip.The window shape auxiliary part can be coated in the packing colloid or be surrounded on outside the packing colloid, and the warping phenomenon and the distortion of encapsulating structure can effectively prevent back baking processing procedure the time.When this encapsulating structure removed frame (singulation) in follow-up shearing, the window shape auxiliary part can together be sheared to abandon did not influence its molding structure, more can increase base plate carrying packaged chip quantity and improve output and reduce cost.
Comprehensively above-mentioned, the present invention is for reducing the encapsulating structure of buckling deformation, in order to problem and the damage that prevents to be caused, and production capacity that improves encapsulating structure simultaneously and stability because of the packaging body warpage, the warping phenomenon of encapsulating structure in the time of can reducing manufacture procedure of adhesive with stable baking processing procedure.
Above-described embodiment only is explanation technological thought of the present invention and characteristics; its purpose makes those skilled in the art can understand content of the present invention and is implementing according to this; when can not with qualification protection scope of the present invention; promptly the equalization of doing according to disclosed spirit generally changes or modifies, and must be encompassed in the claim of the present invention.
Claims (23)
1. an encapsulating structure is characterized in that, comprises:
One substrate has a chip bearing district and is provided with thereon;
One window shape auxiliary part is arranged on this substrate around this chip bearing district periphery;
A plurality of chips are arranged in this chip bearing district; And
One packing colloid coats those chips in this chip bearing district.
2. encapsulating structure as claimed in claim 1, wherein, the material of this substrate is constituted by wherein arbitrary at least of pi, glass, aluminium oxide, epoxy resin, beryllium oxide and elastic.
3. encapsulating structure as claimed in claim 1, wherein, this window shape auxiliary part is made of arbitrary institute of a plurality of bonding jumpers, a plurality of ceramic bar and a plurality of plastic strip.
4. encapsulating structure as claimed in claim 1, wherein, the material of this packing colloid by epoxy resin for mainly to form.
5. encapsulating structure as claimed in claim 1, wherein, this window shape auxiliary part is coated in this packing colloid.
6. encapsulating structure as claimed in claim 1, wherein, this window shape auxiliary part exposure also is surrounded on this packing colloid periphery.
7. encapsulating structure as claimed in claim 1, wherein, in arbitrary this chip bearing district that is arranged at this substrate that this chip utilizes a BGA Package technology, a thin space BGA Package technology, a ultra fine-pitch BGA Package technology, a micro ball grid array encapsulation technology and a window-type ball grid array encapsulation technology.
8. encapsulating structure as claimed in claim 1 is characterized in that, this encapsulating structure is made with following method step:
This substrate is provided;
Described chip is attached in this chip bearing district of this substrate;
Electrically connect described chip and this substrate; And
Cover this packing colloid, coat the described chip in this chip bearing district.
9. method as claimed in claim 8 wherein, before those chips are attached to this substrate, is arranged at this window shape auxiliary part on this substrate.
10. method as claimed in claim 8 wherein, after those chips are attached to this substrate, is arranged at this window shape auxiliary part on this substrate.
11. method as claimed in claim 8 wherein, after electrically connecting those chips and this substrate, is arranged at this window shape auxiliary part on this substrate.
12. an encapsulating structure is characterized in that, comprises:
One substrate has a plurality of chip bearings district;
A plurality of window shape auxiliary parts are arranged on this substrate respectively around each described chip bearing district periphery;
A plurality of chips are arranged in each described chip bearing district; And
One packing colloid coats the described chip in described chip bearing district.
13. encapsulating structure as claimed in claim 12, wherein, the material of this substrate is constituted by wherein arbitrary at least of pi, glass, aluminium oxide, epoxy resin, beryllium oxide and elastic.
14. as claim 12 described encapsulating structures, wherein, this window shape auxiliary part is made of arbitrary institute of a plurality of bonding jumpers, a plurality of ceramic bar and a plurality of plastic strip.
15. encapsulating structure as claimed in claim 12, wherein, the material of this packing colloid by epoxy resin for mainly to form.
16. encapsulating structure as claimed in claim 12, wherein, this window shape auxiliary part is coated in this packing colloid.
17. encapsulating structure as claimed in claim 12, wherein, this window shape auxiliary part exposure also is surrounded on this packing colloid periphery.
18. encapsulating structure as claimed in claim 12, wherein, the described chip bearing interval on this substrate more comprises a plurality of flutings and is arranged on this substrate.
19. encapsulating structure as claimed in claim 12, wherein, in arbitrary this chip bearing district that is arranged at this substrate that this chip utilizes a BGA Package technology, a thin space BGA Package technology, a ultra fine-pitch BGA Package technology, a micro ball grid array encapsulation technology and a window-type ball grid array encapsulation technology.
20. encapsulating structure as claimed in claim 12 is characterized in that, this encapsulating structure is made with following method step:
This substrate is provided;
Those chips are attached in this chip bearing district of this substrate;
Electrically connect described chip and this substrate; And
Provide this packing colloid to coat the described chip in this chip bearing district.
21. method as claimed in claim 20, wherein, before described chip was attached to this substrate, this window shape auxiliary part was arranged on this substrate.
22. method as claimed in claim 20, wherein, after described chip was attached to this substrate, this window shape auxiliary part was arranged on this substrate.
23. method as claimed in claim 20, wherein, after electrically connecting described chip and this substrate, this window shape auxiliary part is arranged on this substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200610094158 CN101097904A (en) | 2006-06-27 | 2006-06-27 | Packaging structure for reducing warping |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200610094158 CN101097904A (en) | 2006-06-27 | 2006-06-27 | Packaging structure for reducing warping |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101097904A true CN101097904A (en) | 2008-01-02 |
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ID=39011573
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200610094158 Pending CN101097904A (en) | 2006-06-27 | 2006-06-27 | Packaging structure for reducing warping |
Country Status (1)
| Country | Link |
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| CN (1) | CN101097904A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101937885A (en) * | 2010-08-12 | 2011-01-05 | 日月光半导体制造股份有限公司 | Semiconductor packaging piece and manufacture method thereof |
| US8546950B2 (en) | 2010-08-05 | 2013-10-01 | Advanced Semiconductor Engineering Inc. | Semiconductor package and manufacturing method thereof |
| CN105185756A (en) * | 2015-09-08 | 2015-12-23 | 三星半导体(中国)研究开发有限公司 | Semiconductor packaging part and method for manufacturing same |
| WO2018165816A1 (en) * | 2017-03-13 | 2018-09-20 | 深圳修远电子科技有限公司 | Chip fanning out circuit and method |
| CN112331567A (en) * | 2020-11-06 | 2021-02-05 | 苏州日月新半导体有限公司 | Chip integrated flip chip packaging method and product |
| CN113380645A (en) * | 2021-07-06 | 2021-09-10 | 深圳市德明新微电子有限公司 | Packaging product and preparation method thereof |
-
2006
- 2006-06-27 CN CN 200610094158 patent/CN101097904A/en active Pending
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8546950B2 (en) | 2010-08-05 | 2013-10-01 | Advanced Semiconductor Engineering Inc. | Semiconductor package and manufacturing method thereof |
| US8889488B2 (en) | 2010-08-05 | 2014-11-18 | Advanced Semiconductor Engineering, Inc. | Method for manufacturing semiconductor package |
| CN101937885A (en) * | 2010-08-12 | 2011-01-05 | 日月光半导体制造股份有限公司 | Semiconductor packaging piece and manufacture method thereof |
| CN101937885B (en) * | 2010-08-12 | 2013-03-20 | 日月光半导体制造股份有限公司 | Semiconductor packaging piece and manufacture method thereof |
| CN105185756A (en) * | 2015-09-08 | 2015-12-23 | 三星半导体(中国)研究开发有限公司 | Semiconductor packaging part and method for manufacturing same |
| CN105185756B (en) * | 2015-09-08 | 2018-04-13 | 三星半导体(中国)研究开发有限公司 | Semiconductor package part and the method for manufacturing the semiconductor package part |
| WO2018165816A1 (en) * | 2017-03-13 | 2018-09-20 | 深圳修远电子科技有限公司 | Chip fanning out circuit and method |
| CN112331567A (en) * | 2020-11-06 | 2021-02-05 | 苏州日月新半导体有限公司 | Chip integrated flip chip packaging method and product |
| CN113380645A (en) * | 2021-07-06 | 2021-09-10 | 深圳市德明新微电子有限公司 | Packaging product and preparation method thereof |
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