CN101083451A - Digital automatic calibration operational amplifier offset voltage circuit and method thereof - Google Patents
Digital automatic calibration operational amplifier offset voltage circuit and method thereof Download PDFInfo
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- CN101083451A CN101083451A CN 200610012054 CN200610012054A CN101083451A CN 101083451 A CN101083451 A CN 101083451A CN 200610012054 CN200610012054 CN 200610012054 CN 200610012054 A CN200610012054 A CN 200610012054A CN 101083451 A CN101083451 A CN 101083451A
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Abstract
The invention relates to an automatic calibration operational amplifier offset voltage circuit which comprises a comparator, a control logic and a current type digital-to-analog converter. It is characterized in that the method comprises the following steps: the output of the first stage of the operational amplifier is output to a calibration circuit, and meanwhile, the calibration current provided by the calibration circuit is received, so that the offset voltage is calibrated; the second stage of the operational amplifier receives the output voltage of the first stage of the operational amplifier and outputs a signal; the comparator is used for comparing output signals when the operational amplifier inputs are short-circuited and providing offset voltage calibration information for the calibration control logic; the control logic records the signal output by the comparator under the control of the clock, generates control information and inputs the control information to the current type analog-to-digital converter; and the current type analog-to-digital converter converts the control information into current for calibrating the offset voltage of the operational amplifier.
Description
Technical field
The present invention relates to electronic applications, specifically, is a kind of digital auto-calibration operational amplification offset voltage circuit and method thereof.
Background technology
Offset voltage is to need an important parameter considering in the high performance cmos circuits design.In the channel of reality, the offset voltage of circuit mainly is to be caused by the mechanical pressure after the uncertainty of manufacturing process and the encapsulation.As the offset voltage size of amplifier, mainly be by the differential right difference decision of input and output level.This life of differential input signal simultaneously also may contain offset voltage.Offset voltage has determined the performance or the rate of finished products of product to a certain extent.
When not adopting collimation technique, a good CMOS analog circuit is being followed under the situation of layout design rules, and offset voltage is usually in ± 5my scope.Strengthen the differential right size of input and output level and can reduce offset voltage, but the result of design can make input and output electric capacity become too high like this, serious reduction the speed of circuit.Therefore, a lot of High Definition Systems need be eliminated imbalance with electronics method.Usually the method for auto zero need adopt passive device such as electric capacity and switch or need special amplifier framework to obtain offset compensation.
Just because of this, the inventor is because the shortcoming of known technology through overtesting and research, is developed the present invention's " digital auto-calibration operational amplification offset voltage circuit ".
Summary of the invention
A purpose of the present invention is not adopt passive device such as electric capacity and switch and realizes calibrating offset voltage and have precision and control easily, circuit low in energy consumption.
To achieve these goals, a kind of digital auto-calibration operational amplification offset voltage circuit of the present invention comprises comparator, control logic and three parts of current mode digital-to-analog converter.It is characterized in that, wherein:
The output voltage of the operational amplifier first order outputs to calibration circuit, receives the calibration current that calibration circuit provides simultaneously, makes offset voltage obtain calibration;
The operational amplifier second level receives the output voltage of the operational amplifier first order, and output signal;
Output signal when one comparator, this comparator compare amplifier input short circuit, the calibration information of offset voltage being provided for the calibration control logic is the polarity of offset voltage;
One control logic, under the control of clock, the signal of record comparator output generates control information and inputs to current mode digital-to-analog converter;
One current mode digital-to-analog converter converts control information to electric current, is used to calibrate the offset voltage of amplifier.
Description of drawings
Fig. 1: the circuit structure diagram that is auto-calibration operational amplification offset voltage;
Fig. 2: the structure chart that is calibration circuit;
Fig. 3: be to adopt to calibrate the circuit structure diagram that control logic is calibrated an offset voltage automatically;
Fig. 4: be to adopt the control logic sequential chart of precision for the calibration of 6bit analog to digital converter;
Fig. 5: the output map that is operational amplifier and I_DAC in the calibration process;
Fig. 6: be the simulation result figures of different input offset voltages after compensation.
Embodiment
The circuit structure of auto-calibration operational amplification offset voltage as shown in Figure 1, the circuit of whole auto-calibration operational amplification offset voltage is made up of operational amplifier 1, comparator 4, calibration logic 7, operational amplifier 1 is connected in comparator 4, comparator 4 is connected in calibration logic 7.And operational amplifier 1 is made up of the operational amplifier first order 2, the operational amplifier second level 3, and the operational amplifier first order 2 is connected in the operational amplifier second level 3.Calibration logic 7 is made up of control logic 5, current mode digital-to-analog converter 6, and control logic 5 is connected in current mode digital-to-analog converter 6.The output voltage of the amplifier first order 2 outputs to comparator 4, and enabling signal is input to comparator 4 and calibration logic 7, and clock signal is input to calibration logic 7.
At first proper the bearing with input of the input of operational amplifier 1 is connected to common-mode voltage, calibration logic 7 simultaneously resets; Under enabling signal was high situation, the output voltage of the comparator 4 comparator/operational amplifier first order 2 generated the Hold signal; Under the control of clock, control logic begins counting, count value V＜n:0〉output by the current mode digital-to-analog converter control operational amplifier first order 2, its output level is controlled at the level of common mode output voltage, also promptly eliminated the influence of the operational amplifier first order 2 input offset voltages.
Wherein, calibration logic 7 structures as shown in Figure 2, it is made up of two-phase counting control unit 1, coarse adjustment counting unit 2, fine tuning counting unit 3 and current mode digital-to-analog converter 4.In fact control logic among Fig. 15 is exactly the particular counter of two-phase counting control unit 1, coarse adjustment counting unit 2, fine tuning counting unit 3 compositions as can be seen.At first coarse adjustment counting unit 2 begins counting, simultaneously with count value C_v＜n:0〉input to digital to analog converter 4; When upset appearred in full or comparison signal when its count value, fine tuning counting unit 3 began counting, simultaneously with count value F_v＜n:0〉input to digital to analog converter 4, in this process, as long as comparison signal overturns once more, then calibration finishes.Otherwise fine tuning counting unit count value is full, illustrates that the input offset voltage of operational amplifier is excessive, has exceeded rated capacity.
Among Fig. 1, the mutual conductance of the output current scope of the calibration range of calibration circuit and precision and current mode analog to digital converter and the difference input transistors of operational amplifier is relevant.
Below we illustrate the circuit structure that adopts the digital calibration offset voltage.Fully differential amplifier first order input offset voltage is reached offset voltage calibration circuit structure own as shown in Figure 3.Comprise: by the amplifier first order that current source Iref, transistor m1, m2, m3, m4 form, comparator 3, control logic 1,2 and current mode digital-to- analog converter 4,5,6,7; Wherein, by comparator 3, the own offset voltage of circuit calibration amplifier that control logic 1 and current mode digital-to- analog converter 4,5 are formed; By comparator 3, the circuit calibration amplifier input offset voltage that control logic 2 and current mode digital-to- analog converter 6,7 are formed.The imbalance of calibration amplifier itself
A kind of method of digital auto-calibration operational amplification offset voltage, the course of work is as follows:
(1) input with operational amplifier is connected to common-mode voltage, and calibration circuit simultaneously resets;
(2) utilize relatively amplifier first order output of comparator, up to being output as zero;
(3) utilize the coarse adjustment counter of 3-bit to produce a coarse adjustment offset current;
(4) behind amplifier first order output switching activity, utilize 3-bit fine tuning counter to produce a fine tuning offset current;
(5) disconnect defeated people;
(6) re-execute the 1-4 step, can calibrate the offset voltage of previous stage output.
For ease of explanation, setting forth a current mode digital-to-analog converter precision here is 6bit, the function of the offset voltage of calibration amplifier own.
Control logic is the counter of a band digital to analog converter, as shown in Figure 2.Its operation principle is exactly to calibrate offset voltage by the size of counter controls digital to analog converter output current.The calibration sequential as shown in Figure 4, when enabling signal when being high, clock signal (OP_CAL_CLK) is effective.Circuit begins calibration, coarse adjustment counting C_v＜3:0〉be changed to " 1 ", fine tuning counting F_v＜2:0〉be changed to " 0 ".C_v＜2:0 is counted in coarse adjustment then〉begin counting, after the comparison signal upset, fine tuning counting F_v＜2:0〉begin to count and overturn again up to comparison signal.Last count value will be stored in the counter, and calibration process finishes.
The compensation process of operational amplifier offset voltage as shown in Figure 5, along with the continuous adjustment of I-DAC absorption current size, the voltage of final operational amplifier output will reach a stationary value.10 input offset voltage Voff, the in sample value is tested, and its value scope is 0 to 6mV.Table name as a result: the maximum equivalent input offset voltage is less than 100 μ V, as shown in Figure 6 after compensating.
Claims (4)
1, a kind of digital auto-calibration operational amplification offset voltage circuit comprises comparator, control logic and three parts of current mode digital-to-analog converter, it is characterized in that, wherein:
The output voltage of the operational amplifier first order outputs to calibration circuit, receives the calibration current that calibration circuit provides simultaneously, makes offset voltage obtain calibration;
The operational amplifier second level receives the output voltage of the operational amplifier first order, and output signal;
Output signal when one comparator, this comparator compare amplifier input short circuit provides the calibration information of offset voltage for the calibration control logic;
One control logic, under the control of clock, the signal of record comparator output generates control information and inputs to current mode digital-to-analog converter;
One current mode digital-to-analog converter converts control information to electric current, is used to calibrate the offset voltage of amplifier.
2, according to the described digital auto-calibration operational amplification offset voltage circuit of claim 1, its spy is, the input offset voltage of this circuit adjustable amplifier or the offset voltage of the first order of amplifier own; After twice upset of comparator output level, calibration finishes.
3, according to the described digital auto-calibration operational amplification offset voltage circuit of claim 1, its spy is that it is the polarity of offset voltage that the calibration control logic provides the calibration information of offset voltage.
4, a kind of method of digital auto-calibration operational amplification offset voltage,
(1) input with operational amplifier is connected to common-mode voltage, and calibration circuit simultaneously resets;
(2) utilize relatively amplifier first order output of comparator, up to being output as zero;
(3) utilize the coarse adjustment counter of 3-bit to produce a coarse adjustment offset current;
(4) behind amplifier first order output switching activity, utilize 3-bit fine tuning counter to produce a fine tuning offset current;
(5) disconnect input;
(6) re-execute the 1-4 step, can calibrate the offset voltage of previous stage output.
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| CN 200610012054 CN101083451A (en) | 2006-05-31 | 2006-05-31 | Digital automatic calibration operational amplifier offset voltage circuit and method thereof |
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| CN 200610012054 CN101083451A (en) | 2006-05-31 | 2006-05-31 | Digital automatic calibration operational amplifier offset voltage circuit and method thereof |
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| CN101986557A (en) * | 2010-11-24 | 2011-03-16 | 无锡思泰迪半导体有限公司 | Method and structure for eliminating offset voltage of operational amplifier by using lining bias effect |
| CN102006070A (en) * | 2010-12-22 | 2011-04-06 | 复旦大学 | Time-domain comparator applying maladjustment correction technology |
| CN102053195A (en) * | 2010-10-15 | 2011-05-11 | 艾默生网络能源有限公司 | Current sampling system and method for calculating offset voltage of operational amplifier |
| CN103176497A (en) * | 2013-03-06 | 2013-06-26 | 山东力创赢芯集成电路有限公司 | Comparator offset voltage compensation circuit and compensation method |
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- 2006-05-31 CN CN 200610012054 patent/CN101083451A/en active Pending
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