CN101080073A - A between-module communication circuit and method of dual-mode communication terminal - Google Patents
A between-module communication circuit and method of dual-mode communication terminal Download PDFInfo
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Abstract
This invention relates to a communication method among modules of a dual-mode communication terminal used in communication terminals with IRQ and ST of port GPIO in the process chip of a first communication module connected with the ST and IRQ of port GPIO in the chip of the second module and with n-GPIO ports connected to each other in the chips of the first and second modules, when a chip of the first or the second module sends data and the value of the IRO port of a sending module is idle label, the sending module tests the ST port of its own, if the value is idle label, the next step is made and the sending module sets its data port an output attribute and sets the value of the IRO an interruption label to trigger the receiving module to receive data via the data port and sends sending data of n-bits to its data port to keep the time length of the first time threshold and sets its IRQ an idle label.
Description
Technical field
The present invention relates to a kind of inter-module communication circuit and method of bimodulus communicating terminal.
Background technology
The bimodulus communicating terminal is meant that communicating terminal may be simultaneously operated under two network schemers, GSM (Global system for Mobile communications for example, global system for mobile communications) and CDMA (Code Division Multiple Access, code division multiple access).Use the bimodulus communicating terminal, the user can be switched two network agile, has very strong convenience and practicality.Bimodulus communicating terminal inside comprises two communication modules, each communication module all comprises baseband processing chip, two communication modules promptly use serial ports (UART, Universal AsynchronousReceiver/Transmitter) to communicate between two baseband processing chips usually.
As the patent No. is 200510035123.X, name is called and discloses a kind of use in the patent of invention of " method of GSM/PHS dual-mode handset and sending data between two modules " and carry out the method for serial communication by GPIO (General PurposeInput/Output, general I/O) interface between two communication modules.This method increases the connection of two GPIO interfaces between two modules, be respectively applied for to the other side to export own current working state and obtain the other side's operating state.When a communication module need obtain the other side's operating state earlier by the GPIO interface when another communication module sends data, when read in be high level the time, directly send data; When reading in low level, issue earlier and carry out the serial data communication with this module after interrupt signal of the other side makes the other side that operating state is switched to the master clock pattern.
It is fairly simple to adopt this mode to carry out the circuit that communication adopts, but following shortcoming is arranged: (1) is because the serial ports limited amount of each communication module, when adopting serial ports between two communication modules, to carry out data communication, just serial ports can not be used for the terminal debugging, make and normally to carry out by the research and development and the maintenance operation of a large amount of input and output Debugging message of serial ports.(2) because the clock of the Baud rate generator of serial ports derives from the main work clock (frequency height) of baseband processor, therefore when two communication modules use serial ports to carry out data communication, baseband processor must be used the high master clock work of frequency, be that communicating terminal can not be in the holding state that uses auxiliary clock (frequency is low) work, therefore can cause the power consumption of communicating terminal to increase, stand-by time shortens.(3) serial ports is subjected to the restriction of self hardware, traffic rate lower (being generally 115200 bps).
In the patent No. is 200520067828.5, and name is called in the utility model patent of " a kind of GSM/PHS dual-mode handset AccessPort information output control circuit " and discloses a kind of technical scheme of carrying out serial communication by analog switch between two communication modules.This technical scheme increases an analog switch device between the rs 232 serial interface signal line, when needs output Debugging message, disconnect two serial communications between the communication module by the control analog switch, thereby realize the normal output of software debug information.
Adopt this technical scheme can realize being undertaken the function of data communication between Debugging message output and the communication module by a serial ports.But, therefore increased the cost of communicating terminal owing to increased analog switch device.Same owing to remain and adopt serial ports to carry out exchanges data between the communication module, therefore deposit power consumption height, stand-by time is short and communication speed is low problem equally.
Summary of the invention
Technical problem to be solved by this invention is, overcome the deficiency of the inter-module communication method of bimodulus communicating terminal in the prior art, the inter-module communication circuit and the method for the bimodulus communicating terminal that propose a kind ofly can under master clock pattern and auxiliary clock pattern, to work, communication speed is high.
In order to solve the problems of the technologies described above, the invention provides a kind of inter-module communication method of bimodulus communicating terminal, be applied to the GPIO mouth in the first communication module process chip: the GPIO mouth in IRQ, ST and the second communication module process chip: ST, IRQ link to each other as control line respectively, and link to each other respectively in the bimodulus communicating terminal as data wire as data port with n GPIO mouth in n GPIO mouth in the first communication module process chip and the second communication module process chip; In the first communication module process chip or the second communication module process chip any one sends data as sending module to receiver module, and the value of the IRQ mouth of sending module is carried out following operation when being idle mark:
A) sending module detects the value of this module ST mouth, if this value is carried out next step for idle mark;
B) data port of this module of sending module is set to output attribute, and the value of this module I RQ mouth is set to interrupt flag, carries out the Data Receiving operation to trigger receiver module by the data port of this module;
C) sending module is sent n bit data to be sent into the data port of this module respectively, and keeps the time span of the very first time threshold value of setting;
D) the IRQ mouth of this module of sending module is set to idle mark;
Wherein, n 〉=1; Very first time threshold value enters stable state required time and receiver module more than or equal to the data-signal on the data wire and reads the required time sum of data in the data port of this module.
In addition, after described sending module triggered the Data Receiving operation of described receiver module, described receiver module carried out following operation:
A) time span of wait second time threshold;
B) from the data port reading of data of receiver module;
Wherein, second time threshold enters the stable state required time more than or equal to the data-signal on the data wire.
In addition, also comprise following operation after the described step c): the data port of this module of sending module is set to input attributes.
In addition, described steps A) also comprise following operation before: the data port of this module of receiver module is set to input attributes; And at described step b) and c) between also comprise following operation: sending module is waited for the length of the 3rd time threshold; Wherein, the 3rd time threshold is provided with the required time of data port attribute more than or equal to receiver module.
In addition, the described free time is labeled as 0, interrupt flag is 1, and IRQ mouth and the line ST mouth of receiver module between of described sending module by this module triggers the interruption of receiver module in the mode of rising edge or high level, to trigger the Data Receiving operation of described receiver module.
In addition, the described free time is labeled as 1, interrupt flag is 0, and IRQ mouth and the line ST mouth of receiver module between of described sending module by this module triggers the interruption of receiver module with trailing edge or low level mode, to trigger the Data Receiving operation of described receiver module.
In addition, the value of the ST mouth of described this module of receiver module poll is if this value then triggers the Data Receiving operation of this module for interrupt flag.
The present invention also provides a kind of inter-module communication circuit of bimodulus communicating terminal, comprise the first communication module process chip and the second communication module process chip, comprise n+2 available GPIO mouth in each communication module process chip: IRQ mouth, ST mouth and n data port is characterized in that
Described IRQ mouth is an output attribute, and the ST mouth is an input attributes, and a described n data port can be set to input attributes or output attribute; And
The IRQ mouth of the first communication module process chip, ST mouth link to each other respectively with ST mouth, the IRQ mouth of the second communication module process chip, when being used for before sending data value with its IRQ mouth and changing interrupt flag into by idle mark as the first communication module process chip of sending module or the second communication module process chip, the value of the ST mouth of the receiver module that links to each other with this IRQ mouth changes thereupon, and triggers the Data Receiving operation of receiver module; Whether sending module current this module of detection before sending data that described ST mouth also is used under it is receiving data;
N data port in two communication module process chip links to each other as data wire respectively, is used for simultaneously that length is the communication data of n bit between transport module;
Wherein, n 〉=1.
In addition, described ST mouth has interrupt capabilities, and the described free time is labeled as 0, and interrupt flag is 1, and described ST mouth triggers interruption in the mode of rising edge or high level.
In addition, described ST mouth has interrupt capabilities, and the described free time is labeled as 1, and interrupt flag is 0, and described ST mouth triggers interruption with trailing edge or low level mode.
Because the GPIO that the present invention adopts two baseband processing chips of bimodulus communicating terminal to carry links to each other respectively and carries out transfer of data as control line and data wire, therefore not only can be when communicating terminal be in normal operating conditions, also can when being in holding state, communicating terminal carry out communication, saved the power consumption of communicating terminal, increase the speed of transfer of data, increased stand-by time.
Description of drawings
Fig. 1 is the electrical block diagram of the inter-module communication circuit of embodiment of the invention bimodulus communicating terminal;
Fig. 2 is the data transmission flow figure of embodiment of the invention inter-module communication method;
Fig. 3 is the Data Receiving flow chart of embodiment of the invention inter-module communication method.
Embodiment
Because the baseband processor of each module of bimodulus communicating terminal all has a plurality of available GPIO mouths, it can be linked to each other and be used for transmission of control signals and data-signal, utilize the parallel data transmission of GPIO simulation microcontroller, realize the communication between the module.
Wherein the communication module of bimodulus communicating terminal can be CDMA, GSM, PHS (PersonalHandyphone System, personal handyphone system), WCDMA (Wideband CDMA, Wideband-CDMA) or TD-SCDMA (Time Division-Synchronous CDMA, TD SDMA), be that example describes inter-module communication circuit of the present invention and method with CDMA and GSM communication module below.
Describe the present invention below in conjunction with drawings and Examples.
Fig. 1 is the electrical block diagram of the inter-module communication circuit of embodiment of the invention bimodulus communicating terminal.As shown in Figure 1, the bimodulus communicating terminal comprises modules A (CDMA module) and module B (gsm module), the C_IRQ in the modules A, C_ST, C_D[0] to C_D[n-1], and the G_IRQ among the module B, G_ST, G_D[0] to G_D[n-1] all be the GPIO mouth.Wherein, C_IRQ links to each other with G_ST, and C_ST links to each other with G_IRQ and is used for the transmission of control signal; C_D[0] to C_D[n-1] with G_D[0] to G_D[n-1] link to each other respectively, be used for the transmission of data-signal.
C_IRQ is the control mouth of modules A, and G_ST is the control mouth of module B; The side signal transmission of the line between C_IRQ and the G_ST (being called for short first control line) to for modules A to module B, promptly C_IRQ is an output attribute, G_ST is an input attributes.Wherein, G_ST has interrupt capabilities, and promptly module B is interrupt resources such as G_ST assigned interrupt number.
G_IRQ is the control mouth of module B, and C_ST is the control mouth of modules A; The side signal transmission of the line between G_IRQ and the C_ST (being called for short second control line) to for module B to modules A, promptly G_IRQ is an output attribute, C_ST is an input attributes.Wherein, C_ST has interrupt capabilities, and promptly modules A is interrupt resources such as C_ST assigned interrupt number.
The triggering mode that interrupts can be that the edge triggers or level triggers.The edge triggers and is divided into rising edge triggering and trailing edge triggering again; Level triggers is divided into the high level triggering again and low level triggers.
Interruption triggers when C_ST or G_ST become interrupt flag by idle mark.If the free time is labeled as 0, interrupt flag is 1, and then Dui Ying down trigger mode can be that rising edge triggers or high level triggers; If the free time is labeled as 1, interrupt flag is 0, and then Dui Ying down trigger mode can be that trailing edge triggers or low level triggers.
C_D[0] to C_D[n-1] be the data port of modules A, G_D[0] to G_D[n-1] be the data port of module B; C_D[0] and G_D[0] ..., C_D[n-1] and G_D[n-1] between line be data wire.C_D[0] to C_D[n-1], G_D[0] to G_D[n-1] can be set to input or output attribute.Said n can be the integer more than or equal to 1, and preferably, desirable n is 8 or 16 or 32.Choosing of n value is relevant with the available GPIO number in the baseband processor.
Fig. 2 is the data transmission flow figure (sending data instance to module B with modules A) of embodiment of the invention inter-module communication method.As shown in Figure 2, data send and comprise following steps: wherein, before data sent, the C_IRQ value should be idle mark.
101: modules A detects control mouthful state value, if the C_ST value is idle mark, then expression can send data, carries out next step; Otherwise, re-execute this step after then waiting for a period of time if the C_ST value is an interrupt flag;
The above-mentioned free time is labeled as 0, and interrupt flag is 1; That is to say that when the value of C_ST is 0 representation module B is current not to send data to modules A; And the value of C_ST is 1 o'clock, representation module B has triggered the interruption of modules A, send data, attempt again again after at this moment modules A need wait for a period of time sending, can certainly after the reception EP (end of program) of modules A, notify router to attempt again sending to modules A.
102: modules A becomes interrupt flag with the C_IRQ value by idle mark, the interruption of trigger module B, the reception program of startup module B; And with data port C_D[0] to C_D[n-1] be set to output attribute;
In this case, the down trigger mode of the G_ST that links to each other with C_IRQ should be the rising edge triggering or high level triggers, and produces a rising edge when just the G_ST value becomes interrupt flag (1) by idle mark (0), triggers and interrupts; Or the G_ST value triggers when being high level (1) and interrupts.
103: modules A is delivered to C_D[0 with the data that will send], C_D[1] ..., C_D[n-1], and keep the length of very first time threshold value;
Very first time threshold value is waited for the time span of the data stabilization of (on the data port) on the data wire and the time span sum of module B reading of data for module B.
104: modules A C_IRQ value is set to idle mark (0), and with data port C_D[0] to C_D[n-1] be set to input attributes; Meanwhile, the G_ST value that links to each other with C_IRQ also becomes idle mark (0), and process of transmitting finishes.
Fig. 3 is the Data Receiving flow chart (sending data instance to module B with modules A) of embodiment of the invention inter-module communication method.As shown in Figure 3, in above-mentioned steps 102, modules A is by having no progeny among the first control line trigger module B, and module B carries out following operation:
201: enter interrupt handling routine, wait for the time span of second time threshold;
Second time threshold is waited for the time span of the data stabilization on the data wire for module B.
202: from G_D[0], G_D[1] ..., G_D[n-1] reading of data.
Above step 101 to 104, step 201 sends inter-module communication method that data instance described of the present invention bimodulus communicating terminal with modules A to module B to 202, the step that module B sends data to modules A similarly repeats no more.
As seen from the above description, because the GPIO that the present invention adopts two baseband processing chips of bimodulus communicating terminal to carry links to each other respectively and carries out transfer of data as control line and data wire, therefore not only can be when communicating terminal be in normal operating conditions (employing master clock frequency), also can when communicating terminal is in holding state, (adopt the auxiliary clock frequency) and carry out communication, and do not influence the transmission of Debugging message, save the power consumption of communicating terminal, increased stand-by time.And when available GPIO stomatopod is more than enough, promptly the quantity n of data port be 8,16,32 ... the time, the speed of inter-module communication of the present invention will be several times as much as the inter-module communication speed that adopts serial ports.
Based on design of the present invention, on the basis of the foregoing description, can also do various conversion:
With idle flag settings is 1, and interrupt flag is set at 0, correspondingly, the down trigger mode of C_ST and G_ST is set at trailing edge triggers or low level triggers;
Certainly, can be not do not trigger the reception program of receiver module yet, and adopt the value of polling mode inquiry G_ST (sending data instance to module B), when this value begins to carry out Data Receiving during for interrupt flag with modules A by interrupt mode.In this case, very first time threshold value need comprise the polling interval of receiver module.It should be noted that data transmission efficiency is reduction greatly also if adopt polling mode inquiry G_ST value will consume a large amount of system resource, so adopt when only not having available interrupt resources in system.
In addition, in step 104, can save data port C_D[0] to C_D[n-1] be set to the operation of input attributes, receive flow process and carry out and this operation put into, promptly in step 201, add corresponding operation.In this case, also need between step 102 and 103, to add following steps: the length of waiting for the 3rd time threshold.The length of the 3rd time threshold is provided with the required time of data port attribute more than or equal to receiver module.
In addition, except first control line and second control line, also can add other control line (and corresponding GPIO control mouthful) so that sending module according to the importance of the data that will send, transmit precedence information to receiver module, receiver module judges whether to receive these data according to current state of living in and precedence information.
Claims (10)
1, a kind of inter-module communication method of bimodulus communicating terminal, be applied to the GPIO mouth in the first communication module process chip: the GPIO mouth in IRQ, ST and the second communication module process chip: ST, IRQ link to each other as control line respectively, and link to each other respectively in the bimodulus communicating terminal as data wire as data port with n GPIO mouth in n GPIO mouth in the first communication module process chip and the second communication module process chip; In the first communication module process chip or the second communication module process chip any one sends data as sending module to receiver module, and the value of the IRQ mouth of sending module is carried out following operation when being idle mark:
A) sending module detects the value of this module ST mouth, if this value is carried out next step for idle mark;
B) data port of this module of sending module is set to output attribute, and the value of this module I RQ mouth is set to interrupt flag, carries out the Data Receiving operation to trigger receiver module by the data port of this module;
C) sending module is sent n bit data to be sent into the data port of this module respectively, and keeps the time span of the very first time threshold value of setting;
D) the IRQ mouth of this module of sending module is set to idle mark;
Wherein, n 〉=1; Very first time threshold value enters stable state required time and receiver module more than or equal to the data-signal on the data wire and reads the required time sum of data in the data port of this module.
2, the inter-module communication method of bimodulus communicating terminal as claimed in claim 1 is characterized in that, after described sending module triggered the Data Receiving operation of described receiver module, described receiver module carried out following operation:
A) time span of wait second time threshold;
B) from the data port reading of data of receiver module;
Wherein, second time threshold enters the stable state required time more than or equal to the data-signal on the data wire.
3, the inter-module communication method of bimodulus communicating terminal as claimed in claim 1 is characterized in that, also comprise following operation after the described step c): the data port of this module of sending module is set to input attributes.
4, the inter-module communication method of bimodulus communicating terminal as claimed in claim 2 is characterized in that, described steps A) also comprise following operation before: the data port of this module of receiver module is set to input attributes; And at described step b) and c) between also comprise following operation: sending module is waited for the length of the 3rd time threshold; Wherein, the 3rd time threshold is provided with the required time of data port attribute more than or equal to receiver module.
5, the inter-module communication method of bimodulus communicating terminal as claimed in claim 2, it is characterized in that, the described free time is labeled as 0, interrupt flag is 1, IRQ mouth and the line ST mouth of receiver module between of described sending module by this module triggers the interruption of receiver module in the mode of rising edge or high level, to trigger the Data Receiving operation of described receiver module.
6, the inter-module communication method of bimodulus communicating terminal as claimed in claim 2, it is characterized in that, the described free time is labeled as 1, interrupt flag is 0, IRQ mouth and the line ST mouth of receiver module between of described sending module by this module triggers the interruption of receiver module with trailing edge or low level mode, to trigger the Data Receiving operation of described receiver module.
7, the inter-module communication method of bimodulus communicating terminal as claimed in claim 2 is characterized in that, the value of the ST mouth of described this module of receiver module poll is if this value then triggers the Data Receiving operation of this module for interrupt flag.
8, a kind of inter-module communication circuit of bimodulus communicating terminal, comprise the first communication module process chip and the second communication module process chip, comprise n+2 available GPIO mouth in each communication module process chip: IRQ mouth, ST mouth and n data port is characterized in that
Described IRQ mouth is an output attribute, and the ST mouth is an input attributes, and a described n data port can be set to input attributes or output attribute; And
The IRQ mouth of the first communication module process chip, ST mouth link to each other respectively with ST mouth, the IRQ mouth of the second communication module process chip, when being used for before sending data value with its IRQ mouth and changing interrupt flag into by idle mark as the first communication module process chip of sending module or the second communication module process chip, the value of the ST mouth of the receiver module that links to each other with this IRQ mouth changes thereupon, and triggers the Data Receiving operation of receiver module; Whether sending module current this module of detection before sending data that described ST mouth also is used under it is receiving data;
N data port in two communication module process chip links to each other as data wire respectively, is used for simultaneously that length is the communication data of n bit between transport module;
Wherein, n 〉=1.
9, the inter-module communication circuit of bimodulus communicating terminal as claimed in claim 8 is characterized in that, described ST mouth has interrupt capabilities, and the described free time is labeled as 0, and interrupt flag is 1, and described ST mouth triggers interruption in the mode of rising edge or high level.
10, the inter-module communication circuit of bimodulus communicating terminal as claimed in claim 8 is characterized in that, described ST mouth has interrupt capabilities, and the described free time is labeled as 1, and interrupt flag is 0, and described ST mouth triggers interruption with trailing edge or low level mode.
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| CN2007101265508A CN101080073B (en) | 2007-06-22 | 2007-06-22 | A between-module communication circuit and method of dual-mode communication terminal |
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| CN2007101265508A CN101080073B (en) | 2007-06-22 | 2007-06-22 | A between-module communication circuit and method of dual-mode communication terminal |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101345954A (en) * | 2008-08-18 | 2009-01-14 | 青岛海信移动通信技术股份有限公司 | Double-module terminal start-up detection method |
| CN101287250B (en) * | 2008-05-29 | 2011-05-18 | 德信无线通讯科技（北京）有限公司 | Communication method and device for master/slave baseband module in double-mode mobile phone |
| CN103428905A (en) * | 2012-05-24 | 2013-12-04 | 现代摩比斯株式会社 | Telematics communication system and method |
| CN108233442A (en) * | 2016-12-15 | 2018-06-29 | 宋颖 | A kind of device being used for as mobile phone power supply |
| CN110632498A (en) * | 2019-09-19 | 2019-12-31 | 西安广和通无线通信有限公司 | Test method and system |
| CN110781118A (en) * | 2019-09-30 | 2020-02-11 | 深圳震有科技股份有限公司 | Method and device for realizing slave mode of parallel bus, computer equipment and medium |
| CN112363962A (en) * | 2020-10-30 | 2021-02-12 | 深圳市汇顶科技股份有限公司 | Data communication method, system, electronic device and computer storage medium |
| CN115379597A (en) * | 2022-08-24 | 2022-11-22 | 浙江清芯微电子有限公司 | RISC-V based HPLC & HRF dual-mode communication chip architecture |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100444670C (en) * | 2005-06-03 | 2008-12-17 | 中兴通讯股份有限公司 | Handset in GSM/PHS dual modes, and method for sending data between two modules |
| CN2842941Y (en) * | 2005-11-16 | 2006-11-29 | 中兴通讯股份有限公司 | GSM/PHS double-mode submachine series interface debugging information output control circuit |
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2007
- 2007-06-22 CN CN2007101265508A patent/CN101080073B/en not_active Expired - Fee Related
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101287250B (en) * | 2008-05-29 | 2011-05-18 | 德信无线通讯科技（北京）有限公司 | Communication method and device for master/slave baseband module in double-mode mobile phone |
| CN101345954A (en) * | 2008-08-18 | 2009-01-14 | 青岛海信移动通信技术股份有限公司 | Double-module terminal start-up detection method |
| CN103428905A (en) * | 2012-05-24 | 2013-12-04 | 现代摩比斯株式会社 | Telematics communication system and method |
| CN108233442A (en) * | 2016-12-15 | 2018-06-29 | 宋颖 | A kind of device being used for as mobile phone power supply |
| CN110632498A (en) * | 2019-09-19 | 2019-12-31 | 西安广和通无线通信有限公司 | Test method and system |
| CN110781118A (en) * | 2019-09-30 | 2020-02-11 | 深圳震有科技股份有限公司 | Method and device for realizing slave mode of parallel bus, computer equipment and medium |
| CN110781118B (en) * | 2019-09-30 | 2023-11-03 | 深圳震有科技股份有限公司 | Method and device for realizing parallel bus slave mode, computer equipment and medium |
| CN112363962A (en) * | 2020-10-30 | 2021-02-12 | 深圳市汇顶科技股份有限公司 | Data communication method, system, electronic device and computer storage medium |
| CN115379597A (en) * | 2022-08-24 | 2022-11-22 | 浙江清芯微电子有限公司 | RISC-V based HPLC & HRF dual-mode communication chip architecture |
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| CN101080073B (en) | 2011-09-21 |
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