CN202488503U - Multi-module high speed communication system - Google Patents
Multi-module high speed communication system Download PDFInfo
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- CN202488503U CN202488503U CN2011205543218U CN201120554321U CN202488503U CN 202488503 U CN202488503 U CN 202488503U CN 2011205543218 U CN2011205543218 U CN 2011205543218U CN 201120554321 U CN201120554321 U CN 201120554321U CN 202488503 U CN202488503 U CN 202488503U
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Abstract
An embodiment of the present utility model discloses a multi-module high speed communication system. The system comprises a main controller and a function module, the main controller is provided with a mobile industry processor interface MIPI; the main controller is connected with the function module through a wake up interface of the MIPI interface; and the main controller is connected with the function module through a signal transmission interface of the MIPI interface and a switch circuit. By adopting the system, on the basis of reducing occupation of interface resources of the main controller, the rate of transmission between the main controller and the function module can be greatly enhanced, the highest transmission rate can reach 480 Mbps, only a small number of switch circuits are needed, and hardware costs can be saved.
Description
Technical field
The utility model relates to the communications field, relates in particular to a kind of multimode high-speed communication system.
Background technology
In the communication plan of existing master controller and multimode; The communication datas that adopt UART interface (Universal Asynchronous Receiver/Transmitter, universal asynchronous reception/dispensing device) or DPRAM chip (dual port RAM) to realize master controller and each module mutual more.In the UART interface scheme, the speed of UART interface is lower, can not satisfy the rate requirement of HSPA+ (evolved HSPA), and need take the many to the UART interface of master controller; In the DPRAM chip solution, the quantity of address wire, control line, data wire is more, takies the interface resource of master controller, and needs a plurality of DPRAM IC (dual port RAM integrated circuit), and cost is higher.
The utility model content
The utility model embodiment technical problem to be solved is, a kind of multimode high-speed communication system is provided, and can save the interface resource of master controller, and satisfies the rate requirement of HSPA+.
In order to solve the problems of the technologies described above, the utility model embodiment provides a kind of multimode high-speed communication system, comprising:
Master controller and functional module, said master controller have mobile industry processor interface MIPI;
Said master controller links to each other with said functional module through the interface that wakes up of said MIPI interface;
Said master controller links to each other with said functional module with switching circuit through the signal transmission interface of said MIPI interface.
Further, said switching circuit comprises three path analoging switch, each road of said three path analoging switch respectively with the signal transmission interface of said MIPI interface in data transmission interface, sign interface link to each other with the prepare control interface.
Further; Said switching circuit comprises first switching circuit and second switch circuit; Wherein, Output interface in the signal transmission interface of said MIPI interface links to each other with said functional module through said first switching circuit, and the input interface in the signal transmission interface of said MIPI interface links to each other with said functional module through said second switch circuit.
Further, each road of said three path analoging switch is a single pole multiple throw, and the not moved end of said single pole multiple throw is identical with the quantity of said functional module.
Further, said first switching circuit all links to each other with the bus expansion interface GPIO of said master controller with the second switch circuit, and the control signal that said master controller sends through said GPIO interface is controlled said first switching circuit and second switch circuit.
Accordingly, the utility model embodiment also provides a kind of multimode high-speed communication system, comprising:
Master controller and functional module, said master controller has the general-purpose serial bus USB interface;
Said master controller links to each other with said functional module through switching circuit.
Further, said switching circuit comprises first switching circuit and second switch circuit.Wherein, the differential signal interface of said USB interface links to each other with said functional module through said first switching circuit, and the power supply control interface of said USB interface links to each other with said functional module through said second switch circuit.
Further, said first switching circuit comprises two path analoging switch, each road of said two path analoging switch respectively with the differential signal interface of said USB interface in the positive signal interface link to each other with the negative signal interface.
Further, said second switch circuit comprises a path analoging switch, and a said path analoging switch links to each other with the power supply control interface of said USB interface.
Further, each road of said two path analoging switch and a path analoging switch is a single pole multiple throw, and the not moved end of said single pole multiple throw is identical with the quantity of said functional module.
Further, said first switching circuit all links to each other with the bus expansion interface GPIO of said master controller with the second switch circuit, and the control signal that said master controller sends through said GPIO interface is controlled said first switching circuit and second switch circuit.
Implement the utility model embodiment, have following beneficial effect:
Adopt multiway analog switch to cooperate MIPI interface (Mobile Industry Processor Interface moves the industry processor interface) or USB interface (Universal Serial BUS USB) on the master controller to control the switching of communicating by letter between master controller and a plurality of functional modules; Take in minimizing on the basis of the interface resource on the master controller; Can improve the transmission rate between master controller and functional module greatly; Maximum transmission rate can reach 480Mbps; And only need a spot of switching circuit, economize on hardware cost.
Description of drawings
In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art; To do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below; Obviously, the accompanying drawing in describing below only is some embodiment of the utility model, for those of ordinary skills; Under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is that the structure of first embodiment of the utility model multimode high-speed communication system is formed sketch map;
Fig. 2 is that the structure of second embodiment of the utility model multimode high-speed communication system is formed sketch map.
Embodiment
To combine the accompanying drawing among the utility model embodiment below, the technical scheme among the utility model embodiment is carried out clear, intactly description, obviously, described embodiment only is the utility model part embodiment, rather than whole embodiment.Based on the embodiment in the utility model, those of ordinary skills are not making the every other embodiment that is obtained under the creative work prerequisite, all belong to the scope of the utility model protection.
Seeing also Fig. 1, is that the structure of first embodiment of the utility model multimode high-speed communication system is formed sketch map.Said multimode high-speed communication system comprises: master controller 1, first switching circuit 2, and second switch circuit 3 and functional module 4～5, wherein,
Said master controller 1 has the MIPI interface.
Concrete, said MIPI interface comprises and wakes interface WAKE and signal transmission interface up.With respect to master controller, saidly wake interface up and said signal transmission interface all can be divided into two types: one type is output interface, is used for master controller and sends the output signal to functional module, and available prefix " A_C_ " is represented with " physical interface " combination; Another kind of is input interface, is used for master controller and receives the input signal from functional module, and available prefix " C_A_ " is represented with " physical interface " combination.As wake interface up and can be divided into output interface A_C_WAKE and input interface C_A_WAKE, wherein A_C_WAKE and C_A_WAKE respectively have two, and be identical with the quantity of functional module.
Said signal transmission interface further comprises data transmission interface DATA, sign interface FLAG and prepare control interface READY.Wherein data transmission interface can be divided into output interface A_C_DATA and input interface C_A_DATA; The sign interface can be divided into output interface A_C_FLAG and input interface C_A_FLAG, and the prepare control interface can be divided into output interface A_C_READY and input interface C_A_READY.
Said master controller 1 links to each other with said functional module 4～5 through the interface that wakes up of said MIPI interface.
Concrete, when 4 needs of said master controller 1 and said functional module were communicated by letter, said master controller 1 woke said functional module 4 up through A_C_WAKE1, and perhaps said functional module 4 is waken said master controller 1 up through C_A_WAKE1.
Said master controller 1 links to each other with said functional module 4～5 with switching circuit through the signal transmission interface of said MIPI interface.
Concrete; Said switching circuit comprises first switching circuit 2 and second switch circuit 3; Wherein, Output interface in the signal transmission interface of said MIPI interface links to each other with said functional module 4 through said first switching circuit 2, and the input interface in the signal transmission interface of said MIPI interface links to each other with said functional module 5 through said second switch circuit 3.
Said switching circuit comprises three path analoging switch, each road of said three path analoging switch respectively with the signal transmission interface of said MIPI interface in data transmission interface, sign interface link to each other with the prepare control interface.
Concrete, said first switching circuit 2 comprises three path analoging switch, and one the tunnel links to each other with the A_C_DATA interface, supplies master controller 1 to functional module 4～5 transmission data-signals; One the tunnel links to each other with the A_C_FLAG interface, supplies master controller 1 to send id signals to functional module 4～5; One the tunnel links to each other with the A_C_READY interface, supplies master controller 1 to send the prepare control signals to functional module 4～5.
Equally, said second switch circuit 3 comprises three path analoging switch, and one the tunnel links to each other with the C_A_DATA interface, supplies functional module 4～5 to send data-signal to master controller 1; One the tunnel links to each other with C_ A _ FLAG interface, supplies functional module 4～5 to send id signal to master controller 1; One the tunnel links to each other with the C_A_READY interface, supplies functional module 4～5 to send the prepare control signal to master controller 1.
Each road of said three path analoging switch is a single pole multiple throw, and the not moved end of said single multithrow switch is identical with the quantity of said functional module.
Concrete, in the present embodiment, be to be that example is explained with two functional modules, then the quantity of the not moved end of said single pole multiple throw is two.Said single pole multiple throw is concrete to adopt following mode to link to each other with functional module 4～5 with said master controller 1: the moved end of said single pole multiple throw and A_C_DATA, A_C_FLAG, A_C_READY; C_A_DATA, C_ A _ FLAG, C_A_READY link to each other respectively, and the not moved end of said single pole multiple throw links to each other with functional module 4～5.
The quantity of functional module increases by one, and the quantity of the not moved end of said single pole multiple throw is also corresponding simultaneously to increase by one, so that between a plurality of functional modules, communicate switching according to the control signal of master controller 1.
Said first switching circuit 2 all links to each other with the bus expansion interface GPIO of said master controller with second switch circuit 3, and the control signal that said master controller sends through said GPIO interface is controlled said first switching circuit 2 and second switch circuit 3.
Concrete, said first switching circuit 2 all links to each other with the GPIO interface (the general I/O of General Purpose Input Output) of said master controller 1 with said second switch circuit 3.When 4 needs of said master controller 1 and said functional module are communicated by letter; Said master controller 1 promptly sends control signal through said GPIO interface and controls said first switching circuit 2 and with said second switch circuit 3 moved end is switched on the not moved end that links to each other with said functional module 4, so that A_C_DATA1, A_C_FLAG1, A_C_READY1; C_A_DATA1, C_ A _ FLAG1, C_A_READY1 and said functional module 4 are connected.
In like manner; When 5 needs of said master controller 1 and said functional module are communicated by letter; Said master controller 1 promptly sends control signal through said GPIO interface and controls said first switching circuit 2 and with said second switch circuit 3 moved end is switched on the not moved end that links to each other with said functional module 5, does not give unnecessary details at this.
The utility model embodiment adopts multiway analog switch to cooperate the MIPI interface on the master controller, and it is 100Mbps that the MIPI interface receives representative value, is up to 230Mbps; The emission representative value is 52Mbps, reaches as high as 156Mbps, has improved the transmission rate between master controller and functional module greatly, can satisfy the rate requirement of current HSPA+, and only needs two switching circuits, the economize on hardware cost.Reduce the interface that the signal transmission takies simultaneously, saved the interface resource on the master controller.
See also Fig. 2, for the structure of second embodiment of the utility model multimode high-speed communication system is formed sketch map.Said multimode high-speed communication system comprises: master controller 1, first switching circuit 2, and second switch circuit 3 and functional module 4～5, wherein,
Has the general-purpose serial bus USB interface on the said master controller 1.
Concrete, said USB interface comprises differential signal interface and power supply control interface VBUS.Said differential signal interface further comprises positive signal interface USB_DP and negative signal interface USB_DM.
Said master controller 1 links to each other with said functional module 4～5 through switching circuit.
Concrete, said switching circuit comprises first switching circuit 2 and second switch circuit 3.Wherein, the differential signal interface of said USB interface links to each other with said functional module 4 through said first switching circuit 2, and the power supply control interface of said USB interface links to each other with said functional module 5 through said second switch circuit 3.
Said first switching circuit 2 comprises two path analoging switch, each road of said two path analoging switch respectively with the differential signal interface of said USB interface in the positive signal interface link to each other with the negative signal interface.
Concrete, said first switching circuit 2 comprises two path analoging switch, and one the tunnel links to each other with the USB_DP interface, supplies master controller 1 to functional module 4～5 transmission positive data signal; One the tunnel links to each other with the USB_DM interface, supplies master controller 1 to send the negative data signals to functional module 4～5.
Said second switch circuit 3 comprises a path analoging switch, and a said path analoging switch links to each other with the power supply control interface of said USB interface.
Concrete, a said path analoging switch links to each other with said VBUS interface, supplies master controller 1 to send power control signal to functional module 4～5.
Each road of said two path analoging switch and a path analoging switch is a single pole multiple throw, and the not moved end of said single pole multiple throw is identical with the quantity of said functional module.
Concrete, in the present embodiment, be to be that example is explained with two functional modules, then the quantity of the not moved end of said single pole multiple throw is two.Said single pole multiple throw is concrete to adopt following mode to link to each other with functional module 4～5 with said master controller 1: the moved end of said single pole multiple throw links to each other respectively with USB_DM with USB_DP, and the not moved end of said single pole multiple throw links to each other with functional module 4～5.
The quantity of functional module increases by one, and the quantity of the not moved end of said single pole multiple throw is also corresponding simultaneously to increase by one, so that between a plurality of functional modules, communicate switching according to the control signal of master controller 1.
Said first switching circuit 2 all links to each other with the bus expansion interface GPIO of said master controller with second switch circuit 3, and the control signal that said master controller sends through said GPIO interface is controlled said first switching circuit 2 and second switch circuit 3.
Concrete, said first switching circuit 2 all links to each other with the CPIO interface of said master controller 1 with said second switch circuit 3.When 4 needs of said master controller 1 and said functional module are communicated by letter; Said master controller 1 promptly sends control signal through said GPIO interface and controls said first switching circuit 2 and with said second switch circuit 3 moved end is switched on the not moved end that links to each other with said functional module 4, so that USB_DP and USB_DM and said functional module 4 are connected.
In like manner; When 5 needs of said master controller 1 and said functional module are communicated by letter; Said master controller 1 promptly sends control signal through said GPIO interface and controls said first switching circuit 2 and with said second switch circuit 3 moved end is switched on the not moved end that links to each other with said functional module 5, does not give unnecessary details at this.
The utility model embodiment adopts multiway analog switch to cooperate the USB interface on the master controller; The high speed USB transmission rate can reach 480 Mbps; Improved the transmission rate between master controller and functional module greatly; Can satisfy the rate requirement of current HSPA+, and only need two switching circuits, the economize on hardware cost.Reduce the interface that the signal transmission takies simultaneously, saved the interface resource on the master controller.
Description through the foregoing description can be known, the utlity model has following advantage:
Adopt multiway analog switch to cooperate MIPI interface or USB interface on the master controller to control the switching of communicating by letter between master controller and a plurality of functional modules; Take in minimizing on the basis of the interface resource on the master controller; Can improve the transmission rate between master controller and functional module greatly; Maximum transmission rate can reach 480Mbps, and only needs a spot of switching circuit, the economize on hardware cost.
Above disclosedly be merely the utility model preferred embodiment, can not limit the interest field of the utility model certainly with this, the equivalent variations of therefore being done according to the utility model claim still belongs to the scope that the utility model is contained.
Claims (11)
1. a multimode high-speed communication system is characterized in that, comprising:
Master controller and functional module, said master controller have mobile industry processor interface MIPI;
Said master controller links to each other with said functional module through the interface that wakes up of said MIPI interface;
Said master controller links to each other with said functional module with switching circuit through the signal transmission interface of said MIPI interface.
2. multimode high-speed communication system as claimed in claim 1; It is characterized in that said switching circuit comprises three path analoging switch, each road of said three path analoging switch respectively with the signal transmission interface of said MIPI interface in data transmission interface, sign interface link to each other with the prepare control interface.
3. multimode high-speed communication system as claimed in claim 2; It is characterized in that said switching circuit comprises first switching circuit and second switch circuit; Wherein, Output interface in the signal transmission interface of said MIPI interface links to each other with said functional module through said first switching circuit, and the input interface in the signal transmission interface of said MIPI interface links to each other with said functional module through said second switch circuit.
4. multimode high-speed communication system as claimed in claim 3, each road that it is characterized in that said three path analoging switch is a single pole multiple throw, the not moved end of said single pole multiple throw is identical with the quantity of said functional module.
5. like each described multimode high-speed communication system of claim 1-4; It is characterized in that said first switching circuit all links to each other with the bus expansion interface GPIO of said master controller with the second switch circuit, the control signal that said master controller sends through said GPIO interface is controlled said first switching circuit and second switch circuit.
6. a multimode high-speed communication system is characterized in that, comprising:
Master controller and functional module, said master controller has the general-purpose serial bus USB interface;
Said master controller links to each other with said functional module through switching circuit.
7. multimode high-speed communication system as claimed in claim 6; It is characterized in that said switching circuit comprises first switching circuit and second switch circuit; Wherein, The differential signal interface of said USB interface links to each other with said functional module through said first switching circuit, and the power supply control interface of said USB interface links to each other with said functional module through said second switch circuit.
8. multimode high-speed communication system as claimed in claim 6; It is characterized in that said first switching circuit comprises two path analoging switch, each road of said two path analoging switch respectively with the differential signal interface of said USB interface in the positive signal interface link to each other with the negative signal interface.
9. multimode high-speed communication system as claimed in claim 7 is characterized in that said second switch circuit comprises a path analoging switch, and a said path analoging switch links to each other with the power supply control interface of said USB interface.
10. multimode high-speed communication system as claimed in claim 8, each road that it is characterized in that said two path analoging switch and a path analoging switch is a single pole multiple throw, the not moved end of said single pole multiple throw is identical with the quantity of said functional module.
11. like each described multimode high-speed communication system of claim 6-10; It is characterized in that said first switching circuit all links to each other with the bus expansion interface GPIO of said master controller with the second switch circuit, the control signal that said master controller sends through said GPIO interface is controlled said first switching circuit and second switch circuit.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2011205543218U CN202488503U (en) | 2011-12-27 | 2011-12-27 | Multi-module high speed communication system |
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| CN2011205543218U CN202488503U (en) | 2011-12-27 | 2011-12-27 | Multi-module high speed communication system |
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| CN202488503U true CN202488503U (en) | 2012-10-10 |
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| CN2011205543218U Expired - Lifetime CN202488503U (en) | 2011-12-27 | 2011-12-27 | Multi-module high speed communication system |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103970703A (en) * | 2013-02-05 | 2014-08-06 | 财团法人工业技术研究院 | USB SSIC removable electronic device and switching device thereof |
| CN104917511A (en) * | 2015-05-13 | 2015-09-16 | 广州钧衡微电子科技有限公司 | Radio frequency power amplifier module interface circuit compatible with MIPI and GPIO control |
-
2011
- 2011-12-27 CN CN2011205543218U patent/CN202488503U/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103970703A (en) * | 2013-02-05 | 2014-08-06 | 财团法人工业技术研究院 | USB SSIC removable electronic device and switching device thereof |
| CN104917511A (en) * | 2015-05-13 | 2015-09-16 | 广州钧衡微电子科技有限公司 | Radio frequency power amplifier module interface circuit compatible with MIPI and GPIO control |
| CN104917511B (en) * | 2015-05-13 | 2018-11-20 | 广东拓思软件科学园有限公司 | A kind of interface circuit of the RF power amplification mould group of the compatible MIPI and GPIO control of energy |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
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Granted publication date: 20121010 |