CN101006208A - Manufacture of cadmium mercury telluride on patterned silicon - Google Patents

Abstract

This invention relates to the manufacture of Cadmium Mercury Telluride (CMT) on patterned silicon, especially to growth of CMT on silicon substrates bearing integrated circuitry. The method of the invention involves growing ' in selected growth windows on the silicon substrate by first growing one or more buffer layers by MBE and then growing the CMT' by MOVPE. The growth windows may be defined by masking the area outside of the growth windows. Growth within the growth windows is crystalline whereas any growth outside the growth windows is polycrystalline and can be removed by etching. The invention offers a method of growing CMT structures directly on integrated circuits removing the need for hybridisation.

Description

On patterned silicon, make cadmium mercury telluride

The present invention relates on patterned silicon, make the method for cadmium mercury telluride, be specifically related to directly on unicircuit, make the method for cadmium mercury telluride layer and the cadmium mercury telluride structure of so growing.

Cadmium mercury telluride Hg _1-xCd _xTe is used for for example a kind of material known of detector, source, LED, negative light-emitting device infrared facilitys such as (negative luminescence).Cadmium mercury telluride is called CMT, and (perhaps being sometimes referred to as cadmium mercury telluride-MCT), be a kind of semiconductor alloy, is the band gap that cadmium content x can change this alloy by changing alloy compositions.Band gap can change, and makes CMT can be used for various infrared facilitys, covers shortwave (SW), medium wave (MW), long wave (LW) and very long wave (VLW) infrared wavelength.CMT is that the material that many infrared focal plane arrays are used is selected.Little leakage current and high carrier mobility make detector have good sensitivity.Because by selecting appropriate component can adjust wavelength, and can design and grow such structure, be that its component is adjusted into and makes two or more wavelength can work in single assembly, so CMT become the single band that covers big wavelength region or the best solution of multiband system.

The General Principle of making infrared facility is very sophisticated.Epitaxy CMT on crystalline substrate.Subsequently by mesa etch, ion implantation or ionic fluid grinding formation device.Form metallic contact subsequently and device is bonded to the silicon sensing circuit.Notice that CMT also can be grown to serve as the body crystal, uses ion implantation or the ionic fluid grinding by the crystal formation device of body, but epitaxy is better than bulk single crystal growth.

Propose various epitaxial growth methods and be used to make CMT.Metal organic vapor (MOVPE) has successfully become the technology that can reproduce with the uniform large-area growth.United States Patent (USP) 4,650,539 have described use MOVPE makes CMT.United States Patent (USP) 4,566,918 is the modification of this technology, growth CdTe and HgTe thin layer, these thin layers form uniform CMT structure by mutual diffusion.United States Patent (USP) 4,950,621 have described a kind of MOVPE technology of the CMT of being used for growth, have utilized metal-organic photocatalysis Decomposition.

Other CMT growth methods comprise molecular beam epitaxy (MBE).By MBE technology at cadmium zinc telluride (Cd _1-yZn _yTe is also referred to as CZT) CMT that grows on the substrate, form infrared facility by this CMT.For example see: M Zandian, JD Garnett, RE Dewames, M Carmody, JG Pasko, M Farris, CA Cabelli, DE Cooper, G Hildebrandt, JChow, JM Arias, K Vural and DNB Hall, J.Electronic Materials (electronic material magazine) 32 (7) 803 (2003), " Mid-wavelength infraredp-on-n Hg _1-xCd _xTe heterostructure detectors:30-120 Kelvinstate of the art performance " (the infrared p-on-n Hg of medium wave _1-xCd _xTe heterojunction structure detector: the 30-120 absolute temperature state of prior art performance), perhaps JDPhillips, DD Edwall and DL Lee J.Electronic Materials (electronic material magazine) 31 (7) 664 (2002) " Control of very long wavelengthinfrared HgCdTe detector cut-off wavelength " (controlling very long-wavelength infrared HgCdTe detector cutoff wavelength).

Infrared imaging is used needs the large-area two-dimensional detector array further, is used for long-range detection and identification.Physical size increase along with these arrays is used for the traditional substrate materials of CMT and the restriction of growing technology and becomes apparent.Cadmium zinc telluride has been used as the CMT growth substrates widely, but can only obtain little size, and this has limited its availability in the large size array production.Cadmium telluride also is used as substrate, also can only obtain little size.In addition, CdTe and CZT fragility are all very big, and crystal mass is not good especially.

Gallium arsenide (GaAs) substrate can obtain big relatively size.Yet as previously mentioned, device is bonded to the silicon sensing circuit usually.In the work, for example usually detector is cooled to the low temperature of about 80K (although optimal working temp difference of different device) to reduce thermonoise.Under the detector operation temperature, the thermal mismatching between silicon sensing circuit and the GaAs substrate can cause infrared facility and circuit layering.Can reduce to read effect by the attenuate substrate, but the reduction process complexity reduces good article rate and increases production cost.There are this thermal mismatch problem usually in cadmium telluride and CZT substrate.

Propose to use silicon as substrate, because silicon substrate and sensing circuit have the hot matching of inherent.

The MBE technology has been applied to the CMT that grows on silicon, wherein before CMT growth on silicon grown buffer layer, TJ de Lyon for example, JE Jensen, MD Gorwitz, CA Cockrum, SM Johnson and GM Venzor, J.Electronic Materials (electronic material magazine) 28,705 (1999).MBE growth CMT has proved a challenging task on silicon.At first, for MBE on any substrate growth CMT, control growing temperature accurately, this requires reproducible wafer field engineering and meticulous underlayer temperature control.The second, verifiedly be difficult to eliminate fault in material.These defectives are not always middle wavelength infrared facility characteristic to be produced serious influence (depending on device), but these defectives influence long wavelength's device nocuously.Therefore, using the MBE CMT that grow on silicon is the technology of difficulty, only produces acceptable centre wavelength infrared facility and array.

MOVPE growth CMT also has problems to produce the device that can work on silicon.See 25 (8) (1996) the 1347th pages of K Shigenaka of J.Electronic Materials (electronic material magazine), K Matsushi ta, L Sugiura, F Nakata and K Hirahara, M Uchikoshi, M Nagashima and H Wada " Orientation dependence ofHgCdTe epitaxial layers grown by MOCVD on silicon substrates " (the orientation dependency of the HgCdTe epitaxial film of on silicon substrate, growing) by MOCVD, the 1353rd page of K Maruyama, H Nishino, T Okamoto, S Murakami, T Saito, Y Nishijima, M Uchikoshi, M Nagahima and H Wada " Growth of (111) HgCdTe on (100) Si by MOVPE using metal organic telluriumabsorption and annealing " (use the organic tellurium of metal to absorb and annealing by MOVPE (111) HgCdTe that on (100) silicon, grows), perhaps the 1358th page of H Ebe, T Okamoto, H Nishino, T Saito and Y Nishijima, M Uchikoshi, M Nagashima and HWada " Direct growth of CdTe on (100); (211); and (111) Si by metal organic chemical vapour deposition " (by metal organic chemical vapor deposition in (100), direct growth CdTe on (211) and (111) silicon).

Reported on silicon substrate recently and can produce CMT, promptly, use MBE on substrate, to produce buffer layer, use MOVPE growth CMT subsequently, see: " Long wavelengthinfrared focal plane arrays fabricated from HgCdTe grown onsilicon substrates " (making the long-wavelength infrared focal plane arrays (FPA)) by the HgCdTe that is grown on the silicon substrate, DJ Hall, L Buckle, NT Gordon, J Giess, JE Hails, JW Cairns, RM Lawrenoe, A Graham, RS Hall, C Maltby and T Ashley are at Defense and Security Symposium 2004 (Formerly AeroSense) 12-16 April 2004 Gaylord Palms Resort and Convention CenterOrlando (Kissimmee), Florida USA, (procceedings of 12-16 day U.S. Florida Gaylord PalmsResort and conference centre Orlando (Ji Ximishi) 2004 in April, 2004 defence and security discussion meeting (Formerly AeroSense)) and " High performance long-wavelength HgCdTe infrared detectors grown on siliconsubstrates " (being grown in the high-performance long wavelength HgCdTe infrared detector on the silicon substrate) that are provided among the Conference proceedings inpress, DJ Hall, L Buckle, NT Gordon, J Giess, J E Hails, J W Cairns, RM Lawrence, A Graham, RS Hall, C Maltby and T Ashley, AppliedPhysics Letters (Applied Physics wall bulletin) Volume 85, Issue 11, pp.2113-2115.

This technology can be implemented in the CMT that grows on the silicon, can be used for device with this CMT of aftertreatment and form and be bonded to sensing circuit.

Yet this is requirement still, mixes (hybridization) before at the projection bonding, and detector array and the wafer of reading unicircuit (ROIC) are sawn into discrete component, prepares to be used for hybrid technique.This is a kind of technology of costliness, and the good article rate of saw chip and bonding is relatively low.

International Patent Application WO 02/084741A2 has disclosed a kind of monolithic integrated circuit infrared sensing device, and wherein the CMT layer is grown directly upon on the silicon sensing circuit.The method of describing in this patent application relates to form growth window on silicon substrate, wherein uses MBE grow in this window cadmium telluride buffer layer and CMT layer subsequently.Yet this method also is to depend on MBE growth CMT on silicon, and there is difficulties associated equally in this.

Therefore according to the present invention, a kind of infrared facility making method is provided, comprise step: get the silicon substrate that has formed unicircuit on it, use molecular beam epitaxy (MBE) at least one crystallization buffer layer of selective growth at least one window, and use metal organic vapor (MOVPE) at least one crystallization CMT layer of selective growth on described buffer layer.

Therefore method of the present invention provides a kind of infrared facility making method, and wherein CMT is grown directly upon on the substrate, has for example unicircuit of sensing circuit on this substrate.This has been avoided the CMT on the substrate layer and circuit layer blended necessity.This method has therefore avoided using low good article rate in mixing step technology is sawing and bonding for example, and has realized the wafer level process of infrared facility.

At first use molecular beam epitaxy (MBE) grown buffer layer, the crystallization CMT layer of on substrate, growing at least one growth window thus.Subsequently by metal organic vapor growth CMT layer.

Therefore the present invention makes up the device that can be used for having in the wide wavelength region superperformance with production with MBE and MOVPE.Although the inventive method needs two kinds of totally different processing steps really, increased the complicacy of this method, these two kinds of technology are mixed can provide a kind of reliable and controlled technology, and this technology has been produced good device.

The term cadmium mercury telluride that uses in this specification sheets is meant Hg _1-xCd _xTe, wherein component x is controlled to be between 1 and 0, comprises 0 and 1.When x was 1, this material was actually cadmium telluride, and when x was 0, this material was actually tellurium mercury, and still for the purpose of this specification sheets, these two kinds of situations are included within the scope of term cadmium mercury telluride or CMT.

Substrate orientation is important for CMT single crystal growing on realizing silicon, and preferably substrate orientation be towards＜110〉or＜(001) of 111〉displacement several years between being 2 ° to 10 °.Therefore the step of getting the silicon substrate that has formed unicircuit on it preferably relates to gets its (001) orientation towards＜110〉or＜111〉substrate of 2 ° to 10 ° of displacements or 4 ° to 8 ° preferably, although＜111 normally most preferred.

Should be noted that growth method of the present invention has caused, reach the orientation of deferring to substrate subsequently by the material of MOVPE growth by MBE.Therefore MBE buffer layer or each layer are deferred to (001) orientation of silicon substrate, and single crystal growing is guaranteed in the displacement of this substrate.The MOVPE layer is also deferred to (001) orientation subsequently, so the CMT layer is (001).Therefore this method relates to uses grow at least one buffer layer and use the grow step of at least one CMT layer of MOVPE of MBE, and each buffer layer and CMT layer have the crystalline orientation of deferring to substrate orientation.

Should read also to note that the technology that discloses among the WO 02/084741 has instructed the displacement of silicon substrate only to be 1 °, this technology is all to adopt the technology of MBE, rather than not only adopts MBE but also adopt MOVPE as the present invention.The inventor has been found that this displacement angle is not enough for the present invention.The more important thing is that the method for describing among the WO 02/084741 does not clearly instruct the silicon should along which direction displacement, and the inventor has been found that this sense of displacement is an important parameter.Therefore look that this method instructed (111) growths (the 14th page) of CdTe, so the CMT layer may also have (111) orientation, rather than as the present invention, buffer layer and CMT layer are all deferred to the orientation of substrate.

Therefore this method relates to makes unicircuit on silicon substrate, this silicon substrate from (001) towards＜111〉displacement 2 ° to 10 °.Should read to notice that the substrate orientation commonly used that is used to form unicircuit is (001) that does not have displacement.Before the present invention, it is not clear whether can to form unicircuit on the silicon of this displacement angle.Yet the present invention has been found that the silicon that makes displacement in this way and can obtain high relatively good article rate.The standard technique known to the skilled of producing the physical circuit field is used in the making of unicircuit.It will be understood to those of skill in the art that the term unicircuit contains the single electrical circuit that is formed on the substrate and a plurality of circuit on the monolithic integrated circuit wafer, no matter whether these circuit connect.For example, be used for the sensing circuit of many pixel detectors, wherein each pixel has the associated circuit of the circuit that is not connected to other pixels, and for the purpose of this specification sheets, this sensing circuit should be considered to unicircuit.

This unicircuit is that each element of infrared facility of being produced has defined the zone that produces window, and for example each pixel in detector or the source can have growth window and related electronic devices.Therefore this substrate can comprise a plurality of growth window.Growth window may simply be no silicon area, perhaps can define this growth window by the area that is in different levels.Integrated circuit architecture it will be understood by those skilled in the art that after forming unicircuit, owing to will the variation of surface topography occur.Therefore this growth window can comprise the hole (pit) with respect to this circuit framework,, is lower than the zone of peripheral circuits framework that is.Can define the degree of depth of reading to cheat simply by the height of circuit framework on the side of hole.Yet the silicon in the etching growth window can change the hole degree of depth for circuit framework.The hole degree of depth can be arranged to be essentially the CMT layer height with layer that integral planar is arranged in buffer layer or the resulting device.

The one or more MBE buffer layers and can to cause crystalline growth in the growth window and growth window outside by MOVPE growth CMT be polycrystalline growth on the circuit of growing hereinafter will be described.Can remove this polycrystalline material by etching subsequently.In process of growth, polycrystalline material can be occupied growth window, makes the crystal region of CMT become less than growth window.Compare with circuit framework when growth window and to form when hole, this occupying can be taken place, because this Circuits System is higher than growth district, and this occupying can cause the shade (MBE is according to sight line work) on the growth window during the MBE.In addition, during MOVPE, this Circuits System will further be exposed (poke up) to air-flow inside, and the growth on this meeting intensifier circuit and the growth velocity of polycrystalline material can be higher than the growth velocity of crystalline material.In order to isolate the finished product device, need remove this polycrystalline material from the top of protected circuit, also need to remove the polycrystalline material that is formed between unicircuit sidepiece and the crystallization island.Therefore, when polycrystalline material was eliminated, the area of crystallization CMT was less than window.Therefore, diode/detection area is a packing factor less than all can utilize the zone all to be detected numerical value under the situation that modulator material covers on the circuit.Can be used for the All Ranges of growing on the ifs circuit, promptly all growth window comprise good material for detector, and then diode can form smaller szie, causes the littler array of pitch.Littler pitch is useful for some application, and is useful for array performance, because more diode can be contained on the array.

Therefore in another embodiment, growth window can be arranged to be in par with circuit framework.This is useful for growth technique, because this has represented the growth on planar substrate basically with regard to molecular beam and air-flow, and has reduced the Circuits System risk that the aforementioned MBE of causing restraints shade.Guarantee that growth window and circuit framework are in par so have reduced polycrystalline material and occupied chance in the growth window.Therefore, the polycrystalline material of need removing still less, and the shape/size on crystallization island is more closely mated growth window.Therefore can improve the packing factor of device.

In another embodiment, can form growth window by the substrate pillar (stub) that extends to the circuit framework top.In this layout, growth district will can not be in projecting Circuits System in the MBE shade, and will be exposed to MOVPE air-flow inside.Material orientation/the crystallinity that is grown on the pillar sidepiece can change according to employed growth conditions.The material that is grown on the pillar sidepiece may need to remove by etching, because even this material is a crystalline state, with be grown in post top portion on have a correct orientation desired structure compare, read material and have different orientations, thickness, composition and doping, and therefore form different device performances.Yet the All Ranges on the post top portion will be high-quality crystalline material, has guaranteed that the growth window of all definition is effectively utilized.Therefore, from plant bulk and packing factor, growing on silicon pillar to have plurality of advantages.

Therefore the area that is defined as growth window can be processed into the level different with the substrate rest part that be in.The area that is predefined for growth window can also be processed into and have the orientation different with the substrate rest part.This makes the substrate of having made unicircuit on it to be had standard (001) orientation, but can be processed corresponding to the area of growth window, for example is etched into to have the required displacement of CMT single crystal growing.

Preferably, use mask material to cover the substrate of growth window outside.In other words, in the situation that the does not have mask material growth window of giving a definition.Therefore this method relates to, and before grown buffer layer, mask material is coated to the step of the substrate of growth window outside.During preparation and grown buffer layer and CMT layer, mask material helps to protect this unicircuit and substrate rest part.In addition, mask material can help to define growth window, and the growth of the selective crystallization of auxiliary buffer layer and CMT layer.Easily, mask material can be coated to the entire substrate that has formed unicircuit on it, and subsequently from the specific region selective clearing to expose growth window.The technician knows the mask applied material and removes the method for its selected part, for example photoetching subsequently.

Reading mask material can be any material of chemistry and mechanically robust, thereby protects substrate and unicircuit during preparation and growth CMT, in case but CMT technology finishes to be eliminated the Circuits System with under exposing.A kind of mask material easily is a titanium tungsten, Ti-W, although also can use other materials, and silicon-dioxide (SiO for example ₂), silicon nitride (Si ₃N ₄), aluminium (Al), chromium (Cr), platinum (Pt), palladium (Pd) or any refractory metal.

Preferably before the MBE grown buffer layer, clean the silicon that is exposed in the growth window and grow to be used for material.Any pollution of not expecting is removed in this cleaning.This preparation can relate to one or more in grinding of solvent cleaning, cylinder ashing and/or ionic fluid.Also use basic this substrate of etching agent etching of hydrogen fluoride (HF).

Should be noted that in the standard growth method usually and before the material growth, promptly, for example before the MBE grown buffer layer, on naked substrate, silicon substrate to be carried out warm wash.Yet the warm wash temperature can be damaged unicircuit up to 800 ℃.Therefore, can't carry out traditional hot to the substrate of bearing integrated cleans.Test shows, unicircuit can bear up to about 500 ℃ treatment temp, but the metal trace of circuit melts and the damage circuit under far above this temperature.

Before the MBE buffer growth, substrate is exposed to arsenic stream being higher than under the temperature of room temperature, unicircuit can not sustain damage but this temperature is enough low.This arsenic stream is the hydrogen termination surface of follow-up MBE growth prepared silicon substrate.Arsenic is the preferred material of purge flow, but can also use other or other equivalent material or its combination, for example cadmium, tellurium, cadmium telluride, zinc telluridse, antimony or phosphorus.

Therefore utilization of the present invention is in about 450 ℃ low temperature cleaning, and but this technology can realize good cleaning can not damage unicircuit.The subsequent growth step betides than traditional hot and cleans under the low temperature, therefore the problem that can not cause unicircuit to exist.

Can use MBE one or more buffer layers of growing.The orientation of substrate-and prevent that CMT is subjected to the chemical pollution of composition in the substrate is deferred in the growth of correct orientation-the attentions MBE buffer layer of this buffer layer sets MOVPE growth.Buffer layer also is used for the mercury and the Circuits System in the substrate of CMT layer growth are isolated subsequently.Suitable buffer layer comprises cadmium telluride and zinc telluridse.Can be single buffer layer, the zinc telluridse of individual layer for example; Perhaps multiwalled combination, for example the zinc telluridse layer can be grown on the substrate of the cadmium-telluride layer of having grown on its top.Cadmium zinc telluride also can be used as buffer layer.Other buffer layers can comprise gallium arsenide and germanium.

For the zinc telluridse of growing, the combination that can use zinc telluridse or element zinc and tellurium or this element and compound-material is as the MBE source material.Similarly, can use the combination of element cadmium and tellurium or cadmium telluride or this element and compound-material, the growth cadmium telluride.Use standard MBE process of growth grown buffer layer well known by persons skilled in the art.

Entire substrate is exposed to MBE growth, but owing to the appropriate preparation of growth window, for example use suitable mask material, only at growth window generation crystalline growth, just as crystalline substrate only in growth window exposure become and be used for epitaxially grown substrate.The material that is deposited on the growth window external substrate is deposited as polycrystalline material.According to processing condition, can guarantee that growth occurs over just growth window, that is, do not grow in the growth window outside, and growth window inside is crystalline growth.Known in the industry that Here it is " selective area growth (selected areagrowth) ", and will obtain better packing factor is because the CMT area of growth will (more approaching) equals the area of growth window.Yet verified at present, allow the growth of growth window outside and in etch stages subsequently, remove unwanted material, this is more convenient.

After the MBE grown buffer layer, can use the MOVPE CMT that on buffer layer, grows.Yet, preferably before the MOVPE growth, clean buffer-layer surface.According to employed equipment, may need the substrate of the buffer layer of having grown is transferred to the MOVEP reaction chamber and/or may be had delay between the processing step from the MBE growth apparatus.The substrate of buffer layer is not to remain in the controlled environment if grown, and impurity may be collected on the surface of top buffer layer.Cleaning can be removed to these impurity of small part, but similar with substrate preparation, and any cleaning step should not damage this unicircuit.Can use that the known substrate to the buffer layer of having grown of technician carries out etching in the MOVPE field, perhaps carry out and clean, will consider the said temperature restriction simultaneously by any appropriate cleaning.If the MBE/MOVPE system of combination comprises the loading sealed (load lock) between the two, then do not need to clean.

Before at least one CMT layer of growth, this method can further comprise uses the grow step of at least one other buffer layer of MOVPE.This MOVPE buffer layer can be identical or different with the cushioning layer material of MBE growth.As previously mentioned, MBE provides a kind of good controlled method of the suitable buffer layer of growing on silicon, and this buffer layer has the correct orientation that is used for the MOVPE growth.Yet in order further to improve the condition of MOVPE growth CMT, it is useful laying buffer layer by MOVPE.For example, when the MBE buffer layer comprised cadmium telluride top layer in the zinc telluridse basic unit that is grown on the substrate, this method can comprise the grow step of other cadmium-telluride layer by MOVPE on MBE CdTe layer top.

Can increase buffer layer thickness by the MOVPE other buffer layer of growing, this is useful in some embodiments, and MOVPE is a kind of growth method faster than MBE.The MOVPE buffer layer can improve crystal mass.In addition, the MOVPE buffer layer also is of value to isolates CMT with the surface that is exposed to air, that is, lay that the MOVPE buffer layer can cover the MBE buffer layer because any slight surface impurity that oxidation etc. cause and any residual (if having carried out cleaning) of cleaning.

By standard MOVPE technology growth CMT layer, wherein enter the concentration of the presoma of reaction chamber by vapour pressure that flows through bubbler and air-flow (being hydrogen easily) control, wherein this bubbler holds presoma, and this presoma may dilute in addition with additional cleaning gas (H2) stream.Like this, the Hg that can grow _1-xCd _xTe, it has the controlled equipment energy characteristic of x value to obtain expecting.Easily, MOVPE technology utilization such as US4,566, CMT growth mutual diffusion multilayer technology described in 918, promptly, the CMT growth step comprises grow successively CdTe and HgTe thin layer, and these thin layers form the CMT of individual layer, the relative thickness decision cadmium content x of this CdTe and HgTe layer in the phase mutual diffusion of when growth.

Employed metallorganics presoma is any suitable volatile tellurium and cadmic compound, for example alkylate of the alkylate of cadmium and tellurium.In one embodiment, the tellurium presoma is the di-isopropyl tellurium, and the cadmium presoma is a dimethyl cadmium.

Because MOVPE buffer layer and CMT grow on the MBE buffer layer, so its crystalline orientation is identical with this MBE buffer layer.Equally, only in growth window, carry out the crystalline state growth, carry out polycrystalline growth in other zones.

Can use the suitable dopants of n type or p type this CMT layer that mixes.The doping agent that is fit to comprises iodine, arsenic, indium and antimony, although can use other doping agents.The presoma that is fit to comprises the amino arsenic of isobutyl iodide and three (dimethyl).

Usually, this method comprises the more than one deck CMT of growth according to the needs of destination apparatus.Different layers can have different thickness, component (Hg _1-xCd _xX among the Te) and/or different doping agents and concentration of dopant.

After MOVPE growth CMT layer, preferably this material of annealing-this technology is filled the electric property that the mercury room also guarantees expectation in rich mercury vapour atmosphere.Can in the MOVPE reaction chamber, carry out this annealing, and can behind growth CMT layer, directly carry out this annealing, perhaps can use any suitable device to carry out this annealing after a while.

MBE grown buffer layer and MOVPE growth CMT use basically below with reference to described in method: " Long wavelength infrared focal plane arrays fabricatedfrom HgCdTe grown on silicon substrates " (making long-wavelength infrared focal plane arrays (FPA)) by the HgCdTe that is grown on the silicon substrate, DJ Hall, L Buckle, NTGordon, J Giess, JE Hails, JW Cairns, RM Lawrence, A Graham, RS Hall, C Maltby and T Ashley are at Defense and Security Symposium2004 (Formerly AeroSense) 12-16 April 2004 Gaylord PalmsResort and Convention Center Orlando (Kissimmee), Florida USA, (procceedings of 12-16 day U.S. Florida Gaylord Palms Resort and conference centre Orlando (Ji Ximishi) 2004 in April, 2004 defence and security discussion meeting (Formerly AeroSense)) and " High performance long-wavelength HgCdTe infrareddetector sgrown on silicon substrates " (being grown in the high-performance long wavelength HgCdTe infrared detector on the silicon substrate) that are provided among the Conference proceedings in press, DJ Halll, L Buckle, NT Gordon, J Giess, JE Hails, JW Cairns, RM Lawrence, A Graham, RS Hall, C Maltby and T Ashley, Applied Physics Letters (Applied Physics wall bulletin) Volume 85, Issue 11, pp.2113-2115, and UK Patent Application GB0407804.4 are dissolved in this and are incorporated herein by reference in it.

Outside during for crystalline state in growth window when the material of being grown for polycrystalline in growth window, need to remove unwanted material.Therefore this method comprises the step of removing any unwanted CMT and/or cushioning layer material.Can be by the removing of etching realization to polycrystalline material.Preferably, this etch step relates to dry etch step, carries out the wet chemical etching subsequently.Can use lithographic definition zone to be etched.Can remove unwanted material in different steps.For example, can before removing polycrystalline buffer layer and CMT material, finish MBE and MOVPE growth phase.Alternatively, can finish the MBE grown buffer layer, and can promptly before the MOVPE growth phase, remove any unwanted polycrystalline cushioning layer material in this stage.Can carry out the MOVPE growth subsequently, only on the crystalline state buffer layer, carry out crystalline growth.This MOVPE growth phase can be realized selective area growth, make and do not carry out any growth in the growth district outside, perhaps can cause the crystalline growth on the crystalline material and all the other regional polycrystalline growths in the growth window once more, need after the MOVPE growth, carry out etch step in this case.

This method also can relate to the physical form of device treatment step with definition CMT layer.This step also can relate to the landing position (landing site) that is provided for being electrically connected.Easily, when removing any unwanted CMT/ cushioning material, carry out this device treatment step.

The device treatment step can comprise the plane treatment technology, and can comprise that ion implantation, ionic fluid grinds and form for example taper or lens.Ion implantation being implemented in after the CMT that grows, inject p/n type doping agent with form diode or other structures-so the CMT material can grow into and have some and do not mix or the adulterated layer of part and mixing by ion implantation later on.

This method also can relate to the step of using at least one passivation layer coating CMT.It will be understood to those of skill in the art that the sidewall that preferably uses one or more passivation layers coating CMT structures, with the electrical stability of assurance device and prevent the loss of mercury in the material.This passivation layer can be a cadmium-telluride layer easily.Easily, this passivation layer is the epitaxial film by the MOVPE growth.

This method also can relate to the step of removing any mask material from the substrate of growth window outside.The etching technics of for example wet chemical etching of understanding by those skilled in the art can be realized this point.

This method also can comprise the step that forms the electrical connection between CMT and the unicircuit.As known in the art,, reading deposits conductive material on the expendable material, and removing subsequently and read expendable material, this electrical connection can formed gas bridge (airbridge) thus by sacrificial material.Alternatively, when passivation layer is coated to the CMT material, can form electrical connection by the through hole in this passivating material.Obviously, the relation between CMT material and the unicircuit will determine to make this mode that electrically contacts.When buffer layer/CMT grew in the hole of relative circuit framework, partial devices can directly contact unicircuit.When resulting device when being plane, then need not the gas bridge and can form electrical connection with respect to reading circuit.It will be understood to those of skill in the art that required connection type and degree of passivation etc. will change according to the device design.

Should be noted that as described in the UK Patent Application GB0407804.4 CMT growth method allows on the CMT layer of handling through device further epitaxy CMT.Therefore, method of the present invention can relate to growth part CMT structure, then carries out device and handles, subsequently by MOVPE at least one additional CMT layer of growing.This at least one additional CMT layer with extension on crystallization CMT zone.Device is handled the forming step that can comprise any kind, and for example etching perhaps can relate to making and electrically contact.Particularly, the method for reading one or more CMT layers that can allow to grow form and the electrically contacting of this structure of part, and at least one additional CMT layer of further growth subsequently.

Therefore the present invention provides the method that forms the monolithic integrated circuit infrared facility with the Circuits System that is positioned on the same substrate and infrared active material.The read apparatus that the present invention realizes comprises shortwave detector He Yuan, middle wave detector and source, long wave detector and source and very long wave detector and source.For all scenario, the fully-integrated CMT material of the Circuits System of use and each pixel can be produced full 2D array.Use the CMT of the present invention's growth can the production two waveband, multiband, ultraphotic spectrum and snowslide device.Negative light-emitting device can be made into LED and single-photon source, and these devices can be used for the various technology from the focal plane array series infrared detector to gas sensor.Also can use method of the present invention to make transistor.

The CMT that grows at least one growth window can also be processed into and make unicircuit thereon.Be made in unicircuit in the CMT can have be made in silicon substrate on the different performance of unicircuit, for example its speed is faster and power consumption is lower.Therefore, local high speed circuit can be made in the interior CMT island of main silicon integrated circuit.

Therefore, according to a further aspect of the invention, a kind of monolithic integrated circuit infrared facility is provided, comprise the silicon substrate of having made unicircuit on it, and be formed at the cadmium mercury telluride of one deck at least at least one buffer layer on the described substrate, being oriented to of this substrate (001) wherein is towards＜110〉or＜111, preferably＜111 2 ° to 10 ° of displacements.

Can make according to device of the present invention by the method for first aspect present invention, this device has all attendant advantages of first aspect present invention.Read apparatus preferably includes has a plurality of CMT structures of associated circuitry separately respectively.Easily, read apparatus is the infrared eye with a plurality of detector pixel.This device can be linear array or 2D detector array.

Although method of the present invention relates to the CMT that grows on the silicon substrate of bearing integrated, have been found that the CMT that grows has good surface topography in growth window.For the CMT by the traditional method growth, maximum array size and operability are subjected to being called the big drawbacks limit of hillock (hillock).For the high-quality material of conventional growth on naked silicon, typical defect density is about 10-20cm ^-2Be grown in the interior fault in material density of window much smaller than this scope.Therefore provide the more method of big area, high quality detector array or other infrared facilitys of a kind of growth at growth window growth CMT.

Therefore, according to a further aspect of the invention, a kind of method of the CMT of making structure monolithic integrated circuit array is provided, has comprised step: got monolithic integrated circuit substrate material, at least one layer crystal attitude of selective growth cadmium mercury telluride in described growth window with a plurality of definition growth window.

Therefore the present invention can be applied to grow than other CMT apparatus arrays that growing technology area is bigger and/or quality is higher.This growth substrates can be any suitable crystalline material, but physically firm and big area acquisition.This substrate can be the substrate of bearing integrated or some other surface characteristic, perhaps can be the naked substrate with definition growth window.Suitable substrate material comprises cadmium telluride, zinc telluridse, cadmium zinc telluride, Cadmium arsenide's zinc and tellurium Cadmium arsenide zinc (although these materials usually can't big area obtained), gallium arsenide, silicon, germanium, indium antimonide, indium antimonide aluminium, indium antimonide gallium, indium phosphide, sapphire, aluminum oxide or spinel (MgAl ₂O ₄).

Therefore this aspect of the present invention can be used to produce high-quality mixing device.In this case, silicon is preferred substrate, because silicon and sensing circuit intrinsic heat coupling.The other advantage that is used for the blended selective area growth is that the strain in the material reduces, so the crooked reduction of substrate/CMT.When only when growth window is grown, this most pronounced effects.

Preferably, growth window is by the substrate definition of having carried the mask material that is coated on the growth window outside.Therefore this method is included in before the growth CMT, mask material is coated to the step of the substrate of growth window outside.Easily, use mask material to cover entire substrate, the mask material of removing selection area subsequently is to expose growth window.Can adopt standard photolithography techniques to use mask material definition growth window.

The technician knows the various materials that can be used as mask material.When substrate is that this mask material only need prevent the CMT crystalline growth of growth window outside when not forming the naked substrate of unicircuit on it.Suitable mask material comprises Ti-W, silicon-dioxide (SiO ₂), silicon nitride (Si ₃N ₄), Al, Cr, Pt, Pd and other refractory metals.

Preferably, the step of at least one CMT layer of growing relates to following step: by MBE at each growth window at least one crystalline state buffer layer of growing, subsequently by MOVPE at least one crystalline state CMT layer of on this buffer layer, growing.As previously mentioned, this method of growth CMT produces the high quality CMT device with controllability.Above-mentioned all embodiments and the advantage relevant with the CMT layer (and any additional buffer layer) of growing by MOVPE by the MBE grown buffer layer are equally applicable to this one side of the present invention.

In conjunction with as described in the first aspect present invention, the orientation of substrate is important for guaranteeing correct material growth as preceding.This orientation should allow the correct grown buffer layer by MBE, and guarantees that buffer layer has and be used for the required correct orientation of MOVPE growth CMT.Therefore substrate preferably is arranged to towards＜111〉or＜110〉direction displacements depart from (100).Preferably, this displacement angle is 2 ° to 10 °.Make the substrate orientation displacement according to this mode, prevent from the MBE buffer layer, to form defective.When substrate was silicon, substrate orientation was preferably (001), and towards [111] direction displacement, displacement angle is preferably 2 ° to 10 ° closed interval, more preferably is 4 ° to 8 ° closed interval.Silicon substrate normally is difficult to the substrate of growing thereon, and correct orientation becomes important.

Preferably, the method for reading related to before the material growth, the step of cleaning the substrate in the growth window.Can carry out this step by the combination of above-mentioned solvent cleaning, etching, cylinder ashing and ion beam etching and HF base etching, but, can also use the warm wash technology of standard when substrate not during bearing integrated.

After growth CMT material, this method can relate to the step of removing unwanted CMT material by etching.In the place of using mask material, can realize the polycrystalline growth in the only growth of the crystalline state in growth window and other zones; Therefore will not need to remove polycrystalline material.This step can comprise the device treatment step of the shape that is used to form required device.

This method also can relate to after device forms, and removes the step of any mask material.As previously mentioned, can carry out this step by standard etch/photoetching technique.

Aforesaid method can be used for producing a series of CMT island on the buffer layer on the substrate.So this method can relate to the other material growth on entire substrate, promptly on this CMT island and naked substrate.This can form the CMT island array that is buried in the another kind of material.For example, CMT can be buried in the CdTe below, and the island that is adjusted into the CMT material of long wavelength's work can be buried in the CMT material that is adjusted into medium wavelength or short wavelength's work, and perhaps CdTe (or HgTe) can be buried in the CMT.

Description of drawings

Referring now to following diagram the present invention is only described exemplarily, in the accompanying drawing:

Fig. 1 shows the synoptic diagram that is designed to prove test ROIC of the present invention;

Fig. 2 shows the SEM image of growth window on the substrate;

Fig. 3 shows CMT growth Norma Si Ji Shi (Nomarski) Photomicrograph of substrate afterwards;

Fig. 4 shows the CMT growth SEM image of substrate afterwards;

Fig. 5 shows the synoptic diagram of the MBE equipment that is used for grown buffer layer; And

Fig. 6 shows the synoptic diagram of the MOVPE equipment that is applicable to growth CMT layer.

Detailed Description Of The Invention

Cadmium mercury telluride is applied to various infrared facilitys, particularly infrared eye.Along with focal plane arrays (FPA) becomes increasing, traditional manufacture method just reaches the limit of.The substrate that will have a detector array is a kind of costliness and the low technology of good article rate with reading that unicircuit (ROIC) mixes.The present invention relates to directly on ROIC, grow material for detector, eliminated blended thus and need and realize using wafer level process to make focal plane arrays (FPA) with very large area and high pixel count.

Producing the fs that directly is made in the detector array on the ROIC is to produce this ROIC.Have been found that the orientation of substrate is important for growing single-crystal CMT on naked silicon.For silicon, be oriented to (001) towards＜111〉displacement several years.Therefore ROIC is made on this displacement silicon substrate.On the silicon of displacement, made test circuit, and checked this test circuit, obtained acceptable good article rate, shown and on axle silicon, to make ROIC.The industry standard method that is used to make ROIC is to carry out on the orientation (100) at non-displacement.

Should be noted that silicon substrate can comprise epitaxial silicon (epi silicon).It will be understood by those skilled in the art that the formation of unicircuit can start from epitaxially grown silicon on the wafer of body silicon before forming circuit.For the purpose of this specification sheets, silicon substrate comprises epitaxial silicon.

Fig. 1 shows the ROIC layout that is used to prove principle of the present invention.This ROIC contains various test circuits, and two dimension is drawn circuit (lead-out circuit) and 64 * 64 pixel ROIC.Circuit has towards the window of silicon opening, is used to the material for detector of growing.The central zone comprises global function 64 * 64 pel arrays that pitch is 150 μ m.This pixel is a standard design, comprises direct injector grid, stare gate, integrated capacitor, reset circuit and removes the 100 μ m square region that are used for grown buffer layer and CMT to silicon substrate downwards.Fig. 2 shows the SEM image of detector growth window on the substrate.

Should be noted that said apparatus is entirely the 2D array.Each 64 * 64 pixel has growth window and associated circuitry separately.This is different from the method described in the WO02/084741, has wherein defined single growth window.In WO02/084741, CMT is grown in the growth window, forms linear array or two linear arraies side by side subsequently.The present invention allows to grow in a plurality of isolating growth window.

Before grown buffer layer on the ROIC and material for detector, use Ti-W protection mask to apply this ROIC.The preferred Ti-W that uses because it has than other protective layers of being studied higher mechanically stable of aluminium, chromium and silicon-dioxide for example, but also can use these materials if desired.Ti-W mask protection ROIC makes it avoid chemical pollution/chemical damage/structural impairment during the material for detector growth that defines the infrared facility physical structure, annealing, passivation, device processing and dry etch process.

After depositing Ti-W protection mask is with holding circuit, use photoetching to remove Ti-W with the exposed window port area.Silicon substrate under this has exposed, thus be ready for material for detector growth and preparation technology.

After pre-treatment, the material layer of infrared eye, promptly CMT material for detector and any buffer layer are grown directly upon on the ROIC.Importantly, the monocrystalline material for detector is grown on the interior ROIC of growth window.Carefully prepare these windows, thereby remove any unwanted pollution that may cause in window, forming polycrystalline material.The window preparation comprises that solvent cleaning, cylinder ashing, ionic fluid grind and HF base etching, for example HF/ alcohol mixture.All these is near a cryogenic relatively cleaning step (room temperature), but cleaning substrate is enough to make this material not to be subjected to the influence of background impurities.The industry standard technology of growth material relates to cleaning silicon under 820 ℃ on silicon substrate.Yet, ROIC is exposed to the temperature that is higher than 500 ℃ can causes the fusing of aluminium interconnect traces, so ROIC is subjected to permanent damage.Overcome this point by the substrate cleaning of researching and developing a kind of more low temperature newly.

Cleaning/preparation technology's a part relates to substrate is exposed to arsenic stream at a certain temperature.When substrate is loaded into the MBE reaction chamber, can carry out this point easily.The hydrogen termination surface of arsenic stream preparation silicon, this is important for allowing follow-up MBE growth.

Yet, can use other cleaning/preparation methods, the hydrogen that is included under for example P, As, Sb, S, Se, Te, Cd, the Zn cleans and/or heating.

In case be ready for the window of growth, then by molecular beam epitaxy (MBE) grown buffer layer, subsequently by metal organic vapor (MOVPE) growth infrared detector material.This buffer layer comprises the zinc telluridse layer of the about 1 μ m of thickness and cadmium-telluride layer subsequently, although zinc telluridse, cadmium telluride or the cadmium zinc telluride of the individual layer of can growing are as an alternative.The width of buffer layer can change, from the total thickness of for example ZnTe (and CdTe, if used CdTe) individual layer up to about 10 μ m.

Infrared eye is a multi-layer C MT diode structure.In theory this diode structure is simulated, and its performance is optimized, although can make other IR devices obviously at the middle wave band of about 5 μ m.The more details of relevant MBE and MOVPE growth phase have been provided hereinafter.

Cushioning layer material and follow-up CMT layer-selective ground are grown to serve as crystalline state in growth window, but become polycrystalline material in the growth window outside.When the material that test is grown, performance index " crystallization yields (crystalline yield) " are defined as the window that is grown to serve as crystalline state and the ratio of array interior pixel sum.Method of the present invention has fully successfully been produced high-quality, the monocrystal material with 100% crystallization yields.The background surface pattern that is grown in the material for detector in the window on the ROIC is suitable with the material for detector that is grown on the conventional substrate.Following respectively Fig. 3 and 4 of being shown in of Norma Si Ji Shi and scanning electron microscope image.Material in the growth window is a crystalline state, but other regional materials are polycrystalline.

With regard to bigger defective, the quality of growth morphology is good in the window.For conventional growth, maximum array size and operability are subjected to being called the restriction of the big taper defective of hillock.For the high quality layer on the naked silicon, typical hillock density is about 10-20cm ^-2The fault in material density that is grown in the window seems much smaller than this scope.Therefore the present invention also relates to the CMT growth in the window, uses this useful technology to produce and is used for the big area of Conventional detectors array, the material of no hillock.

After the material for detector growth technique, use etch recipe (recipe) to remove polycrystalline material.So the crystalline state material for detector is ready for the subsequent technique stage.Determined that optimum etch recipe relates to carries out dry etching earlier and carry out wet chemical etch subsequently.

In dry etch process, determined multiple plasma chemistries, most of based on methane, can be used for dry etching CMT.Free radical in the methane plasma and the cadmium in the CMT, mercury and tellurium reaction form Me ₂M, wherein M is Cd, Te and Hg, Me is CH ₃Pass through Me ₂Cd interacts on Hg and CMT can also form Me ₂Hg passes through Me ₂Cd interacts on Te and CMT can also form Me ₂Te.Some mercury also can volatilize from the surface.Methane plasma is deposited polymer in cavity also, adds additional gas usually with the control this point.The plasma body that uses in this technology comprises methane and the hydrogen gas in the inductively coupled plasma system.

Use photoetching technique definition zone to be etched subsequently; Be polycrystalline material in this case.By dry etching removing polycrystalline material as shown in Figure 3 and Figure 4.

Remove Ti-W protection mask by wet etching, with the Circuits System under exposing.

Last processing step is to use metallization that detector is connected to the ROIC contact pad.One of can be in two ways realize contact.Can deposit passivation layer to prevent the short circuit of detector and metallic contact.Need in this passivation layer, open hole, thereby form and the contacting of detector zone of action.Alternatively, can form the gas bridge joint and touch, avoid demand and risk of short-circuits thus passivation.

Be used to before the gas bridge joint is conspicuous and the contacting of plane type device.The gas bridge need use the interim resist underwork that deposits chromium/golden metal trace thereon.Remove resist, then should metal interconnected trace unsettled.The advantage of this technology is not for needing electric insulation layer.

Use the CMT infrared detector structure of passivation can obtain more high performance impedance local product, passivation is preferred for the long-wave band device.Yet, work in middle wave band, do not have the CMT infrared diode of deposition (for example CdTe) passivation layer to have the sufficiently high performance that will be subjected to the background restriction.

For other devices, can electrically contact in the different steps formation of device growth.Growth method of the present invention can realize growing and carry out the device treatment step that etching for example or formation electrically contact after some material layers.For example, before the formation of CMT layer electrically contacts, can one or more layers CMT be grown on the buffer layer, and remove any polycrystalline material (removing if desired) by etching subsequently by MOVPE.Further MOVPE growth CMT will cause the epitaxy of one or more additional C MT layers subsequently.Can anneal subsequently, the whole device of passivation, and form other electrical connection.

Described the making of focus planardetector array, still it will be understood to those of skill in the art that and use method of the present invention can make other infrared facilitys.

As previously mentioned, by the MBE grown buffer layer, by MOVPE growth CMT layer.

MBE is a kind of technology of carrying out in ultrahigh vacuum(HHV).With reference to figure 5, the auxiliary vacuum of keeping of liquid nitrogen 202 shades.Source material is contained in the crucible of effusion cell (effusion cell) 204 inside in the machine.Effusion cell 204 is set to and makes the opening end of crucible point to heated substrate 206.During shutter 208 on removing the crucible end, material is delivered to heated substrate from crucible.The material quantity that is delivered to substrate depends on the temperature of crucible, and temperature is high more, and the material vapour pressure is high more, and therefore many more materials are transmitted.Heater coil 210 controls are to the heating of crucible.Because system is in vacuum, if heating fully, even the material of low-vapor pressure also could evaporate and can be delivered to substrate.Same because system is in vacuum, strands of material is delivered to sample from effusion cell, is not subjected to the interference of atmosphere gas.Effusion cell remains on idle temperature usually, but keeps the warm evaporating materials that is not enough to.Before growth beginning, make the unit growth temperature that warms, make that enough materials can be from the crucible evaporation with the needed layer of growing.

Masked and the silicon substrate 206 that is etched is by loading in the sealed MBE of the being loaded into assembly.Substrate is clipped on the bearing 212, and this bearing is heated and rotation ideally.Rotation helps the homogeneity of institute's grown layer.The growing period substrate temperature be lower than the temperature of sedimentary material revaporization, but enough heat is moved from the teeth outwards with the permission atom and is formed crystalline material.

Have been found that it is useful using the previous used MBE assembly required buffer layer of growing.Previous growth operation can make the MBE component states good, thereby realizes high quality crystalline growth subsequently.Therefore, use the MBE assembly of cleaning, it is useful at first carrying out several state adjustment growths.

Clean substrate at arsenic stream and specified temp (that is, being higher than room temperature) subsequently, yet this temperature is enough low to avoid any damage to ROIC.

Depend on the source of growth, remove the shutter in zinc telluridse, zinc and the place ahead, tellurium unit as required subsequently, begin the zinc telluridse growth thus use.The zinc telluridse of desired thickness restores shutter in case grown.Similarly, remove the shutter in cadmium telluride, cadmium and the place ahead, tellurium unit as required, the growth cadmium telluride.Equally, when the CdTe growth ending, shutter is restored.In case growth is finished, these unit are cooled to idle temperature, and the cooling substrate takes out it from machine.

By MBE thin ZnTe buffer layer of growth on the window in ROIC, thereby substrate orientation is set to (001), and improves the adhering to of CdTe buffer layer of growth subsequently.The CdTe that is grown directly upon on the silicon by MBE is more prone to peel off from substrate.The buffer layer total thickness is about 1 μ m, although may be thicker and may only be zinc telluridse or CZT for some devices.

Can use migration enhanced epitaxy (MEE) to carry out this part growth technique,, mention MBE and then comprise and mention MEE for the purpose of this specification sheets.

The substrate of having carried out required any etching/cleaning step is delivered to the MOVPE reaction chamber subsequently.In order to produce multi-layered devices, the various CMT layers of growth in each growth window, by United States Patent (USP) 4,566, the mutual diffusion multilayer technology of describing in 918 each layer of growing.Although MBE equipment and MOVPE equipment often are isolating device features, also can be by the loading between two kinds of equipment sealed or transmission mechanism be combined into single unit.Can use the sealed or transmission mechanism of MBE and MOVPE cavity and loading therebetween and be arranged to special assembly.

Fig. 6 has illustrated the principle of MOVPE growth, and shows the equipment that is applicable to the MOVPE growth, although employed physical device may be different.As US 4,566, more comprehensively describe in 918, by mass flow controller 3,4 and 23 sources of hydrogen is supplied to bubbler 6,7 and 25 from manifold 1.Valve 8 closures and valve 10 and 11 are opened, and gas stream is through bubbler 6, and valve 10 and 11 closures and valve 8 are opened, and then the hydrogen stream from mass flow controller 3 is directed to scrubber or strainer 31 by by-pass line 14.Similarly, can be by valve 9,12 and 13 control bubblers 7, by valve 26,27 and 28 control bubblers 25.Although may need more bubbler in the practice, three bubblers only are shown in Fig. 3 for simplification.Therefore can control air-flow through each bubbler.Air-flow from bubbler 6,7 and 25 can mix in mixing tank 15, this air-flow can be used for the air-flow of self-controller 5 (be subjected to valve 32,33 control) and dilute before entering reaction chamber container 16, but in other are arranged, may preferably presoma be supplied to the reaction chamber container respectively and in reaction chamber, mix these presomas.

The substrate 20 of carrying crystalline state buffer layer is positioned at the reaction chamber container 16 on the pedestal 21 in growth window.Utilize heating unit 17 or utilize any suitable heating unit by reaction chamber wall 24, for example be positioned at the inside cartridge heater of mercury bath below, heat element mercury bath 19, and keep the dividing potential drop of mercury vapour.Use induction heater 18 or any other suitable device heated substrate, make and near substrate, decompose from the metallorganics presoma in the air-flow of bubbler 6,7 and 25.

Bubbler 6 holds for example cadmium presoma of dimethyl cadmium, and bubbler 7 holds for example tellurium presoma of di-isopropyl tellurium.Control successively from bubbler 6 and 7 air-flows by appropriate by-pass valve control to reactor chamber, thereby the tellurium mercury and the cadmium telluride of growth thin layer in each growth window, the thickness of layer is controlled the overall cadmium content of the final CMT layer that forms with each layer mutual diffusion in the growth window during the control growing technology.

In order to produce a CMT layer in each growth window, for example this layer is p ⁺The CMT layer needs to introduce p type doping agent.Suitable p type doping agent is an arsenic, although can consider for example other doping agents of phosphorus and antimony.Therefore, doping agent bubbler 25 holds for example suitable precursors of the amino arsenic of three (dimethyl) (can use other volatile arsenic compositions), and bubbler temperature and controlled to reach appropriate doping through the air-flow of this bubbler.After the CMT layer of having grown, other CMT layers of can then growing.The suitable n type doping agent of any n type layer is an iodine, for example is presoma with the isobutyl iodide, but can use other presomas, and in fact can use for example other doping agents of indium.As previously mentioned, when using different dopant, MOVPE equipment will have a plurality of doping agent bubblers that need control respectively, rather than single doping agent bubbler shown in Figure 6.Similarly, if will grow any MOVPE buffer layer, then this equipment comprises bubbler, holds the presoma that is used for the buffer layer composition.

After MOVPE growth CMT layer, preferably in rich mercury environment, anneal of material-this technology is filled the electric property of mercury room and assurance expectation.Can in the MOVPE reaction chamber, carry out this annealing, and can behind growth CMT layer, directly carry out this annealing, perhaps can use any suitable device to carry out this annealing after a while.

Claims (39)

1. method of making infrared facility, comprise step: get the silicon substrate that has formed unicircuit on it, by molecular beam epitaxy at least one crystalline state buffer layer of at least one growth window selective growth, and by metal organic vapor at least one crystalline state CMT layer of selective growth on described buffer layer.

2. the method for claim 1, wherein said silicon substrate have towards＜110〉or＜(001) orientation of 111〉displacement 2 ° to 10 °.

3. method as claimed in claim 1 or 2, wherein said method are included in the step that forms unicircuit on the silicon substrate.

4. each described method in the claim as described above, wherein said substrate has a plurality of growth window.

5. each described method in the claim as described above, wherein the described substrate in this growth window or each growth window is in different levels with respect to described integrated circuit architecture.

6. method as claimed in claim 5, wherein the described substrate in this growth window or each growth window is lower than described integrated circuit architecture.

7. method as claimed in claim 5, wherein the described substrate in this growth window or each growth window extends above described integrated circuit architecture.

8. as any one described method of claim 1 to 4, wherein the described substrate in this growth window or each growth window is in and described integrated circuit architecture par.

9. each described method in the claim as described above, wherein this growth window or each growth window are by the mask material definition that is coated to this growth window or each growth window outside.

10. each described method in the claim as described above, wherein said method comprises the step that mask material is coated to the described substrate of this growth window or each growth window outside.

11. as claim 9 or 10 described methods, wherein said mask material is a titanium tungsten.

12. each described method in the claim further is included in before the grown buffer layer as described above, cleans the step of described substrate in this growth window or each growth window.

13. method as claimed in claim 12, wherein said cleaning step comprise in solvent cleaning, cylinder ashing, ionic fluid grinding and the use hydrofluoric acid base etching agent etching one or more.

14. as claim 12 or 13 described methods, wherein said substrate preparation step is included in the warm wash that arsenic flows down, and is not higher than basically in top temperature to carry out this warm wash under 500 ℃ the situation.

15. each described method in the claim as described above, wherein this at least one buffer layer is selected from a kind of in cadmium telluride, zinc telluridse and the cadmium zinc telluride.

16. each described method in the claim as described above, the growth step of wherein said at least one buffer layer are included in first buffer layer of growth zinc telluridse on the described substrate and second buffer layer of growth cadmium telluride on described first buffer layer.

17. each described method in the claim as described above is included in before one deck cadmium mercury telluride of growing at least, on by described at least one buffer layer of molecular beam epitaxial growth by the grow step of at least one buffer layer of metal organic vapor.

18. each described method in the claim as described above, the step of at least one cadmium mercury telluride layer of wherein said growth comprises the mutual diffusion multilayer technology.

19. each described method in the claim as described above, wherein at least one cadmium mercury telluride layer growth becomes doped layer.

20. each described method in the claim as described above, the step of wherein said at least one buffer layer of growth are included in growth window growth crystalline material and at other region growing polycrystalline materials.

21. each described method in the claim as described above, the step of at least one cadmium mercury telluride layer of wherein said growth are included in growth window growth crystalline material and at other region growing polycrystalline materials.

22. each described method in the claim as described above, wherein said method comprises, after at least one cadmium mercury telluride layer of described growth, removes the step of any unwanted cadmium mercury telluride and/or cushioning layer material.

23. each described method in the claim as described above, wherein said method comprises that further the device treatment step is to define the shape of described at least one cadmium mercury telluride layer.

24. as each described method in the claim 11 to 23 of claim 10 or direct or indirect dependent claims 10, further comprise, after described at least one the cadmium mercury telluride layer of growth, remove the step of any unwanted mask material.

25. method as claimed in claim 10 further comprises, forms being electrically connected between the described cadmium mercury telluride of one deck at least in described unicircuit and this growth window or each growth window.

26. a monolithic integrated circuit infrared facility is formed by each described method in the aforementioned claim.

27. a monolithic integrated circuit infrared facility comprises the silicon substrate of having made unicircuit on it and is formed at the cadmium mercury telluride of one deck at least at least one buffer layer on the described substrate, wherein this substrate has (001) orientation towards＜111〉displacement 2 ° to 10 °.

28. device as claimed in claim 27 comprises having a plurality of cadmium mercury telluride structures of associated circuitry separately respectively.

29. as claim 27 or 28 described devices, wherein said device is an infrared eye.

30. a method of making the monolithic integrated circuit array of cadmium mercury telluride structure comprises step: get monolithic integrated circuit substrate material and at least one layer crystal attitude of selective growth cadmium mercury telluride in described growth window with a plurality of definition growth window.

31. method as claimed in claim 30, wherein said substrate are silicon.

32. method as claimed in claim 31, wherein said silicon substrate are oriented to (001) towards＜111〉displacement 2 ° to 10 °.

33., wherein define described growth window by the mask material that is coated to described growth window outside as each described method in the claim 30 to 32.

34. each described method in the claim as described above, wherein said method comprises the step that mask material is coated to the substrate of described growth window outside.

35. as each described method in the claim 30 to 34, wherein said method is included in the step of cleaning described substrate in the described growth window before the material growth.

36. as each described method in the claim 30 to 35, the wherein said growth step of one deck cadmium mercury telluride at least comprises step: by molecular beam epitaxy at least one crystalline state buffer layer of selective growth in each growth window, subsequently by metal organic vapor at least one layer crystal attitude of selective growth cadmium mercury telluride at least one buffer layer.

37. method as claimed in claim 36, wherein said method relates to, before the described cadmium mercury telluride of one deck at least of growth, formerly by on the described buffer layer of molecular beam epitaxial growth by the grow step of at least one buffer layer of metal organic vapor.

38. as each described method in the claim 30 to 37, wherein said method further is included in the step that any unwanted cadmium mercury telluride material is removed in growth afterwards.

39. as each described method in the claim 35 to 38 of claim 34 or direct or indirect dependent claims 34, further be included in after the material growth, remove the step of any unwanted mask material.

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