CN100583464C - Production method of high-speed deposition for high-quality intrinsic minicrystal silicon film - Google Patents

Production method of high-speed deposition for high-quality intrinsic minicrystal silicon film Download PDF

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CN100583464C
CN100583464C CN200810053846A CN200810053846A CN100583464C CN 100583464 C CN100583464 C CN 100583464C CN 200810053846 A CN200810053846 A CN 200810053846A CN 200810053846 A CN200810053846 A CN 200810053846A CN 100583464 C CN100583464 C CN 100583464C
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thin film
crystal silicon
micro crystal
input power
silicon thin
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CN101315958A (en
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耿新华
韩晓艳
侯国付
张晓丹
张德坤
魏长春
孙建
赵颖
薛俊明
张建军
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Nankai University
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Abstract

The invention discloses a preparation method for a high-speed deposition high-quality intrinsic microcrystalline silicon film, which utilizes an ultra-high frequency plasma reinforced chemical vapor deposition technique; wherein, the preparation process of the high-speed deposition high-quality intrinsic microcrystalline silicon film is divided into at least two time sections; each time section is corresponding to an input power; during the preparation process of the high-speed deposition high-quality intrinsic microcrystalline silicon film, the input power is regularly changed with the power reduction gradient gradually reduced. The invention adopts a method of gradually reducing the input power to deposit the intrinsic microcrystalline silicon film and achieves the objects of controlling the longitudinal micro-structure evolvement of the intrinsic microcrystalline silicon film and improving the micro-structure compactness, thus improving the photoelectric conversion efficiency of the high-speed deposition microcrystalline silicon solar cells.

Description

The preparation method of high-speed deposition high-quality intrinsic minicrystal silicon film
[technical field]
The present invention relates to silicon-based thin film solar cell preparation technology, especially a kind of preparation method who helps to improve the intrinsic micro crystal silicon thin film of high speed deposition micro crystal silicon solar battery efficient.
[background technology]
In the silicon-based thin film solar cell, microcrystal silicon (μ c-Si:H) thin film solar cell has the favor that high conversion efficiency and high stability enjoy photovoltaic industry circle because of it.Microcrystal silicon (μ c-Si:H) is a kind of indirect gap semiconductor material, and optical band gap is about 1.1eV, needs film thickness greater than 1 μ m in order to absorb sunlight fully.Therefore it is most important for the reduction of microcrystalline silicon film photovoltaic cell production cost to improve growth rate.A lot of results of study show that hyperfrequency plasma enhanced chemical vapor deposition (VHF-PECVD) is the effective ways of high-speed rapid growth microcrystalline silicon film in conjunction with high reaction pressure, (referring to T.Matsui, M.Kondo, A.Matsuda, Proceedings 3rd World ConferencePhotovoltaic on Solar Energy Conversion, 2003, p.1570 and U.Graf, J.Meier, U.Kroll, et al.Thin Solid Films 427 (2003) 37.), yet people generally find, raising along with deposition rate, quality of materials and battery performance progressively descend [referring to B.Rech, T.Roschek, T.Repmann, J.M ü ller, R.Schmitz, and W.Appenzeller, Microcrystalline silicon for large area thin film solar cells, Thin Solid Films 427,157 (2003) and C.Niikura, M.Kondo, and A.Matsuda, Preparationof microcrystalline silicon films at ultra high-rate of 10nm/s using high-density plasma, J.Non-Cryst.Solids 338-340,42 (2004)], this is because need the high power decomposition gas to improve growth rate under the high pressure, and the energetic ion of generation can form defective and suppress the crystallization growth the bombardment of film surface.The basic structure of PIN type micro crystal silicon solar battery as shown in Figure 1, comprise " glass/transparent conductive film (preceding electrode)/P type microcrystal silicon (about 20nm)/I type (intrinsic) microcrystal silicon (about 1.5 μ m)/N type amorphous silicon (about 30nm)/back electrode ", the growth of microcrystalline silicon film has the vertical structure inhomogeneities, promptly increase the crystallization degree increase of material with thickness, this effect for thicker I layer is more obvious, if initial amorphous hatching layer is thicker, the longitudinal uniformity of film is relatively poor, thereby the collection that will influence photo-generated carrier reduces battery performance.Therefore, for high speed deposition intrinsic (I type) microcrystalline silicon film, the longitudinal uniformity that reduces defect state density and raising film becomes the key factor that improves battery performance.
Introduce the less low speed boundary layer of ion bombardment effects at the P/I interface and can improve the P/I interfacial characteristics, promptly reduce defect state at the interface, improve the transport property of charge carrier, and the effect of having played inculating crystal layer has reduced the thickness of amorphous hatching layer, but the vertical structure uniformity of the intrinsic micro crystal silicon thin film of later stage high-speed rapid growth and film quality also need further raising.
[summary of the invention]
The object of the invention provides a kind of preparation method that can improve the intrinsic micro crystal silicon thin film of high speed deposition micro crystal silicon battery efficiency, and this method can be controlled vertical micro-structural of high speed deposition intrinsic micro crystal silicon thin film and improve film quality, and then improves battery performance.
The present invention for achieving the above object, designed a kind of preparation method of high speed deposition intrinsic micro crystal silicon thin film, be used for silicon-based thin film solar cell, utilize hyperfrequency plasma enhanced chemical vapor deposition technology, wherein the preparation process with the high speed deposition intrinsic micro crystal silicon thin film is divided into a plurality of time periods, described each time period was controlled at 5～20 minutes, corresponding input power of described each time period, in the preparation process of described high speed deposition intrinsic micro crystal silicon thin film, the rule that described input power is successively decreased in gradient changes.
The more excellent difference of the maximum power of described input power and minimum power is less than or equal to 20W.
The span that described input power reduces gradient is 1W～10W, and is more excellent, and the span that described input power reduces gradient is 2W～5W.
In the preparation process of described high speed deposition intrinsic micro crystal silicon thin film, depositing of thin film speed is more than or equal to 0.5nm/s.
The present invention is at first by adopting higher input power deposition micro crystal silicon film on the P layer.In the deposition process in this stage, higher input power can reduce the thickness of amorphous hatching layer, and this moment, prepared microcrystalline silicon film had the characteristic of device quality level.
Then, under the identical situation of other process conditions, control vertical micro-structural of film and reduce ion bombardment effects and obtain by reducing input power gradually, promptly under the constant situation of other process conditions, only reduce the input power deposition intrinsic micro crystal silicon thin film, method simply is convenient to operation, is suitable for suitability for industrialized production.
[description of drawings]
Fig. 1 is the basic structure of PIN type micro crystal silicon solar battery.
Fig. 2 is the flow chart of intrinsic micro crystal silicon thin film preparation in the high speed deposition micro crystal silicon solar battery of the present invention;
Fig. 3 reduces the change curve of gradient with power for the J-V parameter of microcrystal silicon battery of the present invention, wherein (A) is the change curve of the short-circuit current density of battery with power reduction gradient, (B) be the change curve of the open circuit voltage of battery with power reduction gradient, (C) being the change curve of the fill factor, curve factor of battery with power reduction gradient, (D) is the change curve of the photoelectric conversion efficiency of battery with power reduction gradient.
[embodiment]
Below in conjunction with accompanying drawing and concrete case study on implementation technical solutions according to the invention are described in detail.
The invention provides the preparation method of deposition intrinsic micro crystal silicon thin film in a kind of high speed deposition micro crystal silicon solar battery, this method adopts very high frequency plasma to strengthen chemical vapour deposition technique (VHFPECVD), frequency is 70MHz, reaction gas pressure is 2torr, silane concentration SC (SC=[SiH4]/([SiH4]+[H2])) be 5.25%, the selection of initial power is the microcrystal silicon material for preparing the device quality level when depositing of thin film speed reaches 1.2nm/s.It is worth noting that the present invention adopts the method deposition intrinsic micro crystal silicon thin film on the P of micro crystal silicon solar battery layer that reduces power gradually, wherein reduce power gradually and be specially the rule variation that input power tapers off according to power reduction gradient.
In the present invention, employing is divided at least two time periods with the preparation process of high speed deposition intrinsic micro crystal silicon thin film, corresponding input power of each time period, adopt the method deposition intrinsic micro crystal silicon thin film on the P of micro crystal silicon solar battery layer that reduces input power gradually, wherein reduce power gradually and be specially the rule variation that input power tapers off according to power reduction gradient.
Embodiment one
Embodiments of the invention one are divided into two time periods with the preparation process of deposition intrinsic micro crystal silicon thin film in the high speed deposition micro crystal silicon solar battery, it is that example comes the preparation method of intrinsic micro crystal silicon thin film in the high speed deposition micro crystal silicon solar battery is described that corresponding two time periods are adopted two kinds of different power, is specially:
Step 1, utilize hyperfrequency plasma enhanced chemical vapor deposition VHF-PECVD method, in first time period, adopt first input power on the P layer, to deposit the first intrinsic micro crystal silicon thin film layer;
Step 2, do not go out, except that power, under the situation of other parameter constant, in second time period, adopt second input power on first intrinsic micro crystal silicon thin film, to grow and form the second intrinsic micro crystal silicon thin film layer at the plasma aura; In this embodiment, described first input power＞second input power.
Enumerate a concrete implementation condition below and come present embodiment is further described, implementation condition is as follows: the substrate that will have the P layer places reaction chamber, and the air pressure in the reaction chamber remains on 2torr, and depositing of thin film speed is 1.2nm/s.Energising begins deposition, and at first setting first input power is 70W, through 10 minutes deposition, forms the first intrinsic micro crystal silicon thin film layer; Under the constant situation of other process conditions, input power is become the second input power 60W then,, form the second intrinsic micro crystal silicon thin film layer through 20 minutes deposition.The battery efficiency of prepared solar cell has reached 8.46% under the gradual change power.
In high speed deposition micro crystal silicon solar battery in the conventional preparation process of deposition intrinsic micro crystal silicon thin film, adopt firm power deposition intrinsic micro crystal silicon thin film on the P of micro crystal silicon solar battery layer, implementation condition is as follows: the substrate that will have the P layer places reaction chamber, air pressure in the reaction chamber remains on 2torr, and the depositing of thin film rate controlled is at 1.2nm/s.Only use the firm power deposition intrinsic micro crystal silicon thin film, in this embodiment, input power is set at 70W,, form the intrinsic micro crystal silicon thin film layer through 30 minutes deposition.The battery efficiency of prepared solar cell is about 8.26% under the firm power.
Can find out that from top data the battery efficiency of prepared solar cell is lower than the battery efficiency of solar cell prepared under the gradual change power under the firm power.
Embodiment two
Please refer to shown in Figure 2, embodiments of the invention two are divided into five time periods with the preparation process of deposition intrinsic micro crystal silicon thin film in the high speed deposition micro crystal silicon solar battery, it is that example comes the preparation method of intrinsic micro crystal silicon thin film in the high speed deposition micro crystal silicon solar battery is described that corresponding five time periods are adopted five kinds of different power, is specially:
Step 1, utilize hyperfrequency plasma enhanced chemical vapor deposition VHF-PECVD method, adopt the first input power P1 on the P layer, to deposit the first intrinsic micro crystal silicon thin film layer;
Step 2, do not go out, except that power, under the situation of other parameter constant, adopt the second input power P2 on first intrinsic micro crystal silicon thin film, to grow and form the second intrinsic micro crystal silicon thin film layer at the plasma aura;
Step 3, do not go out, except that power, under the situation of other parameter constant, adopt the 3rd input power P3 on second intrinsic micro crystal silicon thin film, to grow and form the 3rd intrinsic micro crystal silicon thin film layer at the plasma aura;
Step 4, do not go out, except that power, under the situation of other parameter constant, adopt the 4th input power P4 on the 3rd intrinsic micro crystal silicon thin film, to grow and form the 4th intrinsic micro crystal silicon thin film layer at the plasma aura;
Step 5, do not go out, except that power, under the situation of other parameter constant, adopt the 5th input power P5 on the 4th intrinsic micro crystal silicon thin film, to grow and form the 5th intrinsic micro crystal silicon thin film layer at the plasma aura.
In this embodiment, the described first input power P1＞second input power P2＞the 3rd input power P3＞the 4th input power P4＞the 5th input power P5, and,
In this embodiment, the difference between the first input power P1, the second input power P2, the 3rd input power P3, the 4th input power P4 and the 5th input power P5 power is certain, i.e. P1-P2=P2-P3=P3-P4=P4-P5=Δ P.This Δ P is that power reduces gradient, in order to the size of difference between expression power.
Please refer to shown in Figure 3ly, Fig. 3 is that the J-V parameter of micro crystal silicon solar battery reduces the change curve of gradient with power, comprising following parameter: the short-circuit current density Jsc of battery, open circuit voltage Voc, fill factor, curve factor FF and efficient Efficiency.
Abscissa among Fig. 3 represents that power reduces gradient delta P, wherein Δ P 0The expression power invariability is constant, can see that the method that adopts power to reduce gradually obtains high speed deposition micro crystal silicon solar battery, and its battery efficiency all has increase, and with the increase of power gradient, the efficient of solar cell increases afterwards earlier and reduces, and is Δ P in power gradient wherein 4The time, the photoelectric conversion efficiency of solar cell has improved about one percentage point with comparing of firm power.
Enumerating three concrete implementation conditions below comes present embodiment is further described.
Implementation condition 1 is Δ P with the power gradient 2Illustrate, the power gradient in the corresponding diagram 3 is Δ P 2W, Δ P 2Value 2W.Concrete implementation condition is as follows: the substrate that will have the P layer places reaction chamber, and the air pressure in the reaction chamber remains on 2torr, and depositing of thin film speed is 1.2nm/s.Energising begins deposition, and at first setting first input power is 70W, through 10 minutes deposition, forms the first intrinsic micro crystal silicon thin film layer; Under the constant situation of other process conditions, input power is become second input power (70-Δ P then 2) W, through 5 minutes deposition, form the second intrinsic micro crystal silicon thin film layer; Under the constant situation of other process conditions, input power is become the 3rd input power (70-2 Δ P then 2) W, through 5 minutes deposition, form the 3rd intrinsic micro crystal silicon thin film layer; Under the constant situation of other process conditions, input power is become the 4th input power (70-3 Δ P then 2) W, through 5 minutes deposition, form the 4th intrinsic micro crystal silicon thin film layer; At last under the constant situation of other process conditions, input power is become the 5th input power (70-4 Δ P 2) W, through 5 minutes deposition, form the 5th intrinsic micro crystal silicon thin film layer.
Implementation condition 2 is Δ P with the power gradient 4Illustrate, the power gradient in the corresponding diagram 3 is Δ P 4W, Δ P 4Value 4W.Concrete implementation condition is as follows: the substrate that will have the P layer places reaction chamber, and the air pressure in the reaction chamber remains on 2torr, and depositing of thin film speed is 1.2nm/s.Energising begins deposition, and at first setting first input power is 70W, through 10 minutes deposition, forms the first intrinsic micro crystal silicon thin film layer; Under the constant situation of other process conditions, input power is become second input power (70-Δ P then 4) W, through 5 minutes deposition, form the second intrinsic micro crystal silicon thin film layer; Under the constant situation of other process conditions, input power is become the 3rd input power (70-2 Δ P then 4) W, through 5 minutes deposition, form the 3rd intrinsic micro crystal silicon thin film layer; Under the constant situation of other process conditions, input power is become the 4th input power (70-3 Δ P then 4) W, through 5 minutes deposition, form the 4th intrinsic micro crystal silicon thin film layer; At last under the constant situation of other process conditions, input power is become the 5th input power (70-4 Δ P 4) W, through 5 minutes deposition, form the 5th intrinsic micro crystal silicon thin film layer.As can be seen from Figure 3, power reduction gradient is Δ P 4The battery efficiency of prepared solar cell is compared and has been improved about one percentage point under the battery efficiency of the solar cell that W is prepared and the firm power, and photoelectric conversion efficiency has reached 9.36%.
Implementation condition 3 is Δ P with the power gradient 5Illustrate, the power gradient in the corresponding diagram 2 is Δ P 5W, Δ P 5Value 5, in this embodiment, Δ P 5＞Δ P 4, promptly this implementation condition is for adopting more high-power gradient deposition intrinsic micro crystal silicon thin film on the P of micro crystal silicon solar battery layer.Concrete implementation condition is as follows: the substrate that will have the P layer places reaction chamber, and the air pressure in the reaction chamber remains on 2torr, and the depositing of thin film rate controlled is at 1～1.2nm/s.Energising begins deposition, and at first setting first input power is 70W, through 10 minutes deposition, forms the first intrinsic micro crystal silicon thin film layer; Under the constant situation of other process conditions, input power is become second input power (70-Δ P then 5) W, through 5 minutes deposition, form the second intrinsic micro crystal silicon thin film layer; Under the constant situation of other process conditions, input power is become the 3rd input power (70-2 Δ P then 5) W, through 5 minutes deposition, form the 3rd intrinsic micro crystal silicon thin film layer; Under the constant situation of other process conditions, input power is become the 4th input power (70-3 Δ P then 5) W, through 5 minutes deposition, form the 4th intrinsic micro crystal silicon thin film layer; At last under the constant situation of other process conditions, input power is become the 5th input power (70-4 Δ P 5) W, through 5 minutes deposition, form the 5th intrinsic micro crystal silicon thin film layer.
As can be seen, it is Δ P that power reduces gradient from 3 2W and Δ P 5It is Δ P that the battery efficiency of the solar cell that W is prepared is lower than power reduction gradient 4The battery efficiency of the solar cell that W is prepared, promptly power reduces the gradient existence than the figure of merit.
Please continue with reference to figure 3, adopt firm power deposition intrinsic micro crystal silicon thin film on the P of micro crystal silicon solar battery layer, power gradient is Δ P 0W, Δ P 0=0, promptly adopt firm power deposition intrinsic micro crystal silicon thin film on the P of micro crystal silicon solar battery layer, implementation condition is as follows: the substrate that will have the P layer places reaction chamber, and the air pressure in the reaction chamber remains on 2torr, and the depositing of thin film rate controlled is at 1.2nm/s.Only use the firm power deposition intrinsic micro crystal silicon thin film, in this embodiment, input power is set at 70W,, form the intrinsic micro crystal silicon thin film layer through 30 minutes deposition.
As can be seen from Figure 3, the battery efficiency of prepared solar cell is the battery efficiency that is lower than solar cell prepared under other gradual change power under the firm power.
It is worth noting, in the present invention, prepare in the process of intrinsic micro crystal silicon thin film in the high speed deposition micro crystal silicon solar battery, more excellent implementation condition is that the difference of maximum power and minimum power is less than or equal to 20W, the span that power reduces gradient is 1W～10W, and wherein the more excellent span of power reduction gradient is 2～5W.
In addition, because high deposition rate obtains by improving reaction gas pressure and input power, and high input power can produce energetic ion, the energetic ion that produces can form defective and suppress the crystallization growth the bombardment of film surface, not only can control the vertical structure differentiation of microcrystalline silicon film but also can reduce ion bombardment effects and improve film characteristics so reduce power.And for the microcrystalline silicon film of low speed deposition, the power that itself adopts is just not high, falls just too big meaning not of power, so in the preparation process of high speed deposition intrinsic micro crystal silicon thin film of the present invention, depositing of thin film speed is more than or equal to 0.5nm/s.
Adopt two kinds to prepare in the high speed deposition micro crystal silicon solar battery intrinsic micro crystal silicon thin film with five kinds of different power and only be embodiments of the invention, so be not limited thereto, in preparation process, come the variation of setting power and power according to concrete process conditions.
The present invention has the intrinsic micro crystal silicon thin film layer of low defect state and better vertical micro-structural by adopting the method high speed deposition on the P layer that reduces input power gradually with acquisition.In the deposition process in this stage, the input power of reduction can reduce the bombardment effect of ion pair film surface, helps reducing the defect state in the film; The input power that reduces can reduce the crystallization rate of film, helps controlling the degree that crystallization rate increases with film thickness, thus the differentiation of vertical micro-structural of control film.More than can obviously improve the longitudinal uniformity of intrinsic micro crystal silicon thin film quality and structure, for the short-circuit current density Jsc of battery, open circuit voltage Voc and fill factor, curve factor FF have raising in various degree, and then improve battery efficiency.
In addition, the present invention only comes the deposition micro crystal silicon thin layer by reducing glow power under the constant situation of other process conditions, and method simply is convenient to operation, is suitable for suitability for industrialized production.
The above; only be the present invention's preferable embodiment under certain process conditions; but protection scope of the present invention is not limited thereto; anyly be familiar with those skilled in the art in the technical scope that the present invention discloses; the variation that can expect easily or replacement all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of claim.

Claims (5)

1, a kind of preparation method of high speed deposition intrinsic micro crystal silicon thin film, be used for silicon-based thin film solar cell, utilize hyperfrequency plasma enhanced chemical vapor deposition technology, it is characterized in that: the preparation process of high speed deposition intrinsic micro crystal silicon thin film is divided at least two time periods, described each time period was controlled at 5～20 minutes, corresponding input power of described each time period, in the preparation process of described high speed deposition intrinsic micro crystal silicon thin film, described input power is the rule variation that constant gradient successively decreases.
2, the preparation method of high speed deposition intrinsic micro crystal silicon thin film according to claim 1 is characterized in that: the maximum power of described input power and the difference of minimum power are less than or equal to 20W.
3, the preparation method of high speed deposition intrinsic micro crystal silicon thin film according to claim 1 is characterized in that: the span that described input power reduces gradient is 1W～10W.
4, the preparation method of high speed deposition intrinsic micro crystal silicon thin film according to claim 3 is characterized in that: the span that described input power reduces gradient is 2W～5W.
5, the preparation method of high speed deposition intrinsic micro crystal silicon thin film according to claim 1 is characterized in that: in the preparation process of described high speed deposition intrinsic micro crystal silicon thin film, depositing of thin film speed is more than or equal to 0.5nm/s.
CN200810053846A 2008-07-15 2008-07-15 Production method of high-speed deposition for high-quality intrinsic minicrystal silicon film Expired - Fee Related CN100583464C (en)

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Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
Device-quality Intrinsic Microcrystalline Silicon Prepared by13.56MHz PECVD at High Pressure. 侯国付，郭群超，王岩，薛俊明，任慧志，宋建，张晓丹，赵颖，耿新华，李以钢.人工晶体学报，第34卷第6期. 2005
Device-quality Intrinsic Microcrystalline Silicon Prepared by13.56MHz PECVD at High Pressure. 侯国付，郭群超，王岩，薛俊明，任慧志，宋建，张晓丹，赵颖，耿新华，李以钢.人工晶体学报，第34卷第6期. 2005 *
高压PECVD技术沉积硅基薄膜过程中硅烷状态的研究. 侯国付，薛俊明，孙建，郭群超，张德坤，任慧志，赵颖，耿新华，李乙钢.物理学报，第56卷第2期. 2007
高压PECVD技术沉积硅基薄膜过程中硅烷状态的研究. 侯国付，薛俊明，孙建，郭群超，张德坤，任慧志，赵颖，耿新华，李乙钢.物理学报，第56卷第2期. 2007 *

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