CN100583120C - Silicon storage relevant convolver - Google Patents

Silicon storage relevant convolver Download PDF

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Publication number
CN100583120C
CN100583120C CN200710073246A CN200710073246A CN100583120C CN 100583120 C CN100583120 C CN 100583120C CN 200710073246 A CN200710073246 A CN 200710073246A CN 200710073246 A CN200710073246 A CN 200710073246A CN 100583120 C CN100583120 C CN 100583120C
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CN
China
Prior art keywords
convolver
silicon storage
storage relevant
delay line
diode array
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Expired - Fee Related
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CN200710073246A
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Chinese (zh)
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CN101241535A (en
Inventor
赵杰
张朝
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Shenzhen Polytechnic
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Shenzhen Polytechnic
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Priority to CN200710073246A priority Critical patent/CN100583120C/en
Publication of CN101241535A publication Critical patent/CN101241535A/en
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Publication of CN100583120C publication Critical patent/CN100583120C/en
Expired - Fee Related legal-status Critical Current
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Abstract

The present invention provides a silicon storage relative convolver, including at least one diode arrays and a pigtail delay line, the pigtail delay line is set in the center of the diode array, the pigtail delay line is connected with the diode array by secondary integrated connection. The LiNbO3 pigtail delay line of the silicon storage relative convolver is externally connected with the surface acoustic wave memory convolver of the common diode array, the pigtail delay line is connected with the diode array by the secondary integration. The structure of the device not only processes analysis, but also achieves higher efficiency because of high electromechanical coupling factor of the LiNbO3, and mature process of the silicon diode.

Description

Silicon storage relevant convolver
[technical field]
The present invention relates to a kind of silicon storage relevant convolver, particularly relate to a kind of high efficiency silicon storage relevant convolver that has.
[background technology]
Storage relevant convolver is a kind of three port analogue signal processor spares, has very strong signal processing function, and it can store a reference signal in advance, when by the time another signal arrives, realizes the convolution of these two signals or relevant again.This micro-system can be widely used in fields such as secret communication, modern radar and electronic countermeasure.
Storage relevant convolver has two kinds of mode of operations: transient mode and parameter pattern correspond respectively to two kinds of different charging modes of diode array.The parameter pattern is to come write signal with a, width identical with signal frequency for several modulating pulses to the dozens of signal period; Transient mode then is to realize signal storage with a pulse less than half signal period.Therefore, transient mode has the ability of handling broadband signal.
Storage relevant convolver efficient of the prior art is not high, can't satisfy the requirement of present production technology and technology.
[summary of the invention]
The present invention the invention provides a kind of high efficiency silicon storage relevant convolver that has in order to overcome above-mentioned the deficiencies in the prior art.
The technical solution adopted for the present invention to solve the technical problems is: a kind of silicon storage relevant convolver is provided, it comprises at least one diode array and tapped delay line, tapped delay line is arranged on the centre of this diode array, and this tapped delay line and diode array are integrated and connected by secondary.
The scheme that the present invention solves further technical matters is: this silicon storage relevant convolver comprises two diode arrays, and the back electrode of this diode array joins with conduction band, as the output port of this silicon storage relevant convolver.
The scheme that the present invention solves further technical matters is: this tapped delay line is arranged on 128 ° of YX-LiNbO 3On.
The scheme that the present invention solves further technical matters is: these tapped delay line two ends are interdigital transducer, and center section is tap, are used for the surface acoustic wave signal sampling.
The scheme that the present invention solves further technical matters is: the centre frequency of this this interdigital transducer is 30MHz, adopts 4.5 pairs of divisions to refer to that bandwidth is 6.7MHz, and the aperture is 6.6mm.
The scheme that the present invention solves further technical matters is: this number of taps is 300,150 of every sides, and the time span in the tap district of its composition is 5us.
The scheme that the present invention solves further technical matters is: the diode fabrication of this diode array is<100〉on the n type Si, corresponding one by one with tap.
The scheme that the present invention solves further technical matters is: this diode adopts p +Nn +Structure, outer layer doping concentration are 2*10 14Cm -3, thickness is 34um, and junction depth is 2um, and substrate thickness is thinned to 350um.
Compared to prior art, the invention has the beneficial effects as follows: the LiNbO of silicon storage relevant convolver of the present invention 3The surface acoustic wave storage relevant convolver of the external general-purpose diode array structure of tapped delay line, tapped delay line and diode array are connected together by secondary is integrated.This device architecture not only can carry out analytical analysis, and because LiNbO 3The electromechanical coupling factor height, the manufacturing process maturation of silicon diode, the device of this structure can reach higher efficient.
[description of drawings]
Fig. 1 is the structural representation of silicon storage relevant convolver of the present invention.
[embodiment]
Below in conjunction with drawings and Examples silicon storage relevant convolver of the present invention is described further.
The structure of silicon storage relevant convolver of the present invention as shown in Figure 1, wherein diode array 10 is oppositely arranged up and down, tapped delay line (TDL) 20 is arranged on the center section of this diode array 10, tapped delay line (TDL) 20 and diode array 10 are integrated and connected by secondary, the back electrode of two diode arrays 10 joins with conduction band, as the output port of silicon storage relevant convolver.Wherein 31,32 and 33 represent three ports respectively.
Tapped delay line 20 is produced on 128 ° of YX-LiNbO 3On, its two ends are interdigital transducer (IDT) 22, center section is tap, is used for surface acoustic wave (SAW) signal sampling.The centre frequency of this interdigital transducer 22 is 30MHz, adopts 4.5 pairs of divisions to refer to that bandwidth is 6.7MHz, and the aperture is 6.6mm.Tap is arranged by two taps of every wavelength under the centre frequency, for reducing the pressure welding difficulty, tap is drawn from both sides respectively, the spacing of adjacent like this two taps is 132um, the extraction electrode area is 80*300um2, and per 25 pairs of taps increase a ground-electrode, in case the photoetching severed finger causes middle a large amount of taps unsettled, and provide good reference potential to long tap line.Interaction area (tap district) is made up of 300 taps, 150 of every sides, and tap district time span is 5us.
Diode array 10 is produced on<100〉n type Si on, be divided into 4 rows, 150 of every rows, corresponding one by one with tap, it is integrated for the ease of secondary adopting this structure.Diode adopts p +Nn +Structure, outer layer doping concentration are 2*10 14Cm -3, thickness is 34um, and junction depth is 2um, and substrate thickness is thinned to 350um, and the minority carrier life time of diode is accurately controlled with electron beam irradiation, and for our device, minority carrier life time is 5-10ns.
Silicon storage relevant convolver of the present invention adopts the 12Mev electron beam irradiation to adjust the diode minority carrier life time, and promptly reaching few son has the very short life-span, owing to introduced the asymmetric compound center, device has also possessed long storage time simultaneously.Diode array behind the irradiation is eliminated the defect level in the semiconductor through 400 ℃ of isochronal annealings, increases the stability of device.
Show convolution and to store relevant all be triangular wave preferably according to the test simulation effect.Test result also shows, storage is relevant to present good linear relationship with the reference signal amplitude, simultaneously, relevant output reduces with the increase of write signal width, this is because can make under the effective Writing condition of signal, increasing the write signal time makes that the DC component of stored charge increases in the diode, thereby output descends.Therefore when selecting write signal, satisfying under the condition of transient mode, should make write signal narrow as much as possible, can improve the efficient of device.
The LiNbO of silicon storage relevant convolver of the present invention 3The surface acoustic wave storage relevant convolver of the external general-purpose diode array structure of tapped delay line, tapped delay line and diode array are connected together by secondary is integrated.This device architecture not only can carry out analytical analysis, and because LiNbO 3The electromechanical coupling factor height, the manufacturing process maturation of silicon diode, the device of this structure can reach higher efficient.

Claims (8)

1. silicon storage relevant convolver, it is characterized in that: it comprises at least one diode array and tapped delay line, and tapped delay line is arranged on the centre of this diode array, and this tapped delay line is arranged on 128 0YX-LiNbO 3On, this tapped delay line is integrated and connected by secondary in diode array.
2. silicon storage relevant convolver according to claim 1 is characterized in that: this silicon storage relevant convolver comprises two diode arrays, and the back electrode of this diode array joins with conduction band, as the output port of this silicon storage relevant convolver.
3. silicon storage relevant convolver according to claim 1 is characterized in that: these tapped delay line two ends are interdigital transducer, and center section is tap, are used for the surface acoustic wave signal sampling.
4. silicon storage relevant convolver according to claim 3 is characterized in that: the centre frequency of this interdigital transducer is 30MHz, adopts 4.5 pairs of divisions to refer to that bandwidth is 6.7MHz, and the aperture is 6.6mm.
5. silicon storage relevant convolver according to claim 3 is characterized in that: this tap is arranged by two taps of every wavelength under the centre frequency, and draws from both sides respectively.
6. silicon storage relevant convolver according to claim 5 is characterized in that: this number of taps is 300,150 of every sides, and the time span in the tap district of its composition is 5us.
7. silicon storage relevant convolver according to claim 1 is characterized in that: the diode fabrication of this diode array is<100〉on the n type Si, corresponding one by one with tap.
8. silicon storage relevant convolver according to claim 6 is characterized in that: this diode adopts p +Nn +Structure, outer layer doping concentration are 2*10 14Cm -3, thickness is 34um, and junction depth is 2um, and substrate thickness is thinned to 350um.
CN200710073246A 2007-02-09 2007-02-09 Silicon storage relevant convolver Expired - Fee Related CN100583120C (en)

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CN200710073246A CN100583120C (en) 2007-02-09 2007-02-09 Silicon storage relevant convolver

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Application Number Priority Date Filing Date Title
CN200710073246A CN100583120C (en) 2007-02-09 2007-02-09 Silicon storage relevant convolver

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CN101241535A CN101241535A (en) 2008-08-13
CN100583120C true CN100583120C (en) 2010-01-20

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Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102208005B (en) * 2011-05-30 2014-03-26 华中科技大学 2-dimensional (2-D) convolver
US9588213B2 (en) 2014-02-18 2017-03-07 Raytheon Company Analog signal processing method for accurate single antenna direction finding
US9590760B2 (en) 2014-06-03 2017-03-07 Raytheon Company Analog RF memory system
US9645972B2 (en) 2014-06-16 2017-05-09 Raytheon Company Butterfly channelizer
US9485125B2 (en) 2014-06-16 2016-11-01 Raytheon Company Dynamically reconfigurable channelizer
US10027026B2 (en) 2014-09-18 2018-07-17 Raytheon Company Programmable beamforming system including element-level analog channelizer
US10348338B2 (en) 2016-10-06 2019-07-09 Raytheon Company Adaptive channelizer
US10084587B1 (en) 2017-07-28 2018-09-25 Raytheon Company Multifunction channelizer/DDC architecture for a digital receiver/exciter

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1409850A (en) * 1999-12-10 2003-04-09 Dspc技术有限公司 Programmable convolver
CN1799055A (en) * 2003-04-02 2006-07-05 英特尔公司 Programmable filter

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1409850A (en) * 1999-12-10 2003-04-09 Dspc技术有限公司 Programmable convolver
CN1799055A (en) * 2003-04-02 2006-07-05 英特尔公司 Programmable filter

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