CN100580903C - Method for peeling useful layer and repeatly utilizing donor wafer, application thereof adn corresponding wafer - Google Patents
Method for peeling useful layer and repeatly utilizing donor wafer, application thereof adn corresponding wafer Download PDFInfo
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- CN100580903C CN100580903C CN200480001944A CN200480001944A CN100580903C CN 100580903 C CN100580903 C CN 100580903C CN 200480001944 A CN200480001944 A CN 200480001944A CN 200480001944 A CN200480001944 A CN 200480001944A CN 100580903 C CN100580903 C CN 100580903C
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
Abstract
Method of recycling a donor wafer (10) after having taken off a useful layer comprising a material chosen from semiconductor materials. The donor wafer (10) comprising successively a substrate (1) and a taking-off structure (I), the taking-off structure (I) before taking-off comprising the useful layer to take off; The method comprising removal of substance on the side where the taking-off took place, characterized in that the removal of substance comprises employing mechanical means so that, after removal of substance, at least a part of the taking-off structure (I') remains, this at least part of the taking-off structure (I') including at least one other useful layer that can be taken off after recycling, without a supplementary step of reforming a useful layer. The present document likewise relates to: methods of taking-off a thin layer from a donor wafer (10) which may be recycled according to the invention; donor wafer (10) which may be recycled according to the invention.
Description
Invention field
The present invention relates to reuse after the stripping semiconductor material layer donor wafer (recyclingofa donor wafer), recycling is included in a side of peeling off and removes the material that relates to a donor wafer part.
Background technology
Before peeling off, above-mentioned donor wafer comprises substrate and the to be stripped layer (the layer to be taken-off) of epitaxial deposition on substrate.
After peeling off, peel ply is most of to integrate with the structure that wherein will form assembly, particularly in microelectronics, optics or photoelectricity field.
Therefore layer to be stripped must reach according to one or more specific criterias and definite high level of quality.
The quality of layer to be stripped mainly depends on growth and supports, and that is to say, depends on the quality that it is epitaxially deposited the substrate on it.
The formation of above-mentioned high quality substrate usually is that complicated also needing noted especially, relates to the Financial cost of technological difficulties and raising.
The back is a bit further confirmed, considers by the layer of forming such as the composite semiconductor material of alloy to be stripped, and epitaxial substrate also must have and usually implements difficult and more expensive structure.
Thereby the substrate that comprises resilient coating (buffer layer) demonstrates above-mentioned performance difficulty clearly.
So-called " resilient coating " is generally understood as such as first crystal structure of support substrates with will change material property, and be compound such as structure, stoichiometry performance or surface atom, as the transition zone between second crystal structure of first function.
In a specific examples of resilient coating, the latter allows to obtain second crystal structure, and its lattice parameter is different from the lattice parameter of support substrates basically.
First technology that forms resilient coating is to realize the growth of succeeding layer so that form the structure that its composition gradually changes with thickness, and the resilient coating composition gradually change directly with it lattice parameter gradually change relevant.
The tunic or the overlapping layer (superposed layers) that are formed on the resilient coating can be peeled off from donor wafer, transfer to receive substrate to form clear and definite structure.
Transfer is formed on the formation that one of main application of the thin layer on the resilient coating relates to elastic stress silicon layer (layers of elastically stressed silicon), especially be subjected under the situation of tension stress at silicon, because improved its some performance significantly, such as the electron mobility in the material.
Other material, for example SiGe also can stand similar basically peeling off.
These tunics are transferred to the reception substrate, particularly by those skilled in the art knew, be called Smart-
Method, allow to form structure such as SeOI (Semiconductor OnInsulator, semiconductor-on-insulator).
For example, peeling off SiGe relaxation layer (an elastically relaxed layer of SiGe) afterwards, the structure that comprises peel ply that is obtained just can be used as the growth support that is in the silicon under the pulling force because of the relaxed SiGe layer.
As signal, the IBM document of L.J.Huang et al. (" shift and on the insulator of preparation SiGe to be used for high performance field effect transistors " by wafer bonding and tunic, AppliedPhysics Letters, 26/02/2001, Vol.78, No.9) describe an example of said method in, wherein provided the technology that forms the Si/SGOI structure.
Other application of growing on the resilient coating is possible, particularly for III-V family semiconductor.
Thereby usually adopt based on GaAs or based on the technology of InP and form transistor.
With regard to Electronic Performance, InP has the remarkable advantages than GaAs.
Main because of cost and feasibility, the InP peel ply that technique of choice will be obtained by growing on the resilient coating on the GaAs support substrates is transferred to the reception substrate and is formed.
Some stripping means such as the method for " eat-backing (etch back) " type, needs to destroy the remainder of support substrates and resilient coating during peeling off.
In other some stripping means, can reuse support substrates, but lose resilient coating.
The technology that forms resilient coating is complicated.
And for the density that makes crystal defect minimizes, the thickness of resilient coating is generally quite big, normally between one micron and several microns.
Thereby prepare above-mentioned resilient coating and cause implementing usually very long, very difficult and have expensive.
Disclose second technology of preparation resilient coating in file WO 00/15885 especially, its main target is with the Ge layer relaxation by Ge resilient coating stress application.
This technology is based on specific extension condition, particularly with the relating to parameters of temperature, time and chemical composition.
With respect to first technology, its main advantage is that operation is simpler, the time is shorter and cost is lower.
And, the buffering bed thickness that the final resilient coating that obtains does not form according to first technology.
B
Et al. discloses the 3rd technology that forms resilient coating, particularly is " counterfeit shape Si after hydrogen or the injection of helium ion at title
1-xGe
xThe strain relaxation of/Si (100) heterostructure is to be used for preparing virtual substrate " document of (in Nuclear and Instruments and Methods in PhysicsResearch B 175-177 (2001) 357-367).
It comes the lax elastic stress that is present in layer to be stripped to form by the dark injection (deep hydrogen or helium implantation) by hydrogen or helium.
Thereby from this viewpoint, the result that the 3rd technology provides approaches the resilient coating for preparing according to one of two technology in front, and for the requirement much less of implementing.
This method has clearly been described the lax of the SiGe layer that is in compression, and this SiGe layer is formed on the silicon substrate.
Employed technology comprises that the surface by stressor layers in the silicon substrate is injected into given depth with hydrogen or helium ion, produce to disturb in the thickness of the silicon above injection zone (this thickness just forms resilient coating) (perturbations), and cause that under heat treated situation some of SiGe layer is lax.
Than first technology that forms resilient coating, this technology seem the time short, easily implement and cost lower.
The advantage of using this technology can will relax or pseudo-flabby sheaf (pseudo-relaxedlayer) is integrated in the structure with the preparation assembly, especially for electronics or optoelectronics after being.
Yet, adopt and the similar mode of first technology that forms resilient coating, remove the resilient coating for preparing according to one of top latter two technology during after peeling off, reusing the known technology of donor wafer.
The technical difficulty of implementing still keeps.
Summary of the invention
The objective of the invention is to improve this situation, propose peeling off a kind of method that the useful layer (a useful layer comprising a materialchosen from semiconductor materials) that comprises the material that is selected from semi-conducting material reuses donor wafer afterwards according to first aspect, donor wafer comprises substrate and lift-off structure successively, lift-off structure comprises useful layer to be stripped before peeling off, this method is included in a side of peeling off and removes material, it is characterized in that removing material and comprise use mechanical means (employing mechanical means), so that after removing material, keep at least a portion of lift-off structure, at least a portion of this lift-off structure comprises other useful layer that one deck at least can be peeled off after recycling, and does not need to form again the additional step of useful layer.
According to second aspect, the present invention proposes to receive on the substrate and peel off a kind of method of this useful layer from donor wafer by useful layer is transferred to, and it is characterized in that it comprises:
(a) donor wafer is closed (bonding) to receiving substrate at a side switch of useful layer to be stripped;
(b) separate useful layer in the lift-off structure (I) be included in donor wafer;
(c) according to above-mentioned recycling process recycling donor wafer.
According to the third aspect, the present invention proposes a kind of the circulation from donor wafer and peels off the method for useful layer, it is characterized in that it comprises the series of steps of peeling off useful layer, and wherein each step is all followed the method for above-mentioned recycling.
According to fourth aspect, give chapter and verse above-mentioned circulation stripping means or of the present invention according to above-mentioned stripping means, be applied to form the structure that comprises reception substrate and useful layer, useful layer comprises at least a in the following material: SiGe, Si, its composition are selected from respectively and may make up (Al, Ga, In)-(N, P, the alloy that belongs to III-V family As).
According to the 5th aspect, the present invention proposes to provide useful layer, and the donor wafer that can reuse according to said method by peeling off, it is characterized in that it comprises substrate continuously and the remainder of the lift-off structure of useful layer is provided, it is characterized in that, after peeling off, the remainder of lift-off structure is still very thick, is enough to comprise other useful layer to be stripped of one deck at least.
Description of drawings
Read after the detailed description of the method for optimizing that following enforcement provides as non-limitative example with reference to accompanying drawing, it is more obvious that others of the present invention, purpose and advantage will become, wherein:
Fig. 1 has shown the different step of the method according to this invention, comprises continuously peeling off thin layer and reuse donor wafer after peeling off from donor wafer.
Embodiment
Main purpose of the present invention comprises for useful layer is integrated into semiconductor structure, peeling off at least one deck useful layer (promptly, the donor layer part of being stripped from) afterwards, recycling comprises the wafer of lift-off structure, implement recycling so that the remainder of lift-off structure can be after recycling peel off subsequently in useful layer is provided once more, and do not need to use the step that forms useful layer again, such as the step of epitaxial crystal growth.
Recycling should specificly comprise the suitable processing of the part degeneration that does not cause lift-off structure, comprises useful layer in the part of this lift-off structure, so that can also peel off useful layer after recycling.
In a specific structure, strippable which floor useful layer can be arranged, thereby a series of continuous several times peeling off can be arranged, will advantageously use according to recycling method of the present invention therebetween.
With reference to Fig. 1 a and 1b, donor wafer 10 comprises substrate and lift-off structure I.
In first structure of substrate 1, the latter comprises the monocrystal material with first lattice parameter.
In second structure of substrate 1, the latter is by support substrates and " pseudo-substrate (pseudo-substrate) " that constitute with buffer structure that lift-off structure I has a common boundary.
Any structure that plays the resilient coating effect is called " buffer structure ".
In the surface, it advantageously has the crystalline texture of fault of construction lax and/or that do not have significant amounts basically.
Resilient coating advantageously has at least one in following two functions:
Defect concentration in the-minimizing upper strata;
-adapt to (adaptation) at the lattice parameter that has between two crystalline textures of different lattice constants.
In order to carry out second function, resilient coating has first lattice parameter that is equal to support substrates basically at a near surface, has second lattice parameter of the lift-off structure layer I that is equal to direct covering buffer structure basically at another near surface.
In first structure of resilient coating, the latter comprises single resilient coating.
The resilient coating that is positioned on the support substrates allows to have the lattice parameter that is different from support substrates basically in its surface, thereby allows to exist on same donor wafer 10 tunic with the lattice parameter that is different from support substrates.
In some applications, resilient coating can further allow top tunic to avoid comprising highdensity defective and/or suffer bigger stress.
In some applications, resilient coating can further allow top tunic to have surface of good state (surface state).
According to first technology that forms buffer structure, form resilient coating obtaining on suitable thickness, to have the integral body lattice parameter of (overall progressive modification) that gradually changes, and obtain the transition between two lattice parameters.
Above-mentioned tunic is commonly referred to as deformation layer (metamorphic layer).
The variation of this lattice parameter can realize in the thickness at resilient coating in a continuous manner.
Perhaps can realize that each step all is the thin layer with lattice parameter of substantial constant, be different from the lattice parameter of following step, so that change lattice parameter step by step in discrete mode by " step (steps) ".
Can also have more complicated form, such as change the counter-rotating of composition, speed symbol or the discontinuous jump of composition with variable speed.
The variation of lattice parameter can be by from support substrates in the resilient coating, increases the concentration that is not included at least a atomic element in the support substrates basically gradually and favourable obtaining.
Thereby for example, the resilient coating that is formed on the support substrates of homogenous material (unitary material) can be binary, ternary, quaternary or more polynary material.By on support substrates, growing,, and advantageously generate resilient coating for example by using extension such as the known technology of CVD and MBE (being respectively the abbreviation of " chemical vapour deposition (CVD) " and " molecular beam epitaxy ").
Usually, in order to obtain, for example, the resilient coating that is made of the alloy of different atomic elements can form resilient coating by any other known method.
If necessary, before forming resilient coating, can carry out the little step of the support substrates of surface finish (surface finishing) below resilient coating, for example polish by CMP.
In another structure, the resilient coating that forms by first technology be included in by resilient coating (basically with first construct identical) and the buffer structure formed of extra play (additional layer) in.
Extra play can be between support substrates and resilient coating, perhaps on resilient coating.
Under first particular case, extra play constitutes second resilient coating, such as the resilient coating that allows restriction (confined) defective, thereby has improved the crystal mass that is formed on the lift-off structure I on the buffer structure.
Extra play is a semi-conducting material, preferably has constant material composition.
So selected composition of above-mentioned extra play to be formed and thickness are the standards that obtains the particular importance of this performance.
Thereby for example, the fault of construction in the epitaxial loayer little by little reduces in the thickness of this tunic usually.
Under second particular case, extra play is positioned on the resilient coating and has the constant composition of flaccid material.
Thereby can fix second lattice parameter.
Extra play also can have several functions, such as the function that is selected from last two particular cases.
In a kind of favourable structure, extra play is positioned on the resilient coating, and its lattice parameter is different from the lattice parameter of support substrates basically.
Under a particular case of this favorable structure, extra play is by the lax material of resilient coating.
By on resilient coating, growing, for example pass through the extension of CVD or MBE, and advantageously generate extra play.
In first embodiment, after the resilient coating below forming, directly the growth of extra play is finished in original place (in situ), and in this case, resilient coating also advantageously generates by the tunic growth.
In a second embodiment, below surface finish slightly, after the step of resilient coating,, realize the growth of extra play for example by CMP polishing, heat treatment or other smooth technology.
Form second technology of buffer structureBased on the technology that tunic superficiality ground (superficially) is deposited on the support substrates, the name of this superficial layer (nominal) lattice parameter is different from the lattice parameter of the adjacent material on support substrates surface basically.
This deposition of superficial layer makes the tunic that is deposited almost not have the plasticity defective (plastic defects) such as dislocation.
Form this superficial layer so that when finishing, have:
-the first that contacts with support substrates, the plasticity defective of its restriction such as dislocation and
-second portion, lax or pseudo-lax by first, and do not have or almost do not have the plasticity defective.
So resilient coating plays in the first of the superficial layer that is deposited, because:
Its restriction plasticity defective is to keep the second portion of superficial layer; And
It makes the lattice parameter of the lattice parameter adaptation substrate of superficial layer.
So-called " restriction " is meant and finds most plasticity defectives in first.The second portion of superficial layer does not definitely have defective, but their concentration and microelectronic applications are compatible.
Variations in temperature and chemical composition change (variations in the temperature and chemical compositiontimes of the deposition) when the deposition technique that is used to form above-mentioned resilient coating advantageously comprises deposition.
Thereby can successfully form resilient coating with chemical composition of substantial constant on thickness, opposite with the resilient coating that forms according to first technology.
Yet, can between the second portion of resilient coating and superficial layer, insert one or more tunics.
And the thickness of resilient coating can be less than the minimum thickness of the resilient coating that forms by first technology.
Document WO 00/15885 has provided the example that forms above-mentioned resilient coating according to a last technology, carries out the deposition of SiGe or Ge on the single crystalline Si support substrates.
For example, also can realize above-mentioned deposition process by using following steps in the mode of deposition monocrystalline Ge on the single crystalline Si support substrates:
With the temperature stabilization of monocrystalline silicon support substrates the first predetermined stable temperature, preferred 430 ℃ to 460 ℃ at 400 ℃ to 500 ℃;
Carry out the chemical vapor deposition (CVD) of Ge under described first definite temperature, up to the basic unit (base layer) that obtains Ge on support substrates, its predetermined thickness is less than desired final thickness;
The chemical vapor deposited temperature of Ge is brought up to the second predetermined temperature from 750 ℃ to 850 ℃ of variations from the first predetermined temperature, preferred 800 ℃ to 850 ℃; With
Under described predetermined second temperature, proceed the chemical vapor deposition of Ge, obtain desired final thickness up to the superficial layer of monocrystalline Ge.
Resilient coating is to contact with support substrates and extend in the part of crystal defect rate greater than the sedimentary deposit on the thickness of limiting value.
The thickness of above-mentioned resilient coating particularly can be 0.5 to 1 micron rank, less than the thickness of the resilient coating that forms according to first technology.
Another part of this tunic is the part of lift-off structure I at least.
Above-mentioned deposition process can realize according to the replacement method equally-for example, and document WO 00/15885 disclosed method.
Adopt this method to form the substrate 1 of donor wafer 10, substrate 1 comprises described support substrates and described resilient coating.
Form the 3rd technology of buffer structureThe structure that is used to comprise substrate 1 and has been deposited on the tunic on the substrate 1.
The material of selected this tunic of formation, its nominal lattice parameter is different from the lattice parameter on the surface of substrate 1 basically, so that it is subjected to the elasticity compression or the tension stress of substrate 1.
Stressor layers has the general structure of stress material, but also can comprise one or more thickness of lax or pseudo-flaccid material, and its cumulative thickness is much smaller than stressor layers, so that stressor layers keeps total stress state.
In all cases, by crystal growth, such as the extension of using known technology, for example CVD and MBE advantageously generate stressor layers on substrate 1.
In order to obtain not have the above-mentioned stressor layers of too many crystal defect, point defect or for example such as the extended defect of dislocation, select to constitute the crystalline material of substrate 1 and stressor layers (at the near interface of it and substrate 1), so that they demonstrate enough little difference between the first and second nominal lattice parameters separately, this is favourable.
For example, this species diversity of lattice parameter typically is included between about 0.5% and about 1.5%, but can also have bigger value.
For example, in IV-V family material, Ge has the nominal lattice parameter than Si big about 4.2%, thereby the SiGe that contains 30%Ge has the nominal lattice parameter than Si big about 1.15%.
On the other hand, stressor layers preferably has the thickness of substantial constant, so as it have the intrinsic property of substantial constant and/or help after be bonded to and receive substrate (shown in Fig. 1 b).
Internal stress lax for fear of stressor layers or plasticity (plastic) type occurs, and the thickness of above-mentioned tunic should also keep the critical thickness less than elastic stress.
The critical thickness of elastic stress depend primarily on selected formation stressor layers main material and with substrate 1 in the described difference aspect the lattice parameter.
Those skilled in the art can consult state-of-the art to obtain the critical thickness value of elastic stress, is used to form the stressor layers on substrate 1 material.
In case form, stressor layers just has the lattice parameter that approaches its growth substrates 1 basically, thereby has the elasticity internal stress that is in compression or stretches.
In case form this structure, the 3rd technology that forms buffer structure is included in the first step of given depth formation interference range (perturbation zone) in the substrate 1.
Interference range is defined as the zone with the internal stress that can partly form the structure interference around.
Basically on the whole surface of substrate 1 and be parallel to the surface of substrate 1 and advantageously generate interference range.
The method that forms above-mentioned embrittlement district (embrittlement zone) comprises that given injection energy and the described given depth of given dose in substrate 1 with atomic species inject atomic species.
At a specific embodiment that injects, the atomic species that is injected comprises hydrogen and/or helium.
The above-mentioned interference range that forms by injection thereby comprise the internal stress of being injected by lattice network that atomic species caused, and even crystal defect in the near-by interference district.
So these internal stresss can be disturbed in superincumbent region generating crystallization.
For this purpose, during carrying out second step, form buffering area according to the 3rd technology, by adjusting to the suitable energy supply of suitable parameters, to be used for:
Disturbing appears in the zone of help on interference range;
Be increased in the degree of disturbing in the upper zone; And
The relative resilient at least that causes stressor layers after interference occurring is lax.
Thereby the main purpose of above-mentioned energy supply is cause the stressor layers elastic stress lax at least relatively to form the relaxed stress layer.
Be included in the interference range of substrate 1 and the mesozone between the stressor layers:
The defective of restriction dislocation type;
Make the nominal lattice parameter of the lattice parameter adaptation stressor layers of substrate 1.
Therefore above-mentioned here mesozone can be considered resilient coating.
Advantageously heat-treat, if parameter is suitable, to produce the above-mentioned energy supply that is enough to cause structural change.
Basically advantageously carry out described heat treatment during the subcritical temperature in temperature, surpass the injection atomic species degased (degassed) that critical temperature then has a myriad of.
Internal stress from interference range begins, so produce local-crystalized interference.
Particularly because the elastic energy in the stressor layers zone has minimized, these interference mainly appear in the resilient coating and increasing degree (amplitude) under heat treated influence.
When these interference become enough big, they act on the stressor layers, at least relatively the lax elastic stress there, these relaxed stress mainly are the lattice misfit stress (lattice misfit stresses) between the nominal separately lattice parameter of stressor layers material and substrate 1 material.
Yet the lax appearance that also can be accompanied by the non-resilient type crystals defective in described tunic thickness of stressor layers is such as horizontal dislocation (traversing dislocations).
Thereby can carry out suitable processing, such as heat treatment, to reduce the quantity of these defectives.
Can utilize suitable processing, for example, allow to increase dislocation density and be included between two limiting values up to it, this limiting value has defined the dislocation density interval (interval) that at least a portion dislocation is wherein buried in oblivion (annihilated).
In any case final the acquisition relaxes or pseudo-flabby sheaf, its nominal lattice parameter is different from the nominal lattice parameter of growth substrates 1 basically, and has form the disadvantageous a small amount of dislocation of micromodule in the relaxed stress layer.
Should be lax or pseudo-flabby sheaf can constitute at least a portion of lift-off structure I.
For more details, can be with reference to B.
Et al., particularly title are " counterfeit shape Si after hydrogen or the injection of helium ion
1-xGe
xThe strain relaxation of/Si (100) heterostructure is to be used to prepare virtual substrate " document of (in Nuclear and Instruments and Methods in PhysicsResearch B 175-177 (2001) 357-367).
The resilient coating for preparing by the 3rd technology that forms buffer structure is in being included in substrate 1, as defined previously in the 3rd technology of implementing to form resilient coating.
Form the 4th technology of buffer structureBased on the support substrates of buffer structure to be formed, its surface is (in relief) clearly; And the deposition of element on support substrates that constitutes buffer structure.
Suppose the air spots of support substrates, the deposition that constitutes the element of buffer structure is just carried out to have selective growth effect (selective growth effects) and the part anisotropy mode of (local coalescences) of gathering partially, and the buffer structure of giving formation is with specific performance properties.
In order to make the lift-off structure I that is formed on the buffer structure have high-quality intrinsic structure, the cubic formula that forms buffer structure implement specific technology and parameter so that the performance that resilient coating obtains corresponding to the limiting performance of crystal defect.
Selection to support substrates profile (topography) is to obtain one of key data of The above results.
Especially, preferably on the whole surface of support substrates, has the profile that periodically repeats pattern, with its homogenizing that influences to the whole surface of wafer.
For example, support substrates can demonstrate by giving set a distance band (bands) at interval.
For above-mentioned band profile and under some sedimentary condition, might be near band, particularly the corner of band is successfully concentrated the dislocation of epitaxial loayer.
Form resilient coating so concentrated the thickness of the tunic of most of dislocation.
For the surface topography of this particular support substrate, the band of periodic intervals promptly arranged on the whole surface of support substrates, band advantageously is made of the insulating material that is formed on the substrate, thus after having constituted with the mask of the material of deposition.
In addition, can between solid substrate and swap structure (relief structure), insert the intermediate layer of crystalline material, with the growth substrates as resilient coating, the swap structure of insulation is enough thin and be unlikely to disturb the buffer structure continued growth on the growth substrates in its lower section.
This technology is also referred to as horizontal extension undue growth (epitaxial lateral overgrowth), perhaps " ELOG ", be mainly used in by MOCVD (Metal Organic Chemical VaporDeposition, metal organic chemical vapor deposition) extension and come the depositing nitride film.
For example, the Bulletin of the " Materials Research Community " of May1998, Volume 23, No.5, title at Shuji Nakamura is in the paper of " the budget life-span surpasses 10; 000 hour InGaN/GaN/AlGaN-based laser diode ", wherein specific the description at SiO
2Growing GaN on the banded structure can be used as the basis.
Below this document, in example 9, will the GaN structure that form according to the 4th technology that forms buffer structure by ELOG be described.
Regardless of the structure construction (comprising or do not comprise buffer structure) of substrate 1, described structure is made of crystalline material at the interface zone with lift-off structure I, demonstrates seldom or does not have a crystal defect.
By growth on substrate 1, for example,, and advantageously generate at least a portion of the different tunics that constitute lift-off structure I by the extension of CVD or MBE.
In first embodiment, the growth of at least a portion of these tunics is carried out in the original place, directly then lays respectively at the formation of the tunic below them, and in this case, these tunics also advantageously generate by the tunic growth.
In a second embodiment, after the little step of the tunic below surface finish lays respectively at them, for example, carry out the growth of at least a portion of these tunics by CMP polishing, heat treatment or other smooth treatment.
The final lift-off structure I that obtains to comprise the crystalline material tunic.
Before recycling, this lift-off structure I comprises the thickness that is equal to, or greater than at least two useful layer.
Yet, lift-off structure I very advantageously has the thickness greater than two useful layer, so that itself is not subject to processing the influence of the thickness of the material of removing in the process, these processing procedures are carried out during reusing, the defective that is when peeling off useful layer when removing the overwhelming majority to be generated.
Really, after peeling off, usually find inhomogeneous, the fault of construction of coarse, thickness and/or the defective of other type, as the structure I after peeling off in the surface of donor wafer 10 ' in (referring to Fig. 1 c) that run into.
For example, after peeling off, outstanding (projecting) and/or coarse part appear in meeting in the zone of the stripper surface of residual donor wafer 10.
Appearing at the lip-deep surface of lift-off structure I adjusts part and depends primarily on the mode peeled off and the lift-off technology of use.
Thereby for example, a kind of the peeling off that is used for industry at present comprise not on the whole surface of donor wafer 10 and only peel off useful layer from its part (being part placed in the middle basically usually), and stay ledge on the surface of donor wafer 10.(monolithic) that these ledges are normally whole also is positioned on the peripheral surface of donor wafer 10, thereby claims that in industry this cover ledge is " peeling off crown (taking-off crown) ".
Thereby, for example, such as the known lift-off technology that hereinafter will study, all Smart-as already mentioned
Technology causes rough surface sometimes.
Thereby the thickness that should have of the lift-off structure I before peeling off is the thickness of at least two useful layer to be separated and is equal to, or greater than thickness (thickness margin) more than needed corresponding to the minimal material that will remove during reusing.
Thereby, at Smart-
Under the situation of the peeling off of type (discussing hereinafter) recycling afterwards, this thickness is more than needed usually 1 micron rank.
Yet by using the effective recycling technology such as selective chemical etching (selective chemical etching), it is more than needed to reduce this thickness.
The main processing of carrying out during reusing according to the present invention is the processing of removing material, and to keep the part of lift-off structure I, the part of this lift-off structure I comprises another strippable useful layer after recycling at least.
Removing on donor wafer 10 of material carried out, that is, and and in the Free Surface zone of the lift-off structure I that after peeling off, still keeps.
In background of the present invention, removing of any material comprises the mechanical means (such as polishing or grinding (lapping)) that is used to remove material.
This processing can be carried out from the teeth outwards, and be used to remove useful layer from the top layer part (superficial portion) of its lift-off structure I that peels off, particularly allow to remove the skin depth that is included in the blemish that occurs during peeling off, disturb such as the crystallization of dislocation or point defect type.
Be arranged in the more particular case of depths of lift-off structure I thickness for the defective of using that lift-off technology produced, this processing can advantageously deeply be carried out.
At present employed mechanical means by the polishing type is removed the technology of material by forming at rubbing head (polishing head) with around placing donor wafer 10 between the polishing plate (polishing plate) of driving shaft rotation.
Rubbing head is parallel with polishing plate first type surface separately basically.
The power that is applied to rubbing head relies on donor wafer 10 upper surface of plate.
So donor wafer 10 causes friction with respect to rotatablely moving of plate on a surface of donor wafer 10, thereby polishes this surface.
In an optimal way, polish homogenizing best in order to make, rubbing head moves along given path on the upper surface of polishing plate together with donor wafer 10.For example, this motion can be along the reciprocal translational motion or spiral helicine the moving of giving dead axle.
Polishing plate is advantageously covered by the material that texture or braiding are arranged (a textured or woven material).
Can advantageously inject polishing fluid, can lubricate the abrasive action of plate on donor wafer.
After polishing, can carry out back polished and cleaned (post-polishingcleaning) to wafer surface, use the deionized water of injection usually.
Between polishing and cleaning, can carry out back polishing flushing (post-polishing rinsing), the common solution that comprises suitable surfactant with injection.The main effect of surfactant is to disperse the remainder particulate (residualparticles) can continue to corrode slice surface to greatest extent in flushing liquor, therefore reduce they from the teeth outwards deposition and allow they find time (evacuation).
Advantageously inject one or more solution, so as the fabric of overlay is wetting, thereby solution is distributed in best on the whole surface of donor wafer 10.
In first embodiment of plate, the described function of polishing, flushing and clean plate is only undertaken by a plate.
But, preferably have the device of several plates in order to improve the productivity ratio of entire method:
In second embodiment of plate, finish the polishing function by polishing plate, and finish the function of flushing and cleaning by a plate that is called the flush/clear plate.This embodiment will polish from flush/clear and separate, because the plate that is used to wash still can not glue any particulate residue (particulate residues) onboard, thereby improve the quality of flushing.
In the 3rd embodiment of plate, polishing plate, flushing plate and clean plate are independent plates.With respect to second embodiment, this embodiment will clean with flushing and separate, because the plate that is used to clean still can not be bonded at any particulate residue on the flushing plate, thereby improve the final cleannes of slice surface.
Except that polishing, can introduce such as the abrasive particle of silicon dioxide (silica) particle to improve erosion (attack) to material.
Except that polishing, can introduce chemical reagent chemical erosion and the mechanical erosion of being realized by polishing plate are taken place simultaneously.
An advantageous embodiments of removing material from donor wafer 10, used the mechanical-chemical planarization (mechano-chemical planarization) that is called CMP, its principle is the polishing fluid that compiles the polished surface of polishing plate and comprise abrasive particle and chemical erosion reagent.
Except that mechanical polishing, polishing fluid is realized chemical etching by corroding reagent and the mechanical etching by abrasive particle to the polished surface of donor wafer 10 is common.
After removing material, can wash and/or clean the burnishing surface of donor wafer 10 once more.
Flushing not only is used as and removes residue and abrasive polishing particle quickly when should be noted that some, and plays chemical polishing.
Really, if the pH that employed chemical erosion reagent has alkalescence during polishing, by would adding normally acid surfactant to will help to stop fast polishing fluid in the polishing fluid chemical action.
For some semi-conducting material such as silicon, chemical action is than mechanism take advantage (employed grit size is less during the surface finish of above-mentioned semi-conducting material).
Use the above-mentioned flushing of acid surfactant, especially the material to mentioning in the epimere makes polishing action can significantly stop and making its may command that influences to section.Like this, thus can guarantee and can repeat the back polishing thickness.
Can so obtain control that polishing is stopped, and to removing the more accurate control of thickness.
In addition, the injection gradually (progressive injection) of preferred flushing liquor: injection will cause the pH of polishing fluid to reduce rapidly too soon, and under some situation such as the semi-conducting material of silicon, can cause grit size because of cohesion (agglomeration) increases, have the risk that frays that causes because of the larger particle cohesion thus.
Comprise in the tunic for the treatment of planarization to small part under the situation of silicon, provide an embodiment who uses the planarization tunic here.
The solution that is suitable for polished silicon is alkaline solution normally, and pH is between 7 and 10, preferably between 8 and 10, so chemical reagent is preferably such as the nitrogenous base (a nitrogenous base such asammonia) of ammonia.
The abrasive particle grain sizes is in the silicon dioxide molecules of 1/10th micron levels.
If decision flushing, employed surfactant with preferred pH between 3 and 5, and even about 4, about 0.1% or lower CMC (Critical Micellar Concentration, critical micelle concentration).
The time of rinsing step is advantageously in 50% rank of polishing time.
Quantity these machineries or the mechanical-chemical method is removed material for control in background of the present invention is particularly favourable with at least a portion that allows to keep lift-off structure I.
Usually can comprise any mechanical means that is used for erosion material but remove material, for example grind or bombard with atomic species from donor wafer 10.
If necessary, before removing material, can make further smooth heat treatment of surface to be removed.
With reference to Fig. 1 c, that a part of reference symbol that original buffer structure still keeps after removing material is I '.
At first and in some cases, preferably during the first recycling step, take place in the zone that material removes the surface state of donor wafer 10 to be polished, so that remove during material is removed, can occur any coarse.
For this purpose, for example, will heat-treat.
Provided the example of a whole stripping means of signal with reference to 1a-1d, this whole stripping means comprises to be peeled off thin layer and reuse donor wafer 10 after recycling.
With reference to Fig. 1 a also as previously mentioned, lift-off structure I has the thickness more than or equal to two useful layer.
Fig. 1 b and 1c have illustrated a kind of thin layer stripping means.
The of the present invention first preferred strip step is by generating the embrittlement district realizing the separation of back in lift-off structure I, thereby peels off desired tunic and form.
Provide several technology that can be used for producing above-mentioned embrittlement district at this:
First technology is called as Smart-
Be (all can find its explanation in relevant many works of wafer reduction) that those skilled in the art understands, comprise, in its first step, inject atomic species (such as hydrogen ion) to produce the embrittlement district with given energy.
Second technology is by forming fragility interface (fragileinterface) and form by producing at least one porous layer, for example, and as described in document EP-A-0849788.
With reference to Fig. 1 b, relate to second step that thin layer peels off by receiving the surface composition that substrate 2 is applied to donor wafer 10.
Receive substrate 2 and constitute a mechanical support, enough rigidity to be supporting second tunic 3 that its part will be peeled off from donor wafer 10, and protect it not to be subjected to possible mechanical stress from the outside.
Receiving substrate 2 can be, for example, and the material of silicon, quartz, sapphire, SiC or another kind of type.
Receiving applying of substrate 2 is by it being contacted and produce bonding closely with lift-off structure I, wherein advantageously generate molecular adhesion (molecularadhesion) between substrate 2 and lift-off structure I.
At Q.Y.Tong, U.
And Wiley writes, title has been described this bonding techniques and replacement technology especially in the document of " semiconductor wafer bonding " (Science and Technology, Interscience Technology).
If necessary, bonding is accompanied by suitable preliminary treatment and/or the supply heat energy and/or the auxiliary bonding reagent of preparation on each surface for the treatment of bonding.
Thereby, for example, during bonding or the heat treatment of carrying out afterwards can make bonding firm.Also can such as silicon dioxide, control bonding by being inserted in lift-off structure I and receiving the bonded layer that also can strengthen molecular linkage between the substrate 2 especially.
Advantageously, constitute to receive substrate 2 bonding surface material and/or if necessary the material of formed bonded layer be electric insulation, to begin to form the SeOI structure from peel ply, so the semiconductor layer of SeOI structure is the released part (that is useful layer) of lift-off structure I.
In case bonding reception substrate 2, with regard in the zone in the embrittlement district that formerly forms by realizing separating the part of removing donor wafer 10.
At the described first technology (Smart-
) situation under, in second step, make injection region (form embrittlement district) be subjected to heat and/or mechanical treatment, other energy perhaps is provided, separate in the zone in embrittlement district, realizing.
Under the situation of described second technology, make the embrittlement floor be subjected to the supply of mechanical treatment or other energy and separate in the zone in embrittlement district, realizing.
The major part that allows to remove wafer 10 according to the separation in the zone in embrittlement district of one of these two kinds of technology is to obtain to comprise the lift-off structure I remainder (thereby representing useful layer here) peeled off, possible bonded layer and to receive the structure of substrate 2.
The lift-off structure that still keeps after back lift-off structure (post-taking-off structure) I ' is formed in and peels off that part of, and entire wafer form donor wafer 10 ', will send to recycling so that reuse later on during the peeling off of tunic afterwards.
Fig. 1 d shown above-mentioned donor wafer 10 ' the result of recycling.
According to one of those technology of above having discussed, back lift-off structure I ' is carried out machinery or mechanical-chemical erosion, to remove the part of back lift-off structure I '.
Here also can implement to remove several technology of material,, for example, use continuous erosion by CMP and simple polishing if particularly back lift-off structure I ' comprises several tunics of separate sources by different mechanical means.
To before the mechanical erosion of material and/or can carry out surface treatment afterwards, such as chemical etching, heat treatment or smooth.
With reference to Fig. 1 d, " identical with lift-off structure I basically, the thickness of its minimizing approaches the average thickness of tunic of being peeled off and the material of being removed to the lift-off structure I that is obtained after recycling during reusing.According to the present invention, this thickness is enough to comprise a strippable useful layer.
During the peeling off afterwards, provide the useful layer of peeling off in the donor wafer 10 " so being suitable for " at lift-off structure I, and without any need for other additional step, such as the step of crystal growth.
In the particular configuration of the donor wafer 10 before peeling off, described wafer comprises a plurality of strippable useful layer.
In this particular configuration, for lift-off structure I according to the present invention, wherein can between recycling step according to the present invention, peel off several useful layer, under favourable background, use the round-robin method of peeling off useful layer according to the present invention from donor wafer 10, repeat in succession simultaneously:
Stripping process and
According to recycling process of the present invention.
Before implementing the circulation stripping process, available above described one or more technology that form thin layer on substrate 1 are carried out the process of donor wafer 10 formed according to the present invention.
According to the present invention, from donor wafer 10, peel off several times the same structure I on being formed on substrate 1, and the processing that needn't form auxiliary layer there and/or needn't be used to recover at least a portion of substrate 1, this possibility allows to win the enforcement time of whole stripping means, be easier to implement this method, and than the Financial cost that distinct methods improved of prior art basically still less.
Carry out in lift-off structure I after the peeling off and reuse of certain number of times, the number of times of peeling off is the function of lift-off structure I thickness particularly, and remaining lift-off structure I is no longer enough thick in to comprise useful layer to be stripped.
So donor wafer 10 only is made of substrate 1.
Under first situation, abandon donor wafer 10, so lose entire substrate 1, substrate 1 may be complicated, manufacturing time is long and cost is high, particularly comprises under the situation of buffer structure at substrate 1.
Under the second more favourable situation,, recover the part of substrate 1 at least by implementing the method for recycling.
Comprise at substrate 1 under the situation of buffer structure, can carry out three types recycling substrate 1:
-recycling comprises removes whole buffer structure, but allows to keep at least a portion that is formed with the support substrates of buffer structure on it; This reuses that part of of the substrate 1 that formation is the most difficult and cost is the most expensive usually of loss always; And be necessary to implement to form again the additional step of buffer structure, if desired, for example, form the substrate 1 that is equal to before the recycling again;
-recycling comprises a part of removing buffer structure, and allows to keep on it and be formed with the support substrates of buffer structure and the part of buffer structure, such as the expensive resilient coating of preparation; During reusing, can carry out, for example and advantageously, remove material by the selectivity that the stop layer that is positioned at buffer structure advisably (stop layer) is stopped; If desired, can advantageously implement to form again the additional step of buffer structure especially, be equal to recycling substrate 1 before to form again;
-recycling comprises at least a portion of removing original lift-off structure I remainder, and allows to keep entire substrate 1; During reusing, can carry out the step (for example by CMP, heat treatment, sacrificial oxidation, bombardment or other smooth technology) of the remaining part of surface finish lift-off structure I and/or carry out removing material by the selectivity that stop layer stops, for example, stop layer is advisably between lift-off structure I and substrate 1;
After recycling substrate 1, so form new lift-off structure I again, peelable several useful layer of a method according to the present present invention wherein.
New lift-off structure I can be equal to basically the recycling before.
By changing some parameter that forms a little, the new structure that lift-off structure I had can be different from the lift-off structure I before the recycling slightly.For example, can change some compound concentrations in the material a little.
In any case, advantageously generate lift-off structure by the tunic growth, for example by CVD or MBE extension.
Under first situation, the growth that is included at least one tunic among the lift-off structure I is that the original place forms, and directly after the supporting layer below forming, in this case, following supporting layer also advantageously forms by the tunic growth.
Under second situation, after the little step that growth below surface finish is supported, carry out at least one growth of these tunics, for example by CMP polishing, heat treatment or other smooth technology.
At this document hereinafter, we have provided the example of the structure of donor wafer 10, and donor wafer 10 comprises the structure I with several tunics, and can use by the method according to this invention.
Specifically, we will provide the material that can be advantageously used in above-mentioned donor wafer 10.
For the example of some detailed description, substrate 1 comprises buffer structure and support substrates, and buffer structure is formed on the support substrates.
In the example that relates to, so buffer structure has first lattice constant and has second lattice constant at the near interface with top lift-off structure I in its support substrates zone.
Above-mentioned buffer structure comprises the resilient coating of the above-mentioned adaptation that allows to carry out lattice constant.
Form first method of buffer structure (as indicated above), the most frequently used resilient coating that obtains to have this performance is to have the resilient coating that comprises several atomic elements, and described several atomic elements comprise:
At least a atomic element of in the composition of support substrates, finding and
At least a atomic element that in support substrates, do not find or that almost do not find, and its concentration gradually changes in the thickness of resilient coating.
The gradient concentration of this element in resilient coating will be the main cause that lattice constant gradually changes in the mode (in a metamorphic manner) that changes structure in resilient coating.
Thereby in this structure, resilient coating mainly is an alloy.
The atomic element of selecting for the composition of buffering support substrates of substrate and resilient coating can be an IV same clan type, such as Si or Ge.
For example, in this case, Si support substrates and SiGe resilient coating can be arranged, the concentration of Ge gradually changes with thickness, approaches 0 in its value at the interface with support substrates, and is a specific value on the another side of resilient coating.
Shown in another situation under, the composition of support substrates and/or resilient coating can comprise a pair of atomic element of III-V family, may make up such as being selected from (Al, Ga, In)-(N, P, a pair of in As).
For example, in this case, AsGa support substrates and the resilient coating that comprises As and/or Ga and at least a other element can be arranged, this other element gradually changes with thickness, approach 0 in its value at the interface, and be a specific value on the another side of resilient coating with support substrates.
The composition of support substrates and/or resilient coating can comprise a pair of atomic element of II-VI family, may make up such as being selected from (Zn, Cd)-(S, Se, a pair of in Te).
Below we provide several examples of above-mentioned structure:
First three example is particularly related to the donor wafer 10 of other tunic that comprises Si substrate 1 and SiGe resilient coating and Si and SiGe.
These wafers 10 are in that to peel off SiGe tunic and/or stress Si tunic particularly useful under with the situation that forms SGOI, SOI or Si/SGOl structure.
Below we provide several examples of above-mentioned structure:
Example 1: donor wafer 10 is made of following:
-substrate 1, it is made of following:
√ Si support substrates
√ comprises resilient coating and extra play according to the SiGe buffer structure that first technology of described formation buffer structure forms;
-comprise SiGe and lift-off structure I that may one or more thin elastic stress Si layers.
Resilient coating preferably has the Ge concentration that increases gradually from the interface with support substrates, so that the lattice parameter of SiGe changes by above explanation.
Thickness is generally comprised between 1 and 3 micron, and obtaining good structural relaxation on the surface, and the restriction defective relevant with lattice parameter difference is so that imbed them.
Extra play is SiGe, and is lax by resilient coating basically, advantageously has uniform Ge concentration, is equal at the resilient coating of their near interfaces basically.
Germanium concentration in the silicon in lax SiGe layer is generally comprised between 15% and 30%.
The typical limitations of present technique is represented in this restriction of 30%, but can change in the coming year.
The thickness of extra play can according to circumstances and greatly change, and thickness is generally comprised between 0.5 and 1 micron.
Example 2: donor wafer 10 is made of following:
-substrate 1, it is made of following:
√ Si support substrates;
√ comprises the buffer structure that first technology of the buffer structure of SiGe resilient coating and Ge extra play forms according to described formation;
-before peeling off, comprise the lift-off structure I of AsGa and/or AlGaAs.
Resilient coating preferably has the Ge concentration that increases gradually from the interface with support substrates, so that lattice parameter changes between the lattice parameter of the lattice parameter of Si support substrates and Ge extra play.
For this purpose, the Ge concentration in the resilient coating is from about 0 to about 100%, or more accurately about 98% and change, to meet the lattice of two kinds of materials in theory fully.
Example 3: donor wafer 10 is made of following:
-the substrate 1 that constitutes by Si;
-before peeling off, comprise Si and lift-off structure I that may one or more thin elastic stress SiGe layers.
Example 4: donor wafer 10 is made of following:
-substrate 1, it is made of following:
√ Si support substrates;
√ according to above discussed and by the resilient coating that document WO 00/15885 disclosed described second particular technology that forms buffer structure forms, that is, constitute by following:
■ according to above discussed and deposit first tunic of Ge or SiGe by document WO 00/15885 disclosed described second particular technology that forms buffer structure,
■ may deposit optional second tunic that can improve upper layer membrane crystallization quality subsequently, and as document WO 00/15885 was disclosed, second tunic was:
о SiGe (50/50) is under the situation of Ge at first tunic of resilient coating;
о stress Si is under the situation of SiGe at first tunic of resilient coating;
√ comprises lift-off structure I at least a among following material: Ge, SiGe, the Si.
Peeling off among the lift-off structure I can relate to one group of tunic or tunic of lift-off structure I.
Should note not having the defective of dislocation type according to the structure that this example is obtained after peeling off, even in imbedding the zone.
So this structure that is obtained is used in epitaxial growth auxiliary layer on SiGe, Ge or the Si tunic, for example stress silicon.
Example 5: donor wafer 10 is made of following:
-substrate 1, it comprises:
√ Si support substrates;
The Si resilient coating that √ forms according to the 3rd technology of described formation buffer structure;
√ comprises at least a lift-off structure I among following material: SiGe, the Si.
This donor wafer 10 is the wafers that obtained after the 3rd technology according to described formation buffer structure forms resilient coating.
In first embodiment of resilient coating, before forming resilient coating, just there is lift-off structure I.
Lift-off structure before peeling off advantageously has less than about 10
7Cm
-2Defect concentration, such as dislocation.
For SiGe lift-off structure with have the SiGe lift-off structure of 30%Ge with 15%Ge, its typical thickness before peeling off is respectively about 250nm and about 100nm, thereby remains under the final critical thickness of they elastic stresses separately (final critical thicknesses of elastic stress).
According to what above seen, form resilient coating according to two key steps:
Form interference region by the atomic species of injection such as H or He in Si support substrates 1;
Heat treatment is to cause the lax relatively of elastic stress at least in lift-off structure.
During first step, the injection energy range of employed H or He typically 12 and 25keV between.
H that is injected or the dosage of He are typically 10
14With 10
17Cm
-2Between.
So the injection degree of depth of atomic species is typically between about 50nm and 100nm in the substrate 1.
Should be suitable for increasing significantly amount of interference and amplitude in the zone between interference region and lift-off structure in the heat treatment of carrying out during second step.
Produce the zone of disturbing and to form described resilient coating.
Coming across of dislocation is to cause that the integral body of lift-off structure is lax in the resilient coating.
Preferably under inert atmosphere, heat-treat.
Yet, can under another atmosphere, heat-treat, for example oxidizing atmosphere.
Thereby the specific heat treatment that such donor wafer 10 is carried out is carried out under the temperature between 400 ℃ and 1,000 ℃ typically, its time between 30 seconds and 60 minutes, more precisely about 5 minutes to about 15 minutes.
In second embodiment of resilient coating, before forming resilient coating, there is not buffer structure I, so donor wafer advantageously occurs with following form:
-Si substrate 1;
-having the SiGe layer of 15%Ge at least, SiGe has been applied in elastic stress.
The technology of relaxed SiGe layer and parameter be identical with first embodiment of resilient coating basically.
After forming resilient coating, the tunic that constitutes lift-off structure I comprises whole flabby sheaf or a whole set of tunic.
Therefore lift-off structure I is formed on after the resilient coating, opposite with first embodiment that proposes in this example.
About the more details of above-mentioned experimental technique, with reference to B.
The research that et al. does particularly is " counterfeit shape Si after hydrogen or the injection of helium ion at title
1-xGe
xThe strain relaxation of/Si (100) heterostructure is to be used for preparing virtual substrate " document of (in Nuclear and Instruments andMethods in Physics Research B 175-177 (2001) 357-367).
Example 6: donor wafer 10 is made of following:
-substrate 1, it is made of following:
The √ support substrates, itself and above comprise an AsGa part at least in the interface zone of buffer structure;
The buffer structure of the III-V family material that √ forms according to first technology of described formation buffer structure;
-before peeling off, comprise the lift-off structure I of III-V family material.
The main purpose of this buffer structure is the lattice parameter (its nominal value is about 5.65 dusts) that the lattice parameter (for example, under the situation of InP, nominal value is about 5.87 dusts) that makes the lift-off structure I material of their near interfaces adapts to AsGa.
In solid-state III-V family material, appearance is to the actual interest of above-mentioned buffer structure, for example, is because to the comparison such as the different materials of solid InP and solid AsGa, for example, InP compares with solid, and solid AsGa is more cheap, easier acquisition on semi-conductor market, mechanical equivalent of light fragility is littler, implemented back side contact technique (rear face contact technologies), and size bigger (typically being 6 inches, then is 4 inches for solid InP).
Yet the Electronic Performance of InP generally surpasses AsGa's.
Thereby, for example, be formed on the AsGa support substrates and by the lift-off structure I of the lax InP of buffer structure, described donor wafer 10 has provided the solution that forms the InP layer that is of a size of 6 inches by proposing to comprise.
Thereby, seen all advantages that 10 of above-mentioned donor wafer can provide here: it allows to form the active layer (active layer) of III-V family material, be used for shifting with given quality and performance, its performance for example can be near the performance that can obtain in the embodiment of described solid material.
Be included in buffer structure in the above-mentioned donor wafer 10 and make that thickness must be greater than one micron, and variable thickness is big, if particularly can avoid after peeling off, destroying it at every turn by recycling method according to the present invention.
With the interface zone of following buffer structure in comprise in the example of lift-off structure I of lax basically InP, so the buffer structure of substrate 1 advantageously comprises the resilient coating that is made of InGaAs, wherein the concentration of In changes between 0 and 53%.
Buffer structure can further comprise the extra play of III-V family material, such as InGaAs or InAlAs, has the atomic element concentration of substantial constant.
In a special case of peeling off, peel off an InP layer from lift-off structure I at least, receive substrate 2 to transfer to.
Thereby can obtain the possible electricity or the advantage of Electronic Performance.
For example, if the part of being stripped from also comprises InGaAs or InAlAs, this exactly situation: the discontinuity of the electron energy band between latter material and the InP (electronic bands) produces better electron mobility significantly in peel ply.
Other structure of donor wafer 10 is possible, comprises other III-V compounds of group.
HEMT or HBT (High ElectronMobility Transistor and Heterojunction Bipolar Transistor, High Electron Mobility Transistor and heterojunction bipolar transistor) are normally implemented in above-mentioned application of peeling off tunic.
Example 7: donor wafer 10 is made of following:
-substrate 1, it is made of following:
√ with the interface zone of top buffer structure in comprise the support substrates of AsGa;
The buffer structure that √ forms according to first technology of described formation buffering, and with the interface zone of lift-off structure I in comprise InGaAs;
-before peeling off, comprise InP and/or In
xGa
1-xAs
yP
1-yLift-off structure I.
Example 8: donor wafer 10 is made of following:
-substrate 1, it is made of following:
The support substrates of √ sapphire or SiC or Si;
The buffer structure that √ forms according to first technology of described formation resilient coating, it is made of following:
Al
xGa
1-xThe distortion resilient coating of N, x is from beginning along with thickness from 0 to 1 changes with sapphire interface;
The extra play of GaN is intended to limit the crystal defect of dislocation type;
-comprise the lift-off structure I of nitride layer.
III-V group-III nitride GaN, AlN and InN appeal in the microelectronics field, particularly such as the luminescent device (light emitting devices) of laser, be used to read and write with high density and be stored in data on the CD, perhaps, be used for new Display Technique (new displaytechnologies) such as the luminescent device of electroluminescent diode (electroluminescent diodes).These materials are also all specified and are used to the electronic building brick for preparing the high power electronic assembly or at high temperature work.
A kind of mode that formation is included in the nitride tunic among the lift-off structure I is the epitaxial growth on the GaN extra play, by the I family organo-metallic compound (organometallic compounds of Group I) of deposition such as trimethyl gallium (trimethyl gallium), front three amine alane (trimethylamine alane) or trimethyl indium (trimethyl indium), to deposit GaN, AlN and InN tunic respectively.
When being used for when which floor of these nitride layers be same donor wafer 10 shift, present invention resides in the recycling step of each tunic between peeling off, allow for that another time peeled off and another tunic of preparing lift-off structure I.
Example 9: donor wafer 10 is made of following:
-substrate 1, it is made of following:
The support substrates of √ sapphire or SiC or Si;
√ GaN intermediate layer;
√ SiO
2Mask;
√ GaN resilient coating;
-comprise the lift-off structure I of an one deck or a cover nitride layer, wherein one deck is the GaN layer at least.
When describing the 4th technology of described formation resilient coating hereinbefore, the mode that forms resilient coating described, by cause the anisotropic growth of continuous nitride thing tunic to form according to the ELOG technology, and GaN particularly here.
The SiO that is used for this structure
2Mask advantageously has the form of band, is positioned on the GaN intermediate layer also parallel to each other basically with periodic manner.
The thickness of each band is typically in the rank of a few tenths of micron, and the width of band is several microns rank.
The periodic spacings that band separates typically is about 10 microns or 15 microns.
For example, it is 13 microns strap system that one-period can be arranged, and each band has 0.2 micron thickness and 5 microns width.
As top illustrated in the ordinary course of things, these SiO
2Band will cause dislocation, and these dislocations are positioned near the Free Surface of these bands, in the GaN layer above being deposited on them.
So wherein the GaN thickness that is positioned at around the mask of dislocation constitutes described resilient coating.
The GaN layer or have other material layer depositions near the GaN lattice constant on resilient coating to form described lift-off structure I.
So this lift-off structure I comprises two membranes at least, the thickness of every tunic all is equal to, or greater than the thickness of the desired useful layer of peeling off.
For the more details that form the mode of wafer according to the LOG method, can be with reference to taking from " MRS Bulletin ", May 1998, Volume 23, No.5, the title of Shuji Nakamura are the document of " the budget life-span surpasses 10,000 hours InGaN/GaN/AlGaN-based laser diode ".
During the InN layer formed, the InN layer can be integrated among this lift-off structure I especially, as the front as described in the example 8.
Other component can be joined in the mentioned semiconductor layer of this document, such as carbon, concentration of carbon is substantially equal to or less than 50% in the tunic of being considered, or more particularly concentration is equal to or less than 5%.
At last, the material of donor wafer 10 is not limited to be mentioned in example above among the present invention, but includes the material of other type that belongs to II, III, IV, V or VI family and belong to IV-IV, III-V or the alloy of II-VI family.
What should mention is that under the situation of alloy material, selected alloy can be binary, ternary, quaternary or higher first number.
Comprise in donor wafer 10 under the situation of resilient coating or buffer structure, the main effect of resilient coating among the present invention or buffer structure is not limited to also relate to any resilient coating or the buffer structure that define in the most general mode such as in this document in the adaptation with the lattice parameter between two proximity structures of different crystalline lattice parameter separately.
Also be not limited to SGOI, SOI or Si/SGOI structure from peeling off the structure that useful layer begins finally to be obtained, be not limited to be used for transistorized HEMT and HBT structure, perhaps be used for the structure of laser.
Claims (28)
1. after peeling off the useful layer that comprises the material that is selected from semi-conducting material, reuse a kind of method of donor wafer (10), described donor wafer (10) comprises substrate (1) and lift-off structure (I) successively, lift-off structure before peeling off (I) comprises useful layer to be stripped, described method is included in a side of peeling off and removes material, it is characterized in that removing material and comprise the use mechanical means, so that after removing material, keep at least a portion (I ') of lift-off structure, at least a portion of this lift-off structure (I ') comprises other useful layer that one deck at least can be peeled off after recycling, and does not need to form again the additional step of useful layer.
2. the method for recycling donor wafer as claimed in claim 1 (10) is characterized in that comprising polishing removing the mechanical means that uses between matter era.
3. the method for recycling donor wafer as claimed in claim 1 (10) is characterized in that comprising abrasive polishing removing the mechanical means that uses between matter era.
4. the method for recycling donor wafer as claimed in claim 1 (10) is characterized in that being accompanied by chemical etching removing the mechanical means that uses between matter era.
5. the method for recycling donor wafer as claimed in claim 1 (10) is characterized in that comprising and uses the material of removing of mechanical means to comprise chemistry and machinery planarization (CMP).
6. the method for recycling donor wafer as claimed in claim 1 (10) is characterized in that before using mechanical means and/or carries out surface finish afterwards and handle.
7. the method for recycling donor wafer as claimed in claim 6 (10) is characterized in that described surface finish processing comprises heat treatment.
8. the method for recycling donor wafer as claimed in claim 1 (10), it is characterized in that substrate (1) comprises the resilient coating that is positioned between support substrates and the lift-off structure (I), described resilient coating be have constant chemical composition and with the crystalline material of support substrates lattice mismatch so that its limits crystal defect.
9. the method for recycling donor wafer as claimed in claim 8 (10), it is characterized in that described resilient coating is Si, SiGe, Ge or nitride material, and described lift-off structure (I) comprises at least a in the material beneath: the Si of flexible stress, SiGe or Ge or nitride material.
10. the method for recycling donor wafer as claimed in claim 1 (10), it is characterized in that described substrate (1) comprises support substrates and buffering structure, the lattice parameter of described buffer structure is to be different from the lattice parameter of support substrates and another that the thickness with buffer structure increases gradually between lattice parameter of support substrates.
11. the method for recycling donor wafer as claimed in claim 10 (10) is characterized in that described buffer structure comprises resilient coating and the extra play on resilient coating, described extra play has:
Enough big thickness is to limit defective; With
The lattice surface parameter that is different from support substrates.
12. the method for recycling donor wafer as claimed in claim 10 (10) is characterized in that described buffer structure and described lift-off structure (I) all comprise the atom alloy that belongs to one of following atom alloy families:
IV-V family;
III-V family;
II-VI family;
Described alloy is type binary, ternary, quaternary or higher first number.
13. the method for recycling donor wafer as claimed in claim 1 (10) is characterized in that described donor wafer (10) comprising:
-in first structure:
The support substrates that √ is made of Si;
√ comprises SiGe resilient coating that Ge concentration increases with thickness and by the buffer structure of the lax SiGe extra play of resilient coating;
√ comprised the lift-off structure (I) of SiGe and/or Ge before peeling off; Perhaps
-in second structure:
The support substrates that √ is made of Si;
√ comprises SiGe resilient coating that Ge concentration increases gradually with thickness and by the buffer structure of the lax Ge extra play of resilient coating between 0% and 100%;
√ comprised the lift-off structure (I) of AsGa and/or Ge before peeling off; Perhaps
-in the 3rd structure:
√ is the Si on the thicker part of having a common boundary with lift-off structure (I) at least;
√ comprised the lift-off structure (I) of Si before peeling off; Perhaps
-in the 4th structure:
√ with the interface zone of buffer structure in comprise the support substrates of AsGa;
√ comprises the buffer structure of resilient coating, described resilient coating comprises the ternary that belongs to III-V family or the atom alloy of higher first number type, its composition is selected from combination (Al respectively, Ga, In)-(N, P, As), and at least two kinds of elements are selected from III family or at least two kinds of elements are selected from V family, and described two kinds of elements have the concentration that gradually changes in the thickness of resilient coating;
√ comprised the lift-off structure (I) that belongs to III-V family alloy before peeling off; Perhaps
-in the 5th structure: with identical tunic and the identical materials of the 4th structure, have:
The √ buffer structure, with the opposite face at support substrates interface near have the lattice parameter that is equal to substantially with InP;
√ comprised the lift-off structure (I) of InP and/or InGaAs before peeling off; Perhaps
-in the 6th structure:
The support substrates of √ sapphire or SiC or Si;
√ Al
xGa
1-xN resilient coating, x begin from 0 to 1 and change from the interface with support substrates;
The GaN extra play that √ is possible;
√ comprised the lift-off structure (I) of InP and/or InGaAs before peeling off; Perhaps
-in the 7th structure:
The support substrates of √ sapphire or SiC or Si;
The GaN layer that √ is possible;
The √ mask;
√ GaN resilient coating;
√ comprised the lift-off structure (I) of GaN and possible other nitride before peeling off; Perhaps
14. the method for recycling donor wafer as claimed in claim 13 (10) is characterized in that described lift-off structure (I) also comprises:
-in first structure: the Si of flexible stress;
-in the 3rd structure: the SiGe of flexible stress.
15. the method for recycling donor wafer as claimed in claim 1 (10) is characterized in that described donor wafer (10) comprises at least one tunic that also comprises carbon, the concentration of carbon in described tunic is equal to or less than 50%.
16. the method for recycling donor wafer as claimed in claim 1 (10) is characterized in that described donor wafer (10) comprises at least one tunic that also comprises carbon, the concentration of carbon in described tunic is equal to or less than 5%.
17. receive that substrate (2) is gone up and peel off the method for useful layer by useful layer is transferred to, it is characterized in that it comprises from donor wafer (10):
(a) donor wafer (10) is incorporated into reception substrate (2) at a side switch of useful layer to be stripped;
(b) separate useful layer in the lift-off structure (I) be included in donor wafer (10);
(c) as the described method recycling of one of claim 1 to 16 donor wafer (10).
18. the method for peeling off useful layer as claimed in claim 17 is characterized in that it also is included in step (a) and forms bonded layer before.
19., it is characterized in that as claim 17 or the 18 described methods of peeling off useful layer:
-it also is included in step (a) and forms the embrittlement district that is positioned under the useful layer before, and be:
-step (b) be to apply energy and separate the structure comprise useful layer from donor wafer (10) by zone to the embrittlement district.
20. the method for peeling off useful layer as claimed in claim 19 is characterized in that carrying out the formation in embrittlement district by injecting atomic species.
21. the method for peeling off useful layer as claimed in claim 20 is characterized in that the atomic species that is injected comprises hydrogen and/or helium.
22. the method for peeling off useful layer as claimed in claim 19 is characterized in that forming described embrittlement district by porous.
23. the method for peeling off useful layer as claimed in claim 17 is characterized in that it comprises, in step (b) afterwards, and the step of surface finish on the useful layer in separate areas takes place.
24. peel off the method for useful layer from donor wafer (10) circulation, it is characterized in that it comprises a succession of step of peeling off useful layer, each in the described step is all followed the stripping means according to one of claim 17 to 23.
25. circulation stripping means as claimed in claim 24 or be applied to form as the described stripping means of one of claim 17 to 23 and comprise the structure that receives substrate (2) and useful layer, described useful layer comprises at least a in the following material: SiGe, Si, its composition are selected from combination (Al respectively, Ga, In)-(N, P, the alloy that belongs to III-V family As).
26. circulation stripping means as claimed in claim 24 or be applied to form semiconductor-on-insulator structure as the described stripping means of one of claim 17 to 23, described structure comprises reception substrate (2) and useful layer, and described useful layer is at least a portion of the semiconductor layer of semiconductor-on-insulator structure.
27. by peeling off the donor wafer (10) that useful layer is provided, also can reuses by method according to one of claim 1 to 16, it is characterized in that it comprises substrate (1) continuously and the remainder of the lift-off structure (I) of useful layer is provided, its feature also is, after peeling off, the remainder of lift-off structure (I ') still enough thick, with other useful layer that comprises that at least one is to be stripped.
28. donor wafer as claimed in claim 27 (10) is characterized in that described substrate (1) comprises support substrates and buffering structure, described buffer structure is positioned between the remainder (I ') of support substrates and lift-off structure.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR0300098 | 2003-01-07 | ||
| FR0300098A FR2849714B1 (en) | 2003-01-07 | 2003-01-07 | RECYCLING BY MECHANICAL MEANS OF A PLATE COMPRISING A MULTILAYER STRUCTURE AFTER SAMPLING A THIN LAYER |
| US60/472,470 | 2003-05-22 |
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| Publication Number | Publication Date |
|---|---|
| CN1723553A CN1723553A (en) | 2006-01-18 |
| CN100580903C true CN100580903C (en) | 2010-01-13 |
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|---|---|---|---|
| CN200480001944A Expired - Lifetime CN100580903C (en) | 2003-01-07 | 2004-01-07 | Method for peeling useful layer and repeatly utilizing donor wafer, application thereof adn corresponding wafer |
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|---|---|
| CN (1) | CN100580903C (en) |
| FR (1) | FR2849714B1 (en) |
| TW (1) | TWI309858B (en) |
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| CN109308992A (en) * | 2018-09-21 | 2019-02-05 | 苏州汉骅半导体有限公司 | The method for recycling silicon carbide substrates |
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| JP5884585B2 (en) * | 2012-03-21 | 2016-03-15 | 住友電気工業株式会社 | Method for manufacturing silicon carbide semiconductor device |
| JP6237248B2 (en) * | 2014-01-15 | 2017-11-29 | 住友電気工業株式会社 | Method for producing silicon carbide single crystal |
| CN105374664A (en) * | 2015-10-23 | 2016-03-02 | 中国科学院上海微系统与信息技术研究所 | Preparation method of InP film composite substrate |
| CN109270696B (en) * | 2018-11-08 | 2021-02-09 | 宁波维真显示科技股份有限公司 | Preparation method of 3D film |
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| FR2775121B1 (en) * | 1998-02-13 | 2000-05-05 | Picogiga Sa | METHOD FOR MANUFACTURING THIN FILM SUBSTRATES OF SEMICONDUCTOR MATERIAL, EPITAXIAL STRUCTURES OF SEMICONDUCTOR MATERIAL FORMED ON SUCH SUBSTRATES, AND COMPONENTS OBTAINED FROM SUCH STRUCTURES |
| JP2000223682A (en) * | 1999-02-02 | 2000-08-11 | Canon Inc | Processing method for basic body and production of semiconductor substrate |
| FR2794893B1 (en) * | 1999-06-14 | 2001-09-14 | France Telecom | PROCESS FOR PRODUCING A SILICON SUBSTRATE HAVING A THIN LAYER OF BURIED SILICON OXIDE |
| US6500732B1 (en) * | 1999-08-10 | 2002-12-31 | Silicon Genesis Corporation | Cleaving process to fabricate multilayered substrates using low implantation doses |
| JP3943782B2 (en) * | 1999-11-29 | 2007-07-11 | 信越半導体株式会社 | Reclaimed wafer reclaim processing method and reclaimed peeled wafer |
-
2003
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-
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| CN109308992A (en) * | 2018-09-21 | 2019-02-05 | 苏州汉骅半导体有限公司 | The method for recycling silicon carbide substrates |
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|---|---|
| TWI309858B (en) | 2009-05-11 |
| FR2849714A1 (en) | 2004-07-09 |
| CN1723553A (en) | 2006-01-18 |
| TW200425303A (en) | 2004-11-16 |
| FR2849714B1 (en) | 2007-03-09 |
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