CN100573831C - Semiconductor device and the method for making a low-temperature polycrystalline silicon layer - Google Patents
Semiconductor device and the method for making a low-temperature polycrystalline silicon layer Download PDFInfo
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- CN100573831C CN100573831C CN 200410078639 CN200410078639A CN100573831C CN 100573831 C CN100573831 C CN 100573831C CN 200410078639 CN200410078639 CN 200410078639 CN 200410078639 A CN200410078639 A CN 200410078639A CN 100573831 C CN100573831 C CN 100573831C
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 95
- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims abstract description 53
- 238000000034 method Methods 0.000 title claims abstract description 33
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 56
- 239000000758 substrate Substances 0.000 claims abstract description 44
- 229920005591 polysilicon Polymers 0.000 claims abstract description 31
- 238000000576 coating method Methods 0.000 claims abstract description 21
- 239000011248 coating agent Substances 0.000 claims abstract description 19
- 238000005499 laser crystallization Methods 0.000 claims abstract description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 10
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- 238000004519 manufacturing process Methods 0.000 claims description 5
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 4
- 229910002601 GaN Inorganic materials 0.000 claims description 4
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 4
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 4
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 4
- 229910052732 germanium Inorganic materials 0.000 claims description 4
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 4
- 238000002156 mixing Methods 0.000 claims description 3
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- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 4
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Abstract
The method that the invention provides a kind of semiconductor device and make a low-temperature polycrystalline silicon layer, it is contained in and forms a plurality of semiconductor heat-dissipating structures on the substrate, then on substrate and these semiconductor heat-dissipating structures, form a resilient coating and an amorphous silicon layer, and then carry out a laser crystallization and handle, so that amorphous silicon layer changes into a polysilicon layer.
Description
Technical field
The present invention puts it briefly about a kind of semiconductor device and makes a low-temperature polycrystalline silicon layer (lowtemperature poly-silicon, LTPS) method refers in particular to a kind of semiconductor device of side direction crystal growing (lateral growth) and method of making a low-temperature polycrystalline silicon layer utilized.
Background technology
In the manufacture process of Thin Film Transistor-LCD, because the heat resistance of glass substrate often can only arrive 600 ℃, and the depositing temperature of polysilicon layer is approximately between 650-575 ℃, if at high temperature directly make the torsional deformation that polysilicon layer will cause glass substrate, therefore at present the polycrystalline SiTFT LCD gradually adopted amorphous silicon layer again the method for crystallization make low-temperature polycrystalline silicon layer.
Conventional low-temperature polycrystalline silicon layer is made on the insulating substrate, and insulating substrate must be made of the material of printing opacity, is generally glass substrate, quartz substrate or plastic substrate.Conventional method is prior to forming an amorphous silicon layer on the insulating substrate, (excimer laser annealing ELA) handles, and makes the amorphous silicon layer crystallization become polysilicon layer then to carry out excimer laser annealing.In the process of quasi-molecule laser annealing, amorphous silicon layer is via to the absorption of laser deep UV (ultraviolet light) and reach fusion fast and crystallization, form polysilicon layer, and the fast Absorption that this employing short time pulse laser is caused only can impact the amorphous silicon layer surface, insulating substrate can't influence insulating substrate, so can remain on the state of low temperature always.
Because the quality quality of amorphous silicon layer is very big to follow-up formed polycrystalline SiTFT properties influence, therefore each parameter in the amorphous silicon layer deposition processes needs by strict control, in the hope of forming the amorphous silicon layer of low hydrogen content, high film thickness uniformity and low surface roughness.In addition, because the polysilicon layer that the amorphous silicon layer crystallization forms is used as the semiconductor layer of thin-film transistor, to define zones such as source electrode, drain electrode and raceway groove, therefore the whether good electrical performance for element of quality of polysilicon layer more has direct influence, and for example the grain size of polysilicon layer (grain size) is a key factor that influences the polysilicon layer quality.
The polysilicon grain size of utilizing general quasi-molecule laser annealing to make is about 3000 dusts, and can't control the crystal grain-growth direction effectively.At present existing pertinent literature proposes to form a temperature gradient on the amorphous silicon layer surface, to produce bigger and directive crystallization.For instance, U.S. Pat 5,851,862 propose a kind of method that forms a high heat conducting material layer in the amorphous silicon layer below, and its high heat conducting material layer is formed by aluminium nitride (aluminum nitride), boron nitride (boron nitride) or diamond-like carbon (diamondlike carbon) material.In addition, U.S. Pat 6,555 proposes a kind of semiconductor component structure that forms high heat conducting material layer in the semiconductor layer below in 875, and its high heat conducting material layer is by aluminium oxide (Al
2O
3), aluminium nitride, oxynitrides (AlN for example
xO
1-x, AlSiON, LaSiON), insulating material such as boron nitride or diamond-like carbon form.Because above-mentioned high heat conducting material layer can absorb heat energy in the process of laser radiation, can form a temperature gradient between the amorphous silicon layer (semiconductor layer) of therefore contiguous high heat conducting material layer and other the regional amorphous silicon layers.The portion of amorphous silicon layer of contiguous high heat conducting material layer has higher crystalline rate, then have lower crystalline rate as for the amorphous silicon layer of other parts, so crystal grain can be grown up by the zone of contiguous high heat conducting material layer to other regional water level lands.
When above-mentioned insulating material with high thermal conduction rate can avoid routine to utilize metal material to be used as the reflector with the generation temperature gradient, Yin Gaowen caused metallic atom to be diffused into the problem of element channel.Yet in order to improve thermal conduction rate, insulating material is materials such as aluminium nitride, boron nitride or diamond-like carbon film forming at high temperature for example, and has again when its pattern of definition and be difficult for etched problem, therefore still has any problem in practical application.
Summary of the invention
Therefore, purpose of the present invention is promptly in the method that a kind of semiconductor device is provided and makes a low-temperature polycrystalline silicon layer, the problem that is met with in the time of can avoiding conventional applied metal or insulating material to make low-temperature polycrystalline silicon layer.
In preferred embodiment of the present invention, at first on a substrate, form a plurality of semiconductor heat-dissipating structures, then on substrate and these semiconductor heat-dissipating structures, form a resilient coating and an amorphous silicon layer, and then carry out a laser crystallization and handle, so that amorphous silicon layer changes into a polysilicon layer.
Because the present invention can utilize the semiconductor heat-dissipating structure to absorb the partly heat energy of amorphous silicon layer apace in laser crystallization is handled, can form a temperature gradient between the amorphous silicon layer of therefore contiguous these semiconductor heat-dissipating structures and other the regional amorphous silicon layers, and then impel crystal grain laterally to grow up.Especially semiconductor heat-dissipating structure of the present invention can directly utilize semi-conducting material and the equipment in the general low temperature polycrystalline silicon processing to make, influence for production cost and processing complexity is little, therefore the feasibility in practical application is high, and the problem that is met with can avoid conventional applied metal or insulating material to make low-temperature polycrystalline silicon layer again fully the time.
Description of drawings
Fig. 1 to Fig. 3 is the method schematic diagram of making one low-temperature polycrystalline silicon layer of first embodiment of the invention.
Fig. 4 to Fig. 7 is the method schematic diagram of making one low-temperature polycrystalline silicon layer of second embodiment of the invention.
Fig. 8 is the structural representation of the present invention's one thin-film transistor.
Fig. 9 is the structural representation of another thin-film transistor of the present invention.
Figure 10 is the structural representation of semiconductor device of the present invention.
Figure 11 is the structural representation of second half conductor device of the present invention.
The main element symbol description
10,20 substrates, 11 adhesion coatings
12,22,22 ' semiconductor heat-dissipating structure, 14,24 openings
16,28 resilient coatings, 18,30 amorphous silicon layers
18 ', 30 ' polysilicon layer, 20,26,32 excimer laser
34 gate insulators, 36 grids
38 interlayer dielectric layers, 40 source/drains
The L channel region
Embodiment
Please refer to Fig. 1 to Fig. 3, Fig. 1 to Fig. 3 is the method schematic diagram of making one low-temperature polycrystalline silicon layer of first embodiment of the invention.As shown in Figure 1, the inventive method provides a substrate 10 earlier, for example glass substrate, quartz substrate or plastic substrate, then on substrate 10, form a semiconductor layer (not being shown among the figure) with high thermal conduction rate, and utilize methods such as little shadow and etching to remove the semiconductor layer of part, with at least one opening 14 of formation in semiconductor layer, and make remaining semiconductor layer form a plurality of semiconductor heat-dissipating structures 12.Wherein open 14 and be used for defining a channel region L, and semiconductor heat-dissipating structure 12 is surrounded on around the channel region L.Semiconductor heat-dissipating structure 12 can absorb heat energy and form a temperature gradient in the amorphous silicon layer surface in the process of laser radiation, be beneficial to reduce crystal boundary (grainboundary) number among the channel region L.
The making of semiconductor heat-dissipating structure 12 can utilize general low temperature polycrystalline silicon to handle, for example can utilize plasma reinforced chemical vapour deposition (plasma enhanced chemical vapor deposition, PECVD) method deposited semiconductor radiator structure 12 on substrate 10, and the composition material of semiconductor heat-dissipating structure 12 can be selected from the group of silicon, germanium, germanium silicide, gallium nitride, GaAs composition, is preferably silicon layer.Yet the present invention does not limit and only can utilize the plasma reinforced chemical vapour deposition method to make semiconductor heat-dissipating structure 12, the present invention can also utilize processing controls to form the semiconductor heat-dissipating structure 12 of different thermal conduction rate (10-30W/m-k), for example utilize polysilicon layer that quasi-molecule laser annealing forms just Billy have higher thermal conduction rate with the polysilicon layer of high temperature baking box formation.In addition, because the heat conduction in the crystalline solid mainly relies on the lattice vibration mode to conduct, therefore for a kind of material, its thermal conduction rate can be subjected to lattice structure, comprises the quantity of crystal boundary, stacked defective (stacking fault) and various defectives and exerts an influence.For instance, the thermal conduction rate of monocrystal silicon structure is promptly greater than polysilicon structure, and the thermal conduction rate of polysilicon structure is greater than amorphous silicon structures.Therefore, semiconductor heat-dissipating structure 12 of the present invention can be looked and be handled or product demand formation monocrystalline silicon, polysilicon, amorphous silicon or the different crystalline lattice structures such as silicon through mixing, to reach different thermal conduction rate.
After the making of finishing semiconductor heat-dissipating structure 12, then as Fig. 2 and shown in Figure 3, on substrate 10 and semiconductor heat-dissipating structure 12, form a resilient coating 16 and an amorphous silicon layer 18 in regular turn, and carry out a laser crystallization and handle, for example use excimer laser 20 irradiation amorphous silicon layers 18, so that amorphous silicon layer 18 crystallizations are polysilicon layer 18 '.Resilient coating 16 and amorphous silicon layer 18 can utilize the plasma reinforced chemical vapour deposition method to form, and wherein resilient coating 16 can be one silica layer, are used for completely cutting off semiconductor heat-dissipating structure 12 and amorphous silicon layer 18.The present invention can follow and to carry out a dehydrogenation handle in being higher than 400 ℃ high temperature furnace after forming resilient coating 16 and amorphous silicon layer 18, reduces the hydrogen content in the amorphous silicon layer 18.When carrying out the laser crystallization processing, semiconductor heat-dissipating structure 12 with high thermal conduction rate can absorb heat energy apace, makes can form a temperature gradient between portion of amorphous silicon layer 18 above semiconductor heat-dissipating structure 12 and the portion of amorphous silicon layer 18 in the channel region L.Because semiconductor heat-dissipating structure 12 absorbs heat energy apace; make the portion of amorphous silicon layer 18 that is positioned at semiconductor heat-dissipating structure 12 tops have higher crystalline rate; has lower crystalline rate as for 18 on the portion of amorphous silicon layer in the channel region L; therefore crystal grain can laterally be grown up (arrow is indicated among side direction crystal growing direction such as Fig. 3) by the last direction channel region L of semiconductor heat-dissipating structure 12, to form polysilicon layer 18 '.The polysilicon layer of making according to the inventive method 18 ' has bigger crystal grain and less crystal boundary number in channel region L, therefore can reach to promote carrier mobility (mobility) and improve advantage such as element characteristic.
Please refer to Fig. 4 to Fig. 7, Fig. 4 to Fig. 7 is the method schematic diagram of making one low-temperature polycrystalline silicon layer of second embodiment of the invention.As shown in Figure 4, the inventive method provides a substrate 20 earlier, for example glass substrate, quartz substrate or plastic substrate, then on substrate 20, form a semiconductor layer (not being shown among the figure) with high thermal conduction rate, and utilize methods such as little shadow and etching to remove the semiconductor layer of part, with at least one opening 24 of formation in semiconductor layer, and make remaining semiconductor layer form a plurality of semiconductor heat-dissipating structures 22.Its split shed 24 is used for defining a channel region L, and semiconductor heat-dissipating structure 22 is surrounded on around the channel region L.Semiconductor heat-dissipating structure 22 can absorb heat energy and form a temperature gradient in the amorphous silicon layer surface in the process of laser radiation, be beneficial to reduce the crystal boundary number among the channel region L.
In the present embodiment, semiconductor heat-dissipating structure 22 can be deposited on the semi-conducting material of the noncrystalline shape on the substrate 20 for utilizing the plasma reinforced chemical vapour deposition method, and the composition material of semiconductor heat-dissipating structure 22 can be selected from the group of silicon, germanium, germanium silicide, gallium nitride, GaAs composition, is preferably amorphous silicon layer.
As Fig. 4 and shown in Figure 5, carrying out a laser crystallization subsequently handles, for example use the semiconductor heat-dissipating structure 22 of the noncrystalline shape of excimer laser 26 irradiations, so that semiconductor heat-dissipating structure 22 is converted into the semiconductor heat-dissipating structure 22 ' of crystallization, for example semiconductor heat-dissipating structure 22 is converted into polysilicon by amorphous silicon.In other embodiments of the invention, above-mentioned laser crystallization is handled and can need be replaced with other heat treatments or irradiation processing according to actual treatment, and semiconductor heat-dissipating structure 22 is carried out processing such as little shadow and etching again and is defined its pattern after can also utilizing laser crystallization to handle earlier to be shone and being converted into semiconductor heat-dissipating structure 22 '.
After the making of finishing semiconductor heat-dissipating structure 22 ', then as Fig. 6 and shown in Figure 7, on substrate 20 and semiconductor heat-dissipating structure 22 ', form a resilient coating 28 and an amorphous silicon layer 30 in regular turn, and carry out a laser crystallization once more and handle, for example use excimer laser 32 irradiation amorphous silicon layers 30, so that amorphous silicon layer 30 crystallizations are polysilicon layer 30 '.Resilient coating 28 and amorphous silicon layer 30 can utilize the plasma reinforced chemical vapour deposition method to form, and wherein resilient coating 28 can be one silica layer, are used for completely cutting off semiconductor heat-dissipating structure 22 ' and amorphous silicon layer 30.
When irradiation excimer laser 32, semiconductor heat-dissipating structure 22 ' with high thermal conduction rate can absorb heat energy apace, makes to understand formation one temperature gradient between the portion of amorphous silicon layer 30 of the portion of amorphous silicon layer 30 be positioned at semiconductor heat-dissipating structure 22 ' top and channel region L.Because semiconductor heat-dissipating structure 22 ' absorbs heat energy apace; make the portion of amorphous silicon layer 30 that is positioned at semiconductor heat-dissipating structure 22 ' top have higher crystalline rate; has lower crystalline rate as for 30 on the portion of amorphous silicon layer in the channel region L; therefore crystal grain can laterally be grown up (arrow is indicated among side direction crystal growing direction such as Fig. 7) by the last direction channel region L of semiconductor heat-dissipating structure 22 ', to form polysilicon layer 30 '.The polysilicon layer of making according to the inventive method 30 ' has bigger crystal grain and less crystal boundary number in channel region L, therefore can reach to promote carrier mobility and improve advantage such as element characteristic.
The present invention can carry out the transistorized processing of subsequent thin film again after finishing aforesaid low-temperature polycrystalline silicon layer making.Please refer to Fig. 8 and Fig. 9, Fig. 8 and Fig. 9 are the structural representation of the present invention's one thin-film transistor, wherein Fig. 9 one has the structural representation of the thin-film transistor of long raceway groove, and the thin-film transistor among Fig. 9 is except in the regions and source (S/D) that includes a plurality of semiconductor heat-dissipating structures 22 ' and be arranged at channel region L both sides, also comprised a plurality of semiconductor heat-dissipating structures 22 ' in addition and be arranged among the channel region L, to be used for controlling the crystal boundary number among the channel region L.As Fig. 8 and shown in Figure 9, the present invention is after finishing polysilicon layer 30 ' shown in Figure 7, can go up elements such as forming gate insulator 34, grid (the first metal layer) 36, interlayer dielectric layer 38 and source/drain polar conductor (second metal level) 40 in polysilicon layer 30 ' again, finish the making of low-temperature polysilicon film transistor.
In addition, in order to increase the adhesive force between semiconductor heat-dissipating structure and substrate, in other embodiments of the invention, between semiconductor heat-dissipating structure and substrate, form an adhesion coating (adhesion layer).Please refer to Figure 10 and Figure 11, Figure 10 and Figure 11 include the structural representation of the semiconductor device of adhesion coating for the present invention one.As Figure 10 and shown in Figure 11, semiconductor device includes an adhesion coating 11 and is located between semiconductor heat-dissipating structure 12 and the substrate 10, to be used for improving the adhesive force of 10 of semiconductor heat-dissipating structure 12 and substrates, avoid semiconductor heat-dissipating structure 12 in laser crystallization handle or other heat treatments in peel off from substrate 10 because of the localized heat conduction efficiency is uneven.In practical application, adhesion coating 11 can be covered on the substrate 10 fully, and perhaps adhesion coating 11 can also trim in semiconductor heat-dissipating structure 12, to expose the substrate 10 of part.In Figure 10 and Figure 11, other element numbers are identical with element number shown in Figure 1, and its subsequent treatment also can not repeat them here referring to Fig. 2 to Fig. 9.
Method compared to the making low-temperature polycrystalline silicon layer of routine, the present invention utilizes the semiconductor heat-dissipating structure to absorb the partly heat energy of amorphous silicon layer apace in laser crystallization is handled, can form a temperature gradient between the amorphous silicon layer of therefore contiguous these semiconductor heat-dissipating structures and other the regional amorphous silicon layers, and then impel crystal grain laterally to grow up.Especially semiconductor heat-dissipating structure of the present invention can directly utilize semi-conducting material and the equipment in the general low temperature polycrystalline silicon processing to make, influence for production cost and processing complexity is little, therefore the feasibility in practical application is high, and the problem that is met with can avoid conventional applied metal or insulating material to make low-temperature polycrystalline silicon layer again fully the time.
The above only is preferred embodiment of the present invention, and all equivalences of carrying out according to claim of the present invention change and revise, and all should belong to covering scope of the present invention.
Claims (9)
1. method of making a low-temperature polycrystalline silicon layer, this method comprises the following step:
One substrate is provided;
On this substrate, form a plurality of semiconductor heat-dissipating structures;
On this substrate and this a plurality of semiconductor heat-dissipating structures, form a resilient coating and an amorphous silicon layer; And
Carry out a laser crystallization and handle, so that this amorphous silicon layer changes into a polysilicon layer,
Wherein, these a plurality of semiconductor heat-dissipating structures are selected from the group that silicon, germanium, germanium silicide, gallium nitride and GaAs are formed.
2. the method for claim 1, wherein these a plurality of semiconductor heat-dissipating structures comprise monocrystalline silicon, polysilicon, amorphous silicon or the silicon through mixing.
3. the method for claim 1, wherein these a plurality of semiconductor heat-dissipating structures are arranged on around the channel region.
4. the method for claim 1 also comprises and utilizes a laser to shine this a plurality of semiconductor heat-dissipating structures, to change the lattice structure of these a plurality of semiconductor heat-dissipating structures.
5. the method for claim 1 also is included in and forms an adhesion coating on this substrate.
6. semiconductor device, it comprises:
One substrate;
A plurality of semiconductor heat-dissipating structures are located on this substrate;
One resilient coating is located on this substrate and this a plurality of semiconductor heat-dissipating structures;
One polysilicon layer is located on this resilient coating,
Wherein, these a plurality of semiconductor heat-dissipating structures are selected from the group that silicon, germanium, germanium silicide, gallium nitride and GaAs are formed.
7. semiconductor device as claimed in claim 6, wherein, these a plurality of semiconductor heat-dissipating structures comprise monocrystalline silicon, polysilicon, amorphous silicon or the silicon through mixing.
8. semiconductor device as claimed in claim 6, wherein, these a plurality of semiconductor heat-dissipating structures are arranged on around the channel region.
9. semiconductor device as claimed in claim 6 also comprises an adhesion coating and is located on this substrate.
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| CN 200410078639 CN100573831C (en) | 2004-09-14 | 2004-09-14 | Semiconductor device and the method for making a low-temperature polycrystalline silicon layer |
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| CN102969250B (en) * | 2012-11-22 | 2015-08-19 | 京东方科技集团股份有限公司 | The preparation method of LTPS film and thin-film transistor, array base palte and display unit |
| CN104157700B (en) * | 2014-09-01 | 2018-02-13 | 信利（惠州）智能显示有限公司 | Low-temperature polysilicon film transistor and preparation method thereof |
| CN105097667B (en) * | 2015-06-24 | 2018-03-30 | 深圳市华星光电技术有限公司 | The preparation method and low temperature polycrystalline silicon TFT substrate structure of low temperature polycrystalline silicon TFT substrate structure |
| CN107452620B (en) * | 2016-05-31 | 2019-12-24 | 上海微电子装备（集团）股份有限公司 | IGBT silicon wafer back annealing method |
| CN106087040B (en) * | 2016-07-14 | 2018-07-27 | 京东方科技集团股份有限公司 | Multichip semiconductor crystallization system and the method that polycrystallization is carried out to single crystalline semiconductor substrate |
| CN106328497B (en) * | 2016-10-28 | 2020-05-19 | 昆山国显光电有限公司 | Low-temperature polycrystalline silicon film, preparation method thereof and display device |
| CN106783875B (en) * | 2016-12-07 | 2019-09-17 | 信利（惠州）智能显示有限公司 | Low temperature polycrystalline silicon membrane preparation method, thin film transistor (TFT) and preparation method thereof |
| CN108417586A (en) * | 2018-03-13 | 2018-08-17 | 京东方科技集团股份有限公司 | A kind of preparation method and array substrate of array substrate |
| CN109841581B (en) * | 2019-03-28 | 2020-11-24 | 京东方科技集团股份有限公司 | Thin film transistor, preparation method thereof, array substrate, display panel and device |
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