CN100568258C - 用于混沌运算模块的方法和设备 - Google Patents
用于混沌运算模块的方法和设备 Download PDFInfo
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- CN100568258C CN100568258C CNB2004800364197A CN200480036419A CN100568258C CN 100568258 C CN100568258 C CN 100568258C CN B2004800364197 A CNB2004800364197 A CN B2004800364197A CN 200480036419 A CN200480036419 A CN 200480036419A CN 100568258 C CN100568258 C CN 100568258C
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- logic gate
- reference signal
- signal
- threshold reference
- configuration
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- 238000000034 method Methods 0.000 title claims description 15
- 230000000739 chaotic effect Effects 0.000 title description 6
- 230000004044 response Effects 0.000 claims abstract description 7
- 230000001105 regulatory effect Effects 0.000 claims 8
- 230000008859 change Effects 0.000 description 11
- 238000010586 diagram Methods 0.000 description 7
- 238000005070 sampling Methods 0.000 description 5
- 230000003068 static effect Effects 0.000 description 4
- 230000008569 process Effects 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000010606 normalization Methods 0.000 description 1
- 230000001960 triggered effect Effects 0.000 description 1
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N7/00—Computing arrangements based on specific mathematical models
- G06N7/08—Computing arrangements based on specific mathematical models using chaos models or non-linear system models
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Artificial Intelligence (AREA)
- Pure & Applied Mathematics (AREA)
- Data Mining & Analysis (AREA)
- Evolutionary Computation (AREA)
- Algebra (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Computational Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Software Systems (AREA)
- Nonlinear Science (AREA)
- Logic Circuits (AREA)
- Measuring Volume Flow (AREA)
Abstract
Description
I<sub>1</sub> | I<sub>2</sub> | 与 | 或 | 异或 |
0 | 0 | 0 | 0 | 0 |
0 | 1 | 0 | 1 | 1 |
1 | 0 | 0 | 1 | 1 |
1 | 1 | 1 | 1 | 0 |
I | 非 |
0 | 1 |
1 | 0 |
操作 | 与 | 或 | 异或 | 非 |
条件1 | f(x<sub>0</sub>)≤x<sup>*</sup> | f(x<sub>0</sub>)≤x<sup>*</sup> | f(x<sub>0</sub>)≤x<sup>*</sup> | f(x<sub>0</sub>)-x<sup>*</sup>=δ |
条件2 | f(x<sub>0</sub>+δ)≤x<sup>*</sup> | f(x<sub>0</sub>+δ)-x<sup>*</sup>=δ | f(x<sub>0</sub>+δ)-x<sup>*</sup>=δ | f(x<sub>0</sub>+δ)≤x<sup>*</sup> |
条件3 | f(x<sub>0</sub>+2δ)-x<sup>*</sup>=δ | f(x<sub>0</sub>+2δ)-x<sup>*</sup>=δ | f(x<sub>0</sub>+2δ)≤x<sup>*</sup> |
操作 | 与 | 或 | 异或 | 非 |
x<sub>0</sub> | 0 | 1/8 | 1/4 | 1/2 |
x<sup>*</sup> | 3/4 | 11/16 | 3/4 | 3/4 |
Claims (16)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/680,271 US7096437B2 (en) | 2003-10-07 | 2003-10-07 | Method and apparatus for a chaotic computing module using threshold reference signal implementation |
US60/680,271 | 2005-05-12 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1894700A CN1894700A (zh) | 2007-01-10 |
CN100568258C true CN100568258C (zh) | 2009-12-09 |
Family
ID=34394318
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004800364197A Expired - Fee Related CN100568258C (zh) | 2003-10-07 | 2004-10-07 | 用于混沌运算模块的方法和设备 |
Country Status (6)
Country | Link |
---|---|
US (3) | US7096437B2 (zh) |
EP (1) | EP1678651A4 (zh) |
JP (1) | JP4395517B2 (zh) |
CN (1) | CN100568258C (zh) |
CA (1) | CA2542055A1 (zh) |
WO (1) | WO2005036353A2 (zh) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7863937B2 (en) * | 2003-10-07 | 2011-01-04 | University Of Florida Research Foundation, Inc. | Logic based on the evolution of nonlinear dynamical systems |
KR100758271B1 (ko) * | 2005-12-08 | 2007-09-12 | 한국전자통신연구원 | 카오스 초광대역 무선 통신 방식을 이용한 거리 측정 장치및 그 방법 |
EP2092446A4 (en) * | 2006-12-05 | 2013-03-13 | Univ Florida | NONLINEAR DYNAMIC SEARCH ENGINE |
US7453285B2 (en) * | 2006-12-22 | 2008-11-18 | Chaologix, Inc. | Dynamically configurable logic gate using a non-linear element |
US7925814B2 (en) * | 2007-05-09 | 2011-04-12 | Chaologix, Inc. | Dynamically configurable high speed interconnect using a nonlinear element |
US7924059B2 (en) * | 2009-02-27 | 2011-04-12 | University Of Florida Research Foundation, Inc. | Reconfigurable and reliable logic circuit elements that exploit nonlinearity and noise |
WO2011047035A2 (en) * | 2009-10-14 | 2011-04-21 | Chaologix, Inc. | High utilization universal logic array with variable circuit topology and logistic map circuit to realize a variety of logic gates with constant power signatures |
US8427199B2 (en) | 2010-10-29 | 2013-04-23 | Honeywell International Inc. | Magnetic logic gate |
US8358154B2 (en) | 2010-10-29 | 2013-01-22 | Honeywell International Inc. | Magnetic logic gate |
US8358149B2 (en) | 2010-10-29 | 2013-01-22 | Honeywell International Inc. | Magnetic logic gate |
US8374020B2 (en) | 2010-10-29 | 2013-02-12 | Honeywell International Inc. | Reduced switching-energy magnetic elements |
US8427197B2 (en) | 2011-06-15 | 2013-04-23 | Honeywell International Inc. | Configurable reference circuit for logic gates |
US8587343B2 (en) | 2011-06-29 | 2013-11-19 | Instituto Potosino De Investigacion Cientifica y Tecnologica A.C. | Reconfigurable dynamic logic gate with linear core |
US8823464B2 (en) | 2011-11-01 | 2014-09-02 | Instituto Potosino de Investigacion Cientifica y Tecnológica A.C. | Reconfigurable multivibrator element based on chaos control |
CN104361799B (zh) * | 2014-11-07 | 2016-11-23 | 山东外国语职业学院 | 三阶买比乌斯带型细胞神经网络混沌电路 |
CN105184365B (zh) * | 2015-07-02 | 2018-02-09 | 清华大学 | 用于非精确计算的数模混合信号处理系统 |
US10062709B2 (en) | 2016-09-26 | 2018-08-28 | International Business Machines Corporation | Programmable integrated circuit standard cell |
CN110727157B (zh) * | 2019-10-31 | 2021-12-28 | 太原理工大学 | 一种布尔混沌光的产生装置 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
USRE35977E (en) * | 1992-05-08 | 1998-12-01 | Altera Corporation | Look up table implementation of fast carry arithmetic and exclusive-or operations |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3473160A (en) | 1966-10-10 | 1969-10-14 | Stanford Research Inst | Electronically controlled microelectronic cellular logic array |
US5260610A (en) | 1991-09-03 | 1993-11-09 | Altera Corporation | Programmable logic element interconnections for programmable logic array integrated circuits |
US5291555A (en) | 1992-12-14 | 1994-03-01 | Massachusetts Institute Of Technology | Communication using synchronized chaotic systems |
KR0185754B1 (ko) | 1994-02-02 | 1999-05-15 | 정호선 | 맵핑회로와 이를 이용한 혼돈 신경망 |
JP3125644B2 (ja) * | 1995-09-13 | 2001-01-22 | 松下電器産業株式会社 | 復調装置 |
US6025735A (en) | 1996-12-23 | 2000-02-15 | Motorola, Inc. | Programmable switch matrix and method of programming |
US20040036636A1 (en) | 2002-08-26 | 2004-02-26 | Rifeng Mai | Tone-free dithering methods for sigma-delta DAC |
US6803787B1 (en) * | 2002-09-25 | 2004-10-12 | Lattice Semiconductor Corp. | State machine in a programmable logic device |
US6876232B2 (en) * | 2003-08-21 | 2005-04-05 | International Business Machines Corporation | Methods and arrangements for enhancing domino logic |
JP4174402B2 (ja) * | 2003-09-26 | 2008-10-29 | 株式会社東芝 | 制御回路及びリコンフィギャラブル論理ブロック |
-
2003
- 2003-10-07 US US10/680,271 patent/US7096437B2/en active Active
-
2004
- 2004-10-07 JP JP2006534337A patent/JP4395517B2/ja not_active Expired - Fee Related
- 2004-10-07 WO PCT/US2004/033108 patent/WO2005036353A2/en active Search and Examination
- 2004-10-07 CN CNB2004800364197A patent/CN100568258C/zh not_active Expired - Fee Related
- 2004-10-07 EP EP04794451A patent/EP1678651A4/en not_active Ceased
- 2004-10-07 CA CA002542055A patent/CA2542055A1/en not_active Abandoned
-
2005
- 2005-12-15 US US11/304,125 patent/US7415683B2/en not_active Expired - Lifetime
-
2008
- 2008-07-16 US US12/174,332 patent/US8091062B2/en active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
USRE35977E (en) * | 1992-05-08 | 1998-12-01 | Altera Corporation | Look up table implementation of fast carry arithmetic and exclusive-or operations |
Non-Patent Citations (2)
Title |
---|
FPGA动态可重构逻辑设计初探. 朱明程,黄强.半导体技术,第25卷第4期. 2000 * |
可重构信息处理. 鲍晓宇,施克仁.计算机自动测量与控制,第8卷第1期. 2000 * |
Also Published As
Publication number | Publication date |
---|---|
US20050073337A1 (en) | 2005-04-07 |
EP1678651A4 (en) | 2011-06-15 |
CN1894700A (zh) | 2007-01-10 |
EP1678651A2 (en) | 2006-07-12 |
US7415683B2 (en) | 2008-08-19 |
JP4395517B2 (ja) | 2010-01-13 |
US7096437B2 (en) | 2006-08-22 |
WO2005036353A8 (en) | 2005-11-17 |
US20080278196A1 (en) | 2008-11-13 |
JP2007532985A (ja) | 2007-11-15 |
CA2542055A1 (en) | 2005-04-21 |
WO2005036353A2 (en) | 2005-04-21 |
WO2005036353A3 (en) | 2005-06-16 |
US20060091905A1 (en) | 2006-05-04 |
US8091062B2 (en) | 2012-01-03 |
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Owner name: CONTROL DYNAMICS CO., LTD. Free format text: FORMER OWNER: UNIV FLORIDA Effective date: 20080307 |
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