Summary of the invention
The object of the present invention is to provide a kind of a kind of automatic frequency correcting method and device that is used for receiver of time-division wireless communication system, thereby can under the low SINR condition, and communication channel life period diffusion and frequency spread condition under, quickly and accurately the local oscillator frequencies and the oscillator frequency in the transmitter of receiver are carried out synchronously.
For achieving the above object, the automatic frequency correcting method of a kind of receiver of time-division wireless communication system provided by the invention is realized, be said method comprising the steps of:
Training sequence obtaining step, receiver perhaps by methods such as notifications, are learnt a data sequence pattern by carrying out Cell searching, and this data sequence pattern is to occur by certain way in received signal, for example periodically occurs; And
The fine frequency aligning step, this step can constantly be carried out frame by frame based on plurality of continuous or discontinuous frame, begins up to lock-out or once new automatic frequency correction, and it comprises the steps: each time
The signal data extraction step is used to extract the reception data corresponding to described training sequence part;
Channel estimating and route searching step are used to obtain amplitude and the phase information in corresponding each channel delay tap in a collection of present frame, and select some active paths according to the channel estimation results of present frame and former some frames;
The path merges and correlation step, is used for according to described channel estimation value and Path selection result, the reception data corresponding to training sequence part on some the described active paths is carried out maximum ratio merge, and carries out relevant with training sequence then;
The Frequency offset estimation calculation procedure is used for carrying out a Frequency offset estimation and obtaining the Frequency offset estimation value according to the output sequence that described path merges and correlation step obtains;
The Signal to Interference plus Noise Ratio estimating step is used to obtain the interior Signal to Interference plus Noise Ratio estimated result of present frame;
Kalman gain factor calculation procedure is used for according to described Signal to Interference plus Noise Ratio estimated result, obtains being applied to the gain factor of Frequency offset estimation in the present frame;
The loop filtering step is used for according to the described Frequency offset estimation value and the kalman gain factor, carries out first-order loop filtering and obtains cumulative frequency skew estimated value; And
Local oscillator accurate adjustment step be used for described cumulative frequency skew estimated value is controlled the output frequency of local oscillator, thereby a fine frequency of finishing in the present frame is proofreaied and correct.
On the other hand, the automatic frequency correcting method of a kind of receiver of time-division wireless communication system provided by the invention may further comprise the steps:
Initial cell search first step is rapid, after the Primary Synchronisation Code code word of all candidates and received signal sequence are carried out relevant treatment or similar processing, obtains rough frame synchronization information, detects the strongest Primary Synchronisation Code code word of signal simultaneously;
The coarse frequency correcting step is utilized the training sequence of the rapid detected Primary Synchronisation Code code word of described initial cell search first step as this step; This step can constantly be carried out frame by frame based on plurality of continuous or discontinuous frame, begins up to lock-out or once new automatic frequency correction, and it comprises the steps: each time
The signal data extraction step is used to extract the reception data in the corresponding search window that comprises described training sequence;
Slide relevant and phase deviation estimation calculation procedure, be used to obtain an interior phase deviation estimated sequence of described search window;
The multiframe combining step, the phase deviation estimated sequence that is used to finish obtaining in a plurality of frames merges by certain mode;
The time delay envelope generates step, and the phase deviation estimated sequence after merging according to described multiframe carries out obtaining after delivery calculates a time delay envelope in the search window;
The Path selection step is carried out Path selection according to described time delay envelope in described search window;
Combining step is estimated in phase deviation, is used for that the phase deviation estimated value on the described selection path is carried out multipath and merges;
The Frequency offset estimation calculation procedure estimates to obtain Frequency offset estimation according to the phase deviation after the described multipath merging; And
The local oscillator frequencies coarse steps is used for the Frequency offset estimation of gained is controlled the output frequency of local oscillator, thereby finishes the coarse frequency correcting process one time.
Search of initial zone second step obtains the pairing code character of this Primary Synchronisation Code according to the rapid detected Primary Synchronisation Code code word of initial cell search first step; According to described rough frame synchronization information and system frame structure, obtain the rough position of secondary synchronization code received signal simultaneously; By after the secondary synchronization code code word of all candidates in the described code character is carried out relevant treatment or similar processing with reception secondary synchronization code signal, the system of detecting has adopted wherein which secondary synchronization code code word then;
The fine frequency aligning step utilizes the training sequence of the detected secondary synchronization code code word of described search of initial zone second step as this step; Be included in each received signal frame and can constantly carry out following steps frame by frame by continuous or discontinuous frame, begin up to lock-out or once new automatic frequency correction;
The signal data extraction step is used to extract the reception data corresponding to described training sequence part;
Channel estimating and route searching step are used to obtain amplitude and the phase information in corresponding each channel delay tap in a collection of present frame, and select some active paths according to the channel estimation results of present frame and former some frames;
The path merges and correlation step, is used for according to described channel estimation value and Path selection result, the reception data corresponding to training sequence part on some the described active paths is carried out maximum ratio merge, and carries out relevant with training sequence then;
The Frequency offset estimation calculation procedure is used for carrying out a Frequency offset estimation and obtaining the Frequency offset estimation value according to the output sequence that described path merges and correlation step obtains;
The Signal to Interference plus Noise Ratio estimating step is used to obtain the interior Signal to Interference plus Noise Ratio estimated result of present frame;
Kalman gain factor calculation procedure is used for according to described Signal to Interference plus Noise Ratio estimated result, obtains being applied to the gain factor of Frequency offset estimation in the present frame;
The loop filtering step is used for according to the described Frequency offset estimation value and the kalman gain factor, carries out first-order loop filtering and obtains cumulative frequency skew estimated value; And
Local oscillator accurate adjustment step be used for described cumulative frequency skew estimated value is controlled the output frequency of local oscillator, thereby a fine frequency of finishing in the present frame is proofreaied and correct.
Further, a training sequence deriving means and a coupled fine frequency means for correcting are adorned in the automatic frequency correction that the invention provides a kind of receiver of time-division wireless communication system, wherein,
Training sequence deriving means, receiver perhaps by methods such as notifications, are learnt a data sequence pattern by carrying out Cell searching, and this data sequence pattern is to occur by certain way in received signal, for example periodically occurs; And
Described fine frequency means for correcting comprises:
The one frequency conversion demodulator that radiofrequency signal is carried out the frequency conversion demodulation;
One signal data extractor, it extracts reception data corresponding to training sequence part to the radiofrequency signal of coming self frequency-changing's demodulator processes;
One channel estimating and the path-searcher that links to each other with the signal data extractor, it is used to obtain amplitude and the phase information in corresponding each channel delay tap in a collection of present frame, and selects some active paths according to the channel estimation results of present frame and former some frames;
One path merges and correlator, it receives the channel estimation value and the Path selection result of described channel estimating and path-searcher, to the reception data on the described active path carry out the maximum ratio merging from some of signal data extractor, carry out relevant with training sequence then corresponding to training sequence part;
One Frequency offset estimation calculator receives from the output sequence that described path merges and correlator obtains, and carries out a Frequency offset estimation and obtains the Frequency offset estimation value;
The one Signal to Interference plus Noise Ratio estimator that links to each other with path-searcher with described channel estimating is used for determining the Signal to Interference plus Noise Ratio estimated result in the present frame;
The kalman gain factor calculator that the one Signal to Interference plus Noise Ratio estimator that links to each other with path-searcher with described channel estimating links to each other, it receives the Signal to Interference plus Noise Ratio estimated result of described Signal to Interference plus Noise Ratio estimator, obtains being applied to the gain factor of Frequency offset estimation in the present frame;
One loop filter, it receives the kalman gain factor signal from the Frequency offset estimation value signal and the described kalman gain factor calculator of described Frequency offset estimation calculator, carry out first-order loop filtering, thereby obtain cumulative frequency skew estimated value; And
With the local oscillator that described loop filter links to each other, be used for described cumulative frequency skew estimated value is controlled the output frequency of local oscillator, a fine frequency of carrying out in the present frame is proofreaied and correct.
On the other hand, the automatic frequency correcting device of a kind of receiver of time-division wireless communication system provided by the invention, it comprises as lower device:
One search of initial zone first device after the Primary Synchronisation Code code word of all candidates and received signal sequence are carried out relevant treatment or similar processing, obtains rough frame synchronization information, detects the strongest Primary Synchronisation Code code word of signal simultaneously;
With the coarse frequency correcting device that above-mentioned search of initial zone first device links to each other, it comprises
One signal data extractor is used to extract the reception data in the corresponding search window that comprises training sequence;
The one relevant and frequency offset estimator of slip that links to each other with above-mentioned signal data extractor is used to obtain an interior phase deviation estimated sequence of described search window;
One multiframe combiner receives the phase deviation estimated sequence of and frequency offset estimator relevant from described slip, and the phase deviation estimated sequence that obtains in a plurality of frames is merged by certain mode;
One link to each other with multiframe combiner ask mould value device, it carries out delivery with the phase deviation estimated sequence of described multiframe combiner and calculates, and obtains a time delay envelope in the search window;
One path selector, it receives from the described time delay envelope of asking mould value device, carries out Path selection in described search window;
Combiner is estimated in one phase deviation, receives from the phase deviation estimation value signal on the described path selector, carries out multipath and merges;
One gets phaser, receive from described phase deviation estimate combiner phase deviation estimate to obtain Frequency offset estimation; And
One local oscillator receives from the described Frequency offset estimation signal of getting phaser, and the output frequency of control local oscillator carries out the coarse frequency correcting process one time;
One search of initial zone that links to each other with described coarse frequency correcting device, second device, obtain the pairing code character of this Primary Synchronisation Code according to described Primary Synchronisation Code code word, according to described rough frame synchronization information and system frame structure, obtain the rough position of secondary synchronization code received signal simultaneously; By after the secondary synchronization code code word of all candidates in the described code character is carried out relevant treatment or similar processing with reception secondary synchronization code signal, the system of detecting has adopted wherein which secondary synchronization code code word then; And
The one fine frequency means for correcting that links to each other with described search of initial zone second device, it comprises,
One signal data extractor, it extracts reception data corresponding to training sequence part from the frequency conversion demodulator of radiofrequency signal;
One channel estimating and the path-searcher that links to each other with the signal data extractor, it is used to obtain amplitude and the phase information in corresponding each channel delay tap in a collection of present frame, and selects some active paths according to the channel estimation results of present frame and former some frames;
One path merges and correlator, it receives the channel estimation value and the Path selection result of described channel estimating and path-searcher, to the reception data on the described active path carry out the maximum ratio merging from some of signal data extractor, carry out relevant with training sequence then corresponding to training sequence part;
One Frequency offset estimation calculator receives from the output sequence that described path merges and correlator obtains, and carries out a Frequency offset estimation and obtains the Frequency offset estimation value;
The one Signal to Interference plus Noise Ratio estimator that links to each other with path-searcher with described channel estimating is used for determining the Signal to Interference plus Noise Ratio estimated result in the present frame;
The kalman gain factor calculator that the one Signal to Interference plus Noise Ratio estimator that links to each other with path-searcher with described channel estimating links to each other, it receives the Signal to Interference plus Noise Ratio estimated result of described Signal to Interference plus Noise Ratio estimator, obtains being applied to the gain factor of Frequency offset estimation in the present frame;
One loop filter, it receives the kalman gain factor signal from the Frequency offset estimation value signal and the described kalman gain factor calculator of described Frequency offset estimation calculator, carry out first-order loop filtering, thereby obtain cumulative frequency skew estimated value; And
One local oscillator that links to each other with described loop filter is used for described cumulative frequency is offset the output frequency that estimated value is controlled local oscillator, and a fine frequency of carrying out in the present frame is proofreaied and correct.
Automatic frequency correcting method that is used for receiver of time-division wireless communication system and the device realized according to the present invention can also be realized the automatic frequency correction purpose in the time-division system fast exactly under very low SINR condition.Especially, the present invention is directed to two kinds of common in the wide-band mobile communication system abominable channel conditions, be i.e. under frequency diffusion and the time spread condition, can keep good performance equally.Especially, the gain factor that fine frequency is proofreaied and correct in the AFC loop can come adjustment loop gain adaptively according to SINR condition at that time, makes it all can keep good performance under various radio communication channel conditions complicated and changeable.
The wireless communication system of merotype---the automatic frequency correcting method that user terminal (UE) in the TD-SCDMA system is located to realize and the description of device, it is more and more obvious to become when a kind of by following for objects and advantages of the present invention.
Embodiment
Fig. 1 represents the structured flowchart of the digital transmitting and receiving machine of a kind of routine in the prior art.Referring to Fig. 1, received RF signal is an analog baseband signal by frequency mixer (Mixer) 100 frequency down-converts, passes through analog to digital converter (ADC) 101 then, and automatic gain controller (AGC) 102 and RRC filter 103 obtain digital baseband signal.By a series of Digital Signal Processing, synchronization module 104 obtains synchronizing information, comprises frame synchronization and system synchronous information etc.After setting up synchronously, demodulator 105 carries out processing such as despreading, demodulation and recovers transmission information.On the other hand, transmission information is by RRC formed filter 109, digital to analog converter (DAC) 110, and obtains emitting radio frequency signal through frequency mixer 111 up-conversions.
In digital transmitting and receiving machine structured flowchart shown in Figure 1, the frequency mixer 100 that is used for transceive data, 111 reference frequency signal all is to be produced by a series of frequency multiplier and frequency divider (not drawing in Fig. 1) by the output of local voltage controlled oscillator 108, this voltage-controlled oscillator (VCO) is subjected to the output of automatic frequency correction (AFC) module 106 by digital to analog converter (DAC) 107 back controls, if be used to make the reference frequency of local oscillator generation and the centre carrier frequency of received signal to be consistent---there is frequency departure, to cause to receive the rotation of digital baseband signal generation phase place, and make the receiver performance deterioration even cause communication failure.For radiating portion,, also can cause serious band to disturb (Out-of-band Interference) outward if big deviation takes place the carrier frequency that local oscillator produces.On the other hand, local oscillator also provides reference frequency signal for a plurality of clocks source of digital transmitting and receiving machine, for example receives sampling clock etc., so frequency departure also can influence the accuracy of these clock source clock signals, and may have a strong impact on systematic function.Therefore, the AFC modular design is one of the key issue that guarantees the required solution of digital transmitting and receiving machine premium properties.
General, AFC module 106 is utilized one section training sequence and corresponding digital baseband received signal, produces control signal by certain interval, controls the output frequency of local voltage controlled oscillator 108.Weigh an AFC performance and comprise two important indicators, i.e. constringency performance and tracking performance.Wherein, constringency performance is meant the start working length of when the transmitting-receiving two-end frequency departure is lower than a predetermined small frequency value (for example 0.1ppm) required time from AFC: the time is short more, and constringency performance is just good more.And tracking performance is meant the ability of AFC control signal output tracking local oscillator frequencies drift---the frequency drift of indication may be produced by multiple reason, and variations in temperature etc. for example, its drift velocity is generally slower.Comparatively speaking, the constringency performance index has more challenge for AFC design, because it has directly determined lock in time, and the time length of cell search process for example.For follow-up control, as long as the bandwidth of AFC intermediate ring road filter generally just can meet the demands greater than frequency drift speed.
Fig. 2 shows the structured flowchart of a kind of slip correlation technique of using always in the prior art in synchronization module.Wherein, obtain baseband digital signal behind reception analog baseband signal process sampling module 20 and the digital filter (in Fig. 2, not drawing).In order to overcome the mis-behave that is caused owing to the sampling time deviation, the sampling rate of sampler should be higher than the spreading rate (Chip Rate) of system here, promptly adopts over-sampling (Oversampling) method.Here recommendation employing multiple is 2 over-sampling speed, and promptly corresponding each chip obtains two sampled values.Although adopt higher over-sampling speed meeting (limited) further to improve performance, also high many of its corresponding Digital Signal Processing complexity.
Then, receive baseband digital signal through a series of delayers 21
1-21
2*N-2Corresponding to 2 times of fast sampling clocks, in Fig. 2, have 2 * (N-1) such delayers, their input clock and sampling clock are consistent.Wherein, at i constantly, from the input and the 2nd, 4 of first delayer of a left side ..., 2 * (N-1) output, constituted one and longly be the sequence r:{r of N
I-2 (N-1), r
I-2 (N-2)..., r
i, the corresponding interior reception data sampling of a nearest N chip.On the other hand, producing another length by pilot code or
synchronous code maker 23 is the codeword sequence s:{s of N
1, s
2..., s
N, its index (code word sequence number) is provided by system's high level or other module detects gained.This codeword sequence obtains another behind the
device 24 and longly is the sequence s of N through gripping altogether
*:
Then, received signal sequence r grips codeword sequence s together
*After pursuing element and multiply each other through N
complex multiplier 22, obtain one and longly be the output sequence y of N
i: { y
I, 1, y
I, 2..., y
I, N.
Above-mentioned correlated process is undertaken by " slip " mode: every a sampling clock, receiving sequence is slided one when sampling kind to the right at interval, the length that promptly is used to be correlated with is that the receiving sequence of N has been upgraded a data sampling in time, simultaneously a collection of N the related data (sequences y altogether of this correlator output
i).To the Digital Signal Processing of output related data, can obtain a series of synchronizing informations by further.
Fig. 3 shows the structured flowchart of a kind of frequency offset estimator based on part correlation and differential phase detection in the prior art.Frequency offset estimator (Frequency Offset Estimator, be called for short " FOE ") by after the received signal sequence of training sequence and correspondence thereof is carried out a series of Digital Signal Processing, obtain the outgoing carrier frequency of local oscillator and the frequency shift (FS) (difference) between the received signal carrier frequency and estimate.Then, AFC will further utilize this Frequency offset estimation to carry out the relevant control signal of handling the controlled local oscillator in back.Therefore, frequency offset estimator is a crucial module among the AFC, and its performance has directly determined the performance index of AFC.
Frequency offset estimator shown in Fig. 3 is a kind of frequency offset estimation techniques commonly used, the corresponding here situation of N=64.With reference to figure 3, list entries y
i: { y
I, 1, y
I, 2..., y
I, 64Produced by sliding correlation detector shown in Figure 2.At first carrying out length is N
p=16 part correlation (PartialCorrelation), common property is given birth to M=N/N
p=4 sections part correlation outputs.Described part correlation calculates as follows: subsequence
By adder 30
kSummation obtains part correlation output c
I, k, k=0 wherein, 1 ..., M-1.Next step carries out difference and merges (Differential Combining), and this is by a collection of device 31 of gripping altogether
0-31
M-2, multiplier 32
0-32
M-2Realize that with an adder 33 the output phase skew estimates c
I, diffCan be expressed as:
Frequency Estimation can be estimated to try to achieve by this phase deviation: at first utilize and get phaser 34 extraction c
I, diffPhase information, then by a multiplier 35 and a constant K
FOEMultiply each other and obtain Frequency offset estimation.Wherein, constant K
FOEBe by frequency offset estimation algorithm and the chip width T of system
cDecision for frequency offset estimator shown in Figure 3: K
FOE=1/ (2 π T
cN
p).For this frequency offset estimator, its frequency offset estimation range be by
Decision,
The frequency shift (FS) that surpasses this Frequency Estimation scope can accurately be estimated little; When SINR was low, this frequency offset estimation range also can further dwindle.Therefore, need sometimes by reducing the part correlation length N
pValue increase the Frequency offset estimation scope.But on the other hand, if N
pBe worth more for a short time, then the Frequency Estimation precision also can descend thereupon.Corresponding spreading rate 1/T
cThe situation of=1.28Mcps is according to some different initial frequency deviation scopes, the N of recommendation
pValue is as follows: (1) initial frequency deviation is in ± 5kHz: N
p=64; (2) initial frequency deviation is in ± 10kHz: N
p=32; (3) initial frequency deviation is in ± 20kHz: N
p=16.
Fig. 4 shows a kind of L﹠amp that calculates based on the normalization correlation function in the prior art; The structured flowchart of R frequency offset estimator.L﹠amp; The R frequency offset estimator be Louis (M.Luise) and Rui Jinini (R.Reggiannini) in March nineteen ninety-five on IEEE Transaction on Communication magazine, at first propose in the paper of " Carrier Frequency Recovery in All-Digital Modems for Burst-ModeTransmission " by name.With reference to figure 4.At first, the output sequence y of sliding correlation detector
i: { y
I, 1, y
I, 2..., y
I, NSuccessively by gripping device 40 and a collection of M delayer 41 altogether altogether
1-41
M, wherein the value of M satisfies 1≤M≤N.At k constantly, input element is y
I, k(k=1,2 ..., N), and the output at each delayer is 0 under initial condition, that is o'clock is carved with y for k≤0
I, k=0.At k constantly, the output of this M delayer respectively is
They respectively with a weighted factor sequence 1/ (N-1), 1/ (N-2) ..., 1/ (N-M) } and by M multiplier 42
1-42
MMultiply each other respectively, pass through an adder 43 then the whole additions of multiplied result.The output of this adder and current input element y
I, kMultiply each other through another multiplier 44 again, be not difficult to obtain it and export available following formulate:
Then, The above results adds up from k=1 to k=N constantly through an accumulator 45, and its output phase skew estimates to be designated as c
I, L﹠amp; R, it can be expressed as:
Wherein,
, for m=1,2 ..., M
Be list entries y
i: { y
I, 1, y
I, 2..., y
I, NNormalized autocorrelation functions.At last, the Frequency offset estimation value of output is to extract phase deviation estimation c by getting phaser 46 earlier equally
I, L﹠amp; RPhase place, then by a multiplier 47 and a constant K
FOEMultiply each other and obtain Frequency offset estimation.Wherein, constant K
FOEBe by frequency offset estimation algorithm and the chip width T of system
cDecision for L﹠amp; R frequency offset estimator: K
FOE=1/[π T
c(M+1)].Can prove L﹠amp; The optimum value of parameter M is M=N/2 in the R frequency offset estimator.L﹠amp; The frequency offset estimation range of R frequency offset estimator is
T wherein
cBe system's chip width.Corresponding spreading rate 1/T
cThe situation of=1.28Mcps and N=64, if initial frequency deviation is in ± 20kHz, then M can adopt its optimum value M=N/2=32.
Fig. 3 and two kinds of frequency offset estimators of the prior art shown in Figure 4 are based on all that correlation technique realizes, they are applicable to the situation that training sequence occurs aperiodic, so adopted in the subsystem for a long time like that.A common feature of these two kinds of frequency offset estimators is that output (c is estimated in its phase deviation
I, diffAnd c
I, L﹠amp; R) phase value in comprised frequency offset information; And its mould value correspondence signal power, reflected the degree of reliability of this estimated value.This characteristic can be utilized carries out carrying out between multiframe and the multipath merging that phase deviation is estimated.
Fig. 5 is the schematic diagram of the frame structure in the TD-SCDMA system.This structure is according to the LCR-TDD pattern (1.28Mcps) among the 3GPP standard TS 25.221 (Release 4), perhaps provides among the CWTS standard TSM 05.02 (Release 3).Referring to Fig. 5, the spreading rate of this system is 1.28Mcps, each radio frames 50
0, 50
1The length of (Radio Frame) is 5ms, i.e. 6400 chips.Wherein, each radio frames can be divided into 7 time slot TS0~TS6 again, and two synchronization slot descending pilot frequency synchronization slot DwPTS and uplink pilot time slot UpPTS, and other protection (Guard) at interval.Further, the TS0 time slot 51
0Be used for bearing system broadcast channel and other possible downlink traffic channel; And TS1~TS6 time slot 51
1-51
6Then be used for carrying the uplink and downlink Traffic Channel.It is synchronous that uplink pilot time slot UpPTS time slot 53 and descending pilot frequency time slot DwPTS time slot 52 are used for setting up initial uplink and downlink respectively.Time slot TS0~6 length are 0.675ms or 864 chips, wherein comprise data segment DATA1 and DATA2 that two segment lengths are 352 chips, and a middle segment length is the secondary synchronization code code word-Midamble training sequence of 144 chips.This training sequence is significant at TD-SCDMA, comprise cell ID, channel estimating and synchronously modules such as (comprising Frequency Synchronization) all to use it.Descending pilot frequency time slot DwPTS comprise one long be the Primary Synchronisation Code code word descending synchronous code 54 of 64 chips, SYNC-DL, its effect is cell ID and sets up initial synchronisation.Uplink pilot time slot UpPTS comprise one long be the descending synchronous code 55SYNC-UL of 128 chips.
Optimum execution mode of the present invention will should be used for specifying in conjunction with the automatic frequency control that user terminal (UE) in the TD-SCDMA system is located.Why choose user terminal rather than base station (BaseStation), be because be in the consideration of economic factor, the frequency stability of the local oscillator that the user terminal place adopts generally relatively poor (for example, 3~13ppm), therefore the Frequency Synchronization problem at the user terminal place has bigger challenge.
The automatic frequency control procedure, particularly its initial frequency synchronization process (convergence process) is married with the initial downlink synchronizing process of user terminal.The initial downlink synchronizing process of user terminal, search of initial zone (the Initial Cell Search) process that is otherwise known as, in this process, comprised a series of frame synchronization, sign indicating number synchronously, multi-frame (Multi-frame) synchronously and subprocess such as Frequency Synchronization.Therefore, here in the TD-SCDMA system automatic frequency correction process of user terminal will describe in conjunction with its initial cell search procedure.
According to the relevant definition among 3GPP standard TS 25.224 (Release 4) or the CWTS standard TSM 05.08 (Release 3), the initial cell search procedure in the TD-SCDMA system can be divided into following four steps:
First step Step1 (DwPTS search): by will be altogether after 32 SYNC-DL code words and received signal sequence carry out relevant treatment or similar processing, obtain the synchronizing information of DwPTS time slot, detect the strongest SYNC-DL code word of signal simultaneously;
The second step Step 2 (scrambler and Midamble sign indicating number detect): after obtaining the DwPTS positional information, can receive the Midamble part received signal that is positioned on the last P-CCPCH channel of TS0 according to TD-SCDMA frame structure user terminal.Because the corresponding code character (CodeGroup) of each SYNC-DL code word, the Midamble code word that has comprised 4 candidates, therefore after the received signal that goes up the Midamble part by code word and TS0 with these 4 candidates is carried out relevant treatment or similar processing, can the system of detecting adopt wherein which Midamble code word; Because there are one-to-one relationship in scrambler (Scrambling Code) and Midamble sign indicating number, so scrambler also can obtain simultaneously;
Third step Step3 (control multi-frame synchronous): in the TD-SCDMA system by the SYNC-DL sign indicating number being carried out QPSK four phase phase modulated and determining to control the beginning of multi-frame according to the phase modulation pattern on the SYNC-DL in continuous four frames.User terminal determines that by the detection of SYNC-DL being gone up the modulation phase pattern control multi-frame is synchronous;
The 4th step Step 4 (reading BCCH information): after acquisition control multi-frame was synchronous, just can know had the BCCH system broadcast message to exist on which frame; User terminal carries out demodulation (Demodulation) and decoding (Decoding) to the reception data on the P-CCPCH of these frames, carries out cyclic redundancy check (CRC) (CYCLIC REDUNDANCY CHECK, CRC check) then; If verification is passed through, then this piece BCCH information is considered to effectively and is delivered to high level, and the initial cell process successfully finishes.
To describe as following, according to the present invention, the automatic frequency correction process will be interted and carry out in whole initial cell search procedure, and farthest reduce frequency deviation to influence that each cell search procedure caused, thereby when finishing Frequency Synchronization, improve the Cell searching probability of success and reduce total search time.
Fig. 6 represents according to the present invention to carry out the flow chart of the method for automatic frequency correction in the initial cell search procedure of TD-SCDMA system.Here the frequency departure of supposing user terminal local oscillator and basestation oscillator is bigger, for example is higher than 3ppm (under the 2GHz carrier wave frequency range, this correspondence be higher than ± initial frequency deviation of 6kHz).In this case, because initial big frequency deviation may surpass the peak frequency estimation range of fine frequency trimming process, therefore need carry out the coarse frequency correcting process earlier at first carries out a frequency coarse adjustment.
With reference to figure 6, at first user terminal carries out the rapid Step 1 of above-mentioned initial cell search first step.Because the local oscillator initial frequency deviation may be bigger, so may adopt part correlation technology such as (Partial Correlation) to come the influence of Chinese People's Anti-Japanese Military and Political College's frequency deviation (for example greater than 3ppm frequency deviation) among the first step Step 1.After first step Step 1 finished, user terminal obtained DwPTS position synchronous information and and SYNC-DL codeword information.According to the present invention, the phase I of AFC, be the coarse frequency correcting process, will after finishing, first step Step1 begin immediately.This coarse frequency correcting algorithm and device will utilize first step Step 1 detected SYNC-DL code word as training sequence, by receiving continuously N altogether
AFC1After the SYNC-DL data on the frame (and near data), carry out frequency offset estimating and relevant FREQUENCY CONTROL.By coarse frequency correcting method of the present invention and device, near the working point of various dissemination channel conditions, adopt parameter N
AFC1The recommendation value between 5 to 10, can make frequency departure be controlled in ± 2kHz (± 1ppm) about in.The determining of this desired value be by the second step Step 2 relevant operation determined: if carry out the method that the Midamble code word adopts total correlation (FullCorrelation) when relevant in Step 2, then the maximum frequency deviation of its requirement is about 1ppm; Otherwise, the second step Step 2 must adopt part correlation or similar approach to resist the influence of big frequency deviation---and relevant emulation shows, compare when adopting the total correlation method under the same conditions with under the little offset frequency situation, the deterioration of adopting these methods and will further influence the performance of whole search of initial zone about 2dB.Therefore, when initial frequency deviation was big, when for example being higher than 1ppm, to carry out coarse frequency correcting between the first step Step 1 and the second step Step 2 be rationally and be necessary.
After finishing the coarse frequency correcting process, search of initial zone Step 2 begins to carry out the detection of Midamble sign indicating number.If the second step Step 2 detects successfully, then after the second step Step 2 finishes, the second stage of AFC, be that the precise frequency trimming process begins immediately.This fine frequency trimming process utilizes the second step Step, 2 detected Midamble code words as training sequence, by receiving the Midamble partial data that TS0 goes up the P-CCPCH channel, carry out frequency offset estimating and relevant FREQUENCY CONTROL process frame by frame, make frequency deviation (for example, ± 0.1ppm) converge to the desired scope of standard gradually.Though this moment, the SYNC-DL code word also was used as training sequence, but because its length (64 chip lengths) is less than Midamble code word size (144 chip) half, so the frequency offset estimation accuracy that obtains based on SYNC-DL compares much lower based on the resulting frequency offset estimation accuracy of Midamble; In other words, even adopted SYNC-DL partly to carry out FREQUENCY CONTROL simultaneously, resulting additional gain is with only to adopt the Midamble receiving unit to compare also very little.Therefore, suggestion here only adopts the Midamble on the TS0 partly to carry out the fine frequency correction.
Fine frequency is proofreaied and correct needs to handle N altogether
AFC2Frame is finished basic convergence process.By fine frequency bearing calibration of the present invention and device, near the working point of various dissemination channel conditions, adopt parameter N
AFC2Value between 10 to 15, just can make estimate frequency departure by bigger probability be controlled in ± 200Hz (± 0.1ppm) in.This desired value is determined by the TD-SCDMA relevant specification on the one hand, on the other hand, the desired maximum frequency deviation of Step 3 algorithms itself is also about 200~300Hz, otherwise the SYNC-DL on from the part of the Midamble on the TS0 to DwPTS partly can produce big phase place rotation owing to the influence of frequency deviation, and makes the detection of phase modulation on the SYNC-DL unreliable.Carry out N in the fine frequency trimming process
AFC2After the frame, search of initial zone third step Step 3 starts working, and promptly finishes the detection of SYNC-DL sign indicating number phase modulation pattern, and realizes the synchronous of control multi-frame.At third step Step 3 duration of works, the fine frequency trimming process is proceeded, and guarantees that frequency deviation is controlled in the target zone, and follows the tracks of because the frequency drift that other environmental factor may cause.
It is pointed out that if user terminal adopts frequency stability local oscillator preferably for example make initial frequency deviation less than ± 1ppm, then described coarse frequency correcting process is not necessary.Can predict, along with the continuous development of technology, the frequency stability of local oscillator also will improve constantly, and in this case, it is necessary that described fine frequency trimming process is only arranged.In this case, first step Step 1 before the fine frequency aligning step, can adopt the training sequence obtaining step, be that receiver is by carrying out Cell searching, perhaps by methods such as notifications, learn a data sequence pattern, this data sequence pattern is to occur by certain way in received signal, for example periodically occurs.
But, consider for economy in the existing available techniques that generally the frequency stability of the local oscillator that uses at user terminal also is not fine, its initial frequency deviation is generally for example about 2.5ppm or higher.On the other hand, the TD-SCDMA system cell is searched among the second step Step 2 in order to adopt the total correlation method to reach better performance as previously mentioned, also require maximum frequency deviation for example be controlled in ± 1ppm about.At this moment, still recommend to adopt described coarse frequency correcting method to carry out the frequency coarse adjustment process of a local oscillator so that maximum frequency deviation for example be controlled in ± 1ppm about, be beneficial to improve the performance of whole Cell searching.
Fig. 7 shows the flow chart that carries out the method for coarse frequency correcting according to the present invention in the TD-SCDMA system.Fig. 8 shows according to the present invention the structured flowchart of realizing a kind of device of coarse frequency correcting in the TD-SCDMA system.Here will a kind of method and corresponding intrument thereof of realizing coarse frequency correcting in the TD-SCDMA system be described according to the present invention in conjunction with Fig. 7 and Fig. 8.With reference to figure 7 and Fig. 8.At first, corresponding step 700, frame counter m is changed to 1.Then, corresponding step 701, user terminal receives by signal data extractor 800 and comprises training sequence for example SYNC-DL and near data thereof in " search window ".Wherein, the DwPTS position given according to the rapid Step of initial cell search first step 1 can obtain the long reception SYNC-DL data sampling in 64 chips for example that is.But, because following consideration also needs to receive the partly interior data sampling of some chips of front and back of SYNC-DL:
(1) the DwPTS position synchronous information that provides of first step Step 1 may be very inaccurate, might have the synchronism deviation in several chip range; Need set up one so-called " search window " this moment near the SYNC-DL synchronous points, solve the synchronism deviation problem that may exist;
(2) for quick multidiameter fading channel, the Strength Changes in each bar footpath is very fast, has a kind of possibility to be, has weakened in previous first step Step 1 detected that (the strongest) path, and have other new strong footpath to occur nearby; At this moment, also need to set up one " search window ", catch near those strong footpaths that may occur the SYNC-DL synchronous points, guarantee the AFC performance.
General, search window should comprise R sampled data that chip is interior after L chip before the SYNC-DL part and the SYNC-DL part, comprises the interior data sampling of L+R+64 chip so altogether.The over-sampling of 2 times of speed solves the sampling time offset issue because suggestion is for example adopted, so will receive 2 * (L+R+64) individual data samplings altogether.Wherein, parameter L and R are and are greater than or equal to zero integer, and their value is by the decision of factors such as system design and actual working environment, and the recommendation value is L=R=16.
Then, corresponding step 702, sliding correlation detector 801 is as shown in Figure 2 sent in the sampling of described 2 * (L+R+64) individual data successively, and wherein correlation length is the length of SYNC-DL code word, promptly 64.Obtain totally 2 * (L+R+1) batches of relevant outputs of sliding so altogether, wherein every batch of output has comprised 64 multiplied result.Frequency offset estimator 802 is sent in these 2 * (L+R+1) batches relevant outputs of sliding successively, and obtains corresponding phase deviation estimated sequence.Wherein, frequency offset estimator 802 can adopt as Fig. 3 or structure (N=64) shown in Figure 4, the frequency offset estimator that perhaps adopts other to realize based on correlation technique.
By the output order, all 2 * (L+R+1) individual phase deviation estimated values have constituted one and have contained 2 * (L+R+1) phase deviation estimated sequence.For convenience of description, remember that this phase deviation estimated sequence is
Wherein subscript has represented that this sequence is by resulting based on the reception data in the m frame.
Then, corresponding
step 703 is deposited the described phase deviation estimated sequence that calculates in a
memory 803 in the m frame.Then, step 704 is carried out increasing progressively of frame counter m, and the data in having judged whether the M frame treated by step 705: if condition m〉M is for false, and then return
step 701 and continue to handle relevant data in the next frame; Otherwise, if condition m〉and M be true, shows the data of handling in the frame that is over, store M in the
memory 803 at this moment and criticized the phase deviation estimated sequence
M=1 wherein, 2 ..., M.In corresponding intrument shown in Figure 8, this judgement is used to control a switch 804: this switch disconnects during beginning, this switch closure after handling the M frame data, thus make
multiframe combiner 805 can from
memory 803, read the phase deviation estimated sequence.
After handling intraframe data, corresponding step 706, phase deviation estimated sequence in the M frame that multiframe combiner 805 will read from memory 803 merges by certain mode, obtains length after multiframe merges and be 2 * (L+R+64) phase deviation estimated sequence q:{q
1, q
2..., q
2 * (L+R+1).Wherein, described merging mode can have multiple mode, comprising:
(1) directly addition.Also be about to will carry out addition corresponding to the value of same position successively in all M the phase deviation estimated sequences, can be expressed as follows with formula:
For k=1,2 ..., 2 * (L+R+1)
(2) merge by " most symbol criterion ".That is corresponding to each position k (k=1,2 ..., 2 * (L+R+1)) and last M phase deviation estimated value altogether
(m=1,2 ..., M), abandon the wherein inconsistent phase deviation estimated value of most of symbols of those phase value symbols and M value, and remaining those phase deviation estimated values carried out addition.For reaching this purpose, at first, corresponding each position k (k=1,2 ..., 2 * (L+R+1)), the phase value symbol s that obtains occupying the majority
k:
Wherein, function arg represents complex values is got the operation of its phase value, its codomain be [π, π); Function sgn then represents the operation of the real number operand being got symbol, that is:
Then, corresponding each position k obtains following frame number S set
k:
At last, carry out the multiframe merging as follows and obtain sequence q:
, for k=1,2 ..., 2x (L+R+1)
(3) merge by method of weighting.Also be about to each phase deviation estimated value
Add up again after being weighted, for example, can select the respective weight value
For
The mould value, that is:
Then, merge as follows and obtain sequence q:
For k=1,2 ..., 2 * (L+R+1)
Wherein, symbol " || " expression modulo operation.
(4) merge by comparative result with some thresholdings.At first, calculate in the M frame mean value c of the mould value of phase deviation estimated value on all positions
Avg:
Then, at c
AvgThe superior preset parameters T in basis
cObtain threshold value c
AvgT
c, and corresponding each position k obtains following frame number set R
k:
At last, carry out the multiframe merging as follows and obtain sequence q:
, for k=1,2 ..., 2 * (L+R+1)
The parameter T here
cBe an arithmetic number, for example desirable T
c=2.
In above-mentioned merging method (2)~(4), the various specific process that adopted all are for the accuracy after strengthening multiframe and merging, and avoid in certain frame some wrong phase deviation to estimate multiframe is merged the issuable adverse effect of back precision of estimation result.The phase deviation of described mistake estimate may since at that time SINR cross low or be in deep fade situation following time and cause.Certainly, even adopt the simplest merging method (1), promptly the method for direct addition generally also can obtain estimated performance preferably.
Subsequent, corresponding step 707 merges gained phase deviation estimated sequence according to described multiframe, calculates the time delay envelope in the search window.This time delay envelope is to ask mould value device 806 by each element of list entries q delivery is successively obtained by another, is 2 * (L+R+1) sequence d with another length:
{ d
1, d
2..., d
2 * (L+R+1)The described time delay envelope of expression, then have:
d
k=| q
k|, for k=1,2 ..., 2 * (L+R+1)
Then, corresponding step 708 will be carried out the process of Path selection based on described time delay envelope.At first, the maximum P in the time delay envelope
MaxAnd average value P
MeanCalculate by maximum and mean value computation device 807, wherein
Then, based on P
MaxAnd P
Mean, and two parameter T in addition
1And T
2, Path selection step 708 and respective path selector 808 thereof will be tried to achieve a threshold value T
PS, it can be expressed as:
T
PS=max{P
max-T
1,P
mean+T
2}
Two parameter T wherein
1And T
2Be used in conjunction with P
MaxAnd P
McanDetermine threshold value T
PS, they notice that all greater than 0 their unit is dB here.T
1And T
2Preferred value should determine according to the setting of designing requirement and other related parameter values.For example, be provided with for the L=R=16 parameter, and when adopting described most symbol criterion to merge, the parameter T of recommendation
1And T
2Be set to: T
1=6dB and T
2=6dB.
Referring to Fig. 9, be depicted as the method for in the coarse frequency correcting process, carrying out Path selection according to the present invention.Path selection step 708 and corresponding path selector 808 pass through relatively time delay envelope sequence d and threshold value T
PSCarry out Path selection, promptly only work as the tap d in the time delay envelope
kGreater than T
PSThe time, respective path is just selected, obtains one group of active path location sets S like this, can be expressed as:
S={k|d
k>T
PS,1≤k≤2×(L+R+1)}
Notice that if find that the active path location sets S that obtains as stated above is an empty set, then the position with that footpath of the maximum correspondence in the time delay envelope adds in the S set.
On the other hand, the restriction that also can be further make the maximum number of selecting the path: if the quantity that comprises the path in the S set is greater than a parameter L
P, then only keep wherein d
kThe L that value is maximum
pPaths; Otherwise S set remains unchanged.After this processing, the number of path that comprises in the S set mostly is L most
pBar.Here, parameter is a positive integer, recommends L
pValue is between 2~6.Parameter L
pOptimum value should determine according to specific implementation and design object.
As a kind of special circumstances, also can get pairing that footpath of maximum in the time delay envelope simply as output (that is the L of Path selection
P=1 situation), about showing at this, emulation in particular cases also can obtain good performance.
Then, corresponding step 709, phase deviation estimates that combiner 809 merges the phase deviation estimated value on the described selected path, the phase deviation that obtains after multipath merges estimates to be designated as q
Comb, it can be expressed as:
Subsequent, corresponding step 710 obtains the Frequency offset estimation value according to the phase deviation estimated value after the described multipath merging, and this is to extract phase deviations estimation q by getting phaser 810
CombIn phase information, then by multiplier 811 and a constant K
FOEMultiply each other, obtain final Frequency offset estimation value FO
Est, it can be expressed as:
FO
est=arg(q
comb)×K
FOE
Wherein, phase operation is extracted in function arg () representative, and K
FOEThen be by frequency offset estimation algorithm and the chip width T of system
cDecision, as previously mentioned.
At last, corresponding step 711, the Frequency offset estimation value FO of gained
EstVoltage-controlled characteristic according to local oscillator is converted into control voltage, and controls local oscillator through DAC, thereby finishes the coarse frequency correcting process one time.
According to the present invention, owing to adopted " search window " to overcome the influence of synchronism deviation and multipath transmisstion, and utilize weighted to improve Frequency offset estimation performance under the fast fading channel, and adopted multiframe merging and multipath to merge dual mode and realized time diversity and rake, so the coarse frequency correcting method and the device of the present invention's proposition, can under various abominable mobile telecommunication channel propagation conditionss, keep good performance, to guarantee the operate as normal of correlation module in the receiver.
Figure 10 carries out the structured flowchart that fine frequency is proofreaied and correct in the TD-SCDMA system according to the present invention.Described fine frequency trimming process is based on that Kalman (Kalman) filter theory realizes by a first-order loop.At first, received RF signal is through down-conversion demodulator 1010 and through being converted into digital baseband signal behind ADC, AGC and the RRC filter, follow the sampled data in the Midamble receiving unit that signal data extractor 1011 is 144 chips according to length in the last P-CCPCH channel of frame synchronization information extraction TS0, corresponding to 2 times of over-sampling situations, extracted 144 * 2=288 Midamble data sampling altogether.This segment data sampling plays an important role for system synchronization, will be used in channel estimating, route searching, SINR estimation and the frequency offset estimation module.Corresponding length is that 144 Midamble training sequence is produced by Midamble codeword generator 1012, and its codewords indexes is detected by the previous search of initial zone second step Step 2.
Then, this section Midamble data sampling is admitted to channel estimating and path-searcher 1013.This module is relevant by Midamble data sampling and corresponding Midamble training sequence are carried out (circulation), obtains one group of channel estimation value.Notice that because the coarse frequency correcting process that realizes according to the present invention less frequency shift (FS) control can guarantee associative operation in the channel estimating by total correlation mode (corresponding with the part correlation mode), this has just improved the estimated accuracy of channel estimation module.The average estimated channel power value that calculates in the present frame, constituted the time delay envelope (Delay Profile) of present frame, and route searching is according to the time delay envelope of present frame and in conjunction with the time delay envelope of former some frames, and according to some preset threshold value, in conjunction with current maximum path power and average noise power, judge which paths is an active path.Note owing to adopted 2 samplings, so the resolving accuracy in path is 1/2 chip width.Because channel estimating and route searching particularly mobile communication system extensive use of wireless communication system in each are so the relevant technologies personnel are very familiar to its related algorithm and implementation method in this area, so repeat no more here.Here channel estimating will be exported the amplitude and the phase value in all paths in so-called " channel estimation window ", for example, the channel estimating window width can be decided to be 16 chips, and corresponding to 2 times of over-samplings, common property is given birth to the amplitude and the phase value of 16 * 2=32 paths in this estimating window.Wherein, described every paths is represented a time delay tap (Delay Tap).Simultaneously, channel estimating also can be exported channel estimating all channel estimation values outside window in the correlation length, offers when module such as measurement is estimated parameter such as SINR to use.On the other hand, the path searcher module positional information of active path in the delivery channel estimating window then.Here suppose that path searcher module produces L bar active path positional information at most.Other module in the receiver comprises demodulation (Demodulation) module, synchronous (Synchronization) module and measurement (Measurement) module etc., will utilize these active path positional informations and channel estimation value to carry out relevant work.
With reference to Figure 10, the path merges and correlator (module) 1014 utilizes described routing information and corresponding channel estimation value again, and the mode that merges (Maximum Ratio Combining is called for short " MRC ") by maximum ratio is carried out the merging of mulitpath.Figure 11 is the structured flowchart that carries out a kind of device of path merging according to the present invention in fine frequency trimming process as shown in figure 10, and it adopts following method to carry out the path merging:
(a) one of the received signal of corresponding training sequence group of sampled value obtains a collection of data sequence at first by a collection of delayer, and the delay value of wherein said delayer is to be determined by the path position information that path searcher module produces;
(b) will by step (a) gained a collection of data sequence, obtain a collection of new data sequence through the plurality of data of deletion head behind a collection of canceller, its length is equal to training sequence length and multiply by the over-sampling multiple;
(c) will be in steps a collection of data sequence of (b) gained, obtain another batch data sequence through behind a collection of down-sampler, its length is equal to training sequence length;
(d) will be by a collection of data sequence of step (c) gained, by with after the value of gripping multiplies each other altogether of the channel estimation value of respective path, pursue the element addition again, promptly obtain a data sequence by maximum ratio merging mode, its length equals the length of training sequence;
(e) will be by a data sequence of step (d) gained, after pursuing element and multiply each other with gripping altogether of training sequence code word, obtain a new data sequence as output, its length equals the length of training sequence.
According to said method, this module is to adopt similarly to carry out chip-level with structure RAKE receiver and merge.This module be input as 288 Midamble data samplings, they will at first pass through one group of delayer 1101
1-1101
LWherein, delayer 1101
kCorresponding k paths, its time delay value is T
Max-1-T
k(unit is the sampling interval, i.e. 1/2 chip) is the k paths positional information T that is produced by path searcher module
k, through a subtracter 1102
kThe back is produced.Wherein, article one path is generally article one path in the channel estimation window, its relative time delay T
1=0, and the relative time delay in other path satisfies 1=<T
k<=T
Max-1 (for 2=<k<=L); T wherein
MaxThen represented the width of channel estimation window, it is a unit with the sampling interval (i.e. 1/2 chip) also, for example desirable T
Max=2 * 16=32 is corresponding to 16 chip width.The effect of this a collection of delayer is with the data on each path " alignment " again according to path position information.Each delayer is output as common 288+T
Max-1 sampling notices that the head end of the delay data that produces and end may need zero padding owing to the effect of time-delay on every paths.Then, this L criticizes a T of the output of delayer
Max-1 data is by passing through canceller 1103 respectively
1-1103
LDeleted, remaining L criticizes the data that length is 288 samplings.Then, by a collection of 2 times of down-samplers 1104
1-1104
L, the odd number of each batch data needs sampled data, that is the 1st, 3,5 ..., 287 samplings totally 144 data be retained, all the other are dropped.Then, this L batch data is respectively by multiplier 1105
1-1105
LMultiply each other with a collection of weighted factor; Wherein, the weighted factor h of k paths
Tk *, be that the relative position that is produced by channel estimating is T
kThat paths on channel estimation value h
Tk, through gripping device 1106 altogether
kThe back produces.Subsequently, after these all L criticize data after the weighting and merge by adder 1107, obtain one group of sequence that contains 144 data samplings altogether.At last, this data sampling sequence be 144 Midamble training sequence through gripping length that device 1109 grips altogether altogether, after pursuing element and multiply each other through a multiplier 1108, finally obtain a collection of length and be 144 relevant output.
Another kind be used for realizing route merge with relevant device as shown in figure 12.It adopts following method:
(a) will separate by parity from the path position information that path searcher module produces; Simultaneously, these path position upper signal channel estimated values are also separated according to the parity of path position;
(b) with a collection of delayer of training sequence code word process, obtain a collection of data sequence; Wherein the delay value of delayer is determined by the odd positions path respectively;
(c) will be by a collection of data sequence of step (b) gained, the channel estimation value with respective path multiplies each other respectively, obtains a collection of new data sequence;
(d) will through by after the element addition, obtain a new data sequence by a collection of data sequence of step (c) gained;
(e) will through canceller deletion afterbody plurality of data, and through after gripping altogether, obtain a new data sequence by a data sequence of step (d) gained, its length equals the length of training sequence;
(f) with a collection of delayer of training sequence code word process, obtain a collection of data sequence; Wherein the delay value of delayer is determined by the even number location paths respectively;
(g) will behind the repeating step (c)~(e), obtain another new data sequence by a collection of data sequence of step (f) gained, its length equals the length of training sequence;
(h) signal sampling value that will receive corresponding training sequence obtains two data sequences by the odd even sequence number through behind the splitter, and its length is equal to training sequence length;
(i) will be by two data sequences of the corresponding odd even sequence number of step (h) gained, respectively with pursue element respectively by two data sequences of step (e) and step (g) and multiply each other, obtain two new data sequences;
(j) will pursue the element addition by two sequences of step (i) gained after, obtain a new data sequence as output, its length equals the length of training sequence.
According to said method, with reference to Figure 12, at first, input length is that 288 Midamble partly receives data sampling, passes through splitter 1200 and is divided into two long sequences of 144 that are by odd indexed and even number sequence number.Simultaneously, from channel estimating and the next common L paths positional information { T of path-searcher
1, T
2..., T
L(0=<T
k<=T
Max-1), is divided into two-way by parity, is designated as { T respectively through separator 1201
Odd, 1, T
Odd, 2..., T
Odd, L1And { T
Even, 1, T
Even, 2..., T
Even, L2, wherein L1 and L2 are respectively the number that the position value is respectively the path of odd and even number.Accordingly, the channel estimation results { h of input
T1, h
T2..., h
TLAlso the parity according to the respective paths position be divided into two-way: { h
Todd, 1, h
Todd, 2..., h
Todd, L1And { h
Teven, 1, h
Teven, 2..., h
Teven, L2.Then, be that 144 Midamble input data are by a collection of delayer 1202 with length
1-1202
L1, and a collection of multiplier 1203
1-1203
L1, and by accumulator 1206
1All after the addition, realize convolution (Convolution) process with odd positions path channel estimated sequence.Notice that delayer is for input time delay Control Parameter T here
k, will be the time-delay of input data
Individual data unit (symbol wherein
Expression rounds operation), and, make the dateout segment length be where necessary in head end and terminal zero padding
So that each circuit-switched data alignment.Like this, accumulator 1206
1Being output as length is
Data sequence, through canceller 1207
1It is last to delete it
After the individual data, remaining length is 144 data sequence; Then, this sequence is through gripping device 1208 altogether
1After gripping altogether, by multiplier 1209
1Pursue element with the odd indexed data sampling of splitter 1200 output and multiply each other, obtain one group and estimate that by the odd positions path channel length that obtains is that 144 related data is exported.Similarly, by a collection of delayer 1204
1-1204
L1, a collection of multiplier 1205
1-1205
L1, an accumulator 1206
2, canceller 1207
2, grip device 1208 altogether
2, and by multiplier 1209
2Pursue element with the even number sequence number data sampling of splitter 1200 output and multiply each other, can obtain another and organize corresponding even number position path channel and estimate that the length that obtains is that 144 related data is exported.At last, the related data that the corresponding respectively odd and even number location paths of described two-way channel estimating is obtained is by adder 1210 additions, just obtained length and be 144 relevant output result.
Then, with reference to Figure 10, the Midamble after this batch merges through multipath receives data and is admitted to frequency offset estimator 1015 with Midamble code word that this locality produces, and the output frequency skew is estimated
Here can select frequency offset estimator (N=144), perhaps the frequency offset estimator of other type according to specific implementation constraint and designing requirement as Fig. 3 or Fig. 4.Wherein, extracting
phaser 34 or 46 can simplify as follows.For input phase skew estimated value c=c
Real+ j*c
Imag, traditional method is by following formula:
And obtain phase value according to ten thousand methods such as table look-up.But, work as c
Real/ c
ImagValue hour, first conduct can only getting in the following formula Taylor series expansion is approximate, that is:
If
Wherein, c
RealThe portion of buying for phase estimation value; c
ImagImaginary part for phase estimation value.
For Fig. 3 and two kinds of frequency offset estimator structures shown in Figure 4, the λ value of being recommended is respectively 1.0 and 0.5 (corresponding respectively frequency deviation value 5.66kHz and 5.58kHz).On the other hand, if calculate the c of gained
Real/ c
ImagValue then directly estimates that with output phase the value of θ is changed to λ during greater than λ.Relevant emulation shows that this simplification is very little to the AFC Effect on Performance.Adopt this method, only need to adopt a division arithmetic and a comparison operation, just can be similar to and obtain phase estimation value, its complexity and memory space are all simply a lot of than direct calculating arctan function arctan.
It needs to be noted that multipath merging was here carried out before Frequency offset estimation.And in other many AFC method and apparatus, the two order is opposite often.For example European patent EP 1300962, denomination of invention is among " automatic frequency correcting device and automatic frequency correcting method " (AutomaticFrequency Control Device and Automatic Frequency Control Method), Frequency offset estimation is at first carried out respectively on every paths, and then merges by maximum ratio merging mode.In the present invention, before Frequency offset estimation, carry out, get final product so the present invention only need carry out a Frequency offset estimation because multipath merges; According to above-mentioned invention of quoting then needs carry out repeatedly Frequency offset estimation, its number of times equates with number of path, so its complexity will exceed much than the complexity of the counter structure among the present invention.On the other hand, relevant emulation shows that these two kinds of performances that structure reached are very approaching.
With reference to Figure 10, the routing information and the channel estimation results of channel estimating and path-searcher 1013 outputs are admitted in the SINR estimator module 1016, produce present frame SINR estimated value.This SINR estimator also is based on TS0 and goes up the SINR estimated value that Midamble sign indicating number in the P-CCPCH channel obtains present frame.Figure 13 represents according to the present invention in fine frequency trimming process as shown in figure 10, a kind of flow chart that utilizes channel estimating and route searching result to carry out the SINR estimation approach.Wherein, in step 130, according to the active path positional information that path searcher module provides, the SINR estimator just can obtain signal power estimated value S with the average estimated channel power addition of present frame on these paths.On the other hand, in step 131, according to the noise path positional information (being all the non-active paths in the associated window) that path searcher module provides, the SINR estimator just can obtain the average estimated channel power addition of present frame on these paths disturbing and noise power estimated value N.In step 132, the SINR estimated value of present frame is calculated as follows at last:
SINR
k=S/N/D
Wherein, D represents " channel estimating correlation length ", when channel estimating is carried out in representative, and the length of the training sequence that adopts; For preferred embodiment described here, it is the situation in the TD-SCDMA system, this value can be taken as and equals 128---and this is the interior data sampling of back 128 chips that has adopted 144 chip Midamble data because of channel estimating, and the SINR value that will estimate is meant received power and the ratio of being with interior interference noise power spectrum density in each chip.Variable SINR
kSubscript k to represent this be the SINR estimated value that obtains in the k frame.
Figure 14 illustrates according to the present invention in fine frequency trimming process as shown in figure 10, and another kind carries out the flow chart of SINR estimation approach.Wherein, with reference to Figure 14, the input of affiliated SINR method of estimation come from that as shown in figure 12 path merges and the relevant apparatus structured flowchart in middle output point A~F.Wherein, be respectively channel result on the active path of odd and even number position from the data of an A and some B, they pass through signal power calculator 142 respectively
1With 142
2After, obtain signal power value S1 and signal power value S2 on the active path of corresponding odd and even number position.Described signal power calculator 142
1-2Can obtain corresponding signal power by performance number summation back with its all input channel estimated values.On the other hand, obtaining length from being input as on each point of Figure 12 point C~F in every frame is a data sequence of 144, be respectively on its mid point C and the some E by training sequence respectively with odd and even number location paths estimation convolution after the output sequence that obtains; And some D is respectively the corresponding receiving sequence of the two-way that obtains behind the process separator 1201 with putting on the F.With reference to Figure 14, pass through subtracter 141 from data sequence and the data sequence of a C from a D
1After, its sequence of differences is at process noise power calculation device 143
1After, calculate noise power-value N1; Similarly, pass through subtracter 141 from the data sequence of an E with data sequence from a F
2After, its sequence of differences is at process noise power calculation device 143
2After, calculate noise power-value N2.Described noise power calculation device 143
1-2Can obtain corresponding noise power by the average power content that calculates its input data sequence.At last, signal power value S1, S2, and noise power-value N1, N2 estimate output by the SINR that obtains present frame after combiner 144 merging.Wherein, combiner 144 can adopt a kind of in following several merging method:
(1) merging method 1:
(2) merging method 2:
(3) merging method 3:
(wherein symbol M AX represents the maximizing computing)
Connect and see, with reference to Figure 10, Kalman Kalman gain factor calculator 1017 utilizes the SINR of present frame to estimate, carries out the renewal of described first-order loop gain factor.Institute's updated parameters comprises: measure noise variance R
k, estimate variance P
kWith Kalman Kalman gain factor K
k, wherein subscript k represents the sequence number of present frame.Figure 15 shows that the flow chart that in fine frequency trimming process as shown in figure 10, carries out Kalman Kalman gain factor Calculation Method according to the present invention.(promptly enter before the fine frequency trimming process) under the initial condition, in step 1501, P
0Be endowed an initial value, general, P
0Should be provided with according to the variance that enters fine frequency correction frequency deviation before.According to the present invention, P
0Should determine that recommendation is P according to the variance of the output frequency deviation of coarse frequency correcting
0=(2000)
2In addition, P
0Also can determine according to the SINR value of being surveyed at that time.
Next, the fine frequency means for correcting is started working, and in step 1502, the initial value of frame counter k is made as 1.Then in step 1503, the frequency offset estimating variance R of present frame
kWill be based on the SINR estimated value SINR of present frame
kCalculate, concrete computing formula is:
This formula comes to obtain at the TD-SCDMA system according to improved Cramer-Rao circle because relevant emulation shows, as Fig. 3 or frequency offset estimator shown in Figure 4 in or can approach this performance bound well under the high SINR condition.Wherein, according to Cramer-Rao circle, the value of constant K R should be determined according to relevant system parameters:
Wherein, T
cRepresented system's chip width, and N has represented the length of used training sequence.For TD-SCDMA system, 1/T
c=1.28Mcps, and the length N of used Midamble code word=144 can get K in view of the above
R=(288.8)
2The specifying information of relevant improved Cramer-Rao circle, can be outstanding with reference to peace people such as (A.N.D ' Andrea) delivered on the IEEE Transaction on Communication magazine in 1994, name is called the paper of " The Modified Cramer-Rao Bound and Its Applications toSynchronization Parameters ", and one of ordinary skill in the art is easy to grasp.
Follow in step 1504 Kalman Kalman gain factor K
kR by present frame calculating
kP with former frame calculating
K-1Try to achieve, according to Kalman Kalman filtering theory, calculating K
kFormula be:
K
k=P
k-1(P
k-1,+R
k)
-1
Then in step 1505, judge the K that is calculated
kWhether value is less than a preset value K
LOWIf, K
k<K
LOW, then enter step 1507, change K
kMake it equal K
LOW, with seasonal P
k=P
K-1Otherwise, if K
k〉=K
LOW, then enter step 1506, according to Kalman Kalman filtering theory, by
Present frame calculates the K of gained
kValue and former frame calculate P
K-1Value is calculated P
kValue:
P
k=(1-K
k)P
k-1
Here, to K
kThe purpose of following amplitude limit is: when loop gain is too small, be difficult to follow the tracks of very fast frequency drift; Therefore, need be to loop gain K
kFollowing amplitude limit is to guarantee to follow the tracks of the upper frequency skew.The Lower Limit Amplitude K that recommends
LOWBe 1/64 or 1/128---K
LOWPreferred value should determine by specific implementation and operational environment.
Then, in step 1508, the output Kalman Kalman gain factor K that present frame calculated
kTo loop filter.Then in step 1509, frame counter k adds 1, prepares to carry out having in the next frame renewal of related parameter.
Then, with reference to Figure 10, first-order loop filter 1018 will be according to input
(Frequency offset estimation that present frame calculates) and K
k(the Kalman Kalman gain factor that present frame calculates) carries out first-order filtering, and the Frequency offset estimation value that adds up of output present frame
With reference to Figure 16, be depicted as the implementation structure block diagram of the first-order loop filter in fine frequency correcting structure as shown in figure 10 according to the present invention.Wherein, input
At first with Kalman Kalman gain factor K
kMultiply each other by a
multiplier 161, then with former frame in output
By
adder 162 additions, obtain output and can be represented by the formula:
The effect of
delayer 163 is the output of preserving present frame
And feedback is used in next frame.
In addition, as a kind of simplification, also can be fixed as loop gain among several particular values, for example { 1.0,0.5,0.1,0.05,0.01} gets the output K of the most approaching above-mentioned Kalman Kalman gain factor calculator in this set then
kThat value, as present frame control loop yield value.Can simplify relevant operation like this, performance does not have big loss simultaneously.
In addition, according to estimate variance P
kValue, can judge whether current AFC adjustment process restrains.Perhaps, also can judge whether to reach convergence according to this mean value again by to after Frequency offset estimation averages in nearly several frames.Owing to adopted Kalman Kalman filtering theory to come the gain of adjustment loop filter adaptively among the present invention, and the gain of adopting convergence judged result to come the adjustment loop filter unlike some AFC methods, so this convergence determining step is not necessary in the present invention.But, as an available alternative item, can utilize described convergence determination methods, if whether carry out auxiliary judgment AFC loop restrains---find that within a certain period of time the AFC loop does not reach convergence yet, then described fine frequency bearing calibration can be re-executed, perhaps relative synchronous step before be re-executed (also might be because the synchronizing information or the training sequence of other module input are wrong in the receiver because the AFC loop is not restrained).
At last, with reference to Figure 10, the output of first-order loop filter 1018 is converted into control voltage according to the voltage-controlled characteristic of local oscillator 1019, and controls local voltage controlled oscillator 1019 through DAC, thereby has finished the fine frequency trimming process in the present frame.In next frame, above-mentioned fine frequency trimming process will repeat.Like this, along with the increase of handling frame number, the output of loop filter control constantly obtains upgrading, and makes 1019 outgoing carrier frequency of local oscillator
Constantly approach the practical carrier frequency fk of input signal, and make the difference between them, promptly residual frequency offseting value reaches the desired value (for example, the 0.1ppm of standard defined or lower) that guarantees other module operate as normal in the receiver.
Because the present invention has adopted a kind of estimator of optimum---Kalman Kalman filter is realized the first-order loop structure that fine frequency is proofreaied and correct, so can keep good performance under different channel conditions.Those skilled in the art should be able to understand, Kalman Kalman filtering theory is a kind of optimal estimation theory that R.E.Kalman delivers on the 82nd phase as far back as 1960 " American Society of Mechanical Engineers's journals " (" Transaction of the ASME "), has obtained using widely in fields such as control, communication.Adopt the method and apparatus of Kalman Kalman filtering theory design, can obtain very good performance.Yet, may be for following reason, this theory but seldom is used in the actual AFC application:
(1) how in the AFC loop, to obtain needed relevant estimated parameter, for example estimate variance value R in the Kalman Kalman filter
kDeng;
(2) compare with other method, it is comparatively complicated that the AFC loop of application card Germania Kalman filter structure design may seem.
But the present invention passes through to add the SINR estimator in the AFC loop, and by the MCRB performance bound SINR is estimated to export conversion and measure noise variance value R
kValue, and estimate variance P
kInitial value P
0Mean-square value expection according to the incoming frequency deviation is determined, thereby simply Kalman Kalman filter is achieved in AFC uses.In addition, also lower according to the present invention according to the complexity of the fine frequency trimming process of Kalman Kalman filtering theory design, required signal processing work generally can be in software simple realization.This be because:
(1) at first, the renewal of related parameter is arranged in the Kalman Kalman filter according to the present invention, comprise and measure noise variance R
k, estimate variance P
kWith Kalman Kalman gain factor K
kDeng, all be that every frame only upgrades once, and its calculating also is limited to some multiplication and division computings and plus and minus calculation.General, the length of a frame is relatively large in the wireless communication system, and for example the length of a frame is 5ms among the TD-SCDMA.Therefore, have in the described Kalman Kalman filter that computation complexity all is very low in the renewal frequency of related parameter and the each renewal process;
(2) secondly, measure noise variance R according to the present invention in order to calculate
kUsed SINR estimator, its realization is also very simple.For example, adopt the SINR estimator of realizing as Figure 13, need only use channel estimating and route searching result in the present frame, and just can obtain by some simple operations (a hundreds of quadratic sum add operation).On the other hand, other receiver module is for example measured (measurement) module and may also will be calculated this value, and just need not carry out once extra SINR separately for the AFC module and calculate this moment.
Especially, according to the present invention, the loop gain factor will according to the estimated SINR value of present frame dynamically adjust to present frame Frequency offset estimation value gain---general, the SINR value is high more, show that current Frequency offset estimation value is credible more, its gain is also just high more; Otherwise the SINR value is low more, shows that current Frequency offset estimation value is insincere more, and its gain is also just low more.Therefore, compare with the AFC loop structure of some other retainer ring path filter gain factor, fine frequency method of adjustment and device that the present invention proposes, can be according to channel condition adjustment loop gain adaptively at that time, to reach best loop convergence performance, Frequency Synchronization work is accomplished fast.This has significance for the search of initial zone time that shortens the TD-SCDMA system.
So far, described a kind of preferred forms of the present invention in conjunction with the accompanying drawings in detail.Those of ordinary skill in the art should recognize, here be used to describe various logical units of the present invention, module, circuit and algorithm steps etc., can adopt electronic hardware (electronic hardware), computer software (computer software) or their combination to put into effect.Here all being to describe according to their function usually to various elements, unit, module, circuit and step, adopting hardware or software during realization actually, is that concrete application and the design constraint by whole system decides.Those of ordinary skill in the art should recognize the interchangeability of hardware and software under specific circumstances, and can adopt best mode to realize a class automatic frequency correcting method described in the invention at concrete application.
For example, here be used to describe various logical units of the present invention, module, circuit and algorithm steps etc., can be in the following ways or their combination realize, comprising: digital signal processor (DSP), special purpose integrated circuit (ASIC), field programmable gate array (FPGA) or other programmable logic device, (discrete) gate (gate) or transistor (transistor) logic of separating, the hardware component (for example register and FIFO) that separates, carry out the processor of a series of firmwares (firmware) instruction, traditional programming software (programmable software) and relevant processor (processor) etc.Wherein, processor can be microprocessor (microprocessor), also can be traditional processor, controller (controller), microcontroller (microcontroller) or state machine (state machine) etc.; Software module can be present in RAM memory, flash memory (flash memory), ROM memory, eprom memory, eeprom memory, register, hard disk, moveable magnetic disc, CD-ROM or any existing known storage medium.
The obviously clear and understanding of those of ordinary skill in the art, the most preferred embodiment that the present invention lifted only in order to explanation the present invention, and is not limited to the present invention, the present invention for the technical characterictic among each embodiment, can combination in any, and do not break away from thought of the present invention.According to a kind of automatic frequency correcting method and equipment that is applied in the time-diviional radiocommunication system disclosed by the invention, can there be many modes to revise disclosed invention, and except the above-mentioned optimal way that specifically provides, the present invention can also have other many embodiment.Therefore, all genus are conceived getable method of institute or improvement according to the present invention, all should be included within the interest field of the present invention.Interest field of the present invention is defined by the following claims.