CN100533754C - Semiconductor energy detector - Google Patents

Semiconductor energy detector Download PDF

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Publication number
CN100533754C
CN100533754C CNB2007100070432A CN200710007043A CN100533754C CN 100533754 C CN100533754 C CN 100533754C CN B2007100070432 A CNB2007100070432 A CN B2007100070432A CN 200710007043 A CN200710007043 A CN 200710007043A CN 100533754 C CN100533754 C CN 100533754C
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diffusion layer
conduction type
semiconductor substrate
incidence
layer
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CN1996607A (en
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米田康人
赤堀宽
村松雅治
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Hamamatsu Photonics KK
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Hamamatsu Photonics KK
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Abstract

A photodiode array 1 includes P<+> diffusion layers 4 and 5, N<+> channel stop layers 6 and 7, an N<+> diffusion layer 8 and the like. The P<+> diffusion layers 4 and 5 and the N<+> channel stop layers 6 and 7 are provided on a surface side opposite to an incident surface of a semiconductor substrate 3. The N<+> channel stop layer 6 is provided between the P<+> diffusion layers 4, 5 adjacent to each other, and exhibits a form of lattice so as to separate the P<+> diffusion layers 4, 5. The N<+> channel stop layer 7 is provided in the form of frame on the outside of an array of the P<+> diffusion layer 5 continuously with the N<+> channel stop layer 6. The N<+> channel stop layer 7 is set wider than the N<+> channel stop layer 6. To the incident surface of the semiconductor substrate 3, a scintillator is optically connected.

Description

Semiconductor energy detector
(the application be the denomination of invention submitted March 28 calendar year 2001 dividing an application) for the application 01807540.1 of " semiconductor energy detector "
Technical field
The present invention relates to be used for surveying the semiconductor energy detector of beams such as radioactive ray.
Background technology
As this kind semiconductor energy detector, for example people know the spy and open disclosed the sort of element in the flat 5-150049 communique.Open disclosed semiconductor energy detector in the flat 5-150049 communique this spy, have N type silicon wafer, form a plurality of ditch portion on the surface of this silicon wafer, p type diffused layer is formed like that on the bottom that makes it to be positioned at each ditch portion.Then, form the electrode that the metal by aluminium etc. forms in the surface of silicon wafer one side, and be electrically connected on the part of p type diffused layer.A side forms the electrode that the metal by aluminium etc. constitutes on whole overleaf.In addition, make and to be inserted in each ditch portion like that fixedly scintillator.
But, under the situation of above-mentioned such semiconductor energy detector that constitutes, because the plane of incidence one side (surface one side of silicon wafer) in passage of scintillation light (radioactive ray) is provided with electrode, so the detection in the passage of scintillation light at the part place that is provided with electrode is impossible, in semiconductor energy detector, enlarge the area that to survey the passage of scintillation light part and exist a boundary.
Summary of the invention
The present invention invents in view of the above problems, and problem provides the semiconductor energy detector of the area that can enlarge the part that can survey beam.
In order to solve above-mentioned problem, semiconductor energy detector of the present invention, it is characterized in that: the semiconductor that possesses by the 1st conduction type constitutes, Semiconductor substrate from the beam in plane of incidence incident provision wavelengths zone, the back side one side at the plane of incidence of Semiconductor substrate is provided with: the diffusion layer of the 2nd conduction type that is made of the semiconductor of the 2nd conduction type; The diffusion layer of the 1st conduction type that constitutes by the semiconductor of impurity concentration the 1st conduction type higher than Semiconductor substrate.
Because the back side one side at the plane of incidence of Semiconductor substrate is provided with the diffusion layer of the 2nd conduction type and the diffusion layer of the 1st conduction type, need not electrode be set in the plane of incidence one side of Semiconductor substrate so can enlarge the area of the part that can survey beam.
In semiconductor energy detector of the present invention, its feature also is: the plane of incidence one side in Semiconductor substrate is connected with scintillator optically.
Because the plane of incidence one side in Semiconductor substrate is connected with scintillator, so can enlarge the area of the part that can survey passage of scintillation light optically.
In semiconductor energy detector of the present invention, its feature also is: the back side from Semiconductor substrate begins till the plane of incidence all the state of exhausting fully of exhausting, the zone that begins not exhausting till the plane of incidence from the back side of Semiconductor substrate is set in Semiconductor substrate.
Employing is in Semiconductor substrate, the back side from Semiconductor substrate begins till the plane of incidence all the state of exhausting fully of exhausting, setting begins the way in the zone of not exhausting till the plane of incidence from the back side of Semiconductor substrate, when the diffusion layer by the 1st conduction type adds bias voltage, adjacent depletion layer will link up below the diffusion layer of the 1st conduction type, thus become can not continue to the 1st conduction type diffusion layer add bias voltage.But, employing is in Semiconductor substrate, the back side from Semiconductor substrate begins till the plane of incidence all the state of exhausting fully of exhausting, setting begins the way in the zone of not exhausting till the plane of incidence from the back side of Semiconductor substrate, even if after adjacent depletion layer links up below the diffusion layer of the 1st conduction type, can continue still to begin that the zone of not exhausting adds bias voltage till the plane of incidence, the exhausting of Semiconductor substrate further increased by the back side from Semiconductor substrate.Consequently in semiconductor energy detector, can suppress the detectivity of beam and the reduction of answer speed.
In semiconductor energy detector of the present invention, its feature also is: the diffusion layer of the 1st conduction type, comprise between the diffusion layer that is arranged on the 2nd conduction type, and be used for isolating the diffusion layer of the 1st the 1st conduction type of the diffusion layer of the 2nd conduction type; In the outside of the diffusion layer array of the 2nd conduction type, the diffusion layer of the 2nd the 1st conduction type that width forms also widelyer than the diffusion layer of the 1st the 1st conduction type is set.
Owing to the diffusion layer of the 1st conduction type, comprise between the diffusion layer that is arranged on the 2nd conduction type, be used for isolating the diffusion layer of the 1st the 1st conduction type of the diffusion layer of the 2nd conduction type; The outside at the diffusion layer array of the 2nd conduction type, the diffusion layer of the 2nd the 1st conduction type that width forms also widelyer than the diffusion layer of the 1st the 1st conduction type is set, just can be simple and easy and realize to be arranged in the Semiconductor substrate with low cost, the back side from Semiconductor substrate begins till the plane of incidence all the state of exhausting fully of exhausting, the formation that begins the zone of not exhausting till the plane of incidence from the back side of Semiconductor substrate is set.
In addition, in semiconductor energy detector of the present invention, its feature also is: the width sum of the width of the diffusion layer of 2nd conduction type adjacent with the diffusion layer of the 2nd the 1st conduction type and the diffusion layer of the 2nd the 1st conduction type is set to the width sum of the diffusion layer of the width of the diffusion layer of non-conterminous the 2nd conduction type of diffusion layer of the 2nd the 1st conduction type and the 1st the 1st conduction type and equates.
Adopt the width sum of the diffusion layer of a width of the diffusion layer of 2nd conduction type adjacent and the 2nd the 1st conduction type with the diffusion layer of the 2nd the 1st conduction type, be set to the way that equates with the width sum of the diffusion layer of the width of the diffusion layer of non-conterminous the 2nd conduction type of diffusion layer of the 2nd the 1st conduction type and the 1st the 1st conduction type, the width of unit area that contains the diffusion layer of 2nd conduction type adjacent with the diffusion layer of the 2nd the 1st conduction type, just becoming and containing with the width of the unit area of the diffusion layer of non-conterminous the 2nd conduction type of diffusion layer of the 2nd the 1st conduction type equates.By means of this, particularly and establish under the situation of diffusion layer of a plurality of diffusion layers that are provided with the 2nd conduction type and the 1st conduction type, the width of all unit areas all equates, thereby can further enlarge the area of the part that can survey beam.
In addition, in semiconductor energy detector of the present invention, its feature also is: the diffusion layer of the 2nd the 1st conduction type is arranged on the end of Semiconductor substrate.
The end of employing Semiconductor substrate is provided with the way of the diffusion layer of the 2nd the 1st conduction type, in semiconductor energy detector, the result just becomes to exist the zone that does not form depletion layer below the diffusion layer of the 2nd the 1st conduction type, just can suppress the increase of the leakage current that produces owing to depletion layer is connected to the end of Semiconductor substrate.
In addition, in semiconductor energy detector of the present invention, its feature also is: the diffusion layer of the 2nd conduction type is a plurality of with being spaced of regulation, between the diffusion layer of the 2nd conduction type, setting is made of the diffusion layer of impurity concentration the 1st conduction type also higher than Semiconductor substrate, be used for isolating the diffusion layer of the 1st the 1st conduction type of the diffusion layer of the 2nd conduction type, constitute the diffusion layer of the 2nd the 1st conduction type that width forms also widelyer than the diffusion layer of the 1st conduction type in the arranged outside of the diffusion layer array of the 2nd conduction type by the semiconductor of impurity concentration the 1st conduction type also higher than Semiconductor substrate.
Because the back side one side at the plane of incidence of Semiconductor substrate, the diffusion layer of the diffusion layer of the 2nd conduction type, the 1st the 1st conduction type and the diffusion layer of the 2nd the 1st conduction type are set, can produce the failed areas that forms because of the electrode taking-up in the plane of incidence one side of beam so can enlarge the area of the part that can survey beam.
When the diffusion layer by the 1st conduction type added bias voltage, adjacent depletion layer will link up below the diffusion layer of the 1st conduction type, thereby the diffusion layer that can not continue to the 1st conduction type that becomes adds bias voltage.But, because the back side one side at the plane of incidence of Semiconductor substrate, the diffusion layer of the diffusion layer of the 2nd conduction type, the 1st the 1st conduction type and the diffusion layer of the 2nd the 1st conduction type are set, even if so after adjacent depletion layer links up below the diffusion layer of the 1st conduction type, can continue still to begin that the zone of not exhausting adds bias voltage till the plane of incidence, the exhausting of Semiconductor substrate further developed by the back side from Semiconductor substrate.Consequently in semiconductor energy detector, can suppress the detectivity of beam and the reduction of answer speed.
In addition, in semiconductor energy detector of the present invention, its feature also is: the width sum of the width of the diffusion layer of 2nd conduction type adjacent with the diffusion layer of the 2nd the 1st conduction type and the diffusion layer of the 2nd the 1st conduction type is set to the width sum of the diffusion layer of the width of the diffusion layer of non-conterminous the 2nd conduction type of diffusion layer of the 2nd the 1st conduction type and the 1st the 1st conduction type and equates.
Adopt the width sum of the diffusion layer of a width of the diffusion layer of 2nd conduction type adjacent and the 2nd the 1st conduction type with the diffusion layer of the 2nd the 1st conduction type, be set to the way that equates with the width sum of the diffusion layer of the width of the diffusion layer of non-conterminous the 2nd conduction type of diffusion layer of the 2nd the 1st conduction type and the 1st the 1st conduction type, be contained in the width of unit area of the diffusion layer of 2nd conduction type adjacent with the diffusion layer of the 2nd the 1st conduction type, just becoming and containing with the width of the unit area of the diffusion layer of non-conterminous the 2nd conduction type of diffusion layer of the 2nd the 1st conduction type equates.By means of this, particularly and establish under the situation of diffusion layer of a plurality of diffusion layers that are provided with the 2nd conduction type and the 1st conduction type, the width of all unit areas all equates, thereby can further enlarge the area of the part that can survey beam.
In addition, in semiconductor energy detector of the present invention, its feature also is: the diffusion layer of the 2nd the 1st conduction type is arranged on the end of Semiconductor substrate.
The end of employing Semiconductor substrate is provided with the way of the diffusion layer of the 2nd the 1st conduction type, in semiconductor energy detector, the result just becomes to exist the zone that does not form depletion layer below the diffusion layer of the 2nd the 1st conduction type, just can suppress the increase of the leakage current that produces owing to depletion layer is connected to the end of Semiconductor substrate.
Description of drawings
The oblique view of Fig. 1 shows can detector.
The plane graph of Fig. 2 shows the photodiode array that is contained in the back surface incident formula in the energy detector.
The skeleton diagram of Fig. 3 has illustrated the profile construction of the photodiode array that is contained in the back surface incident formula in the energy detector.
The skeleton diagram of Fig. 4 has illustrated the profile construction of the photodiode array that is contained in the back surface incident formula in the energy detector.
The skeleton diagram of Fig. 5 has illustrated the profile construction of the photodiode array that is contained in the back surface incident formula in the energy detector.
The plane graph of Fig. 6 shows the state that the photodiode array that is contained in the back surface incident formula in the energy detector rectangularly is lined up side by side.
Embodiment
Referring to accompanying drawing can describe by detector to the invention process form.In addition, in each figure, decision is used same label for same key element or key element with same function, and the repetitive description thereof will be omitted.
Energy detector R as shown in Figure 1, has photodiode array 1 and scintillator 2, plays a role as radiation detector.Scintillator 2 constitutes the one side (plane of incidence) that optics is connected to photodiode array 1, and the passage of scintillation light that produces when radioactive ray incide on the scintillator 2 is to photodiode array 1 incident.In addition, also can do to become and make on the face of scintillator 2 radioactive ray incidents, Al, Cr etc. on the evaporation form and see through into the radioactive ray that shine, and reflection is from the reflectance coating of the passage of scintillation light of scintillator 2.
Secondly, according to Fig. 2 and Fig. 3 the formation of photodiode array 1 is described.In this example, using the photodiode number as photodiode array 1 is the complete depletion type back surface incident formula photodiode array of 25 (5 * 5).
The photodiode array 1 of back surface incident formula as shown in Figures 2 and 3, possesses Semiconductor substrate 3, is formed with photodiode array on this Semiconductor substrate 3.Semiconductor substrate 3 is by wafer thickness 0.3mm, and the high resistant N type silicon substrate of resistivity 5k Ω cm constitutes.
Photodiode array 1 comprises: as the P of the diffusion layer of the 2nd conduction type +Diffusion layer 4,5 is as the N of the diffusion layer of the 1st the 1st conduction type +Raceway groove barrier layer 6 is as the N of the diffusion layer of the 2nd the 1st conduction type +Raceway groove barrier layer 7, N +Diffusion layer 8, the wiring 9 that forms by aluminium etc., and AR (reflection prevents) overlay 10.P +Diffusion layer 4,5 and N +Raceway groove barrier layer 6,7 is arranged on the back side one side of the plane of incidence of the Semiconductor substrate 3 that passage of scintillation light goes into to shine from scintillator 2.N +Diffusion layer 8 is arranged on the plane of incidence one side of the Semiconductor substrate 3 that passage of scintillation light goes into to shine from scintillator 2, at this N +The arranged outside AR of diffusion layer 8 (reflection prevents) overlay 10.N +Diffusion layer 8 is made of the semiconductor of impurity concentration the 1st conduction type higher than Semiconductor substrate 3, and it is 1.0 * 10 that its surface concentration is made to 19Cm -3About.Scintillator 2 is connected to the P that is provided with Semiconductor substrate 3 optically + Diffusion layer 4,5 and N +On the opposite back side (plane of incidence) of the face on raceway groove barrier layer 6,7.
P +It is 1.0 * 10 that diffusion layer 4,5 surface concentrations are made to 20Cm -3About, individual every arrange 5 * 5 (25) with the interval (in this example, being about 500 microns) of regulation.
N +Raceway groove barrier layer 6 constitutes N by the semiconductor of impurity concentration the 1st conduction type higher than Semiconductor substrate 3 +The surface concentration on raceway groove barrier layer 6, being made to is 1.0 * 10 19Cm -3About.In addition, N +Raceway groove barrier layer 6 is arranged on adjacent P +Between the diffusion layer 4,5, make to P +Diffusion layer 4,5 isolate present like that latticed.P +Diffusion layer 4,5 and N +Interval between the raceway groove barrier layer 6 is made to and is about about 150 microns.N +The width on raceway groove barrier layer 6 is set to about about 200 microns.
N +Raceway groove barrier layer 7 constitutes N by the semiconductor of impurity concentration first conduction type higher than Semiconductor substrate 3 +The surface concentration on raceway groove barrier layer 7, being made to is 1.0 * 10 19Cm -3About.In addition, N +Raceway groove barrier layer 7 is arranged on P +The outside of diffusion layer 4,5 arrays is with N +Raceway groove barrier layer 6 gets up to be arranged to the frame shape in succession.P +Diffusion layer 5 and N +Interval between the raceway groove barrier layer 7 is made to and is about about 300 microns.From being contained in N +The P on raceway groove barrier layer 7 + Diffusion layer 5 is about 900 microns to the distance of Semiconductor substrate 3 ends.N +The width on raceway groove barrier layer 7 is set to about about 600 microns, N +Raceway groove barrier layer 7 is made to width compares N +Raceway groove barrier layer 6 is wide.
With N +The P that raceway groove barrier layer 7 is adjacent +Diffusion layer 5 and and N +Raceway groove barrier layer 7 non-conterminous P +Diffusion layer 4 compares, and its width is set shortly.With N +The P that raceway groove barrier layer 7 is adjacent +The width of diffusion layer 5, and N +The width sum on raceway groove barrier layer 7 is set to and follows and N +Raceway groove barrier layer 7 non-conterminous P +Diffusion layer 4 and N +The width sum on raceway groove barrier layer 6 equates.By means of this, although P +The area of diffusion layer 5 compares P +The area of diffusion layer 4 is little, comprises P +Diffusion layer 5 the width of interior photodiode unit cell (unit area) with comprise P +Diffusion layer 4 becomes to equating that the area of the photodiode unit cell (unit area) in the photodiode array 1 becomes to all equating at the width of interior photodiode unit cell (unit area).
Be electrically connected to each P +Diffusion layer 4,5 and N +On the raceway groove barrier layer 6,7 each 9 tops of connecting up being formed with prominent point 11.P +Diffusion layer 4,5 and N +Being electrically connected of raceway groove barrier layer 6,7 carried out in the back side one side opposite with the plane of incidence of Semiconductor substrate 3.Prominent point 11 is connected with back-off chip bonding technology by means of output reading circuit (not drawing).
Secondly, according to Fig. 4 and Fig. 5 the action of the photodiode array 1 of above-mentioned formation is described.
At first, giving N +Raceway groove barrier layer 6,7 adds that positive bias voltage uses under the situation of photodiode array 1, forms the big or small corresponding depletion layer 12 with bias voltage on Semiconductor substrate 3.In photodiode array 1, passing through N +When raceway groove barrier layer 6,7 adds bias voltage, under the state about the 100V in having added the way of exhausting fully, as shown in Figure 4, at N +The adjacent depletion layer 12 in the below on raceway groove barrier layer 6 links up to each other, becomes to giving N +Raceway groove barrier layer 6 can not add the state of the bias voltage that the said 100V in top is above.In addition, in the PIN type photodiode that uses with the high resistant N type silicon substrate of Semiconductor substrate 3 same resistivity 5K Ω cm, adopt the way that adds the bias voltage of 110V to about the 120V usually, just can realize exhausting fully.
But, because width compares N +The N that raceway groove barrier layer 6 is also wide +Raceway groove barrier layer 7 is at P +The outside of diffusion layer 4,5 arrays is set to and N +Raceway groove barrier layer 6 connects, so at N +The below on raceway groove barrier layer 7 and until between till the plane of incidence one side of Semiconductor substrate 3, exist the zone 13 that does not form depletion layer 12 as the zone of not exhausting.Therefore, because at N +The below on raceway groove barrier layer 7 and until the plane of incidence one side of Semiconductor substrate 3 till between, the zone that is provided with not exhausting exists the zone 13 that does not form depletion layer 12, so even at N +After the adjacent depletion layer 12 in the below on raceway groove barrier layer 6 links up to each other, owing to can pass through N +N is given on raceway groove barrier layer 7 + Diffusion layer 8 adds bias voltage, so can further advance the exhausting in the Semiconductor substrate 3.
Because even depletion layer 12 has reached N +Still can continue to apply bias voltage behind the diffusion layer 8, so can reduce or eliminate N +The failed areas of 6 belows, raceway groove barrier layer (depletion layer 12).Owing to the bias voltage that applies about 200V, as shown in Figure 5, the result just becomes the whole plane of incidence (N that expands to Semiconductor substrate 3 for depletion layer 12 +Diffusion layer 8), Semiconductor substrate 3 becomes and is the state of exhausting fully.In Semiconductor substrate 3 fully under the state of exhausting, as shown in Figure 5, the result just becomes at N +The below on raceway groove barrier layer 7, and until the zone 13 do not form depletion layer 12 is set between the plane of incidence position of Semiconductor substrate 3.
Reached the N of Semiconductor substrate 3 at depletion layer 12 +Under the state of diffusion layer 8, when passage of scintillation light during to the plane of incidence incident of Semiconductor substrate 3, just can be surveyed in photodiode array 1 photoelectric current that takes place from scintillator 2 at high speed in depletion layer 12.In addition, owing to contain P +The photodiode unit cell of diffusion layer 4,5 is set is rectangular (many raceway grooveizations), so the result just becomes to also can survey the incoming position of passage of scintillation light in photodiode array 1.
When depletion layer 12 was linked on the end of Semiconductor substrate 3, it was that leakage current increases that the result becomes.But, because N +The width on raceway groove barrier layer 7 is done to become to compare N +The width on raceway groove barrier layer 6 is wide, so the result becomes at N +The below on raceway groove barrier layer 7 exists the zone 13 that does not form depletion layer 12.By means of this, in the end of Semiconductor substrate 3, just can suppress the increase of leakage current.
As mentioned above, in energy detector R, have photodiode array 1 and scintillator 2, the back side one side that the plane of incidence with Semiconductor substrate 3 in photodiode array 1 is opposite is provided with P +Diffusion layer 4,5 and N +Raceway groove barrier layer 6,7.Scintillator 2 is connected on the plane of incidence one side of Semiconductor substrate 3 optically.As mentioned above, owing in the plane of incidence one side of Semiconductor substrate 3 electrode is not set, so can enlarge the failed areas that produces because of the taking-up electrode can not take place as the area of the part that can survey radioactive ray.
In addition, owing to electrode is not set in the plane of incidence one side of Semiconductor substrate 3, thus can make the plane of incidence one side planarization of Semiconductor substrate 3, can easily optical connection scintillator 2.
When passing through N +When raceway groove barrier layer 6 applies bias voltage, at N +The adjacent depletion layer 12 in the below on raceway groove barrier layer 6 will link up, and becomes to give N +Raceway groove barrier layer 6 applies bigger bias voltage.But, because the Semiconductor substrate 3 of photodiode array 1 is provided with N +Raceway groove barrier layer 7, the result just becomes at N +The below on raceway groove barrier layer 7 is until and all be provided with the zone 13 that does not form depletion layer 12 between till the plane of incidence one side of Semiconductor substrate 3.By means of this, even if at N +After the adjacent depletion layer 12 in the below on raceway groove barrier layer 6 links up to each other, also can pass through N +N is continued to give in raceway groove barrier layer 7 + Diffusion layer 8 adds bias voltage, so can further advance the exhausting in the Semiconductor substrate 3, it is possible that the exhausting fully of Semiconductor substrate 3 changes into.Consequently in photodiode array 1, can suppress the detectivity of beam and the reduction of answer speed.
In addition, because at P +The arranged outside width of diffusion layer 4,5 compares N +The N that the width on raceway groove barrier layer 6 is also wide +So raceway groove barrier layer 7 is from being provided with N +The face on raceway groove barrier layer 6,7 can be provided with the zone 13 that does not form depletion layer 12 in the part of the Semiconductor substrate between the plane of incidence 3, the result be can be simple and easy and low price ground realize not formed the formation in the zone 13 of depletion layer 12.
In addition, photodiode array 1 can expand to the plane of incidence (N of whole Semiconductor substrate 3 basically at depletion layer 12 +The state of the exhausting fully expanding layer 8) uses down.Fully under the state of exhausting, depletion layer 12 is at N at this +The below on raceway groove barrier layer 6 is linked up fully, and the edge of depletion layer 12 has reached near the end of Semiconductor substrate 3 always.Until near the expansion of the depletion layer 12 the end of this Semiconductor substrate 3, owing to can regulate by means of the bias voltage that will apply, so even reduce P +Diffusion layer 5 also can make depletion layer 12 expand near the end of Semiconductor substrate 3 always.By means of this, even if the result just becomes to P +The width of diffusion layer 5 (area) is set to such an extent that compare P +Under the also little situation of the width of diffusion layer 4, the charge carrier that takes place in depletion layer 12 still can be collected P +In the diffusion layer 5.The result can suppress the minimizing of the effective coverage of photodiode array 1, can suppress the influence that applied by luminous sensitivity to the scintillator light of photodiode array 1.
In addition, photodiode array 1 as shown in Figure 6, also can and be set as rectangularly a plurality of photodiode arrays 1 and use.
Adopt handle and N +The P that raceway groove barrier layer 7 is adjacent +The width of diffusion layer 5 and N +The width sum on raceway groove barrier layer 7 is set at and N +Raceway groove barrier layer 7 non-conterminous P +The width of diffusion layer 4 and N +The way that the width sum on raceway groove barrier layer 6 equates as shown in Figure 6, just becomes to containing P +The width a of the photodiode unit cell (unit area) of diffusion layer 5 with contain P +The width a of the photodiode unit cell (unit area) of diffusion layer 4 equates.By means of this, the area of the photodiode unit cell (unit area) in the photodiode array 1 all becomes to equating.The result is under the situation that sets a plurality of photodiode arrays 1 rectangularly, just can easily survey beam in large area, simultaneously, can also survey the incoming position of beam exactly.
In addition, N +Raceway groove barrier layer 7 also can be arranged on any one N +The position on raceway groove barrier layer 6 (position between the photodiode unit cell) go up and be not must be arranged on the end of Semiconductor substrate 3 can not.But, N +The zone 13 of the below on raceway groove barrier layer 7 is not owing to exhausting, so the result becomes to have failed areas between the photodiode unit cell of photodiode array 1.Therefore, the generation for fear of having failed areas and at the place, end of Semiconductor substrate 3 these two phenomenons of leakage current take place between the photodiode unit cell of photodiode array 1 it is desirable to a N +Raceway groove barrier layer 7 is arranged on the end of Semiconductor substrate 3.
The present invention is not limited to the said example in top, also can suit to change said numerical value in top etc. and set.In addition, also can be applied to radiation detector various semiconductor energy detectors in addition to the present invention.
The present invention can utilize in the semiconductor energy detector of radiation detector etc.

Claims (5)

1. a semiconductor energy detector is characterized in that,
Possess the Semiconductor substrate that the semiconductor by the 1st conduction type constitutes,
Described Semiconductor substrate has the plane of incidence of the beam in incident provision wavelengths zone,
In the back side one side opposite, be provided with the diffusion layer of a plurality of the 2nd conduction types that the semiconductor by the 2nd conduction type constitutes with the described plane of incidence of described Semiconductor substrate; The diffusion layer of the 1st conduction type that constitutes with semiconductor by impurity concentration the 1st conduction type higher than described Semiconductor substrate;
The diffusion layer of described the 1st conduction type, by
Be arranged between the diffusion layer of described the 2nd conduction type, be used to separate described the 2nd conduction type diffusion layer part 1 the 1st conduction type diffusion layer and
The diffusion layer of the 1st conduction type of part 2 that is arranged on the end of described Semiconductor substrate constitutes;
The diffusion layer of the diffusion layer of the 1st conduction type of described part 1 and the 1st conduction type of described part 2 is electrically connected.
2. semiconductor energy detector as claimed in claim 1 is characterized in that: the above-mentioned plane of incidence one side in described Semiconductor substrate is connected with scintillator optically.
3. semiconductor energy detector as claimed in claim 1, it is characterized in that: in described Semiconductor substrate, the described plane of incidence with respect to described Semiconductor substrate begins till the described plane of incidence all the state of exhausting fully of exhausting from the described back side under, exist the described plane of incidence with respect to described Semiconductor substrate to begin the zone of not exhausting till the described plane of incidence from the described back side in the described end of described Semiconductor substrate.
4. semiconductor energy detector as claimed in claim 1 is characterized in that: the diffusion layer of the 1st conduction type of described part 2 is formed the diffusion layer of the 1st conduction type of being wider than described part 1.
5. semiconductor energy detector as claimed in claim 4, it is characterized in that: the width sum of the width of the diffusion layer of 2nd conduction type adjacent with the diffusion layer of described part 2 the 1st conduction type and the diffusion layer of described part 2 the 1st conduction type is set to the width sum of the diffusion layer of the width of the diffusion layer of non-conterminous the 2nd conduction type of diffusion layer of described part 2 the 1st conduction type and described part 1 the 1st conduction type and equates.
CNB2007100070432A 2000-04-04 2001-03-28 Semiconductor energy detector Expired - Lifetime CN100533754C (en)

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JP102625/2000 2000-04-04
JP2000102625A JP4522531B2 (en) 2000-04-04 2000-04-04 Semiconductor energy detector
JP102620/2000 2000-04-04

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CN100533754C true CN100533754C (en) 2009-08-26

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