CN100511978C - Transconductance amplifier, analog-to-digital converter and operating method thereof, and current generation method - Google Patents

Transconductance amplifier, analog-to-digital converter and operating method thereof, and current generation method Download PDF

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CN100511978C
CN100511978C CNB038213451A CN03821345A CN100511978C CN 100511978 C CN100511978 C CN 100511978C CN B038213451 A CNB038213451 A CN B038213451A CN 03821345 A CN03821345 A CN 03821345A CN 100511978 C CN100511978 C CN 100511978C
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input
differential
voltage
amplifier
switch
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CN1682437A (en
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爱德华·梅杰·格兰维尔
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Core Logic International Ltd
Cirrus Logic International UK Ltd
Cirrus Logic International Semiconductor Ltd
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Wolfson Microelectronics PLC
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/005—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements using switched capacitors, e.g. dynamic amplifiers; using switched capacitors as resistors in differential amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45475—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
    • H03M1/361—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H03M1/16—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps
    • H03M1/164—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in series-connected stages
    • H03M1/167—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in series-connected stages all stages comprising simultaneous converters

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Amplifiers (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

The invention relates to transconductance amplifiers in which an output current depends upon the difference between two input voltages, and to the application of such transconductance amplifiers in analogue-to-digital converters. A difference amplifier (300) is configured for providing an output current dependent upon a difference between a first input voltage (302) and a second input voltage (304). The difference amplifier comprises an input sampling capacitor (318) coupled to a first conductor of said input sampling capacitor and a current output (314) for generating said output current; and an input switch (308, 310) for selectively coupling a second conductor of said input sampling capacitor to a first input of said difference amplifier for receiving said first input voltage and to a second input of said difference amplifier for receiving said second input voltage. The difference amplifier is configured to, in a first state, couple said second conductor to one of said first and second inputs and apply a voltage to said first conductor and to, in a second state, couple said second conductor to the other of said first and second inputs to provide a voltage change to said transconductance amplifier input dependent upon said difference between said first and second input voltages.

Description

Differential amplifier, analog to digital converter and method of operation thereof, method of generating current
Technical field
The present invention relates generally to trsanscondutance amplifier, promptly produce the amplifier of output current, and relate to the analog-digital converter (ADC) that adopts this amplifier in response to input voltage.More specifically, the present invention relates to such trsanscondutance amplifier, output current depends on poor between two input voltages therein, and relates to its application.
Background technology
In many ADC designs, analog input voltage and reference voltage are compared (or a plurality of reference voltage) to produce the voltage output that can be used to produce digital output code.The voltage comparator of example is described in US 6,150, and 851, US 6,356,148, US 6,249,181 and D.R.Beck and D.J.Allstot, " An 8-bit, 1.8V, High Speed Analogue-to-digital Converter " ( Http:// students.washington.edu/beckdo/Dapers/techcon2000.doc) and P.Setty, J.Barner, J.Plany, H.Burger and J.Sonntag, " A5.75b 350MSamples/S or 6.75b150MSamples/S reconfigurable/ADC for a PRML Read Channel ", Session 9IEEE International Solid-State Circuit Conference 5-7Feb.1998 (ISSCC98).It also is known that the sampling that is used for ADC keeps (S/H) circuit, as at US 6,169, and 427 and US5,963,156 and N.Waltari and K.Halonen, " 1.0-Volt, 9-bit Pipeline CMOS ADC ", 26 ThEuropean Solid-State Circuit Conference Stockholm, described in the Sweden 19-21September 2002, they all use routine (voltage output) operational amplifier with switched capacitor feedback.Also be well known that being similar to register (SAR) analog-digital converter in succession (for example sees J.L.McCreary and P Gray, IEEE JSSC SC-10, the 371-9 page or leaf, Dec 1975), it is the output of analog input and digital analog converter (DAC) relatively, and this DAC can adopt the array of capacitors of binary weighting and produce analog output voltage so that reallocate with the electric charge between the capacitor.
[3] above-mentioned analog-digital converter working voltage relatively produces numeral output.To understand, when input voltage was compared to reference voltage, only the gain rather than the linearity were important, and this is to be higher than benchmark or to be lower than benchmark because only be necessary to know input.Yet, also is well known that by the electric current that produces by interpolation between reference voltage is sued for peace and simplifies adc circuit, and for this interpolation type summation, the linearity is important requirement.Interpolation ADC usually is used to the low resolution height or middling speed is used.Fig. 1 shows the universal circuit figure of the example level of current-mode interpolation ADC.Example with ADC of current-mode interpolation is described in M.P.Flynn and D.J.Alstot, " CMOS Folding A/DConverters with Current-Mode Interpolation ", IEEE JSSC vol.31, September1996,1248-1257 page or leaf; M.P Flynn and B.Sheahan, " A 400MSample/S, 6-bCMOS Folding and Interpolating ADC " IEEE JSSC, vol.33, December 1998, the 1932-1938 pages or leaves; B-S Song, P.L.Rakers and S.F.Gilling, " A 1V, 6-b50MSamples/S Current Interpolating CMOS ADC ", IEEE J.Solid-StateCircuits, vol.35, April 2000, the 647-651 pages or leaves.
[4] with reference to figure 1a, General Principle is (to be two among Fig. 1 by interpolation between from the output of one group of amplifier (being two in Fig. 1) from the reference voltage than group, VrefA and VrefB) produce a plurality of comparative levels (being five) in Fig. 1, poor between one of input signal and benchmark all represented in each described output.
[5] in the interpolation level 100 of Fig. 1 a, the input voltage on the line 102 is provided for the one 104 and an input of the 2 106 differential trsanscondutance amplifier.Second input to first trsanscondutance amplifier 104 is provided by the first reference voltage V refA on the line 108, and is provided by the second reference voltage V refB on the line 110 to second input of trsanscondutance amplifier 106.The proportional output current of difference between the voltage that each differential trsanscondutance amplifier all produces and two is imported, output current is called as mutual conductance with the ratio of input voltage difference.Amplifier 104 and 106 is drawn to electric current sinks, but preferably, their output current can be respectively positive or negative polarity according to the polarity of Vin-VrefA and Vin-VrefB.
[6] Fig. 1 b has illustrated that one of the trsanscondutance amplifier 130 that is suitable for being used for trsanscondutance amplifier 104 and 106 may be implemented.Trsanscondutance amplifier comprises a pair of input transistors 132,134, and it has respectively the input from Vin 102 and one of VrefA 108 and VrefB 110, and is connected to constant current and sinks 136 common source and connect.Transistor 132 is connected the corresponding input and output that are connected to the current mirror that is surrounded by dotted line 138 and connects with 134 leakage, and electric current output connects 140 and takes from the knot of the output of the leakage of transistor 134 and current mirror 138.Each of transistor 132,134 be all by being multiply by the increment current that transistorized increment grid input voltage provides by its mutual conductance gm, thereby output current is provided by Iout=Gm. (Vin-Vref), and wherein the mutual conductance Gm of amplifier equals gm.
Output current from trsanscondutance amplifier 104 is imported into or drives first current mirror 112, and drives second current mirror 114 from the output current of trsanscondutance amplifier 106.Current mirror 112 comprises a plurality of constant current generator 112a-e.Voltage on the line 116 in a usual manner will by the electric current of element 112a be arranged to flow to differential trsanscondutance amplifier 104 in output current identical.This identical driving voltage also is provided for element 112b-e so that the output of the constant current on the line 118a-d that is determined by the output current of trsanscondutance amplifier 104 to be provided.
Fig. 1 c illustrates the example that is suitable for the controllable current generator 150 of use in the interpolation ADC of Fig. 1 a level 100.Input transistors 151 and constant current sink 152 and are connected in series between the power line 154,156, and the connection that transistor 151 and electric current sink between 152 provides electric current output Iout158.Input transistors 151 has control voltage Vc, and this voltage is applied in to its grid and connects so that controlled monopolar current to be provided, and this electric current equals output current Iout and sinks 152 electric current sum by constant current.Like this, according to the size of the controlled monopolar current of passing through input transistors 151, described output current can be any one polarity.For given input control voltage Vc, the yardstick that output current (or output current of a plurality of controllable current generators through mating) can be imported (MOS) transistor 151 by convergent-divergent comes convergent-divergent.Preferably, electric current sinks 152 with to keep the identical ratio of constant " zero current " point scaled.By this way, a plurality of different zooms, can be configured to have the zero output electric current that is used for substantially the same input control voltage through the controllable current generator of coupling, and provide the zero output electric current basically simultaneously thus.
Have at the transistor that comprises element 112a and 112b under the situation of same physical size, the electric current on the line 118a is substantially the same with the electric current by element 112a.Comprise that the transistorized size of element 112c, d, e is reduced to the size 0.75x of element 112b, 0.5x and 0.25x, provided respectively on online 118b, 118c and the 118d thereby make from 0.75x, the 0.5x of trsanscondutance amplifier 104 and the electric current of 0.25x output current.Usually current mirror 112 is fabricated on the integrated circuit so that comprise that the transistor of current mirror is mated.Current mirror 114 comprises element 114a-e similarly, for example bipolar or FET transistor, and with corresponded manner work to be provided as the electric current of 1.0x, 0.75x, 0.5x and the 0.25x output current of trsanscondutance amplifier 106 on the online 120a-d respectively.
Electric current I 1 on the line 118a is provided for comparator 122a to produce numeral output D1.Numeral output D2 from comparator 122b is determined by the electric current sum on line 118b and the 120d; Output D3 from comparator 122c is determined by the electric current sum on line 118c and the 120c; Output D4 from comparator 122d is determined by the electric current sum on line 118d and the 120d; And the numeral output D5 from comparator 122e is determined by the electric current on the line 120a.
The output current of trsanscondutance amplifier 104 is expressed as IA and the output current of trsanscondutance amplifier 106 is expressed as I B, I AAnd the difference between the VrefA on Vin on the line 102 and the line 108 is proportional, and I BAnd the difference between the VrefB on Vin and the line 110 is proportional.Add that through the intermediate current of summation and the mark of the difference between Vin and the VrefA mark of the difference between Vin and the VrefB is proportional.On mathematics:
I 1＝I A＝G(Vin-VrefA)
I 5＝I B＝G(Vin-VrefB)
I 2＝0.75G(Vin-VrefA)+0.25G(Vin-VrefB)
So I 2∝ Vin-(0.75VrefA+0.25VrefB)
And I 2∝ Vin-(3VrefA+VrefB)/4
In other words, these electric currents through convergent-divergent produce and residue [Vin-Vth (i)] the proportional output current of i=1...5, wherein:
Vth(1)＝VrefA，
Vth(2)＝(3.VrefA+VrefB)/4，
Vth(3)＝(VrefA+VrefB)/2，
Vth(4)＝(VrefA+3.VrefB)/4，
Vth(5)＝VrefB.
As can be seen, under the situation of Vin=Vth, output current is zero, and for Vin〉Vth, output current is positive, and for Vin＜Vth, output current is born.Like this, output current I1 will equal threshold value Vth (1) at input voltage to I5 ..., zero crossing during N, wherein N=(number of 2+ median) is 5 (they being 2+3) in the case.In the interpolation level circuit 100 of Fig. 1, output current I1 is imposed on high input impedance comparator 122a respectively to 122e to I5, and it makes logical decision at these thresholds.Like this, the input voltage vin signal level between VrefA and the VrefB is converted into the number format output of line D1 to the D5 as so-called thermometer code.This code converts binary code to by conventional equipment (not shown in Figure 1) then.This can comprise for example pricority encoder, or replacedly, the functional of hardware can be specified with hardware description language, as Verilog (trade mark) or VHDL, thereby allow the hardware synthetics on code conversion is functional with other back-end logic, mix as error-correction logic.
Although only two reference voltage V refA and VrefB are illustrated in Fig. 1, more multi-reference voltage can be used to the conversion of many (two) position.Reference voltage typically obtains from the resistor string, and it will be apparent to one skilled in the art that with routine/analog-digital converter and compare, and less tap is necessary on this resistor string, and this is because need less reference voltage.In addition, the amplification of residue signal has also been alleviated requirement to comparator, and particularly be its abridged input off-set voltage and the requirement of overdriving.Typically, this has saved the needs to the pre-amplifying stage before each comparator, so way circuit is comparatively simple, although be added with current mirror and linear transconductance amplifier.
The application of interpolation ADC is the second level as the two-stage analog-digital converter, and this transducer is the analog-digital converter 200 shown in Fig. 2.In this ADC, the input voltage vin on the line 202 is provided for M position ADC 204, the M highest significant position (MSB) of the digitized signal on its output line 206.This rough being similar to input voltage vin is converted back to aanalogvoltage by the M bit digital to analog converter (DAC) 208, and deducted with the residue signal on the remaining line 212 from original input signal by subtracter 210.This residue signal is provided for N position analog-digital converter 214, and this transducer produces the N least significant bit on the line 216, and it exports 220 by the suitable logical AND MSB combination in the combiner 218 with the numeral that the binary digit with required sum is provided.The example of this two-stage ADC is described in " A 3.3-V; 10-b; 25-MSample/s Two-StepADC in 0.35-μ m CMOS ", Hendrik van der Ploeg and Robert Remmers, IEEEJournal of Solid State Circuits, Vol 34, and No 12, and December 1999.Rough and meticulous level conversion range can be superimposed to alleviate the constraint to rough level ADC.
Can find out by controlling chart 2, first order ADC 204 must at first make its decision-making, before the second level comparator related with ADC 214 made its decision-making, the output of the output of DAC 208 and differential amplifier (difference amplifier) 210 must be set up then.Like this, the first order its input signal of must for a long time sampling before the decision-making time in the second level.For avoiding transcription error, before be necessary sampling and holding circuit are being set before such two-stage ADC between two sampling instants, to keep input constant.This has increased the complexity of ADC, has increased its cost thus, and has also increased power consumption.Therefore it is desirable to remove this sampling and holding circuit from, particularly when being kept for the linearity that interpolation type is sued for peace and other linear signal processing is desired.
Summary of the invention
According to a first aspect of the present invention, therefore provide a kind of differential amplifier, it is configured to provide the output current that is relevant to the difference between first input voltage and second input voltage, and this differential amplifier comprises the input sample capacitor, and it has two conductors; Trsanscondutance amplifier, the electric current output that it has the input of first conductor that is coupled to described input sample capacitor and is suitable for producing described output current; And input switch, be used for optionally second conductor of described input sample capacitor is coupled to first input of described differential amplifier so that receive described first input voltage and be coupled to second input of described differential amplifier so that receive described second input voltage; What described differential amplifier was configured under first state described second conductor is coupled to described first and second inputs imposes on voltage described first conductor in the lump, and under second state described second conductor is coupled to described first and second inputs another to provide change in voltage to import to described trsanscondutance amplifier according to the described difference between described first and second input voltages.
Preferably, depend on to described output current substantial linear poor between first and second input voltages.This output current can directly provide from trsanscondutance amplifier, and perhaps the electric current that is produced by trsanscondutance amplifier can use to be provided for the output current of described differential amplifier by Mirroring Mapping or with certain alternate manner.
The input sample capacitor allows an input voltage, and for example first input voltage is sampled so that the electric charge on the input sample capacitor to be set under first state of differential amplifier.Then, when second conductor of input sample capacitor is connected to another input voltage, for example during second input voltage, voltage difference between the input is delivered to the input of trsanscondutance amplifier, this amplifier provides electric current output, is used for directly or indirectly producing the output current from differential amplifier.Controller can be used to control this sampling process.Suppose that trsanscondutance amplifier itself is linear, then differential amplifier also is linear basically.
At work, first voltage is sampled on the input capacitor in the ending of first state, but its value is held and deducted from second voltage during second state.The output current that produces from potential difference can be sampled (by comparator subsequently) in the ending of second state, thereby giving the additional time of second voltage sets up.It is useful especially for two-stage ADC that this sampling keeps action, and first voltage can be original input signal therein, and second voltage is by the also reference voltage of sampled input signal " roughly " ADC selection.Because second, reference voltage is unwanted, up to the beginning of second state, " roughly " ADC sets up if having time, can avoid the needs to the sampling hold circuit that separates thus.
In the improvement to differential amplifier, one or more additional input sampling capacitors can be provided.Such additional input sampling capacitor can be by switch between two reference voltages, and under the adopted situation of a plurality of differential amplifiers, for example in two-stage ADC, one of these reference voltages can be common to all differential amplifiers, and are applied in another reference voltage to each differential amplifier and can be connected in respective point in (tie to) reference voltage ladder by system.By this way, the valid function point of differential amplifier can be by for example basically equally spaced from opening so that two or more output currents to be provided, and it can be summed so that used by interpolation ADC.Each differential amplifier all can be configured to produce a plurality of output currents through convergent-divergent so that for example use in the current-mode interpolation.
To recognize that first conductor of input sample capacitor need not be connected to the trsanscondutance amplifier input under first state of differential amplifier, and for example it can be coupled to the input of trsanscondutance amplifier by switch.Yet in a preferred embodiment, the voltage that is applied under first state of differential amplifier to first conductor is virtual earthed voltage, promptly for differential trsanscondutance amplifier, the voltage in one of input is kept identically with (preferably being fixed) voltage in another differential input by the closed feedback path.This can by means of switch DC feedback network from the output of trsanscondutance amplifier or as the level after a while of differential amplifier output driver spare after provide, described device for example provides the device of the output current of mirror image (mirrored) or separation.In a preferred embodiment, the just differential input of trsanscondutance amplifier is connected to fixing reference voltage, and as ground, and the moving input of the minus tolerance of trsanscondutance amplifier is connected to the input sample capacitor.Preferably, low resistance switches as the FET switch, is provided to the moving input of minus tolerance is coupled to the electric current output of differential amplifier then.This virtual ground connects is cancelled the input off-set voltage of trsanscondutance amplifier.
The change in voltage that is provided for trsanscondutance amplifier input can be substantially equal to poor first and second input voltages from the process of first to second state variation of differential amplifier, for example only having under the situation that single input sample capacitor or change in voltage can be scaled, for example under the situation that is having certain electric charge to share between two or more input sample capacitors.
Differential differential amplifier can use a pair of above-mentioned differential amplifier but differential trsanscondutance amplifier that use to share makes up along similar line, thereby makes in fact each differential input (positive and bear) of an input switch and one group of first and second input voltage and differential trsanscondutance amplifier related.By this way, differential differential amplifier is in response to the differential wave that comprises two groups of two groups of voltage differences between described first and second input voltages.Generally speaking, one group of first input voltage will comprise that positive and negative first input voltage and one group of second input voltage will comprise positive and negative second input voltage.As previously discussed, can be by with the expanded circuit similarly that gets off: one or more additional group (differential) input sample capacitors is provided and/or adds other (differential) trsanscondutance amplifier and/or Mirroring Mapping (mirroring) or a plurality of single-ended or differential outputs are provided.
Like this, in aspect related, the present invention also provides a kind of differential differential amplifier, be used to provide the output current of the differential wave that depends on differential input, described differential input comprises two pairs of signal inputs, described differential wave comprises two voltage differences, first depends on poor between first and second input voltages on described right the first couple of signal input, poor between third and fourth input voltage on second described right the second couple of depending on signal input, described differential differential amplifier comprises: the first and second input sample capacitors, each all has two conductors, is respectively applied for described first and second pairs of signals input; Differential trsanscondutance amplifier, it has differential input that is coupled to the described first and second input sample capacitors and the output that is used to produce described output current; A pair of input switch, described right each of signal input all has one, is used for optionally the described first and second input sample capacitors being coupled respectively to one of described first and second input voltages and one of described third and fourth input voltage; A pair of initialisation switch, the strip that is used for being coupled to the described first and second input sample capacitors of described differential trsanscondutance amplifier arrives initial voltage; And controller, be used to control described input switch and described initialisation switch described differential wave is imposed on described differential trsanscondutance amplifier.
The plate of sampling capacitor can be brought to identical initial voltage or different initial voltages, output current can comprise single-ended or differential output current, and equally can be by with the expanded circuit that gets off: the differential input that provides additional right sampling capacitor to be used to add, each additional right sampling capacitor all has related right input switch, is used for determining that a pair of input voltage is poor.
According to another aspect of the present invention, a kind of analog-digital converter is provided, comprising: at least one trsanscondutance amplifier, it is configured to provide a plurality of output currents of a plurality of outputs place; And a plurality of comparators, it is coupled to described a plurality of trsanscondutance amplifier output so that numeral output is provided; At least one switch input sample capacitor, it is coupled to the input of described trsanscondutance amplifier; And at least one switch, it is configured to described input sample capacitor alternately is coupled to first reference voltage and the aanalogvoltage that is used to change.
Analog-digital converter can comprise for example current-mode interpolation or folding transducer, and it preferably includes a plurality of levels.As discussed previously, by providing input sample capacitor and switch capacitor alternately is coupled to aanalogvoltage and the reference voltage that is used to change, the sampling differential amplifier is provided, and it enables to remove from existing sampling in an embodiment and keeps.In an embodiment, a pair of input sample capacitor can be provided for a plurality of trsanscondutance amplifiers each to allow having the combination of the output current of zero crossing (zero crossing) in input voltage threshold place at interval in rule, generate zero crossing threshold voltage ladder thus so that in the process that produces numeral output, use.In an embodiment, numeral output comprises thermometer code, and it is converted into binary representation.
Analog-digital converter can be used as the second level of two-stage analog-digital converter, and wherein first analog-digital converter provides (effectively the highest) position precision that numeral exports to first number so that the rough approximation to analog input signal to be provided.This rough approximation can be used as the reference voltage that is used for the input sample capacitor then so that produce one or more minimum effective carry-out bit of two-stage analog-digital converter.
According to related aspect of the present invention, provide a kind of use one circuit to produce basically and first and second voltages between the method for electric current of voltage difference linear correlation, described circuit comprises switch, the trsanscondutance amplifier of switch input capacitor and substantial linear, first plate of input capacitor is coupled to the input of trsanscondutance amplifier, second plate of input capacitor switchably is coupled to first and second voltages, and described method comprises: second plate of input capacitor is coupled to first voltage simultaneously first plate is maintained reference voltage so that input capacitor is charged; Then second plate of input capacitor is coupled to second voltage and allows the electromotive force of first plate to change an amount that depends on described voltage difference so that described trsanscondutance amplifier produces basically the output current with described voltage difference linear correlation.
When input capacitor was connected to first voltage and reference voltage, it was recharged, and promptly it is flow on the capacitor or the electric charge that leaves capacitor that flows takes the state of charge that is limited to.Be connected to second voltage by second plate with input capacitor then, the voltage difference between first and second voltages is passed to the input of trsanscondutance amplifier basically.
In one aspect of the method, the invention provides a kind of method that substantial linear is relevant to the electric current of two voltage differences that produces, described two voltage differences are first voltage difference between first and second voltages and second voltage difference between third and fourth voltage, described method has adopted such circuit, it comprises first and second switches, the trsanscondutance amplifier of the first and second switch input capacitors and substantial linear, first plate of first input capacitor and first plate of second input capacitor are coupling in together and are coupled to the input of trsanscondutance amplifier, second plate of first input capacitor is coupled to first switch so that switchably be coupled to first and second voltages, and second plate of second input capacitor is coupled to second switch so that switchably be coupled to third and fourth voltage, and described method comprises: with second plate of first and second input capacitors be coupled respectively to first and tertiary voltage simultaneously first plate of capacitor is maintained reference voltage so that input capacitor is charged; Then second plate of first and second input capacitors is coupled respectively to the second and the 4th voltage and allows electric charge on first plate of capacitor to be shared and be relevant to the amount of described first and second voltage differences so that described trsanscondutance amplifier produces the output current that substantial linear is relevant to two described voltage differences so that the electromotive force of first plate changes one.
Input capacitor can have different sizes or value, and the proportional convergent-divergent to corresponding input voltage is provided thus.
A kind of differential amplifier also is provided, and it is configured to come work according to these methods.
Further, the invention provides a kind of method of operating the two-stage analog-digital converter, this two-stage analog-digital converter comprises first analog-digital converter, be used to provide rough approximation to analog input signal, with second analog-digital converter, it comprises at least one differential amplifier, be configured to provide the output current that is relevant to the difference between first input voltage and second input voltage, described differential amplifier comprises: trsanscondutance amplifier, be used to provide described output current to comparator so that numeral output is provided; At least one switch input sample capacitor, it is coupled to the input of described trsanscondutance amplifier; And at least one switch, it is configured to described input sample capacitor alternately is coupled to described first and second input voltages, and described method comprises the described switch of control, and to be coupled to described rough input signal then approximate so that reference voltage to be provided described input sample capacitor at first is coupled to the aanalogvoltage that is used to change.
Preferably, differential amplifier output current substantial linear is relevant to poor between first and second input voltages.More preferably, described method comprise use a plurality of differential amplifiers come more rough input signal approximate with a plurality of reference levels, preferably the second switch input sample capacitor that is used for each amplifier by the use reference level that is offset differential amplifier is carried out.
The present invention also provides a kind of analog-digital converter, and it is configured to come work according to this method.
Description of drawings
Just to for example, further describe these and other aspect of the present invention now with reference to accompanying drawing, in the accompanying drawings:
Fig. 1 a illustrates the example of the universal circuit figure of the example level of current-mode interpolation analog-digital converter, differential trsanscondutance amplifier and the example of controllable current generator respectively to 1c;
Fig. 2 illustrates typical two-stage analog-digital converter;
Fig. 3 a illustrate respectively to 3d the differential amplifier according to first embodiment of the invention, the waveform that is used for the circuit of Fig. 3 a, Fig. 3 a amplifier differential version and be used for the timing waveform of the circuit of Fig. 3 c;
Fig. 4 illustrates the differential amplifier that has a plurality of input capacitors according to second embodiment of the invention;
Fig. 5 illustrates the differential amplifier that comprises a plurality of trsanscondutance amplifiers according to third embodiment of the invention;
Fig. 6 illustrates the differential amplifier that has mirror image output according to fourth embodiment of the invention;
Fig. 7 illustrates the differential amplifier that has separated electric current output according to fifth embodiment of the invention;
Fig. 8 illustrates the current-mode interpolation ADC that comprises a plurality of sampling differential amplifiers according to the embodiment of one aspect of the invention;
Fig. 9 a and 9b illustrate a part and the differential input current comparator of differential version of the interpolation ADC of Fig. 8 respectively; And
Figure 10 illustrates the embodiment according to the differential differential amplifier of one aspect of the invention.
Embodiment
At first with reference to figure 3a, it illustrates the schematic circuit diagram of differential amplifier 300.Input voltage vin is provided on the line 302 and reference voltage V ref is provided on the line 304.Input sample capacitor C1 306 has a plate that is coupled to pair of switches S1 308, S2 310, and described pair of switches is connected to capacitor 306 with line 302,304 respectively.Switch 308 and 310 can be controlled to allow line 302 or line 304 to be connected to input sample capacitor 306, and can comprise MOSFET or FET switch.The technical staff will understand, and the diagram to switch 308 and 310 among Fig. 3 a is schematically, and the configuration of the switch of other equivalence on function may be utilized.
Another plate of input sample capacitor 306 is coupled to the anti-phase input of differential trsanscondutance amplifier 312, and this amplifier provides the Iout of the electric current output on the line 314.The 3rd switch 316 is connected between the nodes X 318 between the anti-phase input of output line 314 and input sample capacitor 306 and trsanscondutance amplifier 312.Equally, switch S 3 316 is controllable, and can comprise MOSFET or FET.The noninverting differential input of trsanscondutance amplifier 312 is connected to fixed potential, is shown as being earth potential Vgnd.Trsanscondutance amplifier G1 312 has the mutual conductance of Gm.Three switches 308,310 and 316 are by clock generator 322 controls, as following with reference to Fig. 3 b in greater detail.
In many application, differential amplifier 300 is structured on the integrated circuit, and this integrated circuit typically comprises the part of analog-digital converter.The technical staff will understand, and standard makes up piece can be used to various elements, and trsanscondutance amplifier can for example use the bipolar or MOS of long-tail to implementing.
With reference now to Fig. 3 b,, described circuit has two clock phase Phi1 and Phi2.Fig. 3 b is illustrated in switch S 1 308 during these two clock phases, S2 310 and the corresponding state 350,352,354 of S3 316 and the relevant voltage 356,358 at node Y 317 and nodes X 318 places.During clock phase Phi1, switch S 3 316 is closed with output and (anti-phase) input with trsanscondutance amplifier 312 and links together, thereby the voltage that makes nodes X 318 places is created as identical voltage, i.e. Vgnd in the anti-phase input 320 with trsanscondutance amplifier 312.This is because nodes X 318 is virtual grounds, although the technical staff will understand in the case, the voltage at nodes X place is identical with voltage in the noninverting input 320 basically, and in certain embodiments, this voltage may not be zero to lie prostrate.
Also have during clock phase Phi1, switch S 1 308 is closed with the left side (node Y) with input sample capacitor C1 306 and is connected to Vin 302, and switch S 2 310 disconnects.Like this, the voltage of node Y equals Vin.In second clock phase place Phi2, switch S 3316 is disconnected, and switch S 1 308 is disconnected and switch S 2 310 is closed, thereby makes the voltage at node Y 317 places promote Δ V=Vref-Vin.This makes the voltage at node X318 place promote identical amount from Vgnd again, thereby causes the output current of Gm x (Vin-Vref), and taking place anti-phase is because nodes X is coupled to the anti-phase input of trsanscondutance amplifier 312.In reality is implemented, the additional capacitor related with nodes X arranged, as the input capacitance of trsanscondutance amplifier 312, so voltage step and consequent output current are attenuated.Yet this only is equivalent to reducing of Gm, thus make output current still and the difference between Vin and the Vref proportional.
As shown in Fig. 3 b, preferably switch S 3 316 was cut off before switch S 1 308 slightly to improve the electric charge injection efficiency.Preferably, slightly underlap is also being arranged avoiding the moment conduction path between Vin and the Vref between S1 that is closed and the S2, this can provide evitable load transient on the previous circuit that produces Vin and Vref.
Fig. 3 c illustrates the example of differential enforcement 370 of the differential trsanscondutance amplifier 300 of Fig. 3 a, and Fig. 3 d illustrates the timing waveform of the circuit that is used for Fig. 3 c.
Put it briefly, the differential circuit of Fig. 3 c is corresponding to the circuit of two couplings of type shown in Fig. 3 a, although single clock/timing sequencer 372 can be used to control the two halves of differential enforcement 370.In addition, two of type circuit are used shown in Fig. 3 a, respectively from the differential input of positive and negative Vin302a, and b and Vref 304a, b, one is used to provide positive Iout 314a, and one is used to provide negative Iout 314b.In Fig. 3 c, indicate by identical reference number with the element components identical of Fig. 3 a, " a " and " b " be the positive and negative signal processing of indication circuit respectively.
On mathematics, the mutual conductance of getting amplifier 312a is Gm +And the mutual conductance of getting amplifier 312b is Gm -,
Iout +＝Gm +(Vin +-Vref +)
Iout -＝Gm -(Vin --Vref -)
dIout＝Iout +-Iout -
＝Gm +(Vin +-Vref +)-Gm -(Vin --Vref -)
And supposition is at Gm +=Gm -(mean that differential trsanscondutance amplifier G1 312a and G2312b mate basically) under the situation of=Gm:
dIout＝Gm(dVin-dVref)
DVin=Vin wherein +-Vin -
And dVref=Vref +-Vref -
By this way, the positive and negative signal processing circuit part of supposing differential differential amplifier enforcement 370 is symmetrical and coupling basically, Vin +, Vin -And/or Vref +, Vref -Common mode variations be rejected basically.
Be used for the figure shown in Fig. 3 b that the sequential chart shown in Fig. 3 d of circuit of Fig. 3 c is similar to the circuit that is used for Fig. 3 a very much, waveform 380,382,384,386 and 388 corresponds respectively to waveform 350,352,354,356 and 358.Yet should note waveform 380,382 and 384, it refers to switch 1 and 4, switch 2 and 5 and switch 3 and 6 rather than as refer to switch 1,2 and 3 simply in Fig. 3 b respectively.Except this difference of two fit version of Fig. 3 a circuit of the differential enforcement of considering to provide circuit, to the explanation of Fig. 3 d corresponding to providing at Fig. 3 b, and for will not being repeated for simplicity.
The technical staff will understand, and be possible about the variant of reference Fig. 3 c and the described circuit of 3d.For example trsanscondutance amplifier 312a and 312b can be implemented as single complete differential trsanscondutance amplifier.
Fig. 4 illustrates second differential amplifier 400, and it makes the switch input sample capacitor notion vague generalization shown in Fig. 3 a.Indicate by identical reference number with the element components identical of Fig. 3 a.
In Fig. 4, additional input sample capacitor 406 is provided, and it also is coupled to node 318.Another plate of capacitor 406 is coupled to Vin2 402 and is coupled to Vref2 404 via S2a410 via the first switch S 1a 408. Switch S 1a 408 and S2a 410 are synchronoused working with switch S 1 308 and S2 310 respectively; For the sake of simplicity, clock generator is not shown in Figure 4.Fig. 4 shows clearly really as the total parasitic capacitance (input capacitance that comprises trsanscondutance amplifier 312) in the anti-phase input of the trsanscondutance amplifier of lumped capacitor Cp414.The dotted line 412 that is connected to nodes X 318 shows that the circuit of Fig. 4 can expand with related switch by further interpolation input sample capacitor.
Temporarily ignore parasitic capacitance Cp, total capacitance is C1+C2.The left hand plate of C1 has promoted voltage Vref-Vin, and the left hand plate of C2 has promoted voltage Vref2-Vin2.The total electrical charge of storing on two capacitors is
(Vref-Vin)C1+(Vref2-Vin2)C2
It produces by the following change in voltage Δ V that provides when total capacitance C1+C2 goes up when being shared on
(C1+C2)ΔV＝(Vref-Vin)C1+(Vref2-Vin2)C2
Perhaps
ΔV＝[(Vref-Vin)C1+(Vref2-Vin2)C2]/(C1+C2)
When parasitic capacitance Cp non-zero, electric charge is shared on Cp upward so that total effective capacitance is C1+C2+Cp.In the case, the change in voltage dVin among the Phi2 is provided by following
-dVin＝-(Vx-Vgnd)
＝[(Vin-Vref)C1+(Vin2-Vref2)C2]/(C1+C2+Cp)
With
Iout＝-G.dVin
Iout=G[(Vin-Verf) C1+ (Vin2-Vref2) C2]/(C1+C2+Cp) (equation 1)
Cp usually is that voltage is relevant, however in actual design, to such an extent as to proved this correlation enough little be not obvious constraint to the linearity.
With reference now to Fig. 5,, this illustrates at general the 3rd differential amplifier 500 of being provided with of Fig. 4.Indicate by identical reference number with the element components identical of Fig. 4.
In Fig. 5, a plurality of trsanscondutance amplifiers are provided, and it is illustrated by the second differential trsanscondutance amplifier G2 502 and the differential trsanscondutance amplifier GN 508 of N.Trsanscondutance amplifier 502 and 508 makes its anti-phase input be connected to nodes X 318, and in the illustrated embodiment, its noninverting input is connected to Vgnd 320.Each additional trsanscondutance amplifier all has corresponding electric current output 506,512, and randomly, has closed loop feedback switch S 32 504, S3N 510, thereby nodes X 318 is established as virtual ground.Yet will understand, switch S 31 316, S32 504 and S3N 510 only one need.
Differential trsanscondutance amplifier G1, G2 ..., each of GN all can have different mutual conductances and have a plurality of mutual conductances that are in fixedly scaling ratio or ratio each other and the differential amplifier of a plurality of output currents in fact to provide.
In being provided with of Fig. 6, the output 314 of trsanscondutance amplifier 312 by current mirror 602 Mirroring Mapping so that a plurality of outputs to be provided.This current mirror comprises that a plurality of electric currents sink 602a-d (replacedly, can adopt current source) so that nearly N electric current output to be provided, and wherein three 604a-c are shown in Figure 6.Each electric current output all is in fixed ratio or the multiple of exporting the electric current I out on 314 with trsanscondutance amplifier, and by this way, differential amplifier 600 can be provided with a plurality of outputs with difference (always) mutual conductance.Multi-output current mirror 602 can use the FET or the bipolar transistor of different size or use a plurality of transistors to make up the current ratio that is not 1:1 to provide with any usual manner.As shown in Figure 6, switch S 3 316 can be coupled directly to the electric current output 314 of trsanscondutance amplifier 312 or be coupled to one of electric current output 604a-c so that mirror is exported that feedback is provided from first order output or from one (perhaps a plurality of or all).Yet this depends on the polarity of first order mutual conductance, and this is because should there be the closure of the overall anti-phase S3 of permission 316 to produce the virtual ground at nodes X 318 places.
Fig. 7 illustrates once more at general the 5th differential amplifier 700 of being provided with of Fig. 4, and is indicated by identical reference number with the element components identical of Fig. 4 equally therein.
In being provided with of Fig. 7, the output current Iout in the output 314 of trsanscondutance amplifier 312 is separated into a plurality of output current Iout1 by a plurality of transistor 702a-c, Iout2 ..., Iout N 704a-c.Transistor 702a-c is connected in parallel and is had public control connection 706; In the illustrated embodiment, described transistor comprises field-effect transistor, is preferably nmos device, and it has to connect with the data gate of bias voltage to line 706 to the common source of electric current output 314 and is connected.Described transistorized leakage connects provides electric current output 704a-c.
For allowing two-way output current Iout1, Iout2, ..., IoutN, constant current sinks 708 common sources that can be connected to bias transistor 702a-c and connects, and the constant current source of following (not shown in Figure 7) is connected to electric current output to export Iout1, Iout2, ..., cut the constant current that is added before the IoutN.
The same with being provided with of Fig. 6, the size of transistor 702a-c (or other parameter) can be in fixed ratio to produce the output current that is in fixed ratio each other.For this reason, preferably, transistor 702a-c for example mates by being manufactured on the public substrate.By this way, a plurality of different total mutual conductances can be provided for differential amplifier 700 once more.Sink 708 electric currents of introducing by constant current and also will come convergent-divergent with identical ratio, therefore the above-mentioned current source of following also should come bi-directional scaling with identical ratio.
The differential output that is equivalent to each above-mentioned differential amplifier can be implemented by all signal paths in each amplifier are replaced to differential equivalents, and described differential amplifier particularly is the differential amplifier of the interpolation ADC level of the differential amplifier circuit of Fig. 4 to 7 and following Fig. 8.This is described with reference to Fig. 3 and those skilled in the art is easily understood.
Fig. 8 illustrates current-mode interpolation ADC 800, and it combines a plurality of above-mentioned differential amplifiers.Switch input sample capacitor in each of these differential amplifiers all provides the sampling of routine employing and the relatively cheap and simple substitution of holding circuit.
The ADC of Fig. 8 provides 6 conversion accuracies and can for example be used as 6 rear ends following 10 pipelines, thereby produces 16 analog-digital converters.
With reference to figure 8, the analog input voltage Vin on the line 802 is provided for each the output of flash type ADC (flashADC) 804 and a plurality of mutual conductance differential amplifier 816a-d, and described amplifier is four in illustrated example.Flash type ADC 804 has eight rough (MSB) comparators, its threshold value reference range-7/8 ,-5/8 ,-3/8 ,-1/8 ,+1/8 ,+3/8 ,+5/8 and+7/8 place.These thresholds determine input voltage be in-8/8 ,-6/8 ,-4/8 ,-2/8,0 ,+2/8 ,+4/8 ,+6/8 ,+8/8 be one of nine districts at center.Flash type ADC804 provides the output of the numeral on the line 806, and it is provided for combiner 808 and digital-to-analog converter 812.The output of this numeral comprises that sign bit adds that three extra orders are not with the complement of 2 in the limited range [4 ,+4] (be by 4 locator qualifications all 16 codes all be used).Combiner 808 will add to LSB information on the bus 836 so that 6 outputs to be provided with suitable delay from the MSB information of flash type ADC on bus 810.
The highest significant position that DAC 812 is received is converted back to the aanalogvoltage VrefM on the line 814, its be provided for mutual conductance differential amplifier 816a-d each second the input.DAC 812 for example can comprise the multiplexer that is made up by a plurality of transmission gates that are configured to select the tap on the resistor string.
Possible VrefM voltage on the line 814 be reference range-8/8 ,-6/8 ,-4/8 ,-2/8,0 ,+2/8 ,+4/8 ,+6/8 and+8/8, perhaps equivalence be-4/4 ,-3/4 ,-2/4 ,-1/4,0 ,+1/4 ,+2/4 ,+3/4 and+4/4.To understand, the value of the VrefM that DAC 812 is exported will be positioned at the middle part in the district of reference range, and flash type ADC 804 determines that the input voltage on the line 802 is positioned at wherein.Voltage VrefM is fed to the benchmark input of four differential amplifier 816a-d, promptly corresponding to the input of the input 304 of Fig. 4, and input voltage vin is fed to the association input of differential amplifier 816a-d, promptly corresponding to the input of the input 302 of differential amplifier shown in Fig. 4.
The paired input 818a-d of each of four differential amplifier 816a-d is thus corresponding to the input 302 and 304 of the differential amplifier of Fig. 4.Each of differential amplifier 816a-d also has second couple of input 820a-d, and it is corresponding to the input 402 and 404 of the differential amplifier of Fig. 4.Input is connected to input sample capacitor 826 (C1 among Fig. 4) to 818 and input is connected to the second input sample capacitor 828 (C2 among Fig. 4) to 820.The trsanscondutance amplifier side of these two capacitors is connected to-rises and be connected to the anti-phase input (as shown in Figure 4) of trsanscondutance amplifier 830.By Mirroring Mapping or separation, perhaps a plurality of trsanscondutance amplifiers can be used as shown in Figure 5 so that a plurality of electric current outputs 832 each to differential amplifier 816a-d to be provided as shown in Fig. 6 or 7 in the output of trsanscondutance amplifier 830.For example, ratio is provided is the electric current output of 1.0:0.8:0.6:0.4:0.2 to differential amplifier 816a.It is summed to be used for the usual manner of interpolation ADC described with reference to Figure 1 with example as shown in Figure 8 from the output of the electric current of differential amplifier 816a-d.The a plurality of electric currents outputs that for example are in 0.2 given zoom factor can be provided under the electric current output that is in this zoom factor is used more than situation once.This can implement by each the conventional current mirror of an output transistor with as shown in Figure 6 output along the line 832.Interchangeable is to adopt the setting shown in Fig. 5 and/or 7.For the sake of simplicity, the clock generator of control differential amplifier 816a-d is not shown in Figure 8.
Every couple of input 820a-d has first input that is connected to the public reference voltage line 822 that is in 0 volt as shown and second input that is connected to the corresponding second reference voltage line 824d-a.Second reference voltage on the line 824a-d forms the reference voltage ladder, in 5/16 of illustrated example reference range spaced intermediate.Therefore, be applied in each reference voltage to differential amplifier 816a-d be reference range-8/16 ,-3/16 ,+2/16 and+7/16 and linear change.The capacitor 826 of each differential amplifier (C1 among Fig. 4) all has the value that doubles capacitor 828 (C2 among Fig. 4).Choose the decay in the signal path that C1 greater than C2 reduced input from Vin to the trsanscondutance amplifier.This capacitor of 1/2 is arranged to from-8/32 to+7/32 of reference range than with the LSB conversion range, and because two subtraction (promptly because differential amplifier output also is relevant to Vin-VrefM), this LSB conversion range is with the center that is approximately to input voltage VrefM.The input range extreme value is+31/32 and-32/32 to provide 64 codes, be 1/32=1/2 thereby make the LSB step sizes 5Although shown transducer is 6 bit pads.
Electric current interpolation between the output 832 of differential amplifier 816a-d produces the electric current of a scope, and it has the zero crossing threshold of the LSB that is equivalent to a separation.For this reason, five weighted current mirrors are arranged between adjacent differential amplifier, thereby provide 16 output taps that comprise end points.The threshold of being determined by the electric current output of differential amplifier 816a is reference range+7/32 separately; The threshold of being determined by differential amplifier 816b is reference range+2/32 separately; The threshold of being determined by differential amplifier 816c is-3/32; And the threshold of being determined by differential amplifier 816d is a reference range-8/32.Thresholds in the middle of between these each, having four, its be by with in being provided with of Fig. 1, limit three by 1/4th summations to output current in the middle of the similar modes of threshold 1/5th summations of output current are formed.Zero crossing comparator 834 in these 16 taps determines to be positioned at poor (VrefM-Vin) in one of 17 districts, and the output of the thermometer code on the bus 836 is provided.This thermometer code is converted into the normal binary code so that by the combination of the MSB on combiner 808 and the bus 806.The end effect that the mismatch impedance that the use of electric current interpolation rather than resistance interpolation is located owing to the top and the bottom of resistance interpolation string by removal causes has improved the linearity of ADC.
Above-mentioned discussion can be illustrated by an example.Differential amplifier 816a has the capacitor C2 828 that switches between+7/16 and 0 volt.Inspection to equation 1 shows, when capacitor C2 is a half of the value of C1 (capacitor 826), the voltage difference on the input 820a provides half of weight of the voltage difference on the input 818a of differential amplifier 816a effectively.Therefore the zero crossing threshold that is used for differential amplifier 816a is shifted+and 7/32.Because in fact input has the voltage difference on the 820a and imports the symbol opposite to the voltage difference on the 818a, the voltage Vin on the line 802 must exceed than the VrefM on the line 814 reference range+7/32, be used for the zero output electric current.Therefore as can be seen, " 1.0 times " of the output of differential amplifier 816a qualification is in the threshold of reference range+7/32.In a similar manner, " 1.0 times " of the output of differential amplifier 816b qualification is in the threshold of reference range+2/32.+ 6/32 threshold is according to equation 0.8x (7/32)+0.2x (2/32)=6/32, limits by 0.2 summation to the electric current output of 0.8 and differential amplifier 816b of the output of the electric current of differential amplifier 816a.Other threshold is limited at similarly+7/32 and+difference between 2/32 2/5,3/5 and 4/5.From+1/32 to-8/32 threshold is defined with corresponded manner.
Strictly speaking, only need 8 comparators to cover gamut between each VrefM, in fact additional comparator provides extra MSB.Yet, the preferred of additional comparators is provided, this is because they provide the nargin of the error of the comparator threshold that is used for flash type ADC 804.16 thresholds are decided 17 districts (relatively above description to flash type ADC 804) and preferably are encoded as scope [8 from 16 outputs of comparator 834, + 8] Nei complement of two's two's complement LSB value is although can adopt other scheme and scope in other embodiments.Complete digital output value then can be simply by with the calculating of getting off: according to following equation, will add to from second, the complement of two's two's complement LSB of interpolation ADC level, thereby suitably MSB be moved to left from the complement of two's two's complement MSB of flash type ADC 804:
Output=8 x MSB+LSB.
Addition provides for example because the correction of the transformed error that the offset voltage in the flash type ADC comparator is produced by flash type ADC 804 automatically from the digital output signal of two levels by this way.Even the numeral output from flash type ADC 804 is " incorrect ", output from DAC will be still consistent with this numeral output, this will make amount of second level district change of being reported, in case corresponding digital output is combined then from the error of dynamic(al) correction VrefM thus.This LSB overrange can adapt to the skew in approximate 1/16 the flash type ADC comparator of (sudden strain of a muscle) reference range.
Provide the further benefit of the additional comparators of the required number of the required number that surpasses the LSB precision to provide two-stage ADC 800, consider that as a whole it has the overrange ability.This is because total numeral output is dispersed throughout in the scope [40 ,+40], 81 codes altogether, because in fact the second level is arranged at any end of this scope, and 8 extracodes that provide based on the ADC of differential amplifier.This be because from the extreme value code of flash corresponding to+/-8/8Vref is the district at center, thereby provide 0/64 of the LSB level place that is used for specified full size input specifiedly, provide 8 additional code at any end place thus.In these codes, 64 can be considered to " in scope ", and this is corresponding to the input that is positioned at reference range, and all the other can be considered to " overrange " code.As mentioned above, be used to provide under the situation of rear end to pipeline or other transducer at ADC, this overrange ability can be used to proofread and correct comparator offset voltage or other error in previous transducer or a plurality of transducer.
The setting of Fig. 8 shows single-ended rather than differential analog-digital converter, but the technical staff will recognize easily, this architecture can be modified to as shown in Fig. 9 a and provide differential enforcement in customary mode, Fig. 9 a shows the part of differential version 900 of the interpolation ADC of Fig. 8, is wherein indicated by identical reference number with the element components identical of Fig. 8.Single-ended enforcement has been described so that understand the present invention, but in many examples, differential enforcement is preferred, and this is because because internal signal is swung can double and external interference signal is rejected at regular supply space (headroom), it enables the improvement of signal to noise ratio.
With reference to figure 9a, it has illustrated the part of an embodiment of differential version 900 of the single-end circuit of Fig. 8.Interpolation ADC900 has differential voltage input Vin+802, Vin-802 ', and it is provided for input flash type ADC 804 ' and many to the mutual conductance differential amplifier, wherein a pair of 816a, 816a ' is illustrated.Flash type ADC 804 ' drives differential output DAC 812 ', and it is driven into right differential amplifier again.Positive voltage input Vin+802 goes to a described right 816a mutual conductance differential amplifier and negative voltage input Vin-802 ' goes to described the 2nd right 816a ' mutual conductance differential amplifier.Described right mutual conductance differential amplifier 816a, 816a ' is substantially the same, an output positive current Iout+, another 816a ' output negative output current Iout-.This is through with the differential input that offers one group of differential input current comparator 834 ' with the described similar fashion convergent-divergent of reference Fig. 8 to output current with from each other right output current of all the other right mutual conductance differential amplifiers (not shown in Fig. 9 a).
The positive and negative version of differential amplifier reference voltage is provided, and each of every pair of differential amplifier is provided one.Like this, for example reference range+benchmark 824 ' that the benchmark 824a at 7/16 place is provided for-7/16 place of differential amplifier 816a and reference range is provided for differential amplifier 816a '.The differential version of each other reference voltage is provided for other right corresponding differential amplifier of differential amplifier.Public reference voltage 822 is provided for positive 816a and negative 816a ' voltage and handles differential amplifier, and in an embodiment, can be caught to keep drift, and this is because its voltage is " common mode " to described right each of differential amplifier.In this was provided with, the reference voltage V ref of the single-ended version of the ADC of Fig. 8 was replaced by the differential to Vref+ of reference voltage, Vref-, and each all has the identical amplitude with previous single-ended Vref.This has the effect (promptly ignoring the overrange ability) that doubles " full size " input range, because full size is extended Vin+=+2.0 and Vin-=-2.0 rather than Vin=1.0 ,-1.0.Yet, can obtain identical full size scope by reference voltage is reduced by half.
Fig. 9 b illustrates an enforcement that is suitable for the differential input current comparator 910 of use in the comparator row 834 ' of differential interpolation ADC 900.Current comparator 910 has pair of differential electric current input Iin+912, Iin-912 ', and each is connected to corresponding resistor 914,914 ', and the other end of these resistors is connected to common-mode voltage source VR 916 together.Input 912,912 ' also is connected to the corresponding noninverting and anti-phase input of conventional differential input voltage comparator 918, and this comparator provides output 920 again.The technical staff will recognize that the setting of Fig. 9 b can be modified with the biasing that is fit to specific application and/or meet the trsanscondutance amplifier level and retrain.For example, one or more public gate leves can be connected with each input and be added, and perhaps the MOS resistor can be used to resistor 914, and 914 ', perhaps these resistors can be replaced by cross-linked MOS transistor to increase the voltage gain of comparator.
Figure 10 illustrates an example of differential differential amplifier, and this amplifier is suitable for being used for above described right with reference to described positive 816a of Fig. 9 a and negative 816a ' differential amplifier.Although the differential differential amplifier of Figure 10 can be considered to the pair of differential amplifier, the differential differential amplifier 1000 that is regarded as making up may be better.
Put it briefly, the differential differential amplifier 1000 of Figure 10 is two single ended differential amplifiers of type shown in Fig. 4 and the combination that is similar to the differential trsanscondutance amplifier shown in Fig. 1 b.In Fig. 4, the circuit on line A '-A ' left side is corresponding to the input circuit of Fig. 4 differential amplifier embodiment like this, and the circuit on line B '-B ' the right also is like this, and these two groups of input circuits provide differential input A and B to differential trsanscondutance amplifier.Be used for the reference number of circuit part those numerals, and for simplicity, be used for dividing the reference number of the accompanying line of amplifier to indicate with bracket when the analog-digital converter at Fig. 9 a uses time difference moment corresponding to Fig. 4.Put it briefly, the element 1002,1004,1006 of Figure 10 and 1014 and 1016 combination correspond respectively to the element 136,132,134 and 138 of Fig. 1 b.
Differential differential amplifier comprises that electric current sinks 1002, and its differential right source that is coupled to input transistors 1004,1006 connects, described transistorized each all have the drain electrode that is connected to corresponding (active load FET) transistor 1014,1016.With with the nmos device 602 of Fig. 6 similar modes substantially, the electric current by FET 1014 and 1016 by convergent- divergent PMOS transistor 1018,1020 Mirroring Mapping of respective sets so that differential (electric current) output group through convergent-divergent to be provided. Corresponding switch 1008,1010 is provided for transistor 1004,1006, each is all corresponding to the switch S 3 316 of Fig. 4, and be connected to voltage preplaced line 1012 (with the voltage on the trsanscondutance amplifier side plate of preset capacitor C1 and C2), be connected to ground in the illustrated embodiment.In Figure 10, switch S 1, S2, S1a, S2a, 1008 and 1010 by controller or clock generator (for not shown in Figure 10 for simplicity) to control in above-described similar fashion with reference Fig. 3 b and 3d.
In first state or clock phase, switch S 1 and S1a are closed first voltage on line 302 and 402 input being coupled to the side of input sample capacitor C1 and C2, and switch 1008 and 1010 is closed with the opposite side that allows these capacitors by sharing electric charge or by making its plate be connected to biasing or virtual ground voltage becomes initial voltage.Then in subsequent state or clock phase, these switches all are disconnected and switch S 2 and S2a are closed second input voltage is imposed on capacitor C1 and C2 and change the differential input that offers trsanscondutance amplifier with the differential input voltage that will be relevant to the difference between every group first and second input voltages.
At work, the input stage of the differential amplifier of the input stage of differential differential amplifier 1000 and Figure 54 is worked similarly.Like this, the input A reception to differential trsanscondutance amplifier is relevant to Vin +And VrefM +Between the variation of voltage of difference add the voltage that is relevant on the line 824a and the skew (by capacitor C2 convergent-divergent) of the difference between the voltage on the line 822.Similarly, input B receives and is relevant to Vin -And VrefM -Between the variation of voltage of difference add the skew (by capacitor C2 convergent-divergent) that is relevant to the voltage difference between line 824a ' and 822.Trsanscondutance amplifier provides the output current of the difference between the voltage that depends on differential input node A and B place and the differential output on load FET 1014 and 1016 (it can be single-ended output in other embodiments) is provided, and these output currents come Mirroring Mapping by the group of FET 1018 and 1020 respectively.In other words, one of node A and B can be considered to just differential input and another is considered to the moving input of minus tolerance, and differential trsanscondutance amplifier provides so differential output, and it comprises having substantially the same amplitude but the output current of opposite symbol.
The technical staff will recognize, be possible about many variations of the circuit of Figure 10.For example, the current mirror of being made up of transistor 1014,1018,1016,1020 can be replaced by and similar output stage shown in the Fig. 7 that comprises FET 702.
In addition, or replacedly, element 1002,1004 and 1006 can be replicated along the line shown in Fig. 5, and the PMOS current mirror can be reduced number or removal.Be shown as the switch 1008 and 1010 that is connected to such as the bias voltage of ground voltage and can be connected to virtual ground with being replaced, for example transistor 1014 and 1016 corresponding grid ( switch 1008 and 1010 is separated then rather than be joined together).The technical staff will further recognize, public reference voltage line 822 can be any bias voltage easily, and in an embodiment, this line can be allowed to drift (promptly being free of attachment to any specific bias voltage), and capacitor C2 406 will share electric charge when switch S 2a 410 is closed (promptly connecting) in the case.
To at interpolation ADC, be appropriateness relatively as the requirement of the trsanscondutance amplifier that uses among the ADC 800 of Fig. 8.The precision of transducer depends on the precision of two differential amplifiers with minimum input signal.For the example of Fig. 8, the amplifier that only participates in any decision-making will be up to approximately+/-4/64 input voltage, and result's output only needs to be corrected to for example 0.5LSB=1/64.For this reason, in many such application, differential amplifier neither they must be special high-gain or low skew or accurately set up differential amplifier without any need for feedback.When the output of this amplifier only must be created as small voltage, for the output of the differential amplifier of most critical, problem settling time can not take place, this is because near precision key threshold point only, at this threshold point place, amplifier is only seen little differential voltage.Therefore, differential amplifier can be very little and simple, and trsanscondutance amplifier only needs to comprise that single long-tail is bipolar or MOS is right, as for example as shown in Fig. 1 b.However, differential amplifier is still the most responsive part of design.
Typically have the magnitude of Gm/Gout from ADC signal input line 802 to the gain to the input of comparator 834, wherein Gout is the output impedance (it is reduced by capacitive character decay at differential amplifier input capacitance network place) of convergent-divergent electric current output place.This is equivalent to the preamplifier before the comparator that usually is included among the conventional ADC, therefore provides enough big comparator to overdrive to allow using simple comparator architecture, as simple differential latches, and the preamplifier state that need not to separate.
The reference voltage that is used for line 824a-d can be produced by the resistor string, and preferably thereby this is configured to have enough low impedance and can provides switch input sample capacitor (as the capacitor among Fig. 8 828) required electric current, and need not to experience significant loading effect.Further preferably the preparation of second level LSB overrange is enough to overcome the offset error in MSB (flash type ADC) comparator.
The technical staff will expect many effective variant of foregoing circuit undoubtedly.For example, switch S 3 316 in the circuit of Fig. 3 a can be connected to reference voltage the electric charge on the capacitor C1 306 to be set rather than to be connected to the output 314 of trsanscondutance amplifier 312, and randomly, Fu Jia switch can be inserted between the anti-phase input of nodes X 318 and trsanscondutance amplifier 312 (although this will remove automatic zero set (auto-zero) function of circuit effectively).Similarly, generally current source might be changed into and sink, and vice versa.To understand, the present invention is not limited to described embodiment, and comprises being modified in the spirit and scope that claims limit of it will be apparent to those skilled in the art.

Claims (41)

1. differential amplifier, it is configured to provide the output current that depends on the difference between first input voltage and second input voltage, and this differential amplifier comprises:
The input sample capacitor, it has two conductors;
Trsanscondutance amplifier, the electric current output that it has the input of first conductor that is coupled to described input sample capacitor and is suitable for producing described output current; And
Input switch, be used for optionally second conductor of described input sample capacitor is coupled to first input of described differential amplifier so that receive described first input voltage, and be coupled to second input of described differential amplifier so that receive described second input voltage;
What described differential amplifier was configured under first state described second conductor is coupled to described first and second inputs imposes on voltage described first conductor in the lump, and under second open loop situations described second conductor is coupled to described first and second inputs another so that the described input to described trsanscondutance amplifier of the change in voltage that depends on the described difference between described first and second input voltages to be provided.
2. differential amplifier as claimed in claim 1, wherein said trsanscondutance amplifier comprise linear trsanscondutance amplifier, thereby make described differential amplifier output current be relevant to poor between first and second input voltages linearly.
3. differential amplifier as claimed in claim 1, wherein said trsanscondutance amplifier comprises differential trsanscondutance amplifier, and the described voltage that is applied under described first state to described first conductor is virtual ground voltage.
4. differential amplifier as claimed in claim 2, wherein said trsanscondutance amplifier comprises differential trsanscondutance amplifier, and the described voltage that is applied under described first state to described first conductor is virtual ground voltage.
5. differential amplifier as claimed in claim 1, wherein said trsanscondutance amplifier comprises the differential trsanscondutance amplifier with two differential inputs, and first of wherein said differential input is coupled to described first conductor and second of described differential input is coupled to the sampling capacitor reference voltage, and described differential trsanscondutance amplifier is configured to make the described first differential input to have and the identical voltage of the described second differential input under described first state of described differential amplifier.
6. differential amplifier as claimed in claim 2, wherein said trsanscondutance amplifier comprises the differential trsanscondutance amplifier with two differential inputs, and first of wherein said differential input is coupled to described first conductor and second of described differential input is coupled to the sampling capacitor reference voltage, and described differential trsanscondutance amplifier is configured to make the described first differential input to have and the identical voltage of the described second differential input under described first state of described differential amplifier.
7. as claim 5 or 6 described differential amplifiers, further comprise second switch, be used under described first state, providing the closed loop resistance feedback network to described differential trsanscondutance amplifier.
8. as claim 5 or 6 described differential amplifiers, further comprise second switch, it is configured to described first conductor switchably is coupled to the point that output drove by described trsanscondutance amplifier.
9. as claim 3,4,5 or 6 described differential amplifiers, comprise a plurality of differential trsanscondutance amplifiers, be used to provide a plurality of output currents, each described differential trsanscondutance amplifier all has a differential input that is coupled to described first conductor.
10. as any one described differential amplifier in the claim 1 to 6, further comprise:
Third and fourth input is used to receive third and fourth input voltage;
The second input sample capacitor, it has two second capacitor conductors; And
Second input switch;
First of the described second capacitor conductor is coupled to described first conductor and second of the described second capacitor conductor is coupled to described second input switch, described second input switch is configured to optionally described second conductor of described second capacitor is coupled to described the 3rd input and described the 4th input, thereby makes described output current further depend on poor between described third and fourth input voltage.
11. differential amplifier as claimed in claim 10, one of wherein said first and second voltages input comprises the input of first reference voltage, and one of described third and fourth voltage input comprises the input of second reference voltage.
12. as any one described differential amplifier in the claim 1 to 6, further comprise current mirror, its output that is coupled to described trsanscondutance amplifier is with the output current of Mirroring Mapping from described trsanscondutance amplifier.
13. differential amplifier as claimed in claim 12, wherein said current mirror are configured to provide with fixing mutual ratio a plurality of image releases of described differential amplifier output current.
14. any one the described differential amplifier as claim 1 to 6 further comprises a plurality of output transistors, is used to separate output current from described trsanscondutance amplifier so that a plurality of versions of described differential amplifier output current to be provided.
15. differential amplifier as claimed in claim 14, wherein said a plurality of output transistors have common bias voltage.
16. differential amplifier as claimed in claim 14, wherein said a plurality of output transistors are configured to make described a plurality of versions of described output current to have fixing mutual ratio.
17. differential amplifier as claimed in claim 15, wherein said a plurality of output transistors are configured to make described a plurality of versions of described output current to have fixing mutual ratio.
18. a differential differential amplifier, it comprises wherein each all as any one the described a pair of differential amplifier in the claim 1 to 6, be used to handle described first and second input voltages differential to and be used to provide differential output.
19. differential differential amplifier as claimed in claim 18, the trsanscondutance amplifier of each differential amplifier that wherein said differential amplifier is right is to share differential trsanscondutance amplifier, thereby a pair of differential amplifier of described differential differential amplifier has single, public differential trsanscondutance amplifier.
20. differential differential amplifier, be used to provide the output current of the differential wave that depends on the first differential input, the described first differential input comprises two pairs of signal inputs, described differential wave comprises two voltage differences, first voltage difference depends on poor between first and second input voltages on right the first couple of described signal input, second voltage difference depends on poor between third and fourth input voltage on right the second couple of described signal input, and described differential differential amplifier comprises:
The first and second input sample capacitors, each all has two conductors, is respectively applied for described first and second pairs of signals input;
Differential trsanscondutance amplifier, it has differential input that is coupled to the described first and second input sample capacitors and the output that is used to produce described output current;
A pair of input switch, it is right that each is used for a described signal input, is used for optionally the described first and second input sample capacitors being coupled respectively to one of described first and second input voltages and one of described third and fourth input voltage;
A pair of initialisation switch is used to make the plate of the described first and second input sample capacitors that are coupled to described differential trsanscondutance amplifier to be in initial voltage; And
Controller is used to control described input switch and described initialisation switch described differential wave being imposed on described differential trsanscondutance amplifier, and optionally with open loop situations or the described differential trsanscondutance amplifier of closed loop state of operation.
21. differential differential amplifier as claimed in claim 20, further comprise the third and fourth input sample capacitor, and second pair of input switch, be used for optionally the described third and fourth input sample capacitor-coupled to comprising the second right differential input of third and fourth signal input that is used for receiving respectively third and fourth voltage difference.
22. an interpolation analog-digital converter, it combines the differential amplifier according to one of claim 1 to 6, perhaps according to the differential differential amplifier of claim 20 or 21.
23. an analog-digital converter, it comprises:
At least one trsanscondutance amplifier, it is configured to provide a plurality of output currents in a plurality of outputs place;
A plurality of comparators, it is coupled to described a plurality of trsanscondutance amplifier output and is used to provide numeral output;
At least one switch input sample capacitor, it is coupled to the input of described trsanscondutance amplifier;
At least one selector switch, it is configured to described input sample capacitor alternately is coupled to first reference voltage and the aanalogvoltage that is used to change; And
At least one feedback switch, it is configured to the output of described trsanscondutance amplifier is coupled to the described input of described trsanscondutance amplifier when described input sample capacitor is coupled to the described aanalogvoltage that is used to change.
24. analog-digital converter as claimed in claim 23, it comprises:
The first and second input sample capacitors, its each all be coupled to the input of described trsanscondutance amplifier; And
First and second selector switches, described first selector switch is configured to the described first input sample capacitor alternately is connected to described first reference voltage and the described aanalogvoltage that is used to change, and described second selector switch is configured to the described second input sample capacitor alternately is connected to the second and the 3rd reference voltage.
25. analog-digital converter as claimed in claim 24, it comprises a plurality of described trsanscondutance amplifiers, its each all have the corresponding first and second input sample capacitors and first and second selector switches.
26. analog-digital converter as claimed in claim 25, one of the wherein said second and the 3rd reference voltage is public to described a plurality of trsanscondutance amplifiers, and wherein other the described second and the 3rd reference voltages of each described trsanscondutance amplifier are set to ladder.
27. analog-digital converter as claimed in claim 26, the electric current output of wherein said trsanscondutance amplifier is combined to provide a plurality of current signals to be used for described a plurality of comparator, and described current signal has zero crossing at the increment place that equates of described aanalogvoltage.
28. any one described analog-digital converter as claim 23 to 27, the wherein said aanalogvoltage that is used to change is a differential voltage, and wherein said analog-digital converter comprises the differential version with the right described trsanscondutance amplifier of differential input, each right input of described differential input all is coupled with described input sample capacitor and described selector switch, is used for converting described differential aanalogvoltage to number format.
29. two-stage analog-digital converter, it comprises first analog-digital converter, be used to provide rough approximation to analog input signal, and as any one described second analog-digital converter of claim 23 to 27, be used to provide one or more least significant digit carry-out bits to be used for described two-stage analog-digital converter, wherein said first reference voltage comprises the described rough approximation of described analog input signal.
30. two-stage analog-digital converter, it comprises first analog-digital converter, be used to provide rough approximation to analog input signal, and second analog-digital converter as claimed in claim 28, be used to provide one or more least significant digit carry-out bits to be used for described two-stage analog-digital converter, wherein said first reference voltage comprises the described rough approximation of described analog input signal.
31. one kind use a circuit to produce and first and second voltages between the method for electric current of voltage difference linear correlation, described circuit comprises switch, switch input capacitor and linear trsanscondutance amplifier, first plate of switch input capacitor is coupled to the input of trsanscondutance amplifier, second plate of switch input capacitor switchably is coupled to first and second voltages, and described method comprises:
Second plate of switch input capacitor is coupled to first voltage, by the output that first plate is coupled to described trsanscondutance amplifier first plate is maintained reference voltage simultaneously, so that the switch input capacitor is charged; Then
Second plate of switch input capacitor is coupled to second voltage and first plate of switch input capacitor and the output of trsanscondutance amplifier are disconnected, allow the electromotive force of first plate to change an amount that is relevant to described voltage difference so that described trsanscondutance amplifier produces the output current with described voltage difference linear correlation.
32. the method for the electric current of a generation and two voltage difference linear correlations, described two voltage differences are first voltage difference between first and second voltages and second voltage difference between third and fourth voltage, described method adopts a circuit, this circuit comprises first and second switches, the first and second switch input capacitors and linear trsanscondutance amplifier, first plate of the first switch input capacitor and first plate of second switch input capacitor are coupling in together and are coupled to the input of trsanscondutance amplifier, second plate of the first switch input capacitor is coupled to first switch and is used for switchably being coupled to first and second voltages, be used for switchably being coupled to third and fourth voltage and second plate of second switch input capacitor is coupled to second switch, described method comprises:
Second plate of the first and second switch input capacitors is coupled respectively to first and tertiary voltage, the output that is coupled to described trsanscondutance amplifier by first plate with the described first and second switch input capacitors simultaneously maintains reference voltage with first plate of the described first and second switch input capacitors, with to described first and second switch input capacitors charging; Then
Second plate of the first and second switch input capacitors is coupled respectively to the second and the 4th voltage, and the output of first plate of the described first and second switch input capacitors and described trsanscondutance amplifier disconnected, allow the electric charge on first plate of the described first and second switch input capacitors to be shared, depend on described both amounts of first and second voltage differences so that described trsanscondutance amplifier produces the output current that is linearly related to two described voltage differences so that the electromotive force of first plate changes one.
33. method as claimed in claim 32 further comprises by the electric capacity of the described first and second switch input capacitors of convergent-divergent accordingly and comes convergent-divergent first and second voltage differences.
34. method of operating the two-stage analog-digital converter, this two-stage analog-digital converter comprises first analog-digital converter, be used to provide rough approximation to analog input signal, with second analog-digital converter, it comprises at least one differential amplifier, be configured to provide the output current that depends on the difference between first input voltage and second input voltage, described differential amplifier comprises: trsanscondutance amplifier, be used to provide described output current to comparator so that numeral output is provided; At least one switch input sample capacitor, it is coupled to the input of described trsanscondutance amplifier; At least one feedback switch, it is configured to optionally the output of described trsanscondutance amplifier is coupled to the described input of described trsanscondutance amplifier; And at least one selector switch, it is configured to described input sample capacitor alternately is coupled to described first and second input voltages, and described method comprises:
Control described selector switch so that described input sample capacitor at first is coupled to the aanalogvoltage that is used to change;
Closed described feedback switch is to be coupled to the output of described trsanscondutance amplifier the described input of described trsanscondutance amplifier;
Control described selector switch, with described input sample capacitor-coupled to the described rough approximation of described analog input signal so that reference voltage to be provided; And
Disconnect described feedback switch.
35. method as claimed in claim 34, wherein the differential amplifier output current is linearly related to described poor between first and second input voltages.
36. as claim 34 or 35 described methods, wherein said second analog-digital converter comprises a plurality of described differential amplifiers, and described method comprises that further the described rough approximation a plurality of reference levels relatively that are identified for described analog input signal are so that used by described second analog-digital converter.
37. differential amplifier, be used to produce and first and second voltages between the electric current of voltage difference linear correlation, described differential amplifier comprises switch, switch input capacitor and linear trsanscondutance amplifier, first plate of switch input capacitor is coupled to the input of trsanscondutance amplifier, second plate of switch input capacitor switchably is coupled to first and second voltages, wherein
Second plate of switch input capacitor is set to optionally be coupled to first voltage, and first plate is set to be maintained at reference voltage so that the switch input capacitor is charged by the output that is coupled to described trsanscondutance amplifier simultaneously; And
Second plate of switch input capacitor is set to optionally be coupled to second voltage, and first plate of switch input capacitor is set to disconnect with the output of trsanscondutance amplifier, allows the electromotive force of first plate to change an amount that is relevant to described voltage difference so that described trsanscondutance amplifier produces the output current with described voltage difference linear correlation.
38. differential amplifier that is used to produce with the electric current of two voltage difference linear correlations, described two voltage differences are first voltage difference between first and second voltages and second voltage difference between third and fourth voltage, described differential amplifier comprises first and second switches, the first and second switch input capacitors and linear trsanscondutance amplifier, first plate of the first switch input capacitor and first plate of second switch input capacitor are coupling in together and are coupled to the input of trsanscondutance amplifier, second plate of the first switch input capacitor is coupled to first switch so that switchably be coupled to first and second voltages, and second plate of second switch input capacitor is coupled to second switch so that switchably be coupled to third and fourth voltage, wherein
Second plate of the first and second switch input capacitors is configured to optionally be coupled respectively to first and tertiary voltage, first plate of the first and second switch input capacitors is set to be maintained at reference voltage by the output that is coupled to described trsanscondutance amplifier simultaneously, so that the described first and second switch input capacitors are charged; And
Second plate of the first and second switch input capacitors is configured to optionally be coupled respectively to the second and the 4th voltage, and first plate of the first and second switch input capacitors is configured to disconnect with the output of described trsanscondutance amplifier, be shared with the electric charge on first plate that allows the first and second switch input capacitors, thereby the electromotive force that makes the plate of winning changes one and depends on described both amounts of first and second voltage differences, so that described trsanscondutance amplifier produces the output current that is linearly related to two described voltage differences.
39. differential amplifier as claimed in claim 38, wherein, the electric capacity of the described first and second switch input capacitors is scaled with described first and second voltage differences of convergent-divergent accordingly.
40. a two-stage analog-digital converter comprises:
First analog-digital converter is used to provide the rough approximation to analog input signal, and
Second analog-digital converter, it comprises at least one differential amplifier, and this differential amplifier is configured to provide the output current that depends on the difference between first input voltage and second input voltage, and described differential amplifier comprises:
Trsanscondutance amplifier, be used to provide described output current to comparator so that numeral output is provided;
At least one switch input sample capacitor, it is coupled to the input of described trsanscondutance amplifier;
At least one feedback switch, it is configured to optionally the output of described trsanscondutance amplifier is coupled to the described input of described trsanscondutance amplifier; And
At least one selector switch, it is configured to described input sample capacitor alternately is coupled to described first and second input voltages, wherein, in use,
Described selector switch is controlled as described input sample capacitor at first is coupled to the aanalogvoltage that is used to change; And
Described feedback switch is controlled as the described input of the output of described trsanscondutance amplifier being coupled to described trsanscondutance amplifier; Then,
Described selector switch be controlled as with described input sample capacitor-coupled to the described rough approximation of described analog input signal so that reference voltage to be provided; And
Described feedback switch is disconnected.
41. two-stage analog-digital converter as claimed in claim 40, wherein the output current of differential amplifier is linearly related to described poor between described first and second input voltages.
CNB038213451A 2002-09-10 2003-09-10 Transconductance amplifier, analog-to-digital converter and operating method thereof, and current generation method Expired - Lifetime CN100511978C (en)

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