CN100499734C - CMOS image sensor - Google Patents

CMOS image sensor Download PDF

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CN100499734C
CN100499734C CNB2005100938910A CN200510093891A CN100499734C CN 100499734 C CN100499734 C CN 100499734C CN B2005100938910 A CNB2005100938910 A CN B2005100938910A CN 200510093891 A CN200510093891 A CN 200510093891A CN 100499734 C CN100499734 C CN 100499734C
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pixel data
pixel
analog
signal
data
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CN1744661A (en
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吴学洙
裵昌民
朴爱莹
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MagnaChip Semiconductor Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/67—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response
    • H04N25/671—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response for non-uniformity detection or correction

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Abstract

Disclosed herein is a CMOS image sensor for improving an image quality by removing an offset noise occurred in a path difference. The CMOS image sensor includes a pixel array including a plurality of a first pixel and a second pixel; a first analog data bus and a second analog data bus for transferring a first pixel data and a second pixel data, each generated from the first pixel and the second pixel; a first analog signal processing unit and a second analog signal processing unit, each for amplifying an inputted pixel data to extract a pure pixel data; and a swapping unit for swapping the first pixel data and the second pixel data to thereby delivery each of first and second swapped pixel data into each of the first and the second analog signal processing unit.

Description

Cmos image sensor
Technical field
The present invention relates to complementary metal oxide semiconductors (CMOS) (CMOS) imageing sensor; And, more specifically, relate to the cmos image sensor that is used for improving picture quality by the migration noise that removal is caused by path difference.
Background technology
Generally speaking, complementary metal oxide semiconductors (CMOS) (CMOS) imageing sensor is the semiconductor device that optical imagery is converted to the signal of telecommunication.Described imageing sensor is classified as charge coupled device (CCD) imageing sensor and complementary metal oxide semiconductors (CMOS) (CMOS) imageing sensor basically.
In imageing sensor, ccd image sensor is a semiconductor device, and each Metal-oxide-silicon (MOS) capacitor closely closely is positioned over wherein and electric charge carrier is stored wherein and transmission.Cmos image sensor adopts method of switching, is used for the transistorized output of a lot of metal-oxide semiconductor (MOS)s (MOS) that constitutes with number of pixels based on CMOS technology sequence detection.
Cmos image sensor is more cheap and have a power consumption of 1/10 of ccd image sensor than ccd image sensor.
The traditional cmos imageing sensor of the view data that processing obtains from pixel (analog signal) is described in Fig. 1.
Fig. 1 is the block diagram that the traditional cmos imageing sensor is shown.Fig. 1 is described in detail in the data path of the analogue data that the transmission pel array produces in the traditional cmos imageing sensor.
As shown in Figure 1, the traditional cmos imageing sensor comprises pel array 10, correlated-double-sampling (CDS) piece 20 and analogue signal processor (ASP) 30.Described pel array comprises a plurality of red (R) that is arranged in the MN matrix, green (G) and blue (B) pixel.Comprise that at every row described correlated-double-sampling (CDS) piece 20 of CDS circuit is set at the downside of described pel array 10.Processing is set at the right side of described pel array 10 from the described analogue signal processor (ASP) 30 of the analog signal of CDS piece 20 outputs.
The output signal of described CDS piece 20 is delivered to described ASP30 by analog data bus.Described analog data bus constitutes with first analog data bus 52 and second analog data bus 54.
The output signal of described CDS piece 20 is loaded in described first analog data bus 52 or described second analog data bus 54 by selecting piece 60, and described selection piece 60 is by the selection signal controlling of for example CS0 that produces from row driver 40.Described selection piece 60 comprises a plurality of switches, and described a plurality of switches are used for optionally the output of CDS piece 20 being delivered to described first analog data bus 52 or second analog data bus 54 one.
Described ASP 30 has ASP-A 32 and ASP-B 34 to amplify each analogue data by described first analog data bus 52 and 54 transmission of second analog data bus.
Described CDS piece 20 is from each pixel sampling reset signal and data-signal and resetting of will sample and data-signal is supplied in analog data bus.Then, described ASP 30 calculates the difference between described reset signals and the data-signal and amplifies that this is poor.Thereby, the analog pixel data of the target that obtains being hunted down.
In addition, described row driver 40 receives column address and selects signal, for example CS0 to produce thus.
Hereinafter, the process of the described cmos image sensor of following description.
When described cmos image sensor reads pixel data, the pixel of arranging along the delegation of described pel array 10 is delivered to the CDS circuit of described CDS piece 20 by immediately and simultaneously (at identical clock).Under the control of row driver 40, the output signal of CDS circuit arrives described ASP 30 by selecting piece 60 to be loaded in the sequence delivery in the lump of described first analog data bus 52 and second analog data bus 54.
For example, the pixel data sequence of first row from described pel array 10 and the second row generation is loaded in described first analog data bus 52 and second analog data bus 54, as following table 1.
Table 1
Figure C200510093891D00091
Reference table 1 is being arranged in the pixel data of identical row, loads on described first analog data bus corresponding to the pixel data of each odd number alignment, and loads on described second analog data bus corresponding to the pixel data of each even number alignment.
At length, in addition identical green (G) pixel data according to the alignment of location by path A on first analog data bus or the path B on second analog data bus.Equally, red (R) and blue (B) pixel are also passed through path A or path B according to the location alignment.That is to say, according to location of pixels, rather than type of pixel, pixel data is transmitted by different paths.
As mentioned above, if owing to path difference is offset, thereby migration noise appears at deterioration picture quality in the true picture.
Summary of the invention
Therefore, being provided for by removing the cmos image sensor that migration noise that the path difference passed through by the same type pixel data causes improves picture quality is target of the present invention.
In one aspect of the invention, provide a kind of cmos image sensor, comprising: pel array comprises a plurality of first pixels and second pixel; First analog data bus and second analog data bus are used to transmit first pixel data and second pixel data, and each produces from first pixel and second pixel; First analogy signal processing unit and second analogy signal processing unit, each is used to amplify the pixel data of input to extract pure pixel data; And crosspoint (swapping unit), be used for exchanging first pixel data and second pixel data thus first and second each pixel data through the pixel data of exchange are delivered in each of first and second analogy signal processing units.
According to a further aspect in the invention, provide a kind of equipment that is used for view data is converted to the signal of telecommunication, comprising: pel array comprises a plurality of first pixels and second pixel; First analog data bus and second analog data bus are used to transmit first pixel data and second pixel data, and each produces from first pixel and second pixel; First analogy signal processing unit and second analogy signal processing unit, each is used to amplify the pixel data of input to extract pure pixel data; And crosspoint, be used for exchanging first pixel data and second pixel data thus first and second each pixel data through the pixel data of exchange are delivered in each of first and second analogy signal processing units.
According to a further aspect in the invention, provide a kind of, may further comprise the steps: each first pixel data and second pixel data from first pixel and the generation of second pixel is loaded on first analog data bus and second analog data bus in the method that is used for view data is converted to the equipment processed pixels data of the signal of telecommunication; Exchange first pixel data and second pixel data with thus with first and second through the exchange pixel data in each pixel data be delivered in each of first and second analogy signal processing units; And amplification is delivered to the pixel data of first analogy signal processing unit and second analogy signal processing unit.
Description of drawings
More than and other target of the present invention from the following description of the preferred embodiment that provides together with accompanying drawing, will become obviously with feature, wherein:
Fig. 1 is the block diagram that the traditional cmos imageing sensor is shown;
Fig. 2 describes the block diagram of cmos image sensor according to an embodiment of the invention;
Fig. 3 A and Fig. 3 B are the block diagram of explanation according to the operation of swap block of the present invention;
Fig. 4 is the block diagram that ASP 30 according to another embodiment of the present invention is shown;
Fig. 5 is the waveform of the operation of the demultiplexer shown in the key diagram 4 (demultiplexer);
Fig. 6 is a block diagram of describing ASP piece according to another embodiment of the present invention;
Fig. 7 is the block diagram that exchange again (re-swapping) piece shown in Fig. 6 is shown; And
Fig. 8 is the waveform of the operation of the swap block again shown in the key diagram 7;
Embodiment
Hereinafter, will be described in detail with reference to the attached drawings according to cmos image sensor of the present invention.
Fig. 2 describes the block diagram of cmos image sensor according to an embodiment of the invention.
As shown in Figure 2, cmos image sensor of the present invention comprises first analog data bus 112 and second analog data bus 114, so that transmit pixel data.Equally, described cmos image sensor comprises pel array 100, correlated-double-sampling (CDS) piece 120 and analogue signal processor (ASP) 130.Described pel array comprises a plurality of red (R) that is arranged in the MN matrix, green (G) and blue (B) pixel.Comprise that at every row described correlated-double-sampling (CDS) piece 120 of CDS circuit is set at the downside of described pel array 100.Processing is set at the right side of described pel array 100 from the described analogue signal processor (ASP) 130 of the analog signal of CDS piece 120.
The output signal of described CDS piece 120 is loaded in first analog data bus 112 or second analog data bus 114 by selecting piece 160, described selection piece 160 by the selection signal that produces from row driver 140 (CS0, CS1, CS2 ...) control.
Especially, described ASP 130 comprises that swap block 200 and amplification piece ASP-A 132 and ASP-B134 are to amplify the output signal of swap block 200.Described swap block 200 exchange pixel datas are so that pass through same paths by the pixel data of the same type in the pixel data of described first analog data bus 112 and 114 transmission of second analog data bus.
Fig. 3 A and Fig. 3 B are the block diagram of explanation according to the operation of swap block of the present invention
Hereinafter, with reference to figure 3A and Fig. 3 B the operation that is included in according to the ASP among the cmos image sensor of the present invention 130 is described.
At first, Fig. 3 A illustrates the situation that described swap block 200 transmits the pixel data that is positioned at first row, and described pixel data is loaded in described first analog data bus 112 and second analog data bus 114.
Described CDS piece 120 samplings are also preserved the pixel data that is positioned at first row, for example " B 11, G 12, B 13, G 14, B 15, G 16".Then, at the colleague and the pixel data of each odd column, i.e. " B mutually 11, B 13, B 15", be loaded in described first analog data bus 112 by selecting piece.Equally, be positioned at the pixel data of going together mutually, i.e. " G with each even column 12, G 14, G 16", be loaded in described second analog data bus 114 by selecting piece.Continuously, the pixel data on swap block 200 transmission first analog data bus 112 and second analog data bus 114.In other words, be passed to the A-path at the pixel data of going together mutually by ASP-A 132, and be passed to the B-path by ASP-B 134 at the pixel data of going together mutually with each even column with each odd column.Therefore, at indigo plant (B) pixel data of first row, i.e. " B 11, B 13, B 15", through the A-path, and at first green (G) pixel data of going, i.e. " G 12, G 14, G 16", through the B-path.Pixel data sequence can briefly be described as following table 2.
Table 2
Figure C200510093891D00131
Fig. 3 B illustrates the situation that described swap block 200 exchanges are positioned at the pixel data of second row, and described pixel data is loaded on described first analog data bus 112 and second analog data bus 114.
With reference to figure 3B, described swap block 200 is to load on green (G) pixel data on described first analog data bus 112, i.e. " G 21, G 23, G 25", exchange red (R) pixel data that loads on described second analog data bus 114, i.e. " R 22, R 24, R 26".Like this, the output of described swap block 200 is intersected and is exported.Continuously, each output of described swap block 200 is passed to A-path or B-path by ASP-A132 or ASP-B134.As the row of second in the table 2 as seen, at red (R) pixel data of second row, i.e. " R 22, R 24, R 26", through the A-path, and at second green (G) pixel data of going, i.e. " G 21, G 23, G 25", through the B-path.
As mentioned above, ASP130 of the present invention has swap block 200, and described swap block 200 transmits the pixel data that is positioned at each even number line and exchanges the pixel data that is positioned at each odd-numbered line.Therefore, red (R) pixel data and indigo plant (B) pixel data are through the A-path, and green (G) pixel data, through the B-path.
As a result, in the present invention, described cmos image sensor has swap block 200, and described swap block 200 makes all green (G) type pixel datas through the B-path.Those skilled in the art are well-known to be that green (G) pixel data is a key factor of determining luminosity (luminance), brightness, colourity etc.In other words, described cmos image sensor improves picture quality by removing by path for example green (G) type pixel data through the migration noise that the difference in different paths causes.
Hereinafter, when the pixel data of same type was transmitted same paths by described swap block 200, the permutatation method that the input and output data that are used to prevent the ASP piece are obscured the raw pixel data sequence was described.
Fig. 4 is the block diagram that ASP 30 according to another embodiment of the present invention is shown;
As shown in Figure 4, ASP 30 according to the present invention comprises that described first analog data bus 112 and second analog data bus 114 are so that transmit pixel data.Equally, described ASP 130 comprises swap block 200, amplifies piece ASP-A 132 and ASP-B 134, demultiplexer 210 and analog-to-digital conversion (ADC) piece 220.The described swap block 200 feasible pixel datas that are passed to the same type of described first analog data bus 112 and second analog data bus 114 are through same paths.Described amplification piece ASP-A 132 and ASP-B 134 amplify the output signal of swap block 200 and this output signal are placed on A-path and the B-path.Described demultiplexer 210 only outputs to the pixel data in A-path and B-path on the output line successively; Equally, in response to exchange control signal swp_ctr, make the sequence of pixel data sequence exchange becoming original image by described swap block 200.Described ADC piece 220 is used for converting the dateout of described demultiplexer 210 to digital signal (OUT).
With reference to figure 3A and Fig. 3 B, described swap block 200, by transmitting corresponding to the pixel data of each even number line and exchange pixel data corresponding to each odd-numbered line, make red (R) pixel data and indigo plant (B) pixel data process A-path, and green (G) pixel data process B-path.
Described demultiplexer 210 only will output to an output line from the pixel data in A-path and B-path and adjust output sequence in response to exchange control signal swp_ctr.
Fig. 5 is the waveform of the operation of explanation demultiplexer 210.
Hereinafter, will be elucidated in more detail with reference to the drawing demultiplexer 210 of the present invention.
In Fig. 5, provide according to exchange control signal swp_ctr ' demultiplexer selection path signal ' and selected ' the demultiplexer output ' of path signal according to demultiplexer.
Under the situation of ' α ', be loaded on A-path and B-path at first pixel data of going; And, under the situation of ' β ', be loaded on A-path and B-path at second pixel data of going.
At first, under the situation of ' α ', because described exchange control signal swp_ctr is logic level ' L ', described demultiplexer 210, output pixel data successively is as the sequence of the data on from the data on the A-path to the B-path.Therefore, load on pixel data B on the A-path 11Be output, then, load on the pixel data G on the B-path 12Be output.
Next, under the situation of ' β ', because described exchange control signal swp_ctr is logic level ' H ', described demultiplexer 210, output pixel data successively is as the sequence of the data on from the data on the B-path to the A-path.Therefore, load on pixel data G on the B-path 21Be output, then, load on the pixel data R on the A-path 22Be output.
As mentioned above, illustrate by the sequence of the pixel data of described demultiplexer 210 outputs such as following table 3.
Table 3
Figure C200510093891D00151
Reference table 3, described demultiplexer 210 permutatation are by the sequence of the pixel data of described swap block 200 exchanges and the pixel data of permutatation is shown.
Thereby, for removing by for example caused migration noise of path difference of the same type pixel data of green (G) type pixel data, cmos image sensor of the present invention has swap block 200, and described swap block 200 makes the pixel data of same type pass through same paths.Described demultiplexer 210 also resets into the turnaround sequence of pixel data the sequence of raw image data.
Fig. 6 is a block diagram of describing ASP piece according to another embodiment of the present invention.
With reference to figure 6, ASP piece according to the present invention comprises that first analog data bus 112 and second analog data bus 114 are to transmit pixel data.Equally, described ASP piece 130 comprise swap block 200, amplify piece ASP-A 132 and ASP-B 134, demultiplexer 210 and swap block 230 again.Described swap block 200 makes green (G) pixel data in the pixel data that is passed to described first analog data bus 112 and second analog data bus 114 pass through same paths.Described amplification piece ASP-A 132 and ASP-B 134 amplify the output signal of swap block 200 and this output signal are placed on A-path and the B-path.Do not consider original sequence, described demultiplexer 210 outputs to only output line with the pixel data in A-path and B-path successively.Described ADC piece 220 converts the dateout of described demultiplexer 210 to digital signal.Also have, described swap block again 230 is used for the output of the exchange again digital signal by described ADC piece 220, exports the sequence of the pixel data identical with the sequence of pel array.
The process of described cmos image sensor is as described below.
With reference to figure 3A and Fig. 3 B, described swap block 200, by transmitting corresponding to the pixel data of each even number line and exchange pixel data corresponding to each odd-numbered line, make red (R) pixel data and indigo plant (B) pixel data process A-path, and green (G) pixel data process B-path.
Then, described demultiplexer 210 outputs to only output line with the pixel data in A-path and B-path.The output pixel data of described demultiplexer 210 such as following table 4 illustrate.
[table 4]
As shown in table 4, the pixel data that is positioned at second row is with " R 22, G 21, R 24, G 23, R 26, G 25" sequence output.Above-mentioned output sequence is different from the sequence of pel array in the matrix, the output before the output of green (G) pixel data of promptly red (R) pixel data.
In other words, because described swap block 200 exchange pixel datas are so that make green (G) pixel data through same paths, so need again exchange process so that the output pixel data sequence that is exchanged identical with the sequence of pel array.
On the other hand, the output signal of described demultiplexer 210 converts digital signal to by described ADC piece 220.Because the described output signal of described ADC piece 220 outputs is as the sequence of input signal, so described ADC piece 220 is kept the sequence of the output signal of described demultiplexer 210.
Described swap block again 230 exchanges the output signal of described ADC piece again and exports the sequence of this signal as pel array corresponding to the pixel data that is exchanged by described swap block 200.
That is to say, the signal that described swap block again 230 transmits corresponding to the pixel data that is positioned at first row, and therefore can't help described swap block 200 exchanges.Equally, corresponding in the signal of pixel data of second row, described swap block again 230 is to exchange corresponding to the signal at the pixel data of each even column corresponding to the signal at the pixel data of each odd column.
For example, described swap block again 230 remains on the pixel data R of secondary series 22And output is at the pixel data G of first row 21Then, described 230 outputs of swap block again are at the pixel data R of secondary series 22
By this way, the pixel data of described exchange again such as following shown in the table 5.
[table 5]
Figure C200510093891D00171
As shown in table 5, ASP piece 130 of the present invention has swap block 230 again, and described swap block again 230 exchanges the sequence of the pixel data that is exchanged by swap block 200 again.Therefore, it is possible re-constructing the original pixels image.
Hereinafter, the embodiment of described swap block again 230 is shown in Fig. 7 and Fig. 8.
Fig. 7 is the block diagram that the swap block again 230 shown in Fig. 6 is shown.
With reference to figure 7, described swap block again 230 comprises: first trigger (F/F) 151, so that the input signal of output and clock synchronization; And the 2nd F/F152, so that the output signal of a F/F of output and clock synchronization.Also have, described swap block again 230 comprises that first demultiplexer 154, second demultiplexer 155, control signal produce piece 156 and the 3rd demultiplexer 153.Described first demultiplexer 154, control signal swp_ctr selects between the first delayed clock clk_dly_fl and the first switching clock clk_swap_fl in response to exchange, and provides selected clock for a described F/F 151.Described second demultiplexer 155, control signal swp_ctr selects between the second delayed clock clk_dly_f2 and the second switching clock clk_swap_f2 in response to exchange, and provides selected clock for described the 2nd F/F152.Described control signal produces piece 156 and produces control signal ctr from described exchange control signal swp_ctr and transmission control signal ps_ctr.Described the 3rd demultiplexer 153 in response to described control signal ctr, is selected between the output signal of described input signal and the 2nd F/F152, and exports selected signal (OUT).
Described control signal produces piece 156 and comprises and (AND) door, should comprise described exchange control signal swp_ctr with the input of door and transmit control signal ps_ctr.
Fig. 8 is the waveform of the operation of the swap block again shown in the key diagram 7.
As shown in Figure 8, the input signal of described swap block again 230 is " A, B, C, D, E, F, G, H, I ".
Under the situation of ' α ', described swap block again 230 transmits this input signal.First demultiplexer 154 is selected the described first delayed clock clk_dly_fl and is provided this first delayed clock clk_dly_fl for a described F/F151.Equally, second demultiplexer 155 is selected the described second delayed clock clk_dly_f2 and is provided this second delayed clock clk_dly_f2 for described the 2nd F/F152.Then, a described F/F 151 according to described first delayed clock clk_dly_fl output ffl_dly and described the 2nd F/F152 according to described second delayed clock clk_dly_f2 output ff2_dly.The 3rd demultiplexer 153 transmits the output signal of described the 2nd F/F 152 according to described control signal ctr.Therefore, the output signal of described the 3rd demultiplexer 153 (OUT) is the sequence identical with the sequence of input signal.
Under the situation of ' β ', described swap block again 230 is with at the input signal of the input signal of each odd number exchange in each even number.Therefore, the sequence from the output signal of described swap block again 230 is " B, A, D, C, F, E, H, G ".
At first, described first demultiplexer 154 and second demultiplexer 155 are selected the first switching clock clk_swap_fl and the second switching clock clk_swap_f2, and are respectively a described F/F 151 and the 2nd F/F 152 provides selected switching clock.Then, a described F/F 151 outputs and the synchronous input signal ' A ' of the described first switching clock clk_swap_fl; And described the 2nd F/F 152 exports and the output signal ' A ' of the described F/F 151 that the described second switching clock clk_swap_f2 is synchronous.When described the 2nd F/F 152 kept the output signal of a described F/F 151, signal ' B ' was a current input signal.
If described transmission control signal ps_ctr is switched (toggle), described control signal produces piece 156 and switches described control signal ctr.As a result, for the activation part of described transmission control signal ps_ctr, current input signal ' B ' is exported by described control signal ctr.Equally, for the non-activation part of described transmission control signal ps_ctr, the inhibit signal of described the 2nd F/F 152 ' A ' is exported by described control signal ctr.
In other words, described trigger remains on the input signal of each odd number and exports input signal in each even number immediately.After the input signal of output, be output at the maintenance input signal of each odd number in each even number.
As mentioned above, because described swap block again 230, with at the input signal exchange of each odd number input signal, so the sequence of the output signal of described swap block again 230 is " B, A, D, C, F, E, H, G " in each even number.
Thereby for removing by the caused migration noise of the path difference of same type pixel data, cmos image sensor of the present invention has described swap block 200, is used to make the pixel data of same type through same paths.In addition, because described exchange, the sequence of the output signal of described ADC piece is different from the sequence of described pel array.In order to address this problem, provide by exchanging the described swap block again 230 of the output pixel data sequence identical again with the sequence of described pel array.
As mentioned above, described cmos image sensor is at swap operation with improve picture quality by removing by the caused migration noise of path difference in the swap operation again.
The application comprises the theme relevant with 2004-69218 with korean patent application Nos.2004-69038,2004-69046, and described korean patent application was submitted in Korean Patent office on August 31st, 2004, and its whole contents is incorporated herein by reference.
Although described the present invention with respect to specific embodiment, it will be apparent to those skilled in the art that and to carry out various changes and modification, and do not deviate from as the spirit and scope of the present invention defined in the following claim.

Claims (22)

1. cmos image sensor comprises:
Pel array comprises a plurality of first pixels and second pixel;
First analog data bus and second analog data bus are used to transmit first pixel data and second pixel data, and each produces from described first pixel and second pixel;
First analog signal processing device and second analog signal processing device, each is used to amplify the pixel data imported to extract pure pixel data; And
Switch, be used for exchanging described first pixel data and described second pixel data with thus described first and second each pixel data through the pixel data of exchange are delivered to described first and each of described second analog signal processing device in.
2. cmos image sensor as claimed in claim 1, wherein said switch,
Under the situation that described first pixel data is transmitted by described second analog data bus, transmit the pixel data that is transmitted by described first analog data bus and described second analog data bus; And
Under the situation that described first pixel data is transmitted by described first analog data bus, the pixel data that exchange is transmitted by described first analog data bus and described second analog data bus.
3. cmos image sensor as claimed in claim 1 further comprises:
The correlated-double-sampling piece is used for sampling and exporting the pixel data that is produced from first pixel and second pixel of pel array.
Row driver is used to produce array selecting signal; And
Select piece, be used for the output signal of described correlated-double-sampling piece being delivered to described first analog data bus and described second analog data bus in response to described array selecting signal.
4. cmos image sensor as claimed in claim 1, the green characteristic of the wherein said first pixel sensor light and the red and blue characteristic of the described second pixel sensor light.
5. the cmos image sensor described in claim 1, in the brightness of the wherein said first pixel sensor light, luminosity and the colorimetric properties one, the brightness of the described second pixel sensor light, luminosity, and colorimetric properties in other.
6. cmos image sensor as claimed in claim 1 further comprises:
Demultiplexer is used for the dateout of described first analog signal processing device and described second analog signal processing device is outputed to only output line successively; And
The analog-to-digital conversion piece is used for converting the dateout of described demultiplexer to digital signal,
Wherein said demultiplexer in response to the exchange control signal of being imported, produces by pixel data sequence that described switch the exchanged sequence as original image.
7. cmos image sensor as claimed in claim 1 further comprises:
Demultiplexer is used for the dateout of described first analog signal processing device and described second analog signal processing device is outputed to only output line successively;
The analog-to-digital conversion piece is used for converting the dateout of described demultiplexer to digital signal; And
Switch is used for exchanging the output signal of described analog-to-digital conversion piece again in response to by the pixel data that described switch exchanged again.
8. as the cmos image sensor in the claim 7, wherein said switch again comprises:
First trigger is used to export the input signal with first clock synchronization;
Second trigger is used to export the output signal with synchronous described first trigger of second clock;
First demultiplexer is used for selecting between first delayed clock and first switching clock in response to the exchange control signal, to provide selected clock as described first clock for described first trigger thus;
Second demultiplexer is used for selecting between second delayed clock and second switching clock in response to the exchange control signal, to provide selected clock as described second clock for described second trigger thus;
Control signal produces piece, is used for producing control signal from transmitting control signal and described exchange control signal; And
The 3rd demultiplexer is used for selecting between the output signal of the described input signal and second trigger in response to described control signal, to export selected signal thus.
9. equipment that is used for view data is converted to the signal of telecommunication comprises:
Pel array comprises a plurality of first pixels and second pixel;
First analog data bus and second analog data bus are used to transmit first pixel data and second pixel data, and each produces from described first pixel and second pixel;
First analog signal processing device and second analog signal processing device, each is used to amplify the pixel data of input to extract pure pixel data; And
Switch, be used for exchanging described first pixel data and described second pixel data with thus first and second each pixel data through the pixel data of exchange are delivered to described first and each of described second analog signal processing device in.
10. equipment as claimed in claim 9 further comprises:
The correlated-double-sampling piece is used for sampling and exporting the pixel data that is produced from described first pixel and described second pixel of pel array.
Row driver is used to produce array selecting signal; And
Select piece, be used for the output signal of described correlated-double-sampling piece being delivered to described first analog data bus and described second analog data bus in response to described array selecting signal.
11. equipment as claimed in claim 9 further comprises:
Demultiplexer is used for the dateout of described first analog signal processing device and second analog signal processing device is outputed to only output line successively; And
The analog-to-digital conversion piece is used for converting the dateout of described demultiplexer to digital signal,
Wherein said demultiplexer in response to the exchange control signal of being imported, produces by pixel data sequence that described switch the exchanged sequence as original image.
12. the equipment as in the claim 9 further comprises:
Demultiplexer is used for the dateout of described first analog signal processing device and described second analog signal processing device is outputed to only output line successively;
The analog-to-digital conversion piece is used for converting the dateout of described demultiplexer to digital signal; And
Switch is used for exchanging the output signal of described analog-to-digital conversion piece again in response to by the pixel data that described switch exchanged again.
13. the equipment described in claim 12, wherein said switch again comprises:
First trigger is used to export the input signal with first clock synchronization;
Second trigger is used to export the output signal with synchronous described first trigger of second clock;
First demultiplexer is used for selecting between first delayed clock and first switching clock in response to the exchange control signal, to provide selected clock as described first clock for described first trigger thus;
Second demultiplexer is used for selecting between second delayed clock and second switching clock in response to the exchange control signal, to provide selected clock as described second clock for described second trigger thus;
Control signal produces piece, is used for producing control signal from transmitting control signal and described exchange control signal; And
The 3rd demultiplexer is used for selecting between the output signal of the described input signal and second trigger in response to described control signal, to export selected signal thus.
14. one kind is used in the method that is used for view data is converted to the equipment processed pixels data of the signal of telecommunication, described equipment comprises a plurality of first pixels and second pixel, said method comprising the steps of:
Each first pixel data and second pixel data from described first pixel and the generation of described second pixel is loaded on first analog data bus and second analog data bus;
Exchange described first pixel data and described second pixel data, with thus with first and second through the exchange pixel data in each pixel data be delivered in each of first and second analog signal processing devices; And
Amplify the pixel data that is delivered to described first analog signal processing device and described second analog signal processing device.
15. as the method for claim 14, wherein said exchange step may further comprise the steps:
Under the situation that described first pixel data is transmitted by described second analog data bus, transmit the pixel data that is transmitted by described first analog data bus and described second analog data bus;
And
Under the situation that described first pixel data is transmitted by described first analog data bus, the pixel data that exchange is transmitted by described first analog data bus and described second analog data bus.
16. as the method for claim 14, the green characteristic of the wherein said first pixel sensor light and the red and blue characteristic of the described second pixel sensor light.
17. as the method for claim 14, the brightness of the wherein said first pixel sensor light, luminosity, and colorimetric properties in one, and the brightness of the described second pixel sensor light, luminosity, and colorimetric properties in other.
18. the method described in claim 14 further may further comprise the steps:
The data of decomposing described amplification successively are with on data to an output line of exporting described amplification, wherein, the pixel data sequence that is exchanged rearranged be original sequence, with response exchange control signal; And
Demultiplexed data transaction is become digital signal.
19. the method described in claim 18, wherein, in the multichannel decomposition step:
Be positioned at described first pixel data and described second pixel data of first row, be output with sequence of rules; And
Be positioned at described first pixel data and described second pixel data of secondary series, be output with opposite sequence.
20. as the method that claim 19 is stated, wherein said first row are each even columns and described secondary series is each odd column.
21. the method described in claim 14 further may further comprise the steps:
Multichannel is decomposed the data amplified so that the data of being amplified are outputed to an output line successively;
Convert the multichannel decomposition data to digital signal; And
In response to the exchange control signal of input, the sequence of digital signal is exchanged for again the sequence of pattern matrix.
22. as the method for claim 21, wherein said exchange step again may further comprise the steps:
Remain on the digital signal of each odd number input;
Export digital signal immediately in each even number input; And
Output is at the inhibit signal of each odd number input.
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