CN100485554C - Antistatic method for system and circuit - Google Patents

Antistatic method for system and circuit Download PDF

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Publication number
CN100485554C
CN100485554C CNB2005100251119A CN200510025111A CN100485554C CN 100485554 C CN100485554 C CN 100485554C CN B2005100251119 A CNB2005100251119 A CN B2005100251119A CN 200510025111 A CN200510025111 A CN 200510025111A CN 100485554 C CN100485554 C CN 100485554C
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processor
detecting module
detecting
state
operation state
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CN1848004A (en
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林庆源
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Hongguang Precision Industry Suzhou Co Ltd
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Hongguang Precision Industry Suzhou Co Ltd
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Abstract

The present invention relates to antistatic method for system and circuit. Through proper operation, the system has its operation state switched into idle mode and the hardware system chips are set in inactive state, so as to prevent the outer static charge from entering the electronic module to produce static charge impact. The said method can ensure the safety of system in no use or standby state effectively.

Description

A kind of circuit system electrostatic protection method
Technical field
The present invention relates to a kind of circuit system electrostatic protection method, mode by mechanism's running, the switched system mode of operation enters idle mode (idle mode), and then prevent that the external world from being brought out the electrostatic charge that causes and being introduced into the internal electrical components that is delivered to these electronic installations, can be applicable to scanner, printer, duplicating machine, facsimile recorder, multifunctional paper feeding machine (Multi-MediaPrinter; MFP) etc. the system that has the cap device that is available for users to open and close.
Background technology
Generally speaking, image processor, print system for example, contain electric component (as resistor, capacitor), and the electric assembly (as powder box, ink cartridges) that do not act on of non-electric function, and static discharge (electrostatic discharge, ESD) incident takes place when high voltage usually, and damage or destroy print system easily, electric component to electronic installation causes direct or indirect great bodily injury, also can not act on damage or the destruction that assembly causes its inner contained assembly to electric.Therefore, damage the electric component that not only can occur in system, also occur in the electric assembly that do not act on simultaneously.Though many now print systems all have the ESD guard system; but the ESD protection structure is only protected the electric component of print system at present; as some ESD protection circuit designs at chip; the designed ESD protection circuit of gate drive (Gate Driven) technology as No. 5711560 and No. 5910874 exposure of United States Patent (USP); and No. the 5744842nd, United States Patent (USP) and disclose for No. 6072219 trigger the designed ESD protection circuit of (Substrate Triggered) technology with matrix, all be to develop the state-of-the-art technology that in order to promote the reaction efficiency and the protective capacities of electrostatic discharge protective assembly when static discharge impacts.However, the electric assembly that do not act on but still may suffer damage because having potential nocuous esd event protection usually.Even its reason is electric component and has ESD protection, esd event still may damage the electric assembly that do not act on of print system, occurs in electric when not acting on assembly and being in close proximity to electric component especially.And the technology that No. the 6361150th, United States Patent (USP) discloses and provide a kind of and do not act on the protection micro-system that assembly is protected at electric; yet above-mentioned patent all is to utilize protection circuit to solve the problem of ESD, and does not have a kind of technology can protect electric component and the electric assembly that do not act on simultaneously.
And in known technology, normal manipulation mode (normal mode) when the typical hardware system prepares to operate for this hardware system except possessing at any time, it may provide a kind of sleep pattern (sleeping mode) or battery saving mode (powersaving mode) to I haven't seen you for ages, its mainly be when this hardware system after not being used after a while, the low active state of a kind of power saving that is entered, and with the electronic package that does not need in this hardware system to be operated, the supply of all interrupting its power supply is in the hope of saving the energy, but still must or claim ASIC(Application Specific Integrated Circuit) (Application-SpecificIntegration Circuits with some data processing or data computation chip; ASIC) in known sleep pattern (sleeping mode) or battery saving mode (power savingmode), maintain specific high or low activity logic state, make itself and external interface can keep connecting, so that can return back to normal manipulation mode (normal mode) and keep the hardware system normal operation from sleep pattern or battery saving mode at any time.Therefore work as the ASIC(Application Specific Integrated Circuit) (ASIC) of this hardware system under normal manipulation mode, if be subjected to the operation of up-set condition when hardware system, as when the print system paperboard, the user raises the behavior of body cap, Chang Rongyi is brought out the electrostatic charge that causes with the external world and is introduced into the internal electrical components that is passed to print system, and cause hardware system to work as machine, a few thing safety problem perhaps takes place, even causes the hardware system chip to suffer the impact failure of electrostatic charge.
Therefore, need a kind of Electrostatic Discharge incident means of defence, it does not only act on the protection that assembly provides the Electrostatic Discharge incident to electric simultaneously to the electric component of electronic apparatus system yet.
Summary of the invention
In view of this, propose the present invention then, be a kind of circuit system electrostatic protection method for improving above-mentioned defective.Because data processing or data computation chip in system, or title ASIC(Application Specific Integrated Circuit) (Application-Specific IntegrationCircuits, ASIC) all include one in most the pins of chip and put pin (reset pin) again, this puts pin again can make ASIC(Application Specific Integrated Circuit) (ASIC) be in two states: initiatively (active) pattern and non-active (non-active) pattern, perhaps high active (active high) pattern and low initiatively (active low) pattern, wherein, when ASIC(Application Specific Integrated Circuit) (ASIC) is triggered and is under the state of non-aggressive mode or low aggressive mode, ASIC(Application Specific Integrated Circuit) (ASIC) is an active state, is easier to be subjected to the impact of electrostatic charge and damages; Otherwise,, then be not easy to be subjected to the impact of electrostatic charge and damage if be triggered and when having the initiative pattern or high aggressive mode, ASIC(Application Specific Integrated Circuit) (ASIC) is an inactive state when ASIC(Application Specific Integrated Circuit) (ASIC).
Spirit of the present invention mainly is to detect the abnormal operation whether this system is subjected to user or external force by the detecting module of system, with inductor (as the mechanical sensor of known technology, IR sensor ... Deng) whether detecting cap device raised or be subjected to external force by the user and closed really, system's automatic switchover is entered idle mode (idle mode), it is the mode by mechanism's running, trigger in the processor of this system answering of these ASIC(Application Specific Integrated Circuit) (ASIC) chip and put pin (resetpin), make ASIC(Application Specific Integrated Circuit) (ASIC) be triggered and switch to aggressive mode or high aggressive mode, make this system inactive, and then prevent that the extraneous electrostatic charge that causes that brought out is directed into the impact failure that causes the electrostatic charge of hardware system chip to electric component with electric do not act in the assembly, effectively avoid being in the purpose of working as machine or work safety problem under the undesired user mode when this system.
Utilize circuit system electrostatic protection method of the present invention can effectively avoid when system under undesired use, caused when machine or work safety problem.For example, when having autoamtic paper feeding machine (Automatic Document Feeder, when printer ADF) or scanner paperboard, the user opens the ADF paper-advance unit, this moment human body or extraneous static discharge, can discharge into from the cabinet cover that is opened easily, or even when the user puts into hand in the board, may cause danger.Use mechanism of the present invention, can be by the mode of mechanism's running, (ASIC) switches to inactive state with ASIC(Application Specific Integrated Circuit), so that system is because of being at it under abnormal operation state, can automatically switch and enter the idle mode of not doing any action, the external force for the treatment of abnormal operation removes, but after making system reply normal operating state, again ASIC(Application Specific Integrated Circuit) (ASIC) is switched to active state, so that normal manipulation mode is replied by this system, and can accept the instruction of external interface, and make ASIC(Application Specific Integrated Circuit) (ASIC) but the running of normal running control system.
The present invention comprises the following step at least:
1. whether be in the abnormal operation state by the detecting module detecting system;
2. when this detecting module system of detecting was in the abnormal operation state, this detecting module transmitted first signal to processor;
3. this processor switching operation state enters idle mode;
4. but whether be in normal operating state by this detecting module detecting system;
5. when this detecting module system of detecting was in normal operating state, this detecting module transmitted secondary signal to this processor;
6. this processor switching operation state leaves this idle mode,
Wherein, idle mode is by triggering the chip of processor, so that processor enters inactive state;
Wherein, processor is an ASIC(Application Specific Integrated Circuit).
Description of drawings
Fig. 1 is the system architecture diagram of circuit system electrostatic protection method of the present invention;
Fig. 2 is the executing state process flow diagram that idle mode is switched in system of the present invention;
But Fig. 3 makes system be in the normal operating state synoptic diagram for cap device normally closed of the present invention; And
Fig. 4 makes system be in the abnormal operation view for cap device of the present invention is unlocked.
Embodiment
The present invention is a kind of circuit system electrostatic protection method, for describing main spirit of the present invention in detail, now will cooperate to illustrate and be described in detail as follows.See also Fig. 1, it is the system architecture diagram of circuit system electrostatic protection method of the present invention, and system 10 comprises the cap device 13 of processor 11, detecting module 12 and system at least.Wherein, processor 11 is the control module of system 10, and it can be accepted the instruction of external interface and accept the signal that inner detecting module 12 is transmitted, and the running of control system 10; Cap device 13 is for being located at the cap device of the arbitrary form that is available for users to open and close on the housing of system 10; Detecting module 12 is connected to cap device 13, is used for detecting the open and-shut mode of cap device 13, and sends a signal to processor 11.
See also Fig. 2, it is the executing state process flow diagram of system of the present invention idle mode.At first, when system 10 during, as shown in Figure 3, whether be in abnormal operation state (step 200) by detecting module 12 detecting systems 10 in general normal operation; If cap device 13 is under the abnormal operation state system 10 because of being subjected to the user or external force is unlocked, as shown in Figure 4, then the mode by this mechanism's running triggers detecting module 12 transmission first signal to processor 11 (step 210); After pending device 11 receives first signal, processor 11 switching operation states enter idle mode (step 220), promptly by triggering the chip of processor 11, make that processor 11 is inactive, come the electric component 14 of protection system 10 and the electric assembly 15 that do not act under the abnormal operation situation with this, avoid the impact failure of static discharge electric charge; Be in the idle mode and work as system 10, but continue whether be in normal operating state (step 230) by detecting module 12 detecting systems 10; If the abnormal operation situation of system 10 is got rid of, but promptly confirm cap devices 13 normally closed and after being in normal operating state when detecting module 12 detecting, as shown in Figure 3, the mode that then operates by this mechanism triggers detecting module 12 and transmits secondary signals to processor 11 (step 240); After pending device 11 receives secondary signal, processor 11 switching operation states leave idle mode (step 250), promptly by triggering the chip of processor 11, make processor 11 reply original active state, but the running of normal running control system 10 with the instruction of accepting external interface, make system 10 reply general normal operation, finish this flow process simultaneously.
Wherein, processor 11 is ASIC(Application Specific Integrated Circuit) (ASIC), idle mode is by the mode of mechanism's running, raised by the user or be subjected to external force and be unlocked as cap device 13, trigger answering of ASIC(Application Specific Integrated Circuit) (ASIC) chip and put pin (reset pin), and make ASIC(Application Specific Integrated Circuit) (ASIC) enter inactive state.And detecting module 12 transmits the step 210 of first signal to processor 11, be to trigger detecting module 12 transmission first signal by raising cap device 13, and the first signal triggering processor, 11 switching operation states enters idle mode; Detecting module 12 transmits the step 240 of secondary signal to processor 11 in addition, be to trigger detecting module 12 by closure shell lid arrangement 13 to transmit secondary signal, and secondary signal is to trigger processor 11 switching operation states to leave idle mode.Thus, in the time of can working as system 10 and enter idle mode, make ASIC(Application Specific Integrated Circuit) (ASIC) originally as inactive state, and then prevent that the extraneous electrostatic charge that causes that brought out is directed into to electric component 14 electrostatic charge impact failure that causes with electric do not act in the assembly 15, effectively avoid being in purpose under the undesired user mode when machine or work safety problem when system 10.
Yet above-mentioned for embodiment be used for limiting scope of the invention process, any those of ordinary skill in the art, the equalization of being done without departing from the spirit and scope of the present invention changes and modifies, and is all contained by claim of the present invention.

Claims (5)

1. a circuit system electrostatic protection method is characterized in that, it comprises the following step at least:
Whether be in the abnormal operation state by the detecting module detecting system;
When the described detecting module system of detecting was in the abnormal operation state, described detecting module transmitted first signal to processor;
Described processor switching operation state enters idle mode;
But whether be in normal operating state by described detecting module detecting system;
When the described detecting module system of detecting was in normal operating state, described detecting module transmitted secondary signal to described processor; And
Described processor switching operation state leaves described idle mode,
Wherein, described idle mode is by triggering the chip of described processor, so that described processor enters inactive state;
Wherein, described processor is an ASIC(Application Specific Integrated Circuit).
2. the system as claimed in claim 1 circuit electrostatic protection method, it is characterized in that, described detecting module is connected to the cap device of arbitrary form of Gong the switching on the described system housing, be used for detecting the open and-shut mode of described cap device, and, send described first signal or secondary signal to described processor, wherein according to described open and-shut mode, described abnormal operation state is the state that described cap device is unlatching, is closed state but described normal operating state is described cap device.
3. the system as claimed in claim 1 circuit electrostatic protection method, it is characterized in that, described processor is the control module of described system, and it can be accepted the instruction of external interface and accept the inner signal that described detecting module transmitted, and controls the running of described system.
4. the system as claimed in claim 1 circuit electrostatic protection method is characterized in that, the described processor switching operation state of described first signal triggering enters described idle mode.
5. the system as claimed in claim 1 circuit electrostatic protection method is characterized in that, described secondary signal triggers described processor switching operation state and leaves described idle mode.
CNB2005100251119A 2005-04-15 2005-04-15 Antistatic method for system and circuit Active CN100485554C (en)

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Application Number Priority Date Filing Date Title
CNB2005100251119A CN100485554C (en) 2005-04-15 2005-04-15 Antistatic method for system and circuit

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CN100485554C true CN100485554C (en) 2009-05-06

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109656735A (en) * 2018-12-03 2019-04-19 晶晨半导体(上海)股份有限公司 Function port, electronic equipment and the method for promoting electronic equipment ESD performance

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004049089A2 (en) * 2002-11-28 2004-06-10 Conti Temic Microelectronic Gmbh Method for reducing the current consumption of a microprocessor provided with a watchdog circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004049089A2 (en) * 2002-11-28 2004-06-10 Conti Temic Microelectronic Gmbh Method for reducing the current consumption of a microprocessor provided with a watchdog circuit

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