CN100449647C - Programming a phase-change material memory - Google Patents

Programming a phase-change material memory Download PDF

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CN100449647C
CN100449647C CNB028295781A CN02829578A CN100449647C CN 100449647 C CN100449647 C CN 100449647C CN B028295781 A CNB028295781 A CN B028295781A CN 02829578 A CN02829578 A CN 02829578A CN 100449647 C CN100449647 C CN 100449647C
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pulse
state
memory device
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CN1669091A (en
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T·A·劳里
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Ovonyx Inc
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5678—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using amorphous/crystalline phase transition storage elements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G11C2013/0078—Write using current through the cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G11C2013/0092—Write characterized by the shape, e.g. form, length, amplitude of the write pulse

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  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Semiconductor Memories (AREA)

Abstract

The present invention relates to a memory which has a composition unit (604) comprising structural phase transition material used for storing data for the unit. The material can be chalkogenide alloy. When a primary pulse (204) is applied to the unit (604) and the material is maintained to be in a first state, such as a reset state, the material is amorphous and has high electric resistivity. When a secondary pulse (208) is applied to the unit (604) and the first state of the material is changed to be a second different state, such as a set state, the material is in a crystalline state and has low electric resistivity, wherein the second pulse (208) has a common triangular but is not a rectangular pulse.

Description

The program phase-change material memories
Background
The present invention relates to be used for technology that the structural phase-change material solid part is programmed, for example utilize and be programmed for the programming technique that the different resistivity state is stored the chalcogenide material storer of data.
The utilization structure phase-change material has remarkable advantages than traditional storer based on electric charge as the solid-state memory spare of data storage mechanism (abbreviate as " phase transition storage ") on cost and performance.Phase transition storage is made of the array of component units, and each unit has the data that some structural phase-change material are stored described unit.This material for example can be a chalcogenide alloy, and it presents structural phase transition reversible from the amorphous state to the crystalline state.A small amount of chalcogenide alloy is attached in the circuit, makes described unit can play the programmable resistance of quick conversion.This programmable resistance can present crystalline state (low-resistivity) than 40 times and the also big dynamic range of resistivity dynamic range between the amorphous state (high resistivity), and can present the multidigit storage is carried out in permission in each unit multiple intermediate state.The data that are stored in the unit are read by the resistivity of measuring unit.Chalcogenide alloy cell also is non-volatile.
Be used for the conventional art of phase-change memory cell programming be: the rect.p. (having constant amplitude) of electric current is added to the unit at voltage under greater than the condition of the switching threshold of phase-change material, this makes material be in reset mode (amorphous state and high resistivity).Still under the condition of voltage, apply follow-up rect.p. then, material is changed into SM set mode (crystalline state and low-resistivity) greater than switching threshold.The current amplitude of reset pulse is higher than set pulse, so that the temperature of phase-change material is elevated to T m, promptly decrystallized temperature is cooled off material rapidly subsequently, remains on amorphous state.Change over crystalline state, the material heating can be got back to optimum temperature T Opt, described T OptBe lower than T mT OptBe to allow material in the unit at relatively short time limit intercrystalline thereby produce more low-resistance temperature.Ideal situation is to adopt following method to realize this point: the amplitude that makes set pulse reaches decrystallized temperature less than the amplitude of reset pulse to prevent phase-change material, but the amplitude of set pulse is again enough greatly so that material reaches T Opt
Because the manufacture process of phase transition storage and the variation of material, for the given program current/voltage level that utilizes set pulse to obtain, the actual temperature of the phase-change material in the unit of the device of making has significant difference between each unit.The material that this species diversity can be not intended in one or more unit of chien shih device reaches T when adding the traditional rectangular pulse mThereby, cause the reset mode that remains on of those unit mistakes, and do not change into SM set mode.For avoiding this problem, the rectangular set pulse that traditional programming technique use amplitude reduces (being added on each unit of device), as shown in Figure 1.The expection of considering cell temperature when described amplitude changes, and set current should be enough low, to guarantee the not having unit to reach T in the device when adding set pulse mThe programming of memory device but this solution can slow down because since set pulse be lower than best temperature than low amplitude produced, just need long rectangular set pulse.In addition, many unit stable significantly is lower than optimum temperature in the storer, and this has just reduced the resistivity dynamic range between the set and reset mode in these unit.
Brief Description Of Drawings
With the mode for example rather than the mode of restriction the present invention is described in the accompanying drawing, similar reference symbol is represented similar elements in the accompanying drawing.Should be pointed out that in the disclosure and mention " one " embodiment might not refer to same embodiment, is meant at least one embodiment.
Fig. 1 illustrates and is used for conventional sequence of pulses that phase transition storage is programmed.
Fig. 2 illustrates the phase transition storage programming pulse sequence according to the embodiment of the invention, comprises set sweep (set sweep).
Fig. 3 illustrates the curve that the crystallization time of phase change material stores unit becomes with phase-change material temperature.
Fig. 4 illustrates another phase transition storage programming pulse sequence, comprises set sweep.
Fig. 5 illustrates when being added to the set sweep according to the embodiment of the invention on the unit, the temperature variation of phase-change material and time relation curve in the storage unit.
Fig. 6 illustrates for specific phase change memory device, and resistive memory cell is to the curve of program current level.
Fig. 7 illustrates for big storage unit groups, the pass of resistive memory cell and program current
Be curve, the example of the variation of broad in the described big storage unit groups shown in the figure.
Fig. 8 illustrates the block scheme of phase-change material memory part, comprises being used to provide set of devices
Become unit the programme waveform shaping and the driving circuit of required voltage and current.
Fig. 9 illustrates the embodiment block scheme of the portable use of the phase transition storage that comprises programming process.
Describe in detail
According to embodiments of the invention, be used for the set pulse that phase transition storage is programmed is generally shaped to triangle, rather than rectangle.This herein pulse is also referred to as " set sweep ".Utilize set sweep, can improve the amplitude of set pulse current, make that the phase-change material in all unit of device can reach T at least during set pulse OptTemperature, but since the pulse back edge part downward-sloping, device institute still changes into SM set mode in the unit.Crystallization preferably takes place in storer, and irrelevant with the variation of manufacture process and material.Crystallization has preferably been arranged, and the resistivity contrasts between set and the reset mode is just more remarkable.This means and improved the tolerance limit of difference in the storer that therefore, higher output reduces manufacturing cost in the Computer-Assisted Design, Manufacture And Test flow process by allowing.
Though when the amplitude of triangle set pulse during greater than the amplitude of traditional set pulse, memory device can reach the temperature up to Tm, triangular pulse has decay or downward-sloping back along part, even make the unit that reaches Tm also might be cooled to T OptAnd crystallization during in this temperature or near this temperature.Decay during the part of edge, back is enough slow, guarantees at about T OptThe time those unit produce crystallization preferably in those unit with the minimum required time limit.For the device that has big-difference in its one-element group of expection, the current transition time owing to the inclination of edge, back part from peak to peak need have the device of less difference longer than expection.
Fig. 2 illustrates the programming pulse sequence according to the phase transition storage of the embodiment of the invention.First pulse 204 is added on the component units of phase transition storage.Described pulse can be any traditional type.Typical shape is a rectangle, as shown in the figure, has constant current amplitude.Rect.p. relatively is easy to generate, and only gets final product (not shown) with single switching transistor.As described in the above background parts, first pulse can be to reset or decrystallized pulse the amplitude I of described pulse ResetEnough high, so that make the phase-change material in the unit reach T m, that is, and the decrystallized temperature of material.Perhaps, when first pulse 204 made the unit remain on predetermined state, current amplitude can be different.Also select the pulse width of first pulse 204 like this, make it have the length that is enough to obtain predetermined state.
Add second pulse 208 after adding first pulse 204, described second pulse is triangle normally, as shown in the figure.Second pulse 208 has the forward position part, and its amplitude peak or maximal value are I 2 (max), decay to minimum value I along part thereafter 2 (min)The forward position part has than the back along the much bigger slope of part.According to the changes in material on manufacture process and the phase-change material, and the circuit in the memory device component units, can select the shape of second pulse like this, so that when adding second pulse on each unit of memory device, second different state all changed into from first state in each unit.First and second states can be resetting and SM set mode described in the above-mentioned background part.The shaping of second pulse 208 relates to the setting of many parameters, comprises minimum and maximum value, rate of decay/pulse width, should be according to the structure and the type of used phase-change material, and the working heat environment of memory device is set.
I 2 (max)And I 2 (min)Level can adopt various numerical value.For example, I 2 (max)Can be significantly greater than I Reset, as long as or the pulse width long enough, the phase-change material that can guarantee to be added with in the unit of pulse can crystallization, I 2 (max)Also can be less significantly.Crystallization is the function of time of stopping under this temperature of temperature and material.This point can explain that Fig. 3 illustrates the curve map of crystallization time (in the phase change material stores unit) as the function of phase-change material temperature with Fig. 3.Described curve is shown in temperature and is lower than T OptThe time, the time crystallization that material require is long.So, needing lower current amplitude (roughly being converted to the lower temperature that in phase-change material, produces), long pulse width is come the set phase change material unit.It is desirable to, the current amplitude that set pulse should have can produce T in the unit as much as possible of memory device Opt, so that provide the shortest programming time limit, T for those unit MinAnd minimum SM set mode resistance.
I 2 (min)Level also can in very wide numerical range, change, comprise being as low as zero.It is desirable to the I of set pulse 2 (min)The upper limit temperature that can guarantee to be added with phase-change material in all unit of described pulse when end-of-pulsing, (reach T MinThe time) all be lower than T m
Fig. 4 illustrates the programming pulse sequence of another phase transition storage.Note, second pulse (set sweep) 308 in this example, though generally still can be described as triangle, ahead of the curve and the back along between short center section is arranged, it is zero slope basically that described center section has along the part speech with respect to forward position and back.And different with the linear attenuation slope of Fig. 2, the back has nonlinear slope along part among Fig. 4.In general, can there be very wide scope the back along the rate of decay of part, comprises polynomial expression, to numerical expression and exponential form, as long as the back makes all relevant inswept (sweep through) rapid crystallization temperature time limits of unit in the device along part.
The triangle set pulse is shown in the example graph of Fig. 5 the influence of cell temperature in the phase transition storage.As can be seen, even amplitude and decay given in for the triangle set pulse have under the very big temperature variation situation of (being represented by dash area), whole memory device still is scanned in the time limit in Tc fast, it is best that all unit in the device are all obtained, promptly minimum set resistance.This point also is shown in Fig. 6, and Fig. 6 illustrates for specific phase change memory device, the relation curve of resistive memory cell and set current.Begin with reset mode, when storage unit responds to the program current of various level, draw its resistance.The order that adds the program current of various level is represented with arrow, from the left side, moves right, and returns the left side.As can be seen, be elevated to fast near the set current value place before the reset level in set current and can obtain minimum set resistance.Best, when the set sweep pulse scanned from its peak value is downward, the triangular nature of set pulse can make this minimum set resistance quilt " locking ".Guarantee that there is minimum set resistance each unit in the memory device, provide good safety coefficient, higher manufacturing output and better product reliability with regard to the read operation that can be storer.
Also can understand the advantage of set sweep by considering Fig. 7, shown in Fig. 7 for the resistive memory cell of the big storage unit groups in the memory device and the relation curve of program current.Sizable difference that this device is formed in the one-element group because of its storer suffers damage.For all unit are become reset mode from SM set mode, (to each unit) adds amplitude is I ResetThe traditional rectangular pulse just.But the traditional programming technique that adds same rectangular set pulse (having constant amplitude) can not make each unit in the device turn back to SM set mode.This is because will realize that this point current amplitude must be at least up to I ConvBut when this amplitude, when the pulse end-stop, some unit, promptly those unit in zone 704 still rest on reset mode.On the contrary, if I 2 (min)Be chosen as shown in the figure, just can this thing happens with set sweep, because slowly decay to I in pulse 2 (min)Time before, all unit are included in zone 704 and zone those unit in 708, can be scanned in the time limit in Tc (so can guarantee to be returned to SM set mode).Set sweep is represented with loop 712, represents with dotted line along part thereafter.
Now turning to Fig. 8, is the block scheme of phase-change material memory part shown in the figure, comprises waveform shaping and driving circuit, in order to the voltage and current of programming required to device component unit level to be provided.Device is a feature with the array of storage unit 604, and each unit 604 can be with unique a pair of vertical conductor 614 and horizontal conductor 610 accesses in the described array.In this embodiment, horizontal conductor 610 allows the control signal from clock logic 620 is offered each unit 604, so that be switched on or switched off solid switch wherein.Described solid switch is connected with volume of phase-change material, and the another terminal of switch is connected to power supply or power supply return node.Therefore, electric current can or be absorbed by the phase-change material outflow when connecting switch.Described program current provides by vertical conductor 614.The outflow of program current or absorb and can or carry out by sensing circuit 618 or by waveform shaping and driving circuit 608 is according to reading or write operation is decided.Sensing circuit 618 can be a traditional circuit fully.
To design waveform shaping and driving circuit 608 like this, so that as described above first and second pulses provide the voltage and current of programming required to unit 604 level, wherein, second pulse has general triangle.Wave forming circuit can utilize traditional analog waveform wave-shaping circuit to realize, for example integrator/ramp circuit, exponential sum logarithmic circuit and other circuit.Drive the pulse that is shaped by traditional fan-out circuit then, receive voltage and current, realize set sweep with required level so that guarantee each unit 604 that is connected on the vertical conductor 604.
Determine by clock logic 620 with the timing that produces pulse associating.Clock logic 620 provides digital controlled signal to waveform shaping and driving circuit 608 and sensing circuit 608, makes these circuit according to correct timing or measure the resistance of storage unit 604 or provide to selected storage unit 604 and reset and set pulse.The access of unit 604 can be carried out at random, the access separately of each unit, or coordinate to carry out according to mode line by line, decide on the more senior requirement of accumulator system.
Can utilize various manufacture process, comprise that traditional complementary metal oxide semiconductor (CMOS) (CMOS) logical circuit manufacture process of do change is made memory device shown in Figure 8 slightly.Array and the waveform shaping and the driving circuit 608 of unit 604 can be on same integrated circuit (IC) chip, formed,, the cheaply advantage of the system integration on one chip can be obtained if like this.
Fig. 9 illustrates the block scheme of the portable use 904 of phase transition storage programming process described above.The embodiment work of the programming process of phase transition storage 908 as described aboves.Phase transition storage 908 can comprise one or more integrated circuit (IC) chip, and each chip has the memory array according to the various embodiment programmings of the programming technique of describing among above Fig. 1 to 8.These chips can be separate, memory device independently, they are arranged to module, for example traditional dynamic RAM (DRAM) module perhaps combines function on they and other sheet.In a kind of embodiment in back, phase transition storage 908 can be the part of I/O processor or microcontroller.
Use 904 can be for example portable notebook computer, numeral is static and/or video camera, personal digital assistant or move (honeycomb) cell-phone etc.In all these were used, electronic system comprised processor 910, and it comes storage code and data for its execution with phase transition storage 908 as program storage.Perhaps, phase transition storage 908 can be used as mass storage device, is used for the non-volatile memory of code and data.Portable use 904 installs by I/O interface 914 and other that for example personal computer or computer network etc. are communicated by letter.I/O interface 914 can insert computer peripheral bus, high-speed digital communication transmission line or non-guidance transmit antenna.Between processor and the phase transition storage 908 and the communication between processor and the I/O interface 904 can utilize traditional computer bus architecture to realize.
The above-mentioned parts of portable use 904 are powered by power bus 916 by battery 918.Because application 904 is generally battery-powered, its functional part comprises phase change memory device 908, and should be designed to provides required function in the low power consumption level.In addition, because the cause of the affined size of portable use, various parts shown in Figure 9 comprise phase change memory device 908, and higher functional density should be provided.Certainly, phase transition storage 908 also has other non-portable use, and this Wen Weiyu illustrates.These application comprise: for example can have benefited from nonvolatile semiconductor memory member for example large-scale network servers or other calculation element of phase transition storage.
As an example, phase-change material can be Ge 2Sb 2Te 5The pulse of demonstration can have peak current magnitude I Reset, described I ResetEnough high, make the unit in the array can be programmed to reset mode.The pulse of demonstration also can have negative edge, it in about 200nsec from I ResetDrop to zero current.But these characteristics only are example, and this programming technique also can use various phase-change material and have the pulse shape of slower negative edge.
The various embodiment of phase-change material memory programming technique (being called set sweep) more than have been described in general.In above instructions, be to consult concrete example embodiment the present invention is illustrated.But obviously can carry out various modifications and variations, and can not deviate from broad spirit of the present invention and the scope that proposes as appended claims it.For example, phase-change material can be the phase-change material that chalcogenide alloy maybe can be used as other suitable structure of programmable resistance.So this instructions and accompanying drawing should be thought illustrative and nonrestrictive.

Claims (20)

1. one kind is used for method that memory device is programmed, and described method comprises:
First pulse is added on the component units of described memory device, described unit has structural phase-change material storing the data of described unit, and described material is remained on first state, and
Then second pulse is added on the described unit so that described material is changed into second different state from described first state, described second pulse has general triangle.
2. the method for claim 1, wherein described second pulse has forward position part and back along part, and described forward position part has than described back along the steeper slope of part.
3. method as claimed in claim 2, wherein, described second pulse also is included in described forward position part and described back along the center section between the part, and the described relatively forward position of described center section and back have zero slope basically along part.
4. the method for claim 1, wherein make described first pulse have such shape, so that described material is remained on high resistance state, and make described second pulse have such shape, so that described material is remained on low resistance state.
5. method as claimed in claim 4, wherein, described second pulse has such amplitude and rate of decay, if make described first pulse and described second pulse are added on each component units of described memory device, each component units of described memory device is changed into described second state from described first state, and is irrelevant with the changes in material in manufacture process and the described device.
6. method as claimed in claim 5, wherein, if with described second pulse be added to described device to the small part component units, so, the described amplitude of described second pulse is enough high, is enough to make the phase-change material in these unit to reach decrystallized temperature.
7. method as claimed in claim 6, wherein, described rate of decay is enough slow, is enough to make those component units that reached decrystallized temperature with enough slow speed cooling, makes that the described phase-change material in those unit is changed into described second state from described first state.
8. memory device, it comprises:
Array with a plurality of component units, each unit have the structural phase-change material of the data that are used for storing described unit;
Waveform shaping and driving circuit, it connects into provides the voltage and current level of programming required to described a plurality of component units, described shaping and driving circuit produce first pulse, it is added to one of a plurality of component units of described memory device, make the material of described component units remain on first state, then second pulse is added to described component units, makes its described material change into second different state from described first state, wherein said second pulse has general triangle.
9. memory device as claimed in claim 8, wherein, for having forward position part and back along part, described forward position part has than described back along the steeper slope of part with described second pulse shaping for described waveform shaping and driving circuit.
10. memory device as claimed in claim 8, wherein, described material can be changed into low resistance state from high resistance state in the mode of response, described circuit makes described first pulse have such shape, make and when applying described first pulse, to make the described material in the described component units remain on described high resistance state, and make described second pulse have such shape, make when applying described second pulse, to make the described material in the described component units remain on described low resistance state.
11. memory device as claimed in claim 10, wherein, described circuit makes described second pulse have such shape: described second pulse has such amplitude and rate of decay, if make described first pulse and described second pulse are added on each component units of described memory device, each component units of described memory device is changed into described second state from described first state, and is irrelevant with the changes in material in manufacture process and the described device.
12. memory device as claimed in claim 11, wherein, described circuit makes described second pulse have such shape: if with described second pulse be added to described device to the small part component units, so, the described amplitude of described second pulse is enough high, is enough to make the phase-change material in these unit to reach decrystallized temperature.
13. memory device as claimed in claim 12, wherein, described circuit makes described second pulse have such shape: described rate of decay is enough slow, be enough to make those component units that reached decrystallized temperature with enough slow speed cooling, make that the described phase-change material in those unit is changed into described second state from described first state.
14. memory device as claimed in claim 8, wherein, described array and described waveform shaping and driving circuit are formed on same integrated circuit (IC) chip.
15. one kind is used for method that memory device is programmed, described method comprises:
First pulse is added on the component units of described memory device, described unit has the structural phase-change material of the data that are used for storing described unit, and described first pulse is used for described material is remained on first state, and
Then second pulse being added to makes described material change into second different state from described first state on the described unit, described second pulse has effective time limit, the signal level of described second pulse constantly descends in time in described effective time limit, and wherein, described second state is changed into from described first state in described unit in described effective time limit.
16. method as claimed in claim 15 wherein, makes described first pulse have such shape, so that described material is remained on high resistance state, and makes described second pulse have such shape, so that described material is remained on low resistance state.
17. method as claimed in claim 16, wherein, described second pulse has such amplitude and rate of decay, if make described first pulse and described second pulse are added on each component units of described memory device, each component units of described memory device is changed into described second state from described first state, and is irrelevant with the changes in material in manufacture process and the described device.
18. a memory device, it comprises:
Array with a plurality of component units, each unit have the structural phase-change material of the data that are used for storing described unit;
Waveform shaping and driving circuit, it connects into provides the voltage and current level of programming required to described a plurality of component units, described shaping and driving circuit produce first pulse, it is added to one of a plurality of component units of described memory device, make the material of described component units remain on first state, then second pulse is added to described component units, make its described material change into second different state from described first state, described second pulse has effective time limit, described circuit makes described second pulse have such shape, make the signal level of described second pulse in described effective time limit constantly descend in time, and wherein, described second state is changed into from described first state in described unit in described effective time limit.
19. memory device as claimed in claim 18, wherein, make described first pulse have such shape, so that described material is remained on high resistance state, and make described second pulse have such shape, so that described material is remained on low resistance state.
20. memory device as claimed in claim 19, wherein, described second pulse has such amplitude and rate of decay, if make described first pulse and described second pulse are added on each component units of described memory device, each component units of described memory device is changed into described second state from described first state, and is irrelevant with the changes in material in manufacture process and the described device.
CNB028295781A 2002-09-11 2002-09-11 Programming a phase-change material memory Expired - Lifetime CN100449647C (en)

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Families Citing this family (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6813177B2 (en) 2002-12-13 2004-11-02 Ovoynx, Inc. Method and system to store information
TWI288931B (en) * 2004-06-19 2007-10-21 Samsung Electronics Co Ltd Phase-change memory element driver circuits using measurement to control current and methods of controlling drive current of phase-change memory elements using measurement
DE602005024840D1 (en) 2004-09-30 2010-12-30 Nxp Bv INTEGRATED CIRCUIT WITH MEMORY CELLS WITH A PROGRAMMABLE RESISTANCE AND METHOD FOR ADDRESSING MEMORY CELLS WITH A PROGRAMMABLE RESISTANCE
ATE469419T1 (en) 2004-10-21 2010-06-15 Nxp Bv INTEGRATED CIRCUIT WITH PHASE CHANGE MEMORY CELLS AND METHOD FOR ADDRESSING PHASE CHANGE MEMORY CELLS
JP4273087B2 (en) 2005-02-08 2009-06-03 エルピーダメモリ株式会社 Semiconductor memory device and writing method thereof
KR100699837B1 (en) 2005-04-04 2007-03-27 삼성전자주식회사 Semiconductor memory device and programming method thereof
US7635855B2 (en) 2005-11-15 2009-12-22 Macronix International Co., Ltd. I-shaped phase change memory cell
US7449710B2 (en) 2005-11-21 2008-11-11 Macronix International Co., Ltd. Vacuum jacket for phase change memory element
KR100773095B1 (en) 2005-12-09 2007-11-02 삼성전자주식회사 Phase change memory device and program method thereof
US7626859B2 (en) * 2006-02-16 2009-12-01 Samsung Electronics Co., Ltd. Phase-change random access memory and programming method
US7457146B2 (en) 2006-06-19 2008-11-25 Qimonda North America Corp. Memory cell programmed using a temperature controlled set pulse
US7583527B2 (en) 2006-09-29 2009-09-01 Infineon Technologies Ag Tunable resistor and method for operating a tunable resistor
JP4524684B2 (en) * 2006-11-21 2010-08-18 エルピーダメモリ株式会社 Memory reading circuit and method
US7718989B2 (en) 2006-12-28 2010-05-18 Macronix International Co., Ltd. Resistor random access memory cell device
US7701759B2 (en) 2007-02-05 2010-04-20 Macronix International Co., Ltd. Memory cell device and programming methods
JP5201138B2 (en) * 2007-06-15 2013-06-05 日本電気株式会社 Semiconductor device and driving method thereof
US7729161B2 (en) 2007-08-02 2010-06-01 Macronix International Co., Ltd. Phase change memory with dual word lines and source lines and method of operating same
WO2009062799A1 (en) * 2007-11-13 2009-05-22 Igor Anatolievitch Popov An exchange for telecommunications, a switch and switch board therefore, and a method of switching
TWI358827B (en) 2007-11-26 2012-02-21 Nanya Technology Corp Data programming circuits and memory programming m
CN101458959B (en) * 2007-12-12 2011-09-21 南亚科技股份有限公司 Data programming circuit and memory programming method
US8064247B2 (en) 2009-01-14 2011-11-22 Macronix International Co., Ltd. Rewritable memory device based on segregation/re-absorption
US8350316B2 (en) 2009-05-22 2013-01-08 Macronix International Co., Ltd. Phase change memory cells having vertical channel access transistor and memory plane
US7968876B2 (en) 2009-05-22 2011-06-28 Macronix International Co., Ltd. Phase change memory cell having vertical channel access transistor
US8809829B2 (en) 2009-06-15 2014-08-19 Macronix International Co., Ltd. Phase change memory having stabilized microstructure and manufacturing method
US8406033B2 (en) 2009-06-22 2013-03-26 Macronix International Co., Ltd. Memory device and method for sensing and fixing margin cells
US8363463B2 (en) 2009-06-25 2013-01-29 Macronix International Co., Ltd. Phase change memory having one or more non-constant doping profiles
US8238149B2 (en) 2009-06-25 2012-08-07 Macronix International Co., Ltd. Methods and apparatus for reducing defect bits in phase change memory
US7894254B2 (en) 2009-07-15 2011-02-22 Macronix International Co., Ltd. Refresh circuitry for phase change memory
US8198619B2 (en) 2009-07-15 2012-06-12 Macronix International Co., Ltd. Phase change memory cell structure
US8110822B2 (en) 2009-07-15 2012-02-07 Macronix International Co., Ltd. Thermal protect PCRAM structure and methods for making
US8064248B2 (en) 2009-09-17 2011-11-22 Macronix International Co., Ltd. 2T2R-1T1R mix mode phase change memory array
US7944740B2 (en) * 2009-09-22 2011-05-17 International Business Machines Corporation Multi-level cell programming of PCM by varying the reset amplitude
US8178387B2 (en) 2009-10-23 2012-05-15 Macronix International Co., Ltd. Methods for reducing recrystallization time for a phase change material
US8729521B2 (en) 2010-05-12 2014-05-20 Macronix International Co., Ltd. Self aligned fin-type programmable memory cell
US8310864B2 (en) 2010-06-15 2012-11-13 Macronix International Co., Ltd. Self-aligned bit line under word line memory array
US8395935B2 (en) 2010-10-06 2013-03-12 Macronix International Co., Ltd. Cross-point self-aligned reduced cell size phase change memory
US8497705B2 (en) 2010-11-09 2013-07-30 Macronix International Co., Ltd. Phase change device for interconnection of programmable logic device
US8467238B2 (en) 2010-11-15 2013-06-18 Macronix International Co., Ltd. Dynamic pulse operation for phase change memory
JP2012244180A (en) 2011-05-24 2012-12-10 Macronix Internatl Co Ltd Multi-layer structure and manufacturing method for the same
US9336878B2 (en) 2014-06-18 2016-05-10 Macronix International Co., Ltd. Method and apparatus for healing phase change memory devices
US9159412B1 (en) 2014-07-15 2015-10-13 Macronix International Co., Ltd. Staggered write and verify for phase change memory
CN105448347B (en) * 2014-08-21 2018-10-23 中芯国际集成电路制造(上海)有限公司 The test method of phase transition storage
US9672906B2 (en) 2015-06-19 2017-06-06 Macronix International Co., Ltd. Phase change memory with inter-granular switching
US10593403B2 (en) 2016-02-23 2020-03-17 Hewlett Packard Enterprise Development Lp Memristive arrays with a waveform generation device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3448302A (en) * 1966-06-16 1969-06-03 Itt Operating circuit for phase change memory devices
GB1372414A (en) * 1971-11-26 1974-10-30 Marconi Co Ltd Semiconductor memory device arrangements
US3922648A (en) * 1974-08-19 1975-11-25 Energy Conversion Devices Inc Method and means for preventing degradation of threshold voltage of filament-forming memory semiconductor device
US3980505A (en) * 1973-09-12 1976-09-14 Buckley William D Process of making a filament-type memory semiconductor device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4389713A (en) * 1981-06-10 1983-06-21 Harris Corporation Dual pulse method of writing amorphous memory devices
US6075719A (en) * 1999-06-22 2000-06-13 Energy Conversion Devices, Inc. Method of programming phase-change memory element

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3448302A (en) * 1966-06-16 1969-06-03 Itt Operating circuit for phase change memory devices
GB1372414A (en) * 1971-11-26 1974-10-30 Marconi Co Ltd Semiconductor memory device arrangements
US3980505A (en) * 1973-09-12 1976-09-14 Buckley William D Process of making a filament-type memory semiconductor device
US3922648A (en) * 1974-08-19 1975-11-25 Energy Conversion Devices Inc Method and means for preventing degradation of threshold voltage of filament-forming memory semiconductor device

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