CN100446417C - Differential circuit for reading out signal of integrated ISFET sensor based on two modes - Google Patents

Abstract

The present invention relates to the technical field of a differential amplifier, particularly to a differential read-out circuit for integrated ISFET sensor signals based on two modes. A two-mode integrated ISFET signal amplifier comprises a difference amplifier which is composed of a Ma1 and a Mb1; a bootstrap circuit which is composed of an Ma2, an Mb2 and an MC, current image circuits M9, M8, M7, M2 and M1 and current sources I1a, I1b andI0. A differential circuit of an ISFET current source signal comprises an ISFET amplifier and an REFET amplifier; two follower amplifiers are composed of a quasi reference electrode PRE, the M1 and the M3. The present invention is suitable for processing high-precision ISFET sensor input signals with wide dynamic ranges.

Description

Based on double mode integrated ISFET sensor signal differential read-out circuit

Technical field

The present invention relates to the differential amplifier technical field, particularly a kind of based on double mode integrated ISFET sensor signal differential read-out circuit.

Background technology

The various transducers that constituted by ion sensing fet ISFET (Ion Sensitive Field Effect Transistor), biochemical reaction by different sensitive thin-film materials on the ISFET grid and detected solution intermediate ion, can be used to detect multinomial biochemical indicator, as acidity-basicity ph and pCO ₂, pO ₂Deng.This requires under certain condition of work, and port voltage that ISFET produced or electric current and these biochemical indicators are linear relationship one to one.

The electric current that ISFET produced, voltage signal could be connected with the rear end electronic system after generally need gathering, amplify through the front-end detection circuit, form practical measuring instrument.A present research focus is that ISFET and testing circuit is integrated by the CMOS technology of standard, like this, has both improved detection sensitivity and antijamming capability, helps carrying out high-acruracy survey; On same chip, also can realize simultaneously the multichannel sensor (being that multi-parameter detects) of ISFET easily, and can be further to carry out single-chip synthetic with A/D converter, digital signal processor, logic control circuit etc., thereby make biochemical indicator tester based on ISFET towards intellectuality, microminiaturization, low-power consumption, portable development.

Because the instability of the reference potential that is produced after reference electrode in the ISFET transducer and the solution effects causes the drift of ISFET output signal.Thereby, in signal deteching circuit, be necessary that a certain reference signal of Signals ﹠ Systems that ISFET is produced is carried out difference, to eliminate caused " common mode " error such as reference potential.Up to now, go up the existing report of the ISFET sensor signal differential read-out circuit of forming with the standard discrete element at PCB (PrintedCircuit Board), but yet there are no and the integrated signal differential reading circuit of ISFET transducer single chip CMOS.

In the biochemical reaction of ion detects,, often need ISFET both can be biased in linear zone and also can be biased in the saturation region for improving the linear dynamic range of sensitivity, stability or signal that sensor signal reads.In the past, to being operated in the ISFET of these two zoness of different, needing two and overlapped independently reading circuit.The present invention only uses a common reading circuit, by the digital programming Control to bias current, can as required same ISFET be biased on the different operating point in measurement.In the linear working range of transducer, has the ability that required constant voltage and constant current are provided to ISFET.

Summary of the invention

The purpose of this invention is to provide a kind of based on double mode integrated ISFET sensor signal differential read-out circuit, comprise: ISFET amplifier, REFET amplifier, accurate reference electrode PRE, and the current mode differential amplifier that constitutes by transistor, resistance and current source, the ISFET amplifier is connected with REFET amplifier symmetry, the grid of ISFET amplifier and REFET amplifier is setovered by same reference electrode PRE surely, and the ISFET amplifier is connected the current mode differential amplifier with the REFET amplifier by the form of following.

In the such scheme, described ISFET amplifier and REFET amplifier all are to adopt double mode integrated ISFET signal amplifier structure.

In the such scheme, described double mode integrated ISFET signal amplifier structure comprises differential amplifier, boostrap circuit, current mirror circuit and current source (I1a, I1b and I0), wherein, one end of current mirror circuit is connected in boostrap circuit, the other end of current mirror circuit is connected in differential amplifier, boostrap circuit is connected in differential amplifier, and differential amplifier is connected in current source I0 simultaneously; Current source I0 is connected in differential amplifier, is used to provide the bias current of differential amplifier; Current source I1a and current source I1b insert this amplifier architecture by diverter switch SW, through current mirror circuit, for boostrap circuit provides bias current I1.

In the such scheme, described double mode integrated ISFET signal amplifier structure also comprises the building-out capacitor Co of a cross-over connection between amplifier out and ground wire, in order to improve the stability of amplifier system OTA.

In the such scheme, a transistor Ma1 in the differential input stage of described ISFET amplifier is processed as ISFET, and the transistor (Ma1) in the differential input stage of described REFET amplifier is processed as REFET.

In the such scheme, ISFET is the transistor that grid is made of the thin-film material to the ionic reaction sensitivity, and REFET is the transistor that grid is made of the thin-film material to the ionic reaction relative insensitivity.

Description of drawings

Fig. 1 is prime ISFET signal amplifier circuit figure of the present invention.

Fig. 2 is a back of the present invention level ISFET current mode signal differential circuit.

Embodiment

Design and the integrated signal read circuit of ISFET single-chip, can be by the characteristic of the same ISFET of digital measurement programming at saturation region and linear zone, and can under the condition of big dynamically input range, keep the consistency (being constant voltage and constant current conditions) of the required condition of work of ISFET; Simultaneously, the ability that has elimination sensing system " common mode " error.

Another characteristics of the present invention be exactly the differential signal treatment circuit that is proposed be based on current mode signal transformation, thereby, be fit to handle high accuracy, have ISFET sensor input signal than great dynamic range.

The present invention is made up of the front and back stages circuit.Fig. 1 circuit is prime ISFET signal amplifier (claiming an OTA:Operational Trans-conductance Amplifier again) circuit; Fig. 2 circuit is a back level ISFET current mode signal differential circuit.Two circuit of this that proposes in the invention all can be integrated on the one chip by CMOS technology and ISFET.

Shown in Fig. 1 circuit, because differential levels that Ma1 and Mb1 formed, the electric current of ISFET Ma1 will be by constant at I0/2, and the value of Vds will determine whether ISFET is operated in linear zone or saturation region.According to the characteristic of ISFET, the pinch-point voltage Vsat of Ma1 can be expressed as:

$\mathrm{Vsat}\left(\mathrm{Ma}1\right)=\mathrm{Vgs}\left(\mathrm{Ma}1\right)-\mathrm{Vt}\left(\mathrm{Ma}1\right)=\sqrt{I0/{\mathrm{\β}}_{\mathrm{Ma}1}}---\left(1\right)$

Wherein Vgs (Ma1) refers to the gate source voltage of ISFET Ma1, and Vt (Ma1) is the threshold voltage of Ma1.If the Vds of Ma1 is greater than its critical voltage Vsat, Ma1 will be operated in the saturation region; On the contrary, less than Vsat, Ma1 will be operated in linear zone as if Vds.Vds can regulate by the lifting of Mc both end voltage, and relation is promptly arranged:

Vds(Ma1)＝Vgs(Mc)-Vgs(Ma2) (2)

Consider that Mc and Ma2 are operated in the saturation region, can release by the port identity equation of MOSFET:

$\mathrm{Vgs}\left(\mathrm{Mc}\right)=\sqrt{2I1{/\mathrm{\β}}_{\mathrm{Mc}}}+\mathrm{Vt}\left(\mathrm{Mc}\right)---\left(3\right)$

$\mathrm{Vgs}\left(\mathrm{Ma}2\right)=\sqrt{I0/{\mathrm{\β}}_{\mathrm{Ma}2}}+\mathrm{Vt}\left(\mathrm{Ma}2\right)---\left(4\right)$

Wherein I1 is the bias current of Mc.Corresponding Ma1 critical voltage Vsat considers Vt (Mc) ≈ Vt (Ma2), can be got by formula (1)～(4):

$I1c=0.5{(\sqrt{{\mathrm{\β}}_{\mathrm{Mc}}/{\mathrm{\β}}_{\mathrm{Ma}1}}+\sqrt{{\mathrm{\β}}_{\mathrm{Mc}}/{\mathrm{\β}}_{\mathrm{Ma}2}})}^{2}I0---\left(5\right)$

I1c can be described as the critical current of I1 again, even selects a certain bias current I1a, makes I1=I1a＜I1c, and like this, Ma1 just is operated in linear zone, and Id=I0/2 is arranged, $\mathrm{Vds}=\sqrt{2I1a/{\mathrm{\β}}_{\mathrm{Mc}}}-\sqrt{I0/{\mathrm{\β}}_{\mathrm{Ma}2}};$ Again if select another bias current I1b, make I1=I1b＞I1c, same, Ma1 just is operated in the saturation region, and Id=I0/2 is arranged, $\mathrm{Vds}=\sqrt{2I1b/{\mathrm{\β}}_{\mathrm{Mc}}}-\sqrt{I0/{\mathrm{\β}}_{\mathrm{Ma}2}}.$ Bias current that these are constant and voltage will remain unchanged in the linear sensor input range, guarantee the certainty of measurement and the consistency of ISFET film potential.

In Fig. 1 circuit, Ma1 is n type ISFET, and Mb1 is the n type MOSFET with the Ma1 symmetry, and all the other transistors are shown in icon or p type MOSFET or n type MOSFET.If Ma1 changes p type ISFET into, Fig. 1 circuit should be done corresponding complementary conversion.Co is a building-out capacitor, in order to improve the stability of OTA system.Current source I0 provides the bias current of input differential stage (Ma1 and Mb1), and in addition, current source I1a and I1b insert amplifier by diverter switch SW, through current mirror (M9, M8, M7, M2 M1), provides the bias current I1 of metal-oxide-semiconductor Mc.Form boostrap circuit by metal-oxide-semiconductor Ma2, Mb2 and Mc,, promptly produce ISFET in linear zone required constant current and constant voltage condition if I1a inserts; If I1b inserts, promptly produce ISFET constant current and the constant voltage condition required in the saturation region.In a single day these constant bias conditions are set up, and will can not change along with the variation of input signal (film potential of sensitive grid).

Fig. 2 is the structured flowchart of ISFET current mode signal differential circuit, the public same reference electrode PRE of ISFET and REFET, and whole differential detection circuit novel structure can realize that the high accuracy of input signal and great dynamic range detect.ISFETAMP and REFETAMP constitute two follow-up amplifiers with M1 and M3 respectively, be the variation of the Vo1 film potential of following corresponding input ISFET sensitive grid and the variation of the passivating film current potential that Vo2 also follows REFET, conditions of work such as constant voltage and constant current be provided for simultaneously ISFET and REFET two sensors.Like this, the differential signal measurement of ISFET and REFET two sensors is converted to the measurement to the difference (Vo1-Vo2) of Vo1 and Vo2.

Back level current mode signal differential circuit is realized the voltage signal of difference (Vo1-Vo2) and the conversion of current signal, and (Vo1-Vo2) is linear for output current signal Id and difference.Wherein constant-current source I2 and I3 provide two bias currents of following output stage respectively.Id ', I2 and I3 satisfy following expression:

Id′＝(Vo1-Vo2)/Rd (6)

I2＝Id1+Id′ (7)

I3＝Id2-Id′ (8)

Adjustment M0 and M7, M2 and M4, M5 and M6 and current mirrors such as M8 and M9 are at 1 o'clock to breadth length ratio (W/L) scale parameter of pipe, and then Id satisfies relation,

Id＝Id2-Id1 (9)

By formula (6), (7), (8) and (9), can further obtain,

Id＝I3-I2+2·(Vo1-Vo2)/Rd (10)

The differential output signal Vout of whole integrated ISFET sensor signal is obtained by following formula,

Vout＝R0·Id＝R0·[(I3-I2)+2·(Vo1-Vo2)/Rd] (11)

By formula (11) as can be seen, Vout and (Vo1-Vo2) relation in direct ratio, its proportionality coefficient is 2Ro/Rd, so the gain of measuring circuit can realize by adjusting Ro/Rd ratio size.

In Fig. 2 circuit, ISFET amplifier and REFET amplifier all have internal circuit configuration as shown in Figure 1, and different is: (1) concerning the ISFET amplifier, the Ma1 in Fig. 1 circuit is ISFET; (2) and concerning the REFET amplifier, the Ma1 in Fig. 1 circuit should be REFET.So-called REFET (Reference Field Effect Transistor) is exactly to compare with ISFET, and the grid of REFET is by the insensitive thin-film material of ionic reaction is formed.Simultaneously, the grid of ISFET and REFET is setovered by same reference electrode PRE (Pseudo ReferenceElectrode) surely.With ISFET signal and REFET signal differential, can eliminate " common mode " error of system, float as the instability of PRE current potential, the temperature of device etc.

Claims (6)

1, a kind of based on double mode integrated ISFET sensor signal differential read-out circuit, comprise: ISFET amplifier, REFET amplifier, accurate reference electrode PRE, and the current mode differential amplifier that constitutes by transistor, resistance and current source, it is characterized in that, the ISFET amplifier is connected with REFET amplifier symmetry, the grid of ISFET amplifier and REFET amplifier is setovered by same reference electrode PRE surely, and the ISFET amplifier is connected the current mode differential amplifier with the REFET amplifier by the form of following.

2, according to claim 1ly it is characterized in that described ISFET amplifier and REFET amplifier all are to adopt double mode integrated ISFET signal amplifier structure based on double mode integrated ISFET sensor signal differential read-out circuit.

3, according to claim 2 based on double mode integrated ISFET sensor signal differential read-out circuit, it is characterized in that, described double mode integrated ISFET signal amplifier structure comprises differential amplifier, boostrap circuit, current mirror circuit and current source (I1a, I1b and I0), wherein, one end of current mirror circuit is connected in boostrap circuit, the other end of current mirror circuit is connected in differential amplifier, boostrap circuit is connected in differential amplifier, and differential amplifier is connected in current source I0 simultaneously; Current source I0 is connected in differential amplifier, is used to provide the bias current of differential amplifier; Current source I1a and current source I1b insert this amplifier architecture by diverter switch SW, through current mirror circuit, for boostrap circuit provides bias current I1.

4, according to claim 2 based on double mode integrated ISFET sensor signal differential read-out circuit, it is characterized in that, described double mode integrated ISFET signal amplifier structure also comprises the building-out capacitor Co of a cross-over connection between amplifier out and ground wire, in order to improve the stability of amplifier system OTA.

5, according to claim 1 based on double mode integrated ISFET sensor signal differential read-out circuit, it is characterized in that, a transistor Ma1 in the differential input stage of described ISFET amplifier is processed as ISFET, and the transistor (Ma1) in the differential input stage of described REFET amplifier is processed as REFET.

6, according to claim 1 based on double mode integrated ISFET sensor signal differential read-out circuit, it is characterized in that, ISFET is the transistor that grid is made of the thin-film material to the ionic reaction sensitivity, and REFET is the transistor that grid is made of the thin-film material to the ionic reaction relative insensitivity.

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